Fully digital magnetic levitation product calibration equipment and calibration method

Abstract

This invention discloses a fully digital magnetic levitation product calibration device and method. The device comprises a main control circuit, an eddy current resonance synchronization unit, a displacement signal detection unit, a displacement signal ADC conversion detection unit, a position sensor terminal voltage detection unit, a temperature detection unit, a symmetry detection unit, a zero adjustment output unit, an amplitude adjustment output unit, and a PID control output control unit. The fully digital magnetic levitation product calibration device and method proposed in this invention can improve the operational stability of the magnetic levitation system.

Description

Technical Field

[0001] The present invention belongs to the field of magnetic levitation technology and relates to a calibration device, in particular to a fully digital magnetic levitation product calibration device and a calibration method. Background Art

[0002] In a magnetic levitation system, a displacement sensor is generally required. The displacement sensor detects the displacement of the rotating bearing and sends it to the bearing controller. The bearing controller adjusts the current of the bearing winding according to the displacement signal. The current affects the magnetic force of the bearing, and the magnetic force controls the movement of the bearing, thereby indirectly controlling the displacement of the rotating bearing, enabling the rotating bearing and protecting the bearing from collision.

[0003] In practical applications, when the displacement sensor is mounted on the motor base, it relies on the mechanical contact of the center mold to maintain mechanical symmetry. This means the sensor is mechanically mounted on the centerline. However, the magnetic levitation system reads the sensor's resonant voltage signal, which requires electrical signal symmetry. This means the electrical signal data involved in PID position control and regulation must lie on the sensor's centerline. These two symmetry centerlines do not completely coincide. Factors such as the installation environment, mold end face cleanliness, mounting proximity, reflected magnetic permeability, and sensor ceramic end face thickness can all contribute to significant electrical signal symmetry errors. This results in low displacement signal accuracy, limited displacement control by the bearing controller, and unreliable magnetic levitation system operation.

[0004] In view of this, there is an urgent need to design a new magnetic levitation product verification device to overcome at least some of the above-mentioned defects of the existing magnetic levitation product verification device. Summary of the Invention

[0005] The present invention provides a fully digital magnetic levitation product calibration device and a calibration method, which can improve the stability of the magnetic levitation system operation.

[0006] In order to solve the above technical problems, according to one aspect of the present invention, the following technical solution is adopted:

[0007] A fully digital magnetic levitation product verification device, the verification device comprising:

[0008] A main control circuit, for processing setting data; the main control circuit includes a main processor;

[0009] The eddy current resonance synchronization unit is used to generate a synchronous resonance signal, which is transmitted to the input end of each displacement eddy current sensor to generate different eddy current signal voltages according to the displacement;

[0010] A displacement signal detection unit, whose input end is connected to the output end of the displacement eddy current sensor, is used to receive the eddy current signal voltage output by the paired displacement eddy current sensor and generate a real-time voltage signal of the bearing displacement position through an amplifying circuit;

[0011] A displacement signal ADC conversion detection unit, whose input end is connected to the output end of the displacement signal detection unit, is used to convert the voltage signal of the displacement detection from an analog quantity to a digital voltage that can be processed by the main processor; the output end of the displacement signal ADC conversion detection unit is connected to the input end of the main control circuit;

[0012] a position sensor terminal voltage detection unit, whose input end is connected to the output end of the displacement eddy current sensor, for converting the analog voltage output by the displacement eddy current sensor into a digital voltage that can be processed by the main control circuit; and an output end of the position sensor terminal voltage detection unit is connected to the input end of the main control circuit;

[0013] A temperature detection unit for detecting external temperature; an output end of the temperature detection unit is connected to an input end of the main control circuit for sending detected external temperature data to the main control circuit;

[0014] A symmetry detection unit is used to input the current signal of the magnetic bearing coil as a sensor signal, read the voltage signal, and determine the symmetry of the two sensors, which is regarded as the detection of the center line of the coil; the output end of the symmetry detection unit is connected to the input end of the main control circuit;

[0015] a zero position adjustment output unit, the input end of which is connected to the output end of the main control circuit, and the output end of the zero position adjustment output unit is connected to the input end of the displacement signal detection unit, for generating an adjustment zero position signal voltage according to the output of the main control circuit and sending the adjusted zero position signal voltage to the displacement signal detection unit, thereby adjusting the zero position forming voltage;

[0016] an amplitude adjustment output unit, the input end of which is connected to the output end of the main control circuit, and the output end of the amplitude adjustment output unit is connected to the input end of the displacement signal detection unit, for generating an amplitude adjustment signal voltage according to the output of the main control circuit and sending it to the displacement signal detection unit, thereby adjusting the amplitude to form a voltage; and

[0017] The PID adjustment output control unit has its input end connected to the output end of the main control circuit to generate a voltage signal for adjusting the PID output and output it to the bearing coil control.

[0018] As an embodiment of the present invention, the main control circuit includes a main processor, and the main processor adopts a 32-bit ARM Cortex-M7 core with a double-precision FPU and an L1 cache.

[0019] As an embodiment of the present invention, the eddy current resonance synchronization unit includes a first low-dropout linear regulator LDO1, a first transistor T1, a second transistor T2, a plurality of capacitors and a plurality of resistors;

[0020] The third pin IN of the first low-dropout linear regulator LDO1 is connected to the first power supply voltage and the first end of the fifth capacitor C5 respectively, and the second end of the fifth capacitor C5 is grounded;

[0021] The second pin OUT of the first low-dropout linear regulator LDO1 is respectively connected to the collector of the first transistor T1, the first end of the fourth zero resistor R440, the first end of the fourth zero capacitor E40, the first end of the sixth capacitor C6, the first end of the first resistor R1, and the third end of the first zener diode Z1;

[0022] The first pin ADJ of the first low-dropout linear regulator LDO1 is connected to the second end of the fourth four-zero resistor R440 and the first end of the second five-zero resistor R250 respectively;

[0023] The second end of the fourth zero capacitor E40, the second end of the sixth capacitor C6, the first end of the fourth first capacitor E41, and the first end of the seventh capacitor C7 are grounded respectively; the second end of the second fifth zero resistor R250 is connected to the second end of the fourth first capacitor E41 and the second end of the seventh capacitor C7 respectively;

[0024] The base of the first transistor T1 is respectively connected to the second end of the first resistor R1, the first end of the first voltage stabilizing diode Z1, and the second end of the fourth sixty-zero capacitor C460;

[0025] The base of the second transistor T2 is respectively connected to the second end of the fourth sixty-second capacitor C462, the first end of the second resistor R2, and the third end of the second voltage stabilizing diode Z2; the first end of the fourth sixty-zero capacitor C460 is connected to the first end of the fourth sixty-second capacitor C462;

[0026] The emitter of the first transistor T1 is connected to the emitter of the second transistor T2 , and the collector of the second transistor T2 is connected to the second end of the second resistor R2 and the first end of the second voltage stabilizing diode Z2 .

[0027] As an embodiment of the present invention, the fourth zero capacitor E40, the fourth first capacitor E41, the sixth capacitor C6, and the seventh capacitor C7 are filter capacitors; the first transistor T1, the first voltage zener diode Z1, the fourth six zero capacitor C460, and the first resistor R1 constitute a positive pulse amplification circuit; the second transistor T2, the second voltage zener diode Z2, the fourth six second capacitor C462, and the second resistor R2 constitute a negative pulse amplification circuit.

[0028] As an embodiment of the present invention, the zero adjustment output unit includes an eighth A chip U8A, a fifth seventh capacitor C57, a sixth third capacitor C63, a first resistor R1, a seventh resistor R7, a first ninth resistor R19, a twenty fifth resistor R25, a second capacitor C2, a twenty eighth chip U28, a sixth eighth chip U68, a first one nine resistor R119, a first twenty zero resistor R120, a first twenty one resistor R121, a first twenty two resistor R122, a third fifty six resistor R356, a seventh fourth zero capacitor C740, and a sixth twenty two capacitor C622;

[0029] The inverting input terminal of the eighth A chip U8A is respectively connected to the second end of the first third resistor R13 and the second end of the sixth third capacitor C63; the non-inverting input terminal of the eighth A chip U8A is respectively connected to the second end of the first ninth resistor R19, the first end of the second fifth resistor R25, and the first end of the second capacitor C2;

[0030] The output end of the eighth chip A U8A is respectively connected to the first end of the sixth capacitor C63 and the first end of the seventh resistor R7; the second end of the seventh resistor R7 is respectively connected to the second end of the first resistor R1, the first end of the first resistor R13, and the first end of the fifth capacitor C57; the second end of the fifth capacitor C57 is grounded; the second end of the second resistor R25 and the second end of the second capacitor C2 are respectively grounded;

[0031] The first resistor R1, the seventh resistor R7, the first ninth resistor R19, the second fifth resistor R25, the fifth seventh capacitor C57 and the sixth third capacitor C63 form a low-pass filter circuit, and the eighth A chip U8A is an amplifier; the position signal is filtered by the low-pass filter circuit and then enters the eighth A chip U8A for amplification;

[0032] The sixty-eighth chip U68 includes a sixty-eighthA chip U68A, a sixty-eighthB chip U68B, a sixty-eighthC chip U68C, and a sixty-eighthD chip U68D;

[0033] The Vout pin of the second-eighth chip U28 is connected to the non-inverting input terminal of the sixth-eighth chip U68A, the INV pin of the second-eighth chip U28 is connected to the inverting input terminal of the sixth-eighth chip U68A, and the output terminal of the sixth-eighth chip U68A is respectively connected to the RFB pin of the second-eighth chip U28 and the first end of the first-nineth resistor R119;

[0034] The inverting input terminal of the 68th B chip U68B is respectively connected to the first end of the 356th resistor R356 and the second end of the 119th resistor R119; the second end of the 356th resistor R356 is respectively connected to the output terminal of the 68th B chip U68B and the first end of the 120th resistor R120; the non-inverting input terminal of the 68th B chip U68B is grounded;

[0035] The inverting input terminal of the sixth eighth D chip U68D is respectively connected to the second end of the first 20 resistor R120, the first end of the seventh 40 capacitor C740, and the first end of the first 22 resistor R122; the output terminal of the sixth eighth D chip U68D is respectively connected to the second end of the seventh 40 capacitor C740, the second end of the first 22 resistor R122, and the first end of the first 22 resistor R122; the non-inverting input terminal of the sixth eighth D chip U68D is grounded;

[0036] The inverting input end of the sixty-eighth C chip U68C is respectively connected to the output end of the sixty-eighth C chip U68C and the first end of the first nine resistors R19; the non-inverting input end of the sixty-eighth C chip U68C is respectively connected to the second end of the first twenty-second resistor R122 and the first end of the sixth twenty-second capacitor C622, and the second end of the sixth twenty-second capacitor C622 is grounded.

[0037] As an embodiment of the present invention, the amplitude adjustment output unit includes a forward amplitude amplification circuit, which includes an eighth B chip U8B, a first six chip U16, and a fifth first resistor R51; the first six chip U16 is a digital potentiometer;

[0038] The non-inverting input terminal of the eighth B chip U8B is respectively connected to the output terminal of the eighth A chip U8A, the first terminal of the seventh resistor R7, and the first terminal of the sixth third capacitor C63;

[0039] The inverting input end of the eighth B chip U8B is respectively connected to the first end of the fifth-first resistor R51 and the POB pin of the first-sixth chip U16, and the second end of the fifth-first resistor R51 is grounded; the output end of the eighth B chip U8B is connected to the POW pin of the first-sixth chip U16.

[0040] As an embodiment of the present invention, the position signal ADC conversion detection circuit is an ADC integrated circuit with an 8-channel DAS, a built-in 16-bit bipolar input, and a synchronous sampling.

[0041] As an embodiment of the present invention, the position sensor terminal voltage detection unit includes a first follower, a full-wave rectifier current circuit and a second follower;

[0042] The first follower includes a fifth sixth C chip U56C and a fifth third resistor R53; a non-inverting input terminal of the fifth sixth C chip U56C is connected to the second end of the fifth third resistor R53, and an inverting input terminal of the fifth sixth C chip U56C is connected to the output terminal of the fifth sixth C chip U56C;

[0043] The full-wave rectifier circuit includes a fifth-sixth A chip U56A, a fifth-sixth B chip U56B, a fourth-fifth resistor R450, a third-twenty-second resistor R322, a third-twenty-second resistor R320, a third-twenty-first resistor R321, a fifth-fifth resistor R55, a fifth-fourth resistor R54, a ninth-fifth capacitor C900, a second-fifth diode D25, and a second-sixth diode D26;

[0044] The first end of the fourth fifty-zero resistor R450 is connected to the output end of the fifth six C chip U56C, and the second end of the fourth fifty-zero resistor R450 is connected to the first end of the third twenty-zero resistor R320 and the first end of the third twenty-two resistor R322 respectively;

[0045] The second end of the third resistor R322 is respectively connected to the first end of the third resistor R321, the cathode of the second diode D25, and the inverting input end of the fifth sixth chip U56A; the non-inverting input end of the fifth sixth chip U56A is grounded;

[0046] The second end of the third resistor R321 is connected to the anode of the second diode D26 and the first end of the fifth resistor R54 respectively; the output end of the fifth chip U56A is connected to the anode of the second diode D25 and the cathode of the second diode D26 respectively;

[0047] The second end of the third-zero resistor R320 is respectively connected to the first end of the ninth-zero capacitor C900, the first end of the fifth-fifth resistor R55, the second end of the fifth-fourth resistor R54, and the inverting input end of the fifth-sixth B chip U56B; the non-inverting input end of the fifth-sixth B chip U56B is grounded; the output end of the fifth-sixth B chip U56B is respectively connected to the second end of the ninth-zero capacitor C900 and the second end of the fifth-fifth resistor R55;

[0048] The second follower includes an eighty-sixth B chip U86B and a fifth-sixth resistor R56; the positive input end of the eighty-sixth B chip U86B is connected to the second end of the fifth-sixth resistor R56, and the negative input end of the eighty-sixth B chip U86B is connected to the output end of the eighty-sixth B chip U86B.

[0049] As an embodiment of the present invention, the PID regulation output control circuit includes a 28th chip U28, a 68th chip U68, a 119th resistor R119, a 120th resistor R120, a 121st resistor R121, a 122nd resistor R122, a 356th resistor R356, a 740th capacitor C740, and a 622nd capacitor C622;

[0050] The inverting input terminal of the eighth A chip U8A is respectively connected to the second end of the first third resistor R13 and the second end of the sixth third capacitor C63; the non-inverting input terminal of the eighth A chip U8A is respectively connected to the second end of the first ninth resistor R19, the first end of the second fifth resistor R25, and the first end of the second capacitor C2;

[0051] The output end of the eighth chip A U8A is respectively connected to the first end of the sixth capacitor C63 and the first end of the seventh resistor R7; the second end of the seventh resistor R7 is respectively connected to the second end of the first resistor R1, the first end of the first resistor R13, and the first end of the fifth capacitor C57; the second end of the fifth capacitor C57 is grounded; the second end of the second resistor R25 and the second end of the second capacitor C2 are respectively grounded;

[0052] The first resistor R1, the seventh resistor R7, the first ninth resistor R19, the second fifth resistor R25, the fifth seventh capacitor C57 and the sixth third capacitor C63 form a low-pass filter circuit, and the eighth A chip U8A is an amplifier; the position signal is filtered by the low-pass filter circuit and then enters the eighth A chip U8A for amplification;

[0053] The sixty-eighth chip U68 includes a sixty-eighthA chip U68A, a sixty-eighthB chip U68B, a sixty-eighthC chip U68C, and a sixty-eighthD chip U68D;

[0054] The Vout pin of the second-eighth chip U28 is connected to the non-inverting input terminal of the sixth-eighth chip U68A, the INV pin of the second-eighth chip U28 is connected to the inverting input terminal of the sixth-eighth chip U68A, and the output terminal of the sixth-eighth chip U68A is respectively connected to the RFB pin of the second-eighth chip U28 and the first end of the first-nineth resistor R119;

[0055] The inverting input terminal of the 68th B chip U68B is respectively connected to the first end of the 356th resistor R356 and the second end of the 119th resistor R119; the second end of the 356th resistor R356 is respectively connected to the output terminal of the 68th B chip U68B and the first end of the 120th resistor R120; the non-inverting input terminal of the 68th B chip U68B is grounded;

[0056] The inverting input terminal of the sixth eighth D chip U68D is respectively connected to the second end of the first 20 resistor R120, the first end of the seventh 40 capacitor C740, and the first end of the first 22 resistor R122; the output terminal of the sixth eighth D chip U68D is respectively connected to the second end of the seventh 40 capacitor C740, the second end of the first 22 resistor R122, and the first end of the first 22 resistor R122; the non-inverting input terminal of the sixth eighth D chip U68D is grounded;

[0057] The inverting input end of the sixty-eighth C chip U68C is respectively connected to the output end of the sixty-eighth C chip U68C and the first end of the first nine resistors R19; the non-inverting input end of the sixty-eighth C chip U68C is respectively connected to the second end of the first twenty-second resistor R122 and the first end of the sixth twenty-second capacitor C622, and the second end of the sixth twenty-second capacitor C622 is grounded.

[0058] According to another aspect of the present invention, the following technical solution is adopted: a verification method for the above-mentioned fully digital magnetic levitation product verification equipment, the verification method comprising:

[0059] The eddy current resonance synchronization unit generates a synchronous resonance signal and transmits it to the input end of each displacement eddy current sensor, generating different eddy current signal voltages according to the different displacements;

[0060] The displacement signal detection unit receives the eddy current signal voltage output by the paired displacement eddy current sensor and generates a real-time voltage signal of the bearing displacement position through an amplifying circuit;

[0061] The displacement signal ADC conversion detection unit detects the displacement voltage signal and converts it from analog to digital voltage that can be processed by the main processor;

[0062] The position sensor terminal voltage detection unit converts the analog voltage output by the displacement eddy current sensor into a digital voltage that can be processed by the main control circuit;

[0063] The temperature detection unit sends the detected external temperature data to the main control circuit;

[0064] The symmetry detection unit uses the current signal of the magnetic bearing coil as a sensor signal input, reads the voltage signal, and determines the symmetry of the two sensors, which is regarded as the detection of the coil center line;

[0065] The zero position adjustment output unit generates an adjustment zero position signal voltage according to the output of the main control circuit and sends it to the displacement signal detection unit, thereby adjusting the zero position forming voltage;

[0066] The amplitude adjustment output unit generates an adjustment amplitude signal voltage according to the output of the main control circuit and sends it to the displacement signal detection unit, thereby adjusting the amplitude to form a voltage; and

[0067] The PID adjustment output control unit generates a voltage signal for adjusting the PID output and outputs it to the bearing coil control circuit.

[0068] The beneficial effect of the present invention is that the fully digital magnetic levitation product calibration equipment and calibration method proposed in the present invention can improve the stability of the operation of the magnetic levitation system.

[0069] In one application scenario, this invention utilizes a "three-in-one" inspection method for maglev motors. By aligning the sensor centerline, coil centerline, and mechanical mounting centerline into a single point, the stability of the maglev system's operation can be significantly improved. This method provides a powerful, convenient, intuitive, and intelligent integrated core standard and practical tool for sensor testing, design, aging, optimization, pairing, inspection, and diagnosis. Furthermore, it offers an effective approach for various applications involving sensors, bearing coils, and maglev motors. BRIEF DESCRIPTION OF THE DRAWINGS

[0070] Figure 1 Schematic diagram of the composition of a fully digital magnetic levitation product verification device in one embodiment of the present invention.

[0071] Figure 2 FIG. 1 is a circuit diagram of a main processor of a main control circuit in an embodiment of the present invention.

[0072] Figure 3 FIG. 4 is a circuit diagram of an eddy current resonance synchronization unit according to an embodiment of the present invention.

[0073] Figure 4 FIG. 1 is a circuit diagram of a zero adjustment output circuit and an amplitude adjustment output circuit in one embodiment of the present invention.

[0074] Figure 5 FIG. 4 is a circuit diagram of a position signal ADC conversion and detection unit according to an embodiment of the present invention.

[0075] Figure 6 FIG. 4 is a circuit diagram of a displacement sensor terminal voltage detection unit in an embodiment of the present invention.

[0076] Figure 7 FIG. 1 is a circuit diagram of a PID regulation output control unit in an embodiment of the present invention.

[0077] Figure 8 Schematic diagram of the circuit of the RS48 communication interface in one embodiment of the present invention. DETAILED DESCRIPTION

[0078] The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0079] In order to further understand the present invention, preferred embodiments of the present invention are described below in conjunction with examples. However, it should be understood that these descriptions are only for further illustrating the features and advantages of the present invention, rather than limiting the claims of the present invention.

[0080] The description in this section is only for several typical embodiments, and the present invention is not limited to the scope of the embodiments described. The same or similar existing technical means and some technical features of the embodiments are mutually replaced within the scope of the description and protection of the present invention.

[0081] The description of the steps in each embodiment in the specification is only for the convenience of explanation, and the implementation method of this application is not limited by the order of implementation of the steps.

[0082] The term "connection" as used in this specification includes both direct connection and indirect connection, such as connection through active devices, passive devices or electrically conductive media; it may also include connection through other active devices or passive devices that are well known to those skilled in the art and can achieve the same or similar functional purposes, such as connection through circuits or components such as switches and follower circuits.

[0083] The present invention discloses a fully digital magnetic levitation product verification device, Figure 1 This is a schematic diagram of the composition of a fully digital magnetic levitation product inspection device in one embodiment of the present invention; please refer to Figure 1 The verification device includes: a main control circuit 7, an eddy current resonance synchronization unit 13, a displacement signal detection unit 12, a displacement signal ADC conversion detection unit 9, a position sensor terminal voltage detection unit 8, a temperature detection unit 3, a symmetry detection unit 2, a zero adjustment output unit 11, an amplitude adjustment output unit 10 and a PID adjustment output control unit 5.

[0084] The main control circuit 7 is used to process setting data; the main control circuit 7 may include a main processor.

[0085] The eddy current resonance synchronization unit 13 is used to generate a synchronous resonance signal, which is transmitted to the input end of each displacement eddy current sensor, and generates different eddy current signal voltages according to different displacements.

[0086] The input end of the displacement signal detection unit 12 is connected to the output end of the displacement eddy current sensor to receive the eddy current signal voltage output by the paired displacement eddy current sensor and generate a real-time voltage signal of the bearing displacement position through an amplifying circuit.

[0087] The input end of the displacement signal ADC conversion detection unit 9 is connected to the output end of the displacement signal detection unit 12, and is used to convert the voltage signal of the displacement detection from an analog quantity to a digital voltage that can be processed by the main processor; the output end of the displacement signal ADC conversion detection unit 9 is connected to the input end of the main control circuit.

[0088] The input end of the position sensor end voltage detection unit 8 is connected to the output end of the displacement eddy current sensor, so as to convert the analog voltage output by the displacement eddy current sensor into a digital voltage that can be processed by the main control circuit 7; the output end of the position sensor end voltage detection unit 8 is connected to the input end of the main control circuit 7.

[0089] The temperature detection unit 3 is used to detect the external temperature; the output end of the temperature detection unit 3 is connected to the input end of the main control circuit 7 to send the detected external temperature data to the main control circuit 7.

[0090] The symmetry detection unit 2 is used to input the current signal of the magnetic bearing coil as a sensor signal, read the voltage signal, and judge the symmetry of the two sensors, which is regarded as the detection of the center line of the coil; the output end of the symmetry detection unit 2 is connected to the input end of the main control circuit 7.

[0091] The input end of the zero position adjustment output unit 11 is connected to the output end of the main control circuit 7, and the output end of the zero position adjustment output unit 11 is connected to the input end of the displacement signal detection unit 12, so as to generate an adjustment zero position signal voltage according to the output of the main control circuit 7 and send it to the displacement signal detection unit 12, thereby adjusting the zero position forming voltage.

[0092] The input end of the amplitude adjustment output unit 10 is connected to the output end of the main control circuit 7, and the output end of the amplitude adjustment output unit 10 is connected to the input end of the displacement signal detection unit 12, so as to generate an adjusted amplitude signal voltage according to the output of the main control circuit 7 and send it to the displacement signal detection unit 12, thereby adjusting the amplitude to form a voltage.

[0093] The input end of the PID adjustment output control unit 5 is connected to the output end of the main control circuit 7 to generate a voltage signal for adjusting the PID output and output it to the bearing coil control.

[0094] In one embodiment of the present invention, the main control circuit 7 includes a main processor, which uses a 32-bit ARM Cortex-M7 core with a double-precision FPU and L1 cache. Figure 2 The main processor's CPU system can be the STM32H743I I T6 released by STMicroelectronics. This processor uses a 32-bit ARM Cortex-M7 core with a double-precision FPU and L1 cache, operates at up to 480MHz, and includes 2M bytes of read-write FLASH memory, 1M bytes of RAM, and a 133MHz QSPI memory interface. It also includes three A / D channels supporting up to 16 bits, four USARTs, and one LPUART. The processor's power supply voltage is designed to be 3.3V, and the I / O voltage is designed to be 5V, which improves the system's anti-interference capabilities.

[0095] Figure 3 This is a circuit diagram of an eddy current resonance synchronization unit in one embodiment of the present invention; please refer to Figure 3 In one embodiment of the present invention, the eddy current resonance synchronization unit includes a first low dropout linear regulator LDO1, a first transistor T1, a second transistor T2, a plurality of capacitors and a plurality of resistors.

[0096] The third pin IN of the first low-dropout linear regulator LDO1 is connected to a first power supply voltage and the first end of a fifth capacitor C5, respectively. The second end of the fifth capacitor C5 is grounded. The second pin OUT of the first low-dropout linear regulator LDO1 is connected to the collector of the first transistor T1, the first end of a fourth zero-resistor R440, the first end of a fourth zero-resistor capacitor E40, the first end of a sixth capacitor C6, the first end of the first resistor R1, and the third end of the first Zener diode Z1. The first pin ADJ of the first low-dropout linear regulator LDO1 is connected to the second end of the fourth zero-resistor R440 and the first end of the second zero-resistor R250, respectively.

[0097] The second end of the fourth zero capacitor E40, the second end of the sixth capacitor C6, the first end of the fourth first capacitor E41, and the first end of the seventh capacitor C7 are respectively grounded; the second end of the second fifty zero resistor R250 is respectively connected to the second end of the fourth first capacitor E41 and the second end of the seventh capacitor C7.

[0098] The base of the first transistor T1 is connected to the second end of the first resistor R1, the first end of the first voltage-stabilizing diode Z1, and the second end of the fourth voltage-stabilizing capacitor C460. The base of the second transistor T2 is connected to the second end of the fourth voltage-stabilizing capacitor C462, the first end of the second resistor R2, and the third end of the second voltage-stabilizing diode Z2. The first end of the fourth voltage-stabilizing capacitor C460 is connected to the first end of the fourth voltage-stabilizing capacitor C462. The emitter of the first transistor T1 is connected to the emitter of the second transistor T2, and the collector of the second transistor T2 is connected to the second end of the second resistor R2 and the first end of the second voltage-stabilizing diode Z2.

[0099] The fourth zero capacitor E40, the fourth first capacitor E41, the sixth capacitor C6, and the seventh capacitor C7 are filter capacitors, forming a filter circuit. The first transistor T1, the fourth six zero capacitor C460, and the first resistor R1 form a positive pulse amplification circuit; the second transistor T2, the fourth six second capacitor C462, and the second resistor R2 form a negative pulse amplification circuit.

[0100] Figure 4 A circuit diagram of a zero adjustment output circuit according to an embodiment of the present invention is disclosed; Figure 4 In one embodiment of the present invention, the zero adjustment output unit includes an eighth A chip U8A, a fifth seventh capacitor C57, a sixth third capacitor C63, a first resistor R1, a seventh resistor R7, a first ninth resistor R19, a twenty fifth resistor R25, a second capacitor C2, a twenty eighth chip U28, a sixty eighth chip U68, a first one ninth resistor R119, a first twenty zero resistor R120, a first twenty first resistor R121, a first twenty second resistor R122, a third fifty sixth resistor R356, a seventh fourth zero capacitor C740, and a sixth twenty second capacitor C622.

[0101] The inverting input end of the eighth A chip U8A is respectively connected to the second end of the first three resistors R13 and the second end of the sixth three capacitors C63; the positive input end of the eighth A chip U8A is respectively connected to the second end of the first nine resistors R19, the first end of the second five resistors R25, and the first end of the second capacitor C2.

[0102] The output end of the eighth A chip U8A is respectively connected to the first end of the sixth third capacitor C63 and the first end of the seventh resistor R7; the second end of the seventh resistor R7 is respectively connected to the second end of the first resistor R1, the first end of the first third resistor R13, and the first end of the fifth seventh capacitor C57; the second end of the fifth seventh capacitor C57 is grounded; the second end of the second fifth resistor R25 and the second end of the second capacitor C2 are respectively grounded.

[0103] The first resistor R1, the seventh resistor R7, the first ninth resistor R19, the second fifth resistor R25, the fifth seventh capacitor C57 and the sixth third capacitor C63 form a low-pass filter circuit, and the eighth A chip U8A is an amplifier; the position signal is filtered by the low-pass filter circuit and then enters the eighth A chip U8A for amplification.

[0104] The sixty-eighth chip U68 includes the sixty-eighthA chip U68A, the sixty-eighthB chip U68B, the sixty-eighthC chip U68C, and the sixty-eighthD chip U68D.

[0105] The Vout pin of the second eighth chip U28 is connected to the positive input terminal of the sixth eighth chip U68A, the I NV pin of the second eighth chip U28 is connected to the negative input terminal of the sixth eighth chip U68A, and the output terminal of the sixth eighth chip U68A is respectively connected to the RFB pin of the second eighth chip U28 and the first end of the first nineteenth resistor R119.

[0106] The inverting input terminal of the sixty-eighth B chip U68B is respectively connected to the first end of the thirty-fifth resistor R356 and the second end of the first-nineteenth resistor R119; the second end of the thirty-fifth resistor R356 is respectively connected to the output terminal of the sixty-eighth B chip U68B and the first end of the first-nineteenth resistor R120; the positive input terminal of the sixty-eighth B chip U68B is grounded.

[0107] The inverting input end of the sixth-eighth D chip U68D is respectively connected to the second end of the first-20 resistor R120, the first end of the seventh-40 capacitor C740, and the first end of the first-22 resistor R122; the output end of the sixth-eighth D chip U68D is respectively connected to the second end of the seventh-40 capacitor C740, the second end of the first-22 resistor R122, and the first end of the first-22 resistor R122; the non-inverting input end of the sixth-eighth D chip U68D is grounded.

[0108] The inverting input end of the sixty-eighth C chip U68C is respectively connected to the output end of the sixty-eighth C chip U68C and the first end of the first nine resistors R19; the non-inverting input end of the sixty-eighth C chip U68C is respectively connected to the second end of the first twenty-second resistor R122 and the first end of the sixth twenty-second capacitor C622, and the second end of the sixth twenty-second capacitor C622 is grounded.

[0109] The data set by the main CPU processor is sent to the DAC conversion chip. The generated voltage is amplified twice by the operational amplifier U68 to form a voltage W_W1 and sent to the first nine resistors R19 of the zero point adjustment circuit, thereby controlling the potential of this end and thus controlling the zero point potential of the position displacement signal.

[0110] Figure 4 To further disclose a circuit diagram of an amplitude adjustment output circuit in one embodiment of the present invention; please refer to Figure 4 In one embodiment of the present invention, the amplitude adjustment output unit includes a forward amplitude amplification circuit, which includes an eighth B chip U8B, a first six chip U16, and a fifth-first resistor R51; the first six chip U16 may be a digital potentiometer. The non-inverting input terminal of the eighth B chip U8B is respectively connected to the output terminal of the eighth A chip U8A, the first end of the seventh resistor R7, and the first end of the sixth-third capacitor C63. The inverting input terminal of the eighth B chip U8B is respectively connected to the first end of the fifth-first resistor R51 and the POB pin of the first six chip U16, with the second end of the fifth-first resistor R51 being grounded. The output terminal of the eighth B chip U8B is connected to the POW pin of the first six chip U16.

[0111] When the position signal after zero point adjustment enters the forward amplitude amplifier circuit composed of R51, digital potentiometer U16, and U8B, the final position signal voltage is generated and sent to the displacement signal ADC conversion monitoring unit.

[0112] Figure 5 This is a circuit diagram of a position signal ADC conversion detection unit according to an embodiment of the present invention; Figure 5 In one embodiment of the present invention, the position signal ADC conversion detection circuit is an ADC integrated circuit with an 8-channel DAS, a built-in 16-bit bipolar input, and a synchronous sampling ADC.

[0113] In one embodiment, the position signal ADC conversion and detection circuit uses the AD7606BSTZ-RL as the analog-to-digital converter chip. This chip is an 8-channel DAS released by Analog Devices and features a built-in 16-bit, bipolar input, and synchronous sampling ADC integrated circuit. It uses a 5V analog power supply, a single true bipolar analog input range of ±10V or ±5V, analog input clamp protection, an input buffer with 1MΩ analog input impedance, a second-order anti-aliasing analog filter, and an on-chip precision voltage reference and buffer. All channels have a conversion speed of up to 200 SPS, and a parallel or serial interface is provided. Six position signal voltages SV1 to SV6 are fed into the ADC's V1 to V6 analog inputs. DB7 / DoutA is the ADC_DOUT data output, CONVST_A and CONVST_B are conversion start terminals, / CS is the chip select terminal, / RD / SCLK is the clock terminal, BUSY indicates the chip busy state, and RANGE is the input range input. The main processor system periodically reads the AD position signal data.

[0114] Figure 6 This is a circuit diagram of a displacement sensor terminal voltage detection unit in one embodiment of the present invention; please refer to Figure 6 In one embodiment of the present invention, the position sensor terminal voltage detection unit includes a first follower, a full-wave rectifier current circuit and a second follower.

[0115] The first follower includes a fifth-sixth C chip U56C and a fifth-third resistor R53; the non-inverting input end of the fifth-sixth C chip U56C is connected to the second end of the fifth-third resistor R53, and the inverting input end of the fifth-sixth C chip U56C is connected to the output end of the fifth-sixth C chip U56C.

[0116] The full-wave rectifier current circuit includes the fifth-sixth A chip U56A, the fifth-sixth B chip U56B, the fourth-fifth resistor R450, the third-twenty-second resistor R322, the third-twenty-zero resistor R320, the third-twenty-first resistor R321, the fifth-fifth resistor R55, the fifth-fourth resistor R54, the ninth-zero capacitor C900, the second-fifth diode D25 and the second-sixth diode D26.

[0117] The first end of the fourth fifty-zero resistor R450 is connected to the output end of the fifth six C chip U56C, and the second end of the fourth fifty-zero resistor R450 is respectively connected to the first end of the third twenty-zero resistor R320 and the first end of the third twenty-second resistor R322.

[0118] The second end of the third-second resistor R322 is respectively connected to the first end of the third-second resistor R321, the cathode of the second-fifth diode D25, and the inverting input end of the fifth-sixth A chip U56A; the non-inverting input end of the fifth-sixth A chip U56A is grounded.

[0119] The second end of the third resistor R321 is respectively connected to the anode of the second diode D26 and the first end of the fifth resistor R54; the output end of the fifth chip U56A is respectively connected to the anode of the second diode D25 and the cathode of the second diode D26.

[0120] The second end of the third-zero resistor R320 is respectively connected to the first end of the ninth-zero capacitor C900, the first end of the fifth-fifth resistor R55, the second end of the fifth-fourth resistor R54, and the inverting input end of the fifth-sixth B chip U56B; the positive input end of the fifth-sixth B chip U56B is grounded; the output end of the fifth-sixth B chip U56B is respectively connected to the second end of the ninth-zero capacitor C900 and the second end of the fifth-fifth resistor R55.

[0121] The second follower includes an eighty-sixth B chip U86B and a fifth-sixth resistor R56; the positive input end of the eighty-sixth B chip U86B is connected to the second end of the fifth-sixth resistor R56, and the negative input end of the eighty-sixth B chip U86B is connected to the output end of the eighty-sixth B chip U86B.

[0122] When the 625KHz AC excitation current signal generated by the eddy current sensor passes through the follower, it is rectified to form a DC signal and sent to the voltage detection unit circuit at the position sensor end.

[0123] Figure 7 This is a circuit diagram of a PID output control unit according to an embodiment of the present invention; Figure 7 In one embodiment of the present invention, the PID regulation output control circuit is used to send the data set by the main CPU processor to the DAC conversion chip through the serial interface. The generated voltage is amplified by 2 times by the operational amplifier U68 to form a voltage output to the power amplifier circuit.

[0124] In one embodiment of the present invention, the PID regulation output control circuit includes a 28th chip U28, a 68th chip U68, a 119th resistor R119, a 120th resistor R120, a 121st resistor R121, a 122nd resistor R122, a 356th resistor R356, a 740th capacitor C740, and a 622nd capacitor C622.

[0125] The inverting input end of the eighth A chip U8A is respectively connected to the second end of the first three resistors R13 and the second end of the sixth three capacitors C63; the positive input end of the eighth A chip U8A is respectively connected to the second end of the first nine resistors R19, the first end of the second five resistors R25, and the first end of the second capacitor C2.

[0126] The output end of the eighth A chip U8A is respectively connected to the first end of the sixth third capacitor C63 and the first end of the seventh resistor R7; the second end of the seventh resistor R7 is respectively connected to the second end of the first resistor R1, the first end of the first third resistor R13, and the first end of the fifth seventh capacitor C57; the second end of the fifth seventh capacitor C57 is grounded; the second end of the second fifth resistor R25 and the second end of the second capacitor C2 are respectively grounded.

[0127] The first resistor R1, the seventh resistor R7, the first ninth resistor R19, the second fifth resistor R25, the fifth seventh capacitor C57 and the sixth third capacitor C63 form a low-pass filter circuit, and the eighth A chip U8A is an amplifier; the position signal is filtered by the low-pass filter circuit and then enters the eighth A chip U8A for amplification;.

[0128] The sixty-eighth chip U68 includes the sixty-eighthA chip U68A, the sixty-eighthB chip U68B, the sixty-eighthC chip U68C, and the sixty-eighthD chip U68D.

[0129] The Vout pin of the second-eighth chip U28 is connected to the positive input terminal of the sixth-eighth chip U68A, the INV pin of the second-eighth chip U28 is connected to the inverting input terminal of the sixth-eighth chip U68A, and the output terminal of the sixth-eighth chip U68A is respectively connected to the RFB pin of the second-eighth chip U28 and the first end of the first-nineteenth resistor R119.

[0130] The inverting input terminal of the sixty-eighth B chip U68B is respectively connected to the first end of the thirty-fifth resistor R356 and the second end of the first-nineteenth resistor R119; the second end of the thirty-fifth resistor R356 is respectively connected to the output terminal of the sixty-eighth B chip U68B and the first end of the first-nineteenth resistor R120; the positive input terminal of the sixty-eighth B chip U68B is grounded.

[0131] The inverting input end of the sixth-eighth D chip U68D is respectively connected to the second end of the first-20 resistor R120, the first end of the seventh-40 capacitor C740, and the first end of the first-22 resistor R122; the output end of the sixth-eighth D chip U68D is respectively connected to the second end of the seventh-40 capacitor C740, the second end of the first-22 resistor R122, and the first end of the first-22 resistor R122; the non-inverting input end of the sixth-eighth D chip U68D is grounded.

[0132] The inverting input end of the sixty-eighth C chip U68C is respectively connected to the output end of the sixty-eighth C chip U68C and the first end of the first nine resistors R19; the non-inverting input end of the sixty-eighth C chip U68C is respectively connected to the second end of the first twenty-second resistor R122 and the first end of the sixth twenty-second capacitor C622, and the second end of the sixth twenty-second capacitor C622 is grounded.

[0133] Figure 7The circuit in Figure 4 Some of the circuits in are similar and the component labels are the same; however, they are different circuits on different circuit boards.

[0134] The fully digital magnetic levitation product verification equipment may include an RS485 communication interface circuit; Figure 8 This is a circuit diagram of the RS48 communication interface in one embodiment of the present invention; Figure 8 In one embodiment of the present invention, the RS485 communication interface circuit includes: C166, C206, L5, DC1, C207, and C167, which are +5VDC to +5VDC isolated power supplies; U9 (ADM2483BRWZ), an isolated RS485 converter chip; and TVS1, TVS2, and TVS3, which are anti-interference voltage supplies. The main processor system communicates with the host computer through the communication interface circuit to read and set parameters and display data.

[0135] In one use scenario of the present invention, the working principle of the calibration instrument of the present invention is as follows: the eddy current resonance synchronization unit generates a synchronous resonance signal and transmits it to each displacement eddy current sensor, generating different eddy current signal voltages according to the different displacements. Then, the displacement signal detection circuit unit receives the eddy current signal voltage output by the paired displacement sensor, generates a voltage signal of the bearing displacement position at that moment through the amplification circuit, and then the zero position adjustment output unit adjusts the zero position to form a voltage. And the amplitude adjustment output unit adjusts the amplitude to form a voltage, and finally generates a position voltage signal value. Then, the displacement signal ADC conversion detection unit converts the analog quantity into a digital quantity. At the same time, the position sensor terminal voltage detection unit converts the terminal voltage of the eddy current sensor from an analog quantity to a digital quantity. The conversion of these digital quantities is uniformly processed by the main processor embedded system. At the same time, the PID adjustment output control unit outputs the PID voltage signal to adjust and control the bearing coil, thereby controlling the displacement of the bearing rotor.

[0136] The main processor CPU system takes the microprocessor as the core, expands the static memory, and peripherals such as FLASH memory and real-time clock to form an embedded data processing system to process various data.

[0137] The calibration device further includes a communication unit, a human-machine interface control unit, and a digital input / output unit. The communication unit serves as the hardware device for the communication protocol; the human-machine interface control unit facilitates information exchange with the operator, facilitating the reading of real-time data displays and the setting of device parameters. The digital input / output unit receives external input signals for control.

[0138] The present invention further discloses a calibration method for the above-mentioned fully digital magnetic levitation product calibration equipment, the calibration method comprising:

[0139] The eddy current resonance synchronization unit generates a synchronous resonance signal and transmits it to the input end of each displacement eddy current sensor, generating different eddy current signal voltages according to the different displacements;

[0140] The displacement signal detection unit receives the eddy current signal voltage output by the paired displacement eddy current sensor and generates a real-time voltage signal of the bearing displacement position through an amplifying circuit;

[0141] The displacement signal ADC conversion detection unit detects the displacement voltage signal and converts it from analog to digital voltage that can be processed by the main processor;

[0142] The position sensor terminal voltage detection unit converts the analog voltage output by the displacement eddy current sensor into a digital voltage that can be processed by the main control circuit;

[0143] The temperature detection unit sends the detected external temperature data to the main control circuit;

[0144] The symmetry detection unit uses the current signal of the magnetic bearing coil as a sensor signal input, reads the voltage signal, and determines the symmetry of the two sensors, which is regarded as the detection of the coil center line;

[0145] The zero position adjustment output unit generates an adjustment zero position signal voltage according to the output of the main control circuit and sends it to the displacement signal detection unit, thereby adjusting the zero position forming voltage;

[0146] The amplitude adjustment output unit generates an adjustment amplitude signal voltage according to the output of the main control circuit and sends it to the displacement signal detection unit, thereby adjusting the amplitude to form a voltage; and

[0147] The PID adjustment output control unit generates a voltage signal for adjusting the PID output and outputs it to the bearing coil control circuit.

[0148] In summary, the fully digital magnetic levitation product calibration equipment and calibration method proposed in the present invention can improve the stability of the magnetic levitation system operation.

[0149] In one application scenario, this invention utilizes a "three-in-one" inspection method for maglev motors. By aligning the sensor centerline, coil centerline, and mechanical mounting centerline into a single point, the stability of the maglev system's operation can be significantly improved. This method provides a powerful, convenient, intuitive, and intelligent integrated core standard and practical tool for sensor testing, design, aging, optimization, pairing, inspection, and diagnosis. Furthermore, it offers an effective approach for various applications involving sensors, bearing coils, and maglev motors.

[0150] It should be noted that the present application can be implemented in software and / or a combination of software and hardware; for example, it can be implemented using an application-specific integrated circuit (ASIC), a general-purpose computer, or any other similar hardware device. In some embodiments, the software program of the present application can be executed by a processor to implement the above steps or functions. Similarly, the software program of the present application (including related data structures) can be stored in a computer-readable recording medium; for example, a RAM memory, a magnetic or optical drive, or a floppy disk and the like. In addition, some steps or functions of the present application can be implemented in hardware; for example, as a circuit that cooperates with a processor to perform various steps or functions.

[0151] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0152] The description and application of the present invention here are illustrative and are not intended to limit the scope of the present invention to the above-described embodiments. The effects or advantages involved in the embodiments may not be embodied in the embodiments due to interference from various factors, and the description of the effects or advantages is not used to limit the embodiments. Variations and changes to the embodiments disclosed here are possible, and the replacement of the embodiments and various equivalent components are well known to those of ordinary skill in the art. It should be clear to those skilled in the art that the present invention can be implemented in other forms, structures, arrangements, proportions, and with other components, materials, and parts without departing from the spirit or essential characteristics of the present invention. Other variations and changes can be made to the embodiments disclosed here without departing from the scope and spirit of the present invention.

Claims

1. A fully digital magnetic levitation product calibration device, characterized in that: The verification device comprises: A main control circuit, for processing setting data; the main control circuit includes a main processor; The eddy current resonance synchronization unit is used to generate a synchronous resonance signal, which is transmitted to the input end of each displacement eddy current sensor to generate different eddy current signal voltages according to the displacement; A displacement signal detection unit, whose input end is connected to the output end of the displacement eddy current sensor, is used to receive the eddy current signal voltage output by the paired displacement eddy current sensor and generate a real-time voltage signal of the bearing displacement position through an amplifying circuit; A displacement signal ADC conversion detection unit, whose input end is connected to the output end of the displacement signal detection unit, is used to convert the voltage signal of the displacement detection from an analog quantity to a digital voltage that can be processed by the main processor; the output end of the displacement signal ADC conversion detection unit is connected to the input end of the main control circuit; a position sensor terminal voltage detection unit, whose input end is connected to the output end of the displacement eddy current sensor, for converting the analog voltage output by the displacement eddy current sensor into a digital voltage that can be processed by the main control circuit; and an output end of the position sensor terminal voltage detection unit is connected to the input end of the main control circuit; A temperature detection unit for detecting external temperature; an output end of the temperature detection unit is connected to an input end of the main control circuit for sending detected external temperature data to the main control circuit; A symmetry detection unit is used to input the current signal of the magnetic bearing coil as a sensor signal, read the voltage signal, and determine the symmetry of the two sensors, which is regarded as the detection of the center line of the coil; the output end of the symmetry detection unit is connected to the input end of the main control circuit; a zero position adjustment output unit, the input end of which is connected to the output end of the main control circuit, and the output end of the zero position adjustment output unit is connected to the input end of the displacement signal detection unit, for generating an adjustment zero position signal voltage according to the output of the main control circuit and sending the adjusted zero position signal voltage to the displacement signal detection unit, thereby adjusting the zero position forming voltage; an amplitude adjustment output unit, the input end of which is connected to the output end of the main control circuit, and the output end of the amplitude adjustment output unit is connected to the input end of the displacement signal detection unit, for generating an amplitude adjustment signal voltage according to the output of the main control circuit and sending it to the displacement signal detection unit, thereby adjusting the amplitude to form a voltage; and The PID adjustment output control unit has its input end connected to the output end of the main control circuit to generate a voltage signal for adjusting the PID output and output it to the bearing coil control circuit.

2. The fully digital magnetic levitation product verification equipment according to claim 1 is characterized by: The main control circuit includes a main processor, which adopts a 32-bit ARM Cortex-M7 core with a double-precision FPU and an L1 cache.

3. The fully digital magnetic levitation product verification equipment according to claim 1 is characterized by: The eddy current resonance synchronization unit includes a first low voltage difference linear regulator LDO1, a first transistor T1, a second transistor T2, a plurality of capacitors and a plurality of resistors; The third pin IN of the first low-dropout linear regulator LDO1 is connected to the first power supply voltage and the first end of the fifth capacitor C5 respectively, and the second end of the fifth capacitor C5 is grounded; The second pin OUT of the first low-dropout linear regulator LDO1 is respectively connected to the collector of the first transistor T1, the first end of the fourth zero resistor R440, the first end of the fourth zero capacitor E40, the first end of the sixth capacitor C6, the first end of the first resistor R1, and the third end of the first zener diode Z1; The first pin ADJ of the first low-dropout linear regulator LDO1 is connected to the second end of the fourth four-zero resistor R440 and the first end of the second five-zero resistor R250 respectively; The second end of the fourth zero capacitor E40, the second end of the sixth capacitor C6, the first end of the fourth first capacitor E41, and the first end of the seventh capacitor C7 are grounded respectively; the second end of the second fifth zero resistor R250 is connected to the second end of the fourth first capacitor E41 and the second end of the seventh capacitor C7 respectively; The base of the first transistor T1 is respectively connected to the second end of the first resistor R1, the first end of the first voltage stabilizing diode Z1, and the second end of the fourth sixty-zero capacitor C460; The base of the second transistor T2 is connected to the second end of the fourth sixty-second capacitor C462, the first end of the second resistor R2, and the third end of the second voltage stabilizing diode Z2 respectively; the first end of the fourth sixty-zero capacitor C460 is connected to the first end of the fourth sixty-second capacitor C462; The emitter of the first transistor T1 is connected to the emitter of the second transistor T2 , and the collector of the second transistor T2 is connected to the second end of the second resistor R2 and the first end of the second voltage stabilizing diode Z2 .

4. The fully digital magnetic levitation product verification equipment according to claim 3 is characterized by: The fourth zero capacitor E40, the fourth first capacitor E41, the sixth capacitor C6, and the seventh capacitor C7 are filter capacitors; the first transistor T1, the first voltage zener diode Z1, the fourth six zero capacitor C460, and the first resistor R1 constitute a positive pulse amplification circuit; the second transistor T2, the second voltage zener diode Z2, the fourth six second capacitor C462, and the second resistor R2 constitute a negative pulse amplification circuit.

5. The fully digital magnetic levitation product verification equipment according to claim 1 is characterized in that: The zero adjustment output unit includes the eighth A chip U8A, the fifth seventh capacitor C57, the sixth third capacitor C63, the first resistor R1, the seventh resistor R7, the first ninth resistor R19, the twenty-fifth resistor R25, the second capacitor C2, the twenty-eighth chip U28, the sixty-eighth chip U68, the first one-nineth resistor R119, the first twenty-zeroth resistor R120, the first twenty-first resistor R121, the first twenty-second resistor R122, the third fifty-sixth resistor R356, the seventh fourth zeroth capacitor C740, and the sixth twenty-second capacitor C622; The inverting input terminal of the eighth A chip U8A is respectively connected to the second end of the first third resistor R13 and the second end of the sixth third capacitor C63; the non-inverting input terminal of the eighth A chip U8A is respectively connected to the second end of the first ninth resistor R19, the first end of the second fifth resistor R25, and the first end of the second capacitor C2; The output end of the eighth chip A U8A is respectively connected to the first end of the sixth capacitor C63 and the first end of the seventh resistor R7; the second end of the seventh resistor R7 is respectively connected to the second end of the first resistor R1, the first end of the first resistor R13, and the first end of the fifth capacitor C57; the second end of the fifth capacitor C57 is grounded; the second end of the second resistor R25 and the second end of the second capacitor C2 are respectively grounded; The first resistor R1, the seventh resistor R7, the first ninth resistor R19, the second fifth resistor R25, the fifth seventh capacitor C57 and the sixth third capacitor C63 form a low-pass filter circuit, and the eighth A chip U8A is an amplifier; the position signal is filtered by the low-pass filter circuit and then enters the eighth A chip U8A for amplification; The sixty-eighth chip U68 includes a sixty-eighthA chip U68A, a sixty-eighthB chip U68B, a sixty-eighthC chip U68C, and a sixty-eighthD chip U68D; The Vout pin of the second-eighth chip U28 is connected to the non-inverting input terminal of the sixth-eighth chip U68A, the INV pin of the second-eighth chip U28 is connected to the inverting input terminal of the sixth-eighth chip U68A, and the output terminal of the sixth-eighth chip U68A is respectively connected to the RFB pin of the second-eighth chip U28 and the first end of the first-nineth resistor R119; The inverting input terminal of the 68th B chip U68B is respectively connected to the first end of the 356th resistor R356 and the second end of the 119th resistor R119; the second end of the 356th resistor R356 is respectively connected to the output terminal of the 68th B chip U68B and the first end of the 120th resistor R120; the non-inverting input terminal of the 68th B chip U68B is grounded; The inverting input terminal of the sixth eighth D chip U68D is respectively connected to the second end of the first 20 resistor R120, the first end of the seventh 40 capacitor C740, and the first end of the first 22 resistor R122; the output terminal of the sixth eighth D chip U68D is respectively connected to the second end of the seventh 40 capacitor C740, the second end of the first 22 resistor R122, and the first end of the first 22 resistor R122; the non-inverting input terminal of the sixth eighth D chip U68D is grounded; The inverting input end of the sixty-eighth C chip U68C is respectively connected to the output end of the sixty-eighth C chip U68C and the first end of the first nine resistors R19; the non-inverting input end of the sixty-eighth C chip U68C is respectively connected to the second end of the first twenty-second resistor R122 and the first end of the sixth twenty-second capacitor C622, and the second end of the sixth twenty-second capacitor C622 is grounded.

6. The fully digital magnetic levitation product verification equipment according to claim 5 is characterized by: The amplitude adjustment output unit includes a forward amplitude amplification circuit, which includes an eighth B chip U8B, a first six-chip U16, and a fifth first resistor R51; the first six-chip U16 is a digital potentiometer; The non-inverting input terminal of the eighth B chip U8B is respectively connected to the output terminal of the eighth A chip U8A, the first terminal of the seventh resistor R7, and the first terminal of the sixth third capacitor C63; The inverting input end of the eighth B chip U8B is respectively connected to the first end of the fifth-first resistor R51 and the POB pin of the first-sixth chip U16, and the second end of the fifth-first resistor R51 is grounded; the output end of the eighth B chip U8B is connected to the POW pin of the first-sixth chip U16.

7. The fully digital magnetic levitation product verification equipment according to claim 1 is characterized by: The displacement signal ADC conversion detection unit is an ADC integrated circuit with an 8-channel DAS, a built-in 16-bit bipolar input, and a synchronous sampling.

8. The fully digital magnetic levitation product verification equipment according to claim 1 is characterized by: The position sensor terminal voltage detection unit includes a first follower, a full-wave rectifier current circuit and a second follower; The first follower includes a fifth sixth C chip U56C and a fifth third resistor R53; a non-inverting input terminal of the fifth sixth C chip U56C is connected to the second end of the fifth third resistor R53, and an inverting input terminal of the fifth sixth C chip U56C is connected to the output terminal of the fifth sixth C chip U56C; The full-wave rectifier circuit includes a fifth-sixth A chip U56A, a fifth-sixth B chip U56B, a fourth-fifth resistor R450, a third-twenty-second resistor R322, a third-twenty-second resistor R320, a third-twenty-first resistor R321, a fifth-fifth resistor R55, a fifth-fourth resistor R54, a ninth-fifth capacitor C900, a second-fifth diode D25, and a second-sixth diode D26; The first end of the fourth fifty-zero resistor R450 is connected to the output end of the fifth six C chip U56C, and the second end of the fourth fifty-zero resistor R450 is connected to the first end of the third twenty-zero resistor R320 and the first end of the third twenty-two resistor R322 respectively; The second end of the third resistor R322 is respectively connected to the first end of the third resistor R321, the cathode of the second diode D25, and the inverting input end of the fifth sixth chip U56A; the non-inverting input end of the fifth sixth chip U56A is grounded; The second end of the third resistor R321 is connected to the anode of the second diode D26 and the first end of the fifth resistor R54 respectively; the output end of the fifth chip U56A is connected to the anode of the second diode D25 and the cathode of the second diode D26 respectively; The second end of the third-zero resistor R320 is respectively connected to the first end of the ninth-zero capacitor C900, the first end of the fifth-fifth resistor R55, the second end of the fifth-fourth resistor R54, and the inverting input end of the fifth-sixth B chip U56B; the non-inverting input end of the fifth-sixth B chip U56B is grounded; the output end of the fifth-sixth B chip U56B is respectively connected to the second end of the ninth-zero capacitor C900 and the second end of the fifth-fifth resistor R55; The second follower includes an eighty-sixth B chip U86B and a fifth-sixth resistor R56; the positive input end of the eighty-sixth B chip U86B is connected to the second end of the fifth-sixth resistor R56, and the negative input end of the eighty-sixth B chip U86B is connected to the output end of the eighty-sixth B chip U86B.

9. A calibration method for the fully digital magnetic levitation product calibration equipment according to any one of claims 1 to 8, characterized in that: The verification method includes: The eddy current resonance synchronization unit generates a synchronous resonance signal and transmits it to the input end of each displacement eddy current sensor, generating different eddy current signal voltages according to the different displacements; The displacement signal detection unit receives the eddy current signal voltage output by the paired displacement eddy current sensor and generates a real-time voltage signal of the bearing displacement position through an amplification circuit; The displacement signal ADC conversion detection unit detects the displacement voltage signal and converts it from analog to digital voltage that can be processed by the main processor; The voltage detection unit at the position sensor end converts the analog voltage output by the displacement eddy current sensor into a digital voltage that can be processed by the main control circuit; The temperature detection unit sends the detected external temperature data to the main control circuit; The symmetry detection unit uses the current signal of the magnetic bearing coil as a sensor signal input, reads the voltage signal, and determines the symmetry of the two sensors, which is regarded as the detection of the coil center line; The zero position adjustment output unit generates an adjustment zero position signal voltage according to the output of the main control circuit and sends it to the displacement signal detection unit, thereby adjusting the zero position forming voltage; The amplitude adjustment output unit generates an adjustment amplitude signal voltage according to the output of the main control circuit and sends it to the displacement signal detection unit, thereby adjusting the amplitude to form a voltage; and The PID regulation output control unit generates a voltage signal for regulating the PID output and outputs it to the bearing coil control circuit.

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