Image encoding method and image decoding method and device
By determining the image decoding processing mode based on the motion vector resolution, the problem of unnecessary information addition in the bit stream in the prior art is solved, and the encoding efficiency is improved.
Patent Information
- Application Number
- CN202310347162.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2017-11-09
- Filing Date
- 2018-03-30
- Publication Date
- 2025-08-19
- Estimated Expiration
- 2038-03-30
AI Technical Summary
In the existing video encoding and decoding methods, unnecessary information is added to the bitstream, resulting in an increase in bit quantity.
Unnecessary information addition is reduced by determining the processing mode of image decoding based on the motion vector resolution (MVR) of the current block, including at least one of prediction processing, transformation processing, and filtering processing.
Reduces unnecessary information in the bitstream and improves encoding efficiency.
Smart Images

Figure CN116389720B_ABST
Abstract
Description
[0001] This application is a divisional application of a patent application with an application date of March 30, 2018, application number 201880084683.X, and invention name “Device and method for encoding images based on motion vector resolution and decoding device and method”. Technical Field
[0002] The present disclosure relates to image encoding and decoding, and more particularly to a method and apparatus for encoding an image based on motion vector resolution, and a method and apparatus for decoding an image. Background Art
[0003] In a method of encoding and decoding a video, in order to encode an image, one picture may be divided into macroblocks, and each of the macroblocks may be prediction-encoded by using inter prediction or intra prediction.
[0004] Inter-frame prediction is a method of compressing images by removing temporal redundancy between frames. Motion estimation coding is a representative example of inter-frame prediction. In motion estimation coding, a block in the current frame is predicted using at least one reference frame. A preset evaluation function is used to find the reference block most similar to the current block within a preset search range.
[0005] A current block is predicted based on a reference block, and a residual block is encoded, wherein the residual block is generated by subtracting the prediction block from the current block, the prediction block being generated as a prediction result. In this case, in order to further accurately perform prediction, pixels in sub-pel units smaller than integer pel units may be generated by interpolating a search range of a reference picture, and inter-frame prediction may be performed on the generated sub-pel units.
[0006] Intra-frame prediction is a method for compressing images by removing spatial redundancy within a frame. Intra-frame prediction uses at least one prediction block generation method to generate a prediction block based on the neighboring pixels of the current block. A residual block is then encoded, which is generated by subtracting the prediction block from the current block.
[0007] Codecs such as H.264 Advanced Video Coding (AVC) and High Efficiency Video Coding (HEVC) encode and decode images by using a prediction technique including intra-frame prediction and inter-frame prediction, a transform technique, and a filtering technique. Summary of the Invention
[0008] Solution to the problem
[0009] According to an embodiment, an image decoding method includes: determining at least one first processing mode for decoding a current block based on a motion vector resolution (MVR) of the current block, wherein the at least one first processing mode is from a plurality of processing modes included in at least one of prediction processing, transform processing, and filtering processing; and decoding the current block according to the at least one first processing mode.
[0010] Disclosed beneficial effects
[0011] According to an embodiment, an image encoding device and encoding method and an image decoding device and decoding method predetermine a processing mode applicable to a current block based on a motion vector resolution of the current block, so that unnecessary information does not need to be added to a bitstream, thereby reducing the bit amount. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] To further understand the drawings, a brief description of each drawing is provided.
[0013] Figure 1 A block diagram illustrating an image decoding apparatus capable of decoding an image based on at least one of block shape information and division shape information according to an embodiment.
[0014] Figure 2 is a block diagram of an image encoding apparatus for encoding an image based on at least one of block shape information and division shape information according to an embodiment.
[0015] Figure 3 A process in which a current coding unit is split to determine at least one coding unit according to an embodiment is illustrated.
[0016] Figure 4 A process of determining at least one coding unit by dividing non-square coding units according to an embodiment is illustrated.
[0017] Figure 5 A process of splitting a coding unit based on at least one of block shape information and partition shape information according to an embodiment is illustrated.
[0018] Figure 6 A method of determining a preset coding unit from an odd number of coding units according to an embodiment is illustrated.
[0019] Figure 7 Illustrated is an order in which a plurality of coding units are processed when a plurality of coding units are determined by splitting a current coding unit, according to an embodiment.
[0020] Figure 8 A process of determining that a current coding unit is to be split into an odd number of coding units when coding units cannot be processed in a preset order according to an embodiment is illustrated.
[0021] Figure 9 A process of determining at least one coding unit by splitting a first coding unit according to an embodiment is illustrated.
[0022] Figure 10 It is shown that shapes into which the second coding unit may be split are limited when a second coding unit having a non-square shape determined by splitting the first coding unit satisfies a preset condition according to an embodiment.
[0023] Figure 11 A process of splitting a square coding unit when division shape information indicates that the square coding unit is not to be split into four square coding units according to an embodiment is illustrated.
[0024] Figure 12 It is shown that a processing order among a plurality of coding units may be changed depending on a process of dividing the coding units according to an embodiment.
[0025] Figure 13 A process of determining the depth of a coding unit as the shape and size of the coding unit change when the coding unit is recursively split such that a plurality of coding units are determined is illustrated according to an embodiment.
[0026] Figure 14 Depths that may be determined based on shapes and sizes of coding units and partial indices (PIDs) for distinguishing between coding units, according to an embodiment, are illustrated.
[0027] Figure 15 It is shown that a plurality of coding units are determined based on a plurality of preset data units included in a picture according to an embodiment.
[0028] Figure 16 A processing block serving as a unit for determining an order of reference coding units included in a picture according to an embodiment is illustrated.
[0029] Figure 17 Illustrated are coding units that may be determined for each picture when a combination of shapes into which a coding unit may be divided is different for each picture, according to an embodiment.
[0030] Figure 18 Various shapes of coding units that may be determined based on division shape information that may be represented as a binary code, according to an embodiment, are illustrated.
[0031] Figure 19 Other shapes of coding units that may be determined based on division shape information that may be represented as a binary code, according to an embodiment, are illustrated.
[0032] Figure 20 is a block diagram of an image encoding and decoding system for performing loop filtering.
[0033] Figure 21 An example of filtering units included in a maximum coding unit and filtering performance information of the filtering units according to an embodiment is illustrated.
[0034] Figure 22 A process of performing merging or splitting between coding units determined according to a preset encoding method according to an embodiment is illustrated.
[0035] Figure 23 Illustrated are indexes according to a zigzag scanning order of coding units, according to an embodiment.
[0036] Figure 24 is a diagram of reference samples used for intra prediction of a coding unit according to an embodiment.
[0037] Figure 25 is a block diagram showing the configuration of an image decoding apparatus according to an embodiment.
[0038] Figure 26 is a flowchart for describing an image decoding method according to an embodiment.
[0039] Figure 27 is a block diagram showing the configuration of an image encoding device according to an embodiment.
[0040] Figure 28 is a flowchart for describing an image encoding method according to an embodiment.
[0041] Figure 29 A processing mode included in each of the prediction process, the transform process, and the filter process is shown.
[0042] Figure 30 Shown are positions of pixels that can be indicated by motion vectors according to MVR of 1 / 4 pixel unit, MVR of 1 / 2 pixel unit, MVR of 1 pixel unit, and MVR of 2 pixel unit when the minimum motion vector resolution (MVR) is MVR of 1 / 4 pixel unit.
[0043] Figure 31 Shows the syntax for obtaining information about MVR from a bitstream.
[0044] Figures 32 to 34 Examples of applicable processing modes and / or non-applicable processing modes predetermined for MVR are shown.
[0045] Figures 35 to 37 An example of syntax for describing a process of applying a specific processing mode to a current block based on the MVR of the current block is shown.
[0046] Best Mode
[0047] According to an embodiment, an image decoding method includes: determining at least one first processing mode for decoding a current block based on a motion vector resolution (MVR) of the current block, wherein the at least one first processing mode is from a plurality of processing modes included in at least one of prediction processing, transform processing, and filtering processing; and decoding the current block according to the at least one first processing mode.
[0048] The image decoding method may also include: obtaining information about the at least one first processing mode from the bit stream, and the decoding step may include: when confirming the application of the at least one first processing mode based on the obtained information, decoding the current block according to the at least one first processing mode.
[0049] The decoding may include, when it is determined that the at least one first processing mode is not applied, decoding the current block according to a second processing mode different from the at least one first processing mode.
[0050] When the MVR of the current block does not correspond to the preset MVR, the operation of obtaining the information about the at least one first processing mode from the bitstream may be skipped.
[0051] The image decoding method may also include: when the MVR of the current block does not correspond to the preset MVR, determining at least one second processing mode corresponding to the MVR of the current block and from the multiple processing modes, and the decoding step may include: decoding the current block according to the at least one second processing mode.
[0052] When there is a predetermined second processing mode whose application is determined before the at least one first processing mode, an operation of obtaining information about the second processing mode from the bitstream may be skipped.
[0053] The image decoding method may further include determining at least one second processing mode corresponding to the MVR of the current block and from among the plurality of processing modes, and may skip obtaining information about the at least one second processing mode from the bitstream.
[0054] The MVR of the current block may be determined for a slice or a picture including the current block, and the step of determining the at least one first processing mode may include: when the slice including the current block is a predicted (P) slice or a bi-predicted (B) slice, or the picture including the current block is a P picture or a B picture, determining that the inter-frame prediction processing mode is to be applied to all blocks included in the slice or the picture.
[0055] The determining of the at least one first processing mode may include determining a prediction block generation mode for a block encoded according to the intra prediction processing mode and included in the same slice or the same picture as the current block based on the MVR of the current block.
[0056] The image decoding method may further include determining specific settings related to the at least one first processing mode based on the MVR of the current block, and the step of decoding the current block may include decoding the current block according to the specific settings of the at least one first processing mode.
[0057] The prediction processing may include at least one of a skip processing mode, a direct processing mode, an adaptive motion vector prediction (AMVP) processing mode, an affine processing mode, a bidirectional optical flow (BIO) processing mode, a decoder-side motion vector derivation (DMVD) processing mode, an illumination compensation (IC) processing mode, a prediction block generation mode, an inter-frame prediction correction (IPR) processing mode, and an overlapped block motion compensation (OBMC) processing mode, the transform processing may include at least one of a multiple transform (MT) processing mode, a non-separable secondary transform (NSST) processing mode, a rotation transform (ROT) processing mode, a discrete sine transform (DST) processing mode, and a discrete cosine transform (DCT) processing mode, and the filtering processing may include at least one of a deblocking processing mode, a sample adaptive offset (SAO) processing mode, a bilateral filter (BF) processing mode, and an adaptive loop filter (ALF) processing mode.
[0058] According to an embodiment, an image decoding method includes: determining whether information about at least one first processing mode is included in a bitstream based on a motion vector resolution (MVR) of a current block, wherein the at least one first processing mode is from a plurality of processing modes included in at least one of prediction processing, transform processing, and filtering processing for decoding the current block; and when information about the at least one first processing mode is included in the bitstream, decoding the current block according to the at least one first processing mode.
[0059] According to an embodiment, an image decoding device includes: a decoder, configured to determine at least one first processing mode for decoding a current block based on a motion vector resolution (MVR) of the current block, wherein the at least one first processing mode is from a plurality of processing modes included in at least one of prediction processing, transform processing, and filtering processing; and a bitstream obtainer, configured to obtain information about the at least one first processing mode from a bitstream, wherein the decoder is further configured to decode the current block according to the at least one first processing mode based on the obtained information.
[0060] According to an embodiment, an image encoding method includes: determining at least one first processing mode for encoding a current block based on a motion vector resolution (MVR) of the current block, wherein the at least one first processing mode is from a plurality of processing modes included in at least one of prediction processing, transform processing, and filtering processing; and encoding the current block according to the at least one first processing mode.
[0061] According to an embodiment, an image encoding device includes: an encoder configured to determine at least one first processing mode for encoding a current block based on a motion vector resolution (MVR) of the current block, and encode the current block according to the at least one first processing mode, wherein the at least one first processing mode is from a plurality of processing modes included in at least one of prediction processing, transform processing, and filtering processing; and a bitstream generator configured to generate a bitstream including information about the at least one first processing mode. DETAILED DESCRIPTION
[0062] Public mode
[0063] Since the present disclosure allows for various changes and multiple embodiments, specific embodiments will be shown in the drawings and described in detail in the written description. However, this is not intended to limit the present disclosure to a specific mode of practice, and it will be understood that all changes, equivalents, and substitutions that do not depart from the spirit and technical scope of the various embodiments are included in the present disclosure.
[0064] In the description of the embodiment, when it is considered that the detailed explanation of the related art may unnecessarily obscure the essence of the present disclosure, the detailed explanation of the related art is omitted. In addition, the numbers (e.g., first and second) used in the description of the embodiment are only intended to distinguish one component from another component.
[0065] Throughout the specification, it will also be understood that when an element is referred to as being “connected” or “coupled” with another element, the element may be directly connected to or coupled with the other element, or the element may be electrically connected to or coupled with the other element by having an intermediate element interposed therebetween, unless there is a specific description to the contrary.
[0066] Throughout the specification, for elements with suffixes such as "unit" or "module", two or more elements may be combined into one element or one element may be divided into two or more elements according to specific functions. In addition, each of the elements described below may perform some or all of the functions of other elements in addition to the main functions for which each element is responsible, and some of the main functions for which the element is responsible may be exclusively performed by other elements.
[0067] Throughout this specification, an “image” or a “picture” may refer to a still image of a video or a moving picture that is the video itself.
[0068] Throughout this specification, "sample" refers to data assigned to a sampling location in an image and serving as a processing target. For example, a sample can be a pixel value in an image in the spatial domain or a transform coefficient in the transform domain. A unit consisting of one or more samples can be defined as a block.
[0069] Throughout the specification, a 'current block' may refer to a block of a maximum coding unit, a coding unit, a prediction unit, or a transformation unit of a current image to be encoded or decoded.
[0070] Throughout this specification, "motion vector resolution (MVR)" may refer to the accuracy of the position of a pixel included in a reference image (or an interpolated reference image) and indicated by a motion vector determined by inter-frame prediction. When the MVR has an N-pixel unit (where N is a rational number), this means that the motion vector can have an accuracy of N pixel units. For example, an MVR of 1 / 4 pixel units may mean that the motion vector can indicate a pixel position of 1 / 4 pixel units (i.e., sub-pixel units) in the interpolated reference image, and an MVR of 1 pixel unit may mean that the motion vector can indicate a pixel position corresponding to 1 pixel unit (i.e., integer pixel units) in the interpolated reference image.
[0071] Throughout the specification, a "candidate MVR" refers to one or more MVRs that may be selected as the MVR of a block.
[0072] Throughout the specification, “pixel unit” may be used interchangeably with “pixel precision”, “pixel accuracy”, etc.
[0073] Throughout this specification, a "processing mode" may refer to a technique that may be applied to a block in order to encode and decode the block in an image.
[0074] In the following, reference is made to Figures 1 to 24 , an image encoding method and apparatus based on a tree-structured transformation unit and coding unit and an image decoding method and apparatus thereof according to an embodiment will be described. Figures 1 to 24 The image encoding apparatus 200 and the image decoding apparatus 100 described may each include a reference to Figures 25 to 37 The image encoding device 2700 and the image decoding device 2500 are described.
[0075] Figure 1 A block diagram illustrating an image decoding apparatus 100 capable of decoding an image based on at least one of block shape information and division shape information according to an embodiment.
[0076] Reference Figure 1 According to an embodiment, the image decoding apparatus 100 may include a bitstream obtainer 110 and a decoder 120, wherein the bitstream obtainer 110 is configured to obtain preset information such as division shape information, block shape information, etc. from a bitstream, and the decoder 120 is configured to decode an image by using the obtained information. According to an embodiment, when the bitstream obtainer 110 of the image decoding apparatus 100 obtains at least one of the block shape information and the division shape information, the decoder 120 of the image decoding apparatus 100 may determine at least one coding unit for dividing the image based on the at least one of the block shape information and the division shape information.
[0077] According to an embodiment, the decoder 120 of the image decoding apparatus 100 may determine the shape of the coding unit based on the block shape information. For example, the block shape information may include information indicating whether the coding unit has a square shape or a non-square shape. The decoder 120 may determine the shape of the coding unit by using the block shape information.
[0078] According to an embodiment, the decoder 120 may determine a shape into which the coding unit is to be split based on the split shape information. For example, the split shape information may indicate information about the shape of at least one coding unit included in the coding unit.
[0079] According to an embodiment, the decoder 120 may determine whether a coding unit is to be split or not to be split based on the split shape information. The split shape information may include information about at least one coding unit included in the coding unit, and when the split shape information indicates that only one coding unit is included in the coding unit or is not to be split, the decoder 120 may determine that the coding unit including the split shape information is not to be split. When the split shape information indicates that the coding unit is to be split into a plurality of coding units, the decoder 120 may split the coding unit into a plurality of coding units included in the coding unit based on the split shape information.
[0080] According to an embodiment, the division shape information may indicate the number of coding units into which the coding unit will be divided or the direction in which the coding unit will be divided. For example, the division shape information may indicate whether the coding unit will be divided in at least one of a vertical direction and a horizontal direction or will not be divided.
[0081] Figure 3 A process in which the image decoding apparatus 100 according to an embodiment determines at least one coding unit by splitting a current coding unit is illustrated.
[0082] The block shape may include 4N×4N, 4N×2N, 2N×4N, 4N×N, or N×4N. In this regard, N may be a positive integer. The block shape information is information indicating at least one of a shape, a direction, an aspect ratio, or a size of a coding unit.
[0083] The shape of the coding unit may include a square shape and a non-square shape. When the width and height of the coding unit are the same length (4N×4N), the image decoding apparatus 100 may determine the block shape information of the coding unit as a square shape. The image decoding apparatus 100 may determine the shape of the coding unit as a non-square shape.
[0084] When the width and height of a coding unit are different (4N×2N, 2N×4N, 4N×N, or N×4N), the image decoding apparatus 100 may determine the block shape information of the coding unit as a non-square shape. When the shape of the coding unit is a non-square shape, the image decoding apparatus 100 may determine the aspect ratio in the block shape information of the coding unit as at least one of 1:2, 2:1, 1:4, 4:1, 1:8, or 8:1. In addition, the image decoding apparatus 100 may determine whether the coding unit is in the horizontal direction or the vertical direction based on the width and height of the coding unit. In addition, the image decoding apparatus 100 may determine the size of the coding unit based on at least one of the width, height, and area of the coding unit.
[0085] According to an embodiment, the image decoding apparatus 100 may determine the shape of a coding unit by using block shape information, and may determine into which shape the coding unit will be divided by using information about a division shape mode. That is, the coding unit division method indicated by the information about the division shape mode may be determined according to which block shape is indicated by the block shape information used by the image decoding apparatus 100.
[0086] The image decoding device 100 may obtain information about the division shape pattern from the bitstream. However, the present disclosure is not limited thereto, and the image decoding device 100 and the image encoding device 200 may obtain information about the division shape pattern predetermined based on block shape information. The image decoding device 100 may obtain information about the division shape pattern predetermined for the maximum coding unit or the minimum coding unit. For example, the image decoding device 100 may determine the size of the maximum coding unit to be 256×256. The image decoding device 100 may determine the information about the predetermined division shape pattern to be four-division. Four-division is a division shape pattern that divides the width and height of the coding unit into two equal parts. The image decoding device 100 may obtain a coding unit of a size of 128×128 from the maximum coding unit of a size of 256×256 based on the information about the division shape pattern. In addition, the image decoding device 100 may determine the size of the minimum coding unit to be 4×4. The image decoding device 100 may obtain information about the division shape pattern indicating that “division is not performed” for the minimum coding unit.
[0087] According to an embodiment, the image decoding apparatus 100 may use block shape information indicating that the current coding unit has a square shape. For example, the image decoding apparatus 100 may determine whether to not split the square coding unit, to split the square coding unit vertically, to split the square coding unit horizontally, or to split the square coding unit into four coding units based on information about the division shape mode. Figure 3 , when the block shape information of the current coding unit 300 indicates a square shape, the decoder 120 may determine that the coding unit 310a having the same size as the current coding unit 300 will not be divided based on the information about the division shape mode indicating that division is not performed, or may determine the coding unit 310b, 310c or 310d divided based on the information about the division shape mode indicating a preset division method.
[0088] Reference Figure 3 According to an embodiment, the image decoding apparatus 100 may determine two coding units 310b obtained by vertically splitting the current coding unit 300 based on the information about the division shape pattern indicating that the division is performed vertically. The image decoding apparatus 100 may determine two coding units 310c obtained by horizontally splitting the current coding unit 300 based on the information about the division shape pattern indicating that the division is performed horizontally. The image decoding apparatus 100 may determine four coding units 310d obtained by vertically and horizontally splitting the current coding unit 300 based on the information about the division shape pattern indicating that the division is performed vertically and horizontally. However, the division shape of the square coding unit is not limited to the above-mentioned shape, and the information about the division shape pattern may indicate various shapes. Now, the preset division shape for dividing the square coding unit will be described in various embodiments below.
[0089] Figure 4 A process of determining at least one coding unit by splitting non-square coding units, performed by the image decoding apparatus 100 according to an embodiment, is illustrated.
[0090] According to an embodiment, the image decoding apparatus 100 may use block shape information indicating that the current coding unit has a non-square shape. The image decoding apparatus 100 may determine whether to not split the non-square current coding unit or split the non-square current coding unit by using a preset splitting method based on information about the split shape mode. Figure 4When the block shape information of the current coding unit 400 or 450 indicates a non-square shape, the image decoding apparatus 100 may determine that the coding unit 410 or 460 having the same size as the current coding unit 400 or 450 will not be split based on the information about the division shape mode indicating that division is not performed, or may determine that the coding units 420a and 420b, 430a to 430c, 470a and 470b, or 480a to 480c are divided based on the information about the division shape mode indicating a preset division method. The preset division method for dividing the non-square coding unit will now be described in various embodiments below.
[0091] According to an embodiment, the image decoding apparatus 100 may determine a division shape in which a coding unit is to be divided by using information about a division shape pattern, and in this case, the information about the division shape pattern may indicate the number of one or more coding units generated by dividing the coding unit. Figure 4 , when the information about the division shape pattern indicates that the current coding unit 400 or 450 is divided into two coding units, the image decoding device 100 can determine the two coding units 420a and 420b or 470a and 470b included in the current coding unit 400 or 450 by dividing the current coding unit 400 or 450 based on the information about the division shape pattern.
[0092] According to an embodiment, when the image decoding apparatus 100 splits the non-square current coding unit 400 or 450 based on the information about the division shape pattern, the image decoding apparatus 100 may split the current coding unit in consideration of the position of the long side of the non-square current coding unit 400 or 450. For example, the image decoding apparatus 100 may determine a plurality of coding units by splitting the current coding unit 400 in consideration of the shape of the current coding unit 400 or 450 in a manner that divides the long side of the current coding unit 400 or 450.
[0093] According to an embodiment, when the information about the division shape mode indicates that the coding unit is divided into an odd number of (three-partition) blocks, the image decoding apparatus 100 may determine an odd number of coding units included in the current coding unit 400 or 450. For example, when the information about the division shape mode indicates that the current coding unit 400 or 450 is divided into three coding units, the image decoding apparatus 100 may divide the current coding unit 400 or 450 into three coding units 430a, 430b, and 430c or 480a, 480b, and 480c.
[0094] According to an embodiment, the aspect ratio of the current coding unit 400 or 450 may be 4:1 or 1:4. When the aspect ratio is 4:1, the width length is greater than the height length, and therefore the block shape information may indicate the horizontal direction. When the aspect ratio is 1:4, the width length is less than the height length, and therefore the block shape information may indicate the vertical direction. The image decoding device 100 may determine whether to split the current coding unit into an odd number of blocks based on the information regarding the division shape mode. Furthermore, the image decoding device 100 may determine the division direction of the current coding unit 400 or 450 based on the block shape information of the current coding unit 400 or 450. For example, when the current coding unit 400 is in the vertical direction, the image decoding device 100 may split the current coding unit 400 horizontally and thus determine coding units 430a, 430b, and 430c. Furthermore, when the current coding unit 450 is in the horizontal direction, the image decoding device 100 may split the current coding unit 450 vertically and thus determine coding units 480a, 480b, and 480c.
[0095] According to an embodiment, the image decoding apparatus 100 may determine an odd number of coding units included in the current coding unit 400 or 450, and the sizes of all the determined coding units may be unequal. For example, a pre-set coding unit 430b or 480b among the determined odd number of coding units 430a, 430b, and 430c or 480a, 480b, and 480c may have a size different from that of the other coding units 430a and 430c or 480a and 480c. That is, the coding units determined by dividing the current coding unit 400 or 450 may have a variety of sizes, and in some cases, all of the odd number of coding units 430a, 430b, and 430c or 480a, 480b, and 480c may have different sizes.
[0096] According to an embodiment, when the information about the division shape mode indicates that the coding unit is divided into an odd number of blocks, the image decoding apparatus 100 may determine an odd number of coding units included in the current coding unit 400 or 450, and may apply a preset restriction to at least one of the odd number of coding units obtained by dividing the current coding unit 400 or 450. Figure 4, the image decoding apparatus 100 may allow a decoding method for a coding unit 430b or 480b to be different from a decoding method for the other coding units 430a and 430c or 480a and 480c, wherein the coding unit 430b or 480b is at a center position among the three coding units 430a, 430b, and 430c or 480a, 480b, and 480c obtained by dividing the current coding unit 400 or 450. For example, the image decoding apparatus 100 may restrict the coding unit 430b or 480b at the center position from being further divided or from being divided only a preset number of times, unlike the other coding units 430a and 430c or 480a and 480c.
[0097] Figure 5 A process of splitting coding units based on at least one of block shape information and information about a division shape mode, performed by the image decoding apparatus 100 according to an embodiment is illustrated.
[0098] According to an embodiment, the image decoding device 100 may determine whether to split the square first coding unit 500 into coding units or not based on at least one of the block shape information and the information about the division shape mode. According to an embodiment, when the information about the division shape mode indicates that the first coding unit 500 is to be split horizontally, the image decoding device 100 may determine the second coding unit 510 by splitting the first coding unit 500 horizontally. The terms "first coding unit," "second coding unit," and "third coding unit" used in the embodiment are terms used to understand the relationship between before and after the coding units are split. For example, the second coding unit may be determined by splitting the first coding unit, and the third coding unit may be determined by splitting the second coding unit. It will be understood that the relationship between the first, second, and third coding units follows the above description.
[0099] According to an embodiment, the image decoding apparatus 100 may determine whether to split the determined second coding unit 510 or to split the determined second coding unit 510 into coding units based on at least one of block shape information and information about a division shape mode. Figure 5, the image decoding apparatus 100 may not split the non-square second coding unit 510 determined by splitting the first coding unit 500 or split the non-square second coding unit 510 determined by splitting the first coding unit 500 into one or more third coding units 520a or 520b, 520c, and 520d based on at least one of the block shape information and the information about the division shape mode. The image decoding apparatus 100 may obtain at least one of the block shape information and the information about the division shape mode, and may split the first coding unit 500 based on the obtained block shape information and the obtained information about the division shape mode into a plurality of second coding units (for example, 510) of various shapes, and may split the second coding unit 510 by using the division method of the first coding unit 500 based on the at least one of the block shape information and the information about the division shape mode. According to an embodiment, when the first coding unit 500 is divided into the second coding unit 510 based on at least one of the block shape information of the first coding unit 500 and the information about the division shape mode, the second coding unit 510 may also be divided into the third coding units 520a or 520b, 520c, and 520d based on at least one of the block shape information of the second coding unit 510 and the information about the division shape mode. That is, the coding unit may be recursively divided based on at least one of the block shape information and the information about the division shape mode of each coding unit. Therefore, a square coding unit may be determined by dividing a non-square coding unit, and a non-square coding unit may be determined by recursively dividing a square coding unit.
[0100] Reference Figure 5 , the preset coding units (e.g., coding units at the center position or square coding units) in the odd-numbered third coding units 520b, 520c, and 520d determined by dividing the non-square second coding unit 510 may be recursively divided. According to an embodiment, the square third coding unit 520b in the odd-numbered third coding units 520b, 520c, and 520d may be divided into a plurality of fourth coding units in the horizontal direction. The non-square fourth coding unit 530b or 530d in the plurality of fourth coding units 530a, 530b, 530c, and 530d may be divided into a plurality of coding units. For example, the non-square fourth coding unit 530b or 530d may be further divided into an odd-numbered coding unit. A method that can be used to recursively divide coding units will be described below in various embodiments.
[0101] According to an embodiment, the image decoding apparatus 100 may split each of the third coding unit 520a or 520b, 520c, and 520d into coding units based on at least one of block shape information and information about a division shape pattern. Furthermore, the image decoding apparatus 100 may determine not to split the second coding unit 510 based on at least one of the block shape information and information about a division shape pattern. According to an embodiment, the image decoding apparatus 100 may split the non-square second coding unit 510 into an odd number of third coding units 520b, 520c, and 520d. The image decoding apparatus 100 may impose a preset restriction on a preset third coding unit among the odd-numbered third coding units 520b, 520c, and 520d. For example, the image decoding apparatus 100 may restrict the third coding unit 520c at the center of the odd-numbered third coding units 520b, 520c, and 520d from being split again or from being split a set number of times.
[0102] Reference Figure 5 , the image decoding apparatus 100 may limit the third coding unit 520c at the center position among the odd-numbered third coding units 520b, 520c, and 520d included in the non-square second coding unit 510 to no longer be divided, to be divided by using a preset division method (for example, only divided into four coding units or divided by using the division method of the second coding unit 510), or to be divided only a preset number of times (for example, only divided n times (where n>0)). However, the limitation on the third coding unit 520c at the center position is not limited to the above example, and may include various limitations for decoding the third coding unit 520c at the center position differently from the other third coding units 520b and 520d.
[0103] According to an embodiment, the image decoding apparatus 100 may obtain at least one of block shape information for splitting the current coding unit and information about a split shape mode from a preset position in the current coding unit.
[0104] Figure 6 A method of determining a preset coding unit from among odd-numbered coding units, performed by the image decoding apparatus 100 according to an embodiment, is illustrated.
[0105] Reference Figure 6 , at least one of the block shape information and the information on the division shape mode of the current coding unit 600 or 650 may be obtained from a sample at a preset position (e.g., a sample 640 or 690 at a center position) among a plurality of samples included in the current coding unit 600 or 650. However, the preset position in the current coding unit 600 where at least one of the block shape information and the information on the division shape mode can be obtained is not limited to Figure 6, and may include various positions (for example, above, below, left, right, upper left, lower left, upper right, and lower right positions) included in the current coding unit 600. The image decoding apparatus 100 may obtain at least one of block shape information and information about a division shape mode from the preset position, and may determine not to divide the current coding unit or to divide the current coding unit into coding units of various shapes and sizes.
[0106] According to an embodiment, when the current coding unit is divided into a preset number of coding units, the image decoding apparatus 100 may select one of the coding units. Various methods may be used to select one of the plurality of coding units, and descriptions of the various methods will be provided in various embodiments below.
[0107] According to an embodiment, the image decoding apparatus 100 may split a current coding unit into a plurality of coding units, and may determine a coding unit at a preset position.
[0108] According to an embodiment, the image decoding apparatus 100 may use information indicating respective positions of odd-numbered coding units in order to determine a coding unit at a center position among the odd-numbered coding units. Figure 6 , the image decoding apparatus 100 may determine the odd-numbered coding units 620a, 620b, and 620c or the odd-numbered coding units 660a, 660b, and 660c by dividing the current coding unit 600 or the current coding unit 650. The image decoding apparatus 100 may determine the coding unit 620b at the center position or the coding unit 660b at the center position by using information about the positions of the odd-numbered coding units 620a, 620b, and 620c or the odd-numbered coding units 660a, 660b, and 660c. For example, the image decoding apparatus 100 may determine the coding unit 620b at the center position by determining the positions of the coding units 620a, 620b, and 620c based on information indicating the positions of preset samples included in the coding units 620a, 620b, and 620c. In detail, the image decoding apparatus 100 may determine the coding unit 620b at the center position by determining the positions of the coding units 620a, 620b, and 620c based on information indicating the positions of the upper left samples 630a, 630b, and 630c of the coding units 620a, 620b, and 620c.
[0109] According to an embodiment, the information indicating the positions of the upper left samples 630a, 630b, and 630c included in the coding units 620a, 620b, and 620c, respectively, may include information about the positions or coordinates of the coding units 620a, 620b, and 620c in the picture. According to an embodiment, the information indicating the positions of the upper left samples 630a, 630b, and 630c included in the coding units 620a, 620b, and 620c, respectively, may include information indicating the width or height of the coding units 620a, 620b, and 620c included in the current coding unit 600, and the width or height may correspond to information indicating the difference between the coordinates of the coding units 620a, 620b, and 620c in the picture. That is, the image decoding apparatus 100 can determine the coding unit 620b at the center position by directly using the information about the positions or coordinates of the coding units 620a, 620b, and 620c in the picture, or by using the information about the width or height of the coding unit corresponding to the difference between the coordinates.
[0110] According to an embodiment, information indicating the position of the upper left sample point 630a of the upper coding unit 620a may include coordinates (xa, ya), information indicating the position of the upper left sample point 630b of the middle coding unit 620b may include coordinates (xb, yb), and information indicating the position of the upper left sample point 630c of the lower coding unit 620c may include coordinates (xc, yc). The image decoding apparatus 100 may determine the middle coding unit 620b by using the coordinates of the upper left samples 630a, 630b, and 630c included in the coding units 620a, 620b, and 620c, respectively. For example, when the coordinates of the upper left samples 630a, 630b, and 630c are sorted in ascending or descending order, the coding unit 620b including the sample point 630b at the center position (xb, yb) may be determined as the coding unit at the center position among the coding units 620a, 620b, and 620c determined by splitting the current coding unit 600. However, the coordinates indicating the positions of the upper left sample points 630a, 630b, and 630c may include coordinates indicating absolute positions in the picture, or coordinates (dxb, dyb) indicating the relative position of the upper left sample point 630b of the middle coding unit 620b relative to the position of the upper left sample point 630a of the upper coding unit 620a and coordinates (dxc, dyc) indicating the relative position of the upper left sample point 630c of the lower coding unit 620c relative to the position of the upper left sample point 630a of the upper coding unit 620a may be used. In addition, the method of determining the coding unit at a preset position by using the coordinates of the sample points included in the coding unit as information indicating the positions of the sample points is not limited to the above method, and may include various arithmetic methods capable of using the coordinates of the sample points.
[0111] According to an embodiment, the image decoding apparatus 100 may divide the current coding unit 600 into a plurality of coding units 620a, 620b, and 620c, and may select one of the coding units 620a, 620b, and 620c based on a preset standard. For example, the image decoding apparatus 100 may select the coding unit 620b having a size different from that of the other coding units from among the coding units 620a, 620b, and 620c.
[0112] According to an embodiment, the image decoding apparatus 100 may determine the width or height of the coding units 620a, 620b, and 620c by using the coordinates (xa, ya) indicating the position of the upper left sample point 630a of the upper coding unit 620a, the coordinates (xb, yb) indicating the position of the upper left sample point 630b of the middle coding unit 620b, and the coordinates (xc, yc) indicating the position of the upper left sample point 630c of the lower coding unit 620c. The image decoding apparatus 100 may determine the respective sizes of the coding units 620a, 620b, and 620c by using the coordinates (xa, ya), (xb, yb), and (xc, yc) indicating the positions of the coding units 620a, 620b, and 620c. According to an embodiment, the image decoding apparatus 100 may determine the width of the upper coding unit 620a as the width of the current coding unit 600. The image decoding apparatus 100 may determine the height of the upper coding unit 620a as yb-ya. According to an embodiment, the image decoding apparatus 100 may determine the width of the intermediate coding unit 620b as the width of the current coding unit 600. The image decoding apparatus 100 may determine the height of the intermediate coding unit 620b as yc-yb. According to an embodiment, the image decoding apparatus 100 may determine the width or height of the lower coding unit 620c by using the width or height of the current coding unit 600 or the width or height of the upper coding unit 620a and the intermediate coding unit 620b. The image decoding apparatus 100 may determine a coding unit having a size different from that of other coding units based on the determined width and height of the coding units 620a to 620c. Referring to Figure 6 , the image decoding apparatus 100 may determine the intermediate coding unit 620b having a size different from the sizes of the upper coding unit 620a and the lower coding unit 620c as the coding unit at the preset position. However, the above-described method of determining a coding unit having a size different from the sizes of other coding units, performed by the image decoding apparatus 100, corresponds only to an example of determining a coding unit at a preset position by using the size of the coding unit determined based on the coordinates of the sample points, and therefore, various methods of determining a coding unit at a preset position by comparing the sizes of the coding units determined based on the coordinates of the preset sample points may be used.
[0113] The image decoding apparatus 100 may determine the width or height of each of the coding units 660a, 660b, and 660c by using the coordinates (xd, yd) as information indicating the position of the upper left sample point 670a of the left coding unit 660a, the coordinates (xe, ye) as information indicating the position of the upper left sample point 670b of the middle coding unit 660b, and the coordinates (xf, yf) as information indicating the position of the upper left sample point 670c of the right coding unit 660c. The image decoding apparatus 100 may determine the size of the coding units 660a, 660b, and 660c by using the coordinates (xd, yd), (xe, ye), and (xf, yf) indicating the positions of the coding units 660a, 660b, and 660c.
[0114] According to an embodiment, the image decoding apparatus 100 may determine the width of the left coding unit 660a as xe-xd. The image decoding apparatus 100 may determine the height of the left coding unit 660a as the height of the current coding unit 650. According to an embodiment, the image decoding apparatus 100 may determine the width of the middle coding unit 660b as xf-xe. The image decoding apparatus 100 may determine the height of the middle coding unit 660b as the height of the current coding unit 600. According to an embodiment, the image decoding apparatus 100 may determine the width or height of the right coding unit 660c by using the width or height of the current coding unit 650 and the widths and heights of the left coding unit 660a and the middle coding unit 660b. The image decoding apparatus 100 may determine a coding unit having a size different from that of other coding units based on the determined widths and heights of the coding units 660a, 660b, and 660c. With reference to Figure 6 , the image decoding apparatus 100 may determine the middle coding unit 660b having a size different from the sizes of the left coding unit 660a and the right coding unit 660c as the coding unit at the preset position. However, the above-described method of determining a coding unit having a size different from the sizes of other coding units, performed by the image decoding apparatus 100, corresponds only to an example of determining a coding unit at a preset position by using the size of the coding unit determined based on the coordinates of the sample points, and therefore, various methods of determining a coding unit at a preset position by comparing the sizes of the coding units determined based on the coordinates of the preset sample points may be used.
[0115] However, the positions of samples considered for determining the position of a coding unit are not limited to the above-described upper left position, and information on arbitrary positions of samples included in the coding unit may be used.
[0116] According to an embodiment, the image decoding apparatus 100 may select a coding unit at a preset position from an odd number of coding units determined by dividing the current coding unit, taking into account the shape of the current coding unit. For example, when the current coding unit has a non-square shape with a width greater than a height, the image decoding apparatus 100 may determine a coding unit at a preset position along the horizontal direction. That is, the image decoding apparatus 100 may determine one of the coding units at different positions along the horizontal direction and may impose restrictions on the coding unit. When the current coding unit has a non-square shape with a height greater than a width, the image decoding apparatus 100 may determine a coding unit at a preset position along the vertical direction. That is, the image decoding apparatus 100 may determine one of the coding units at different positions along the vertical direction and may impose restrictions on the coding unit.
[0117] According to an embodiment, the image decoding apparatus 100 may use information indicating respective positions of even-numbered coding units to determine a coding unit at a preset position among the even-numbered coding units. The image decoding apparatus 100 may determine the even-numbered coding units by dividing the current coding unit, and may determine the coding unit at the preset position by using information about the positions of the even-numbered coding units. Operations related thereto may be similar to those already described above with respect to Figure 6 The operation of determining the coding unit at a preset position (eg, a center position) among the odd-numbered coding units corresponds to the operation described in detail, and thus a detailed description thereof is not provided here.
[0118] According to an embodiment, when a non-square current coding unit is split into a plurality of coding units, preset information about a coding unit at a preset position may be used in a splitting operation to determine a coding unit at a preset position among the plurality of coding units. For example, the image decoding apparatus 100 may use at least one of block shape information stored in samples included in a coding unit at a center position and information about a split shape mode to determine the coding unit at the center position from among the plurality of coding units determined by splitting the current coding unit in the splitting operation.
[0119] Reference Figure 6The image decoding apparatus 100 may split the current coding unit 600 into multiple coding units 620a, 620b, and 620c based on at least one of the block shape information and the information about the division shape mode, and may determine the coding unit 620b at the center position among the multiple coding units 620a, 620b, and 620c. Furthermore, the image decoding apparatus 100 may determine the coding unit 620b at the center position by considering the location where at least one of the block shape information and the information about the division shape mode is obtained. That is, at least one of the block shape information and the information about the division shape mode of the current coding unit 600 may be obtained from a sample 640 at the center position of the current coding unit 600. When the current coding unit 600 is split into the multiple coding units 620a, 620b, and 620c based on at least one of the block shape information and the information about the division shape mode, the coding unit 620b including the sample 640 may be determined as the coding unit at the center position. However, information used to determine the coding unit at the center position should not be construed as limited to at least one of block shape information and information about a division shape mode, and various types of information may be used to determine the coding unit at the center position.
[0120] According to an embodiment, preset information for identifying a coding unit at a preset position may be obtained from preset samples included in a coding unit to be determined. Figure 6 , the image decoding apparatus 100 may determine a coding unit at a predetermined position (for example, a coding unit at a center position among the divided coding units) among the plurality of coding units 620a, 620b, and 620c determined by dividing the current coding unit 600, using at least one of block shape information obtained from a sample at a preset position in the current coding unit 600 (for example, a sample at a center position of the current coding unit 600) and information about a division shape mode. That is, the image decoding apparatus 100 may determine a coding unit 620b including a sample from which preset information (for example, at least one of block shape information and information about a division shape mode) may be obtained from the plurality of coding units 620a, 620b, and 620c determined by dividing the current coding unit 600 by considering the block shape of the current coding unit 600, and may impose preset restrictions on the coding unit 620b. Referring to Figure 6 According to an embodiment, in a decoding operation, the image decoding apparatus 100 may determine a sample 640 at a center position of a current coding unit 600 as a sample from which preset information can be obtained, and may apply a preset restriction to a coding unit 620b including the sample 640. However, the position of the sample from which the preset information can be obtained is not limited to the above-mentioned position, and may include any position of a sample included in the coding unit 620b to be determined for restriction.
[0121] According to an embodiment, the position of the sample from which the preset information can be obtained can be determined based on the shape of the current coding unit 600. According to an embodiment, the block shape information may indicate whether the current coding unit has a square shape or a non-square shape, and the position of the sample from which the preset information can be obtained can be determined based on the shape. For example, the image decoding apparatus 100 may determine, by using at least one of the information about the width of the current coding unit and the information about the height of the current coding unit, a sample located on a boundary for dividing at least one of the width and height of the current coding unit in half as a sample from which the preset information can be obtained. As another example, when the block shape information of the current coding unit indicates a non-square shape, the image decoding apparatus 100 may determine one of the samples adjacent to the boundary for dividing the long side of the current coding unit in half as a sample from which the preset information can be obtained.
[0122] According to an embodiment, when the current coding unit is divided into a plurality of coding units, the image decoding device 100 may use at least one of block shape information and information about a division shape pattern to determine a coding unit at a preset position in the plurality of coding units. According to an embodiment, the image decoding device 100 may obtain at least one of block shape information and information about a division shape pattern from a sample at a preset position in the coding unit, and may divide the plurality of coding units generated by dividing the current coding unit by using at least one of block shape information and information about a division shape pattern obtained from a sample at a preset position in each of the plurality of coding units. That is, the coding unit may be recursively divided based on at least one of block shape information and information about a division shape pattern obtained from a sample at a preset position in each coding unit. As has been described above with respect to Figure 5 An operation of recursively splitting the coding unit is described, and thus a detailed description thereof is not provided here.
[0123] According to an embodiment, the image decoding apparatus 100 may determine one or more coding units by splitting a current coding unit, and may determine an order in which to decode the one or more coding units based on a preset block (for example, the current coding unit).
[0124] Figure 7 Illustrated is an order in which a plurality of coding units are processed when the image decoding apparatus 100 determines a plurality of coding units by splitting a current coding unit, according to an embodiment.
[0125] According to an embodiment, based on block shape information and information about the division shape mode, the image decoding device 100 can determine the second coding units 710a and 710b by dividing the first coding unit 700 in a vertical direction, determine the second coding units 730a and 730b by dividing the first coding unit 700 in a horizontal direction, or determine the second coding units 750a to 750d by dividing the first coding unit 700 in vertical and horizontal directions.
[0126] Reference Figure 7 , the image decoding apparatus 100 may determine to process the second coding units 710a and 710b determined by dividing the first coding unit 700 in the vertical direction in a horizontal direction order 710c. The image decoding apparatus 100 may determine to process the second coding units 730a and 730b determined by dividing the first coding unit 700 in the horizontal direction in a vertical direction order 730c. The image decoding apparatus 100 may determine to process the second coding units 750a to 750d determined by dividing the first coding unit 700 in the vertical and horizontal directions in a preset order (for example, a raster scan order or a zigzag scan order 750e) in which the coding units in one row are processed and then the coding units in the next row are processed.
[0127] According to an embodiment, the image decoding apparatus 100 may recursively divide the coding unit. Figure 7 , the image decoding apparatus 100 may determine a plurality of coding units 710a, 710b, 730a, 730b, 750a, 750b, 750c, and 750d by dividing the first coding unit 700, and may recursively divide each of the determined plurality of coding units 710a, 710b, 730a, 730b, 750a, 750b, 750c, and 750d. A division method of the plurality of coding units 710a, 710b, 730a, 730b, 750a, 750b, 750c, and 750d may correspond to a division method of the first coding unit 700. In this manner, each of the plurality of coding units 710a, 710b, 730a, 730b, 750a, 750b, 750c, and 750d may be independently divided into a plurality of coding units. Referring to Figure 7 , the image decoding apparatus 100 may determine the second coding units 710a and 710b by dividing the first coding unit 700 in a vertical direction, and may determine to independently divide each of the second coding units 710a and 710b or not to divide each of the second coding units 710a and 710b.
[0128] According to an embodiment, the image decoding apparatus 100 may determine the third coding units 720a and 720b by splitting the left second coding unit 710a in a horizontal direction, and may not split the right second coding unit 710b.
[0129] According to an embodiment, the processing order of the coding units may be determined based on the operation of splitting the coding units. In other words, the processing order of the split coding units may be determined based on the processing order of the coding units immediately before the split. The image decoding device 100 may determine the processing order of the third coding units 720a and 720b determined by splitting the left second coding unit 710a independently of the right second coding unit 710b. Because the third coding units 720a and 720b are determined by splitting the left second coding unit 710a in the horizontal direction, the third coding units 720a and 720b may be processed in a vertical order 720c. Because the left second coding unit 710a and the right second coding unit 710b are processed in a horizontal order 710c, the right second coding unit 710b may be processed after the third coding units 720a and 720b included in the left second coding unit 710a are processed in a vertical order 720c. The operation of determining the processing order of coding units based on the coding units before splitting is not limited to the above example, and coding units split and determined into various shapes may be independently processed in a preset order using various methods.
[0130] Figure 8 A process of determining that a current coding unit is to be split into an odd number of coding units when coding units cannot be processed in a preset order, performed by the image decoding apparatus 100 according to an embodiment, is illustrated.
[0131] According to an embodiment, the image decoding apparatus 100 may determine whether the current coding unit is split into an odd number of coding units based on the obtained block shape information and information about the division shape mode. Figure 8 , the square first coding unit 800 may be divided into non-square second coding units 810a and 810b, and the second coding units 810a and 810b may be independently divided into third coding units 820a and 820b, and 820c, 820d, and 820e. According to an embodiment, the image decoding apparatus 100 may determine a plurality of third coding units 820a and 820b by horizontally dividing the left second coding unit 810a, and may divide the right second coding unit 810b into an odd number of third coding units 820c to 820e.
[0132] According to an embodiment, the image decoding apparatus 100 may determine whether to split any coding unit into an odd number of coding units by determining whether the third coding units 820a and 820b and 820c to 820e can be processed in a preset order. Figure 8 , the image decoding apparatus 100 may determine third coding units 820a and 820b and 820c to 820e by recursively dividing the first coding unit 800. The image decoding apparatus 100 may determine whether any one of the following coding units is divided into an odd number of coding units based on at least one of the block shape information and the information about the division shape mode: the first coding unit 800, the second coding units 810a and 810b, and the third coding units 820a and 820b and 820c, 820d, and 820e. For example, the second coding unit 810b located on the right side of the second coding units 810a and 810b may be divided into an odd number of third coding units 820c, 820d, and 820e. The processing order of the multiple coding units included in the first coding unit 800 can be a preset order (for example, a zigzag scanning order 830), and the image decoding device 100 can determine whether the third coding units 820c, 820d and 820e determined by dividing the right second coding unit 810b into an odd number of coding units meet the conditions for processing in the preset order.
[0133] According to an embodiment, the image decoding apparatus 100 may determine whether the third coding units 820a and 820b, and 820c, 820d, and 820e included in the first coding unit 800 satisfy a condition for processing in a preset order, wherein the condition relates to whether at least one of the width and height of the second coding units 810a and 810b is divided in half along the boundary of the third coding units 820a and 820b, and 820c, 820d, and 820e. For example, the third coding units 820a and 820b determined by dividing the height of the non-square left second coding unit 810a in half satisfy the condition. However, because the boundary of the third coding units 820c, 820d, and 820e determined by dividing the right second coding unit 810b into three coding units does not divide the width or height of the right second coding unit 810b in half, it may be determined that the third coding units 820c, 820d, and 820e do not satisfy the condition. When the condition is not satisfied as described above, the image decoding apparatus 100 may determine that the scanning order is discontinuous, and based on the determination result, determine that the second right coding unit 810b is to be divided into an odd number of coding units. According to an embodiment, when the coding unit is divided into an odd number of coding units, the image decoding apparatus 100 may apply a preset restriction to the coding units at a preset position in the divided coding units. The restriction or the preset position has been described above in various embodiments, and therefore a detailed description thereof is not provided here.
[0134] Figure 9 A process of determining at least one coding unit by splitting the first coding unit 900 , performed by the image decoding apparatus 100 , according to an embodiment is illustrated.
[0135] According to an embodiment, the image decoding apparatus 100 may divide the first coding unit 900 based on at least one of the block shape information and the information on the division shape mode obtained by the bitstream obtainer 110. The square first coding unit 900 may be divided into four square coding units, or may be divided into a plurality of non-square coding units. For example, referring to Figure 9 When the block shape information indicates that the first coding unit 900 has a square shape and the information about the division shape mode indicates that the first coding unit 900 is divided into non-square coding units, the image decoding apparatus 100 may divide the first coding unit 900 into a plurality of non-square coding units. In detail, when the information about the division shape mode indicates that an odd number of coding units is determined by dividing the first coding unit 900 in a horizontal direction or a vertical direction, the image decoding apparatus 100 may divide the square first coding unit 900 into an odd number of coding units (for example, second coding units 910a, 910b, and 910c determined by dividing the square first coding unit 900 in a vertical direction, or second coding units 920a, 920b, and 920c determined by dividing the square first coding unit 900 in a horizontal direction).
[0136] According to an embodiment, the image decoding apparatus 100 may determine whether the second coding units 910a, 910b, 910c, 920a, 920b, and 920c included in the first coding unit 900 satisfy a condition for processing in a preset order, and the condition is related to whether at least one of the width and height of the first coding unit 900 will be divided in half along the boundary of the second coding units 910a, 910b, 910c, 920a, 920b, and 920c. Figure 9Because the boundaries of the second coding units 910a, 910b, and 910c determined by vertically dividing the square first coding unit 900 do not divide the width of the first coding unit 900 in half, it can be determined that the first coding unit 900 does not meet the conditions for processing in a preset order. Furthermore, because the boundaries of the second coding units 920a, 920b, and 920c determined by horizontally dividing the square first coding unit 900 do not divide the height of the first coding unit 900 in half, it can be determined that the first coding unit 900 does not meet the conditions for processing in a preset order. When the conditions are not met as described above, the image decoding apparatus 100 may determine that the scanning order is discontinuous and, based on the determination result, may determine that the first coding unit 900 is to be divided into an odd number of coding units. According to an embodiment, when a coding unit is divided into an odd number of coding units, the image decoding apparatus 100 may impose preset restrictions on coding units at preset positions within the divided coding units. These restrictions or predetermined positions have been described above with respect to various embodiments, and therefore a detailed description thereof is not provided here.
[0137] According to an embodiment, the image decoding apparatus 100 may determine coding units of various shapes by splitting the first coding unit.
[0138] Reference Figure 9 , the image decoding apparatus 100 may divide the square first coding unit 900 or the non-square first coding unit 930 or 950 into coding units of various shapes.
[0139] Figure 10 It is shown that shapes into which the image decoding apparatus 100 may split the second coding unit are limited when a second coding unit having a non-square shape determined by splitting the first coding unit 1000 satisfies a preset condition according to an embodiment.
[0140] According to an embodiment, the image decoding apparatus 100 may determine whether to split a square first coding unit 1000 into non-square second coding units 1010a, 1010b, 1020a, and 1020b based on at least one of the block shape information and the information about the division shape pattern obtained by the bitstream obtainer 110. The second coding units 1010a, 1010b, 1020a, and 1020b may be independently split. Thus, based on at least one of the block shape information and the information about the division shape pattern for each of the second coding units 1010a, 1010b, 1020a, and 1020b, the image decoding apparatus 100 may determine whether to split the first coding unit 1000 into multiple coding units or not. According to an embodiment, the image decoding apparatus 100 may determine the third coding units 1012a and 1012b by horizontally splitting the non-square left second coding unit 1010a determined by vertically splitting the first coding unit 1000. However, when the left second coding unit 1010a is split horizontally, the image decoding apparatus 100 may restrict the right second coding unit 1010b from being split in the horizontal direction in which the left second coding unit 1010a is split. When the third coding units 1014a and 1014b are determined by splitting the right second coding unit 1010b in the same direction, since the left second coding unit 1010a and the right second coding unit 1010b are independently split horizontally, third coding units 1012a, 1012b, 1014a, and 1014b may be determined. However, this situation has the same effect as the situation in which the image decoding apparatus 100 divides the first coding unit 1000 into four square second coding units 1030a, 1030b, 1030c, and 1030d based on at least one of block shape information and information about a division shape pattern, and may be inefficient in terms of image decoding.
[0141] According to an embodiment, the image decoding apparatus 100 may determine the third coding units 1022a, 1022b, 1024a, and 1024b by vertically splitting the non-square second coding unit 1020a or 1020b determined by horizontally splitting the first coding unit 1000. However, when the second coding unit (e.g., the upper second coding unit 1020a) is split in the vertical direction, for the above-mentioned reason, the image decoding apparatus 100 may restrict another second coding unit (e.g., the lower second coding unit 1020b) from being split in the vertical direction in which the upper second coding unit 1020a is split.
[0142] Figure 11A process of splitting a square coding unit, performed by the image decoding apparatus 100 , when information about a division shape mode indicates that the square coding unit is not to be split into four square coding units, according to an embodiment is illustrated.
[0143] According to an embodiment, the image decoding apparatus 100 may determine second coding units 1110a, 1110b, 1120a, 1120b, etc. by splitting the first coding unit 1100 based on at least one of block shape information and information about a division shape pattern. The information about the division shape pattern may include information about various methods for dividing the coding unit, but the information about the various division methods may not include information for splitting the coding unit into four square coding units. Based on such information about the division shape pattern, the image decoding apparatus 100 may not split the first coding unit 1100 into the four square second coding units 1130a, 1130b, 1130c, and 1130d. The image decoding apparatus 100 may determine non-square second coding units 1110a, 1110b, 1120a, 1120b, etc. based on the information about the division shape pattern.
[0144] According to an embodiment, the image decoding apparatus 100 may independently divide the non-square second coding units 1110a, 1110b, 1120a, 1120b, etc. Each of the second coding units 1110a, 1110b, 1120a, 1120b, etc. may be recursively divided in a preset order, and the division method may correspond to the method of dividing the first coding unit 1100 based on at least one of block shape information and information about a division shape mode.
[0145] For example, the image decoding apparatus 100 may determine square third coding units 1112a and 1112b by horizontally splitting the left second coding unit 1110a, and may determine square third coding units 1114a and 1114b by horizontally splitting the right second coding unit 1110b. Furthermore, the image decoding apparatus 100 may determine square third coding units 1116a, 1116b, 1116c, and 1116d by horizontally splitting both the left second coding unit 1110a and the right second coding unit 1110b. In this case, coding units having the same shape as the four square second coding units 1130a, 1130b, 1130c, and 1130d split from the first coding unit 1100 may be determined.
[0146] As another example, the image decoding apparatus 100 may determine square third coding units 1122a and 1122b by vertically dividing the upper second coding unit 1120a, and may determine square third coding units 1124a and 1124b by vertically dividing the lower second coding unit 1120b. Furthermore, the image decoding apparatus 100 may determine square third coding units 1126a, 1126b, 1126c, and 1126d by vertically dividing both the upper second coding unit 1120a and the lower second coding unit 1120b. In this case, coding units having the same shape as the four square second coding units 1130a, 1130b, 1130c, and 1130d divided from the first coding unit 1100 may be determined.
[0147] Figure 12 It is shown that a processing order among a plurality of coding units may be changed according to a process of splitting the coding units according to an embodiment.
[0148] According to an embodiment, the image decoding apparatus 100 may divide the first coding unit 1200 based on block shape information and information about a division shape mode. When the block shape information indicates a square shape and the information about a division shape mode indicates that the first coding unit 1200 is divided in at least one of a horizontal direction and a vertical direction, the image decoding apparatus 100 may determine the second coding units 1210a, 1210b, 1220a, and 1220b by dividing the first coding unit 1200. Figure 12 , the non-square second coding units 1210a, 1210b, 1220a, and 1220b determined by dividing the first coding unit 1200 only in the horizontal direction or the vertical direction can be independently divided based on the block shape information of each coding unit and the information about the division shape pattern. For example, the image decoding device 100 can determine the third coding units 1216a, 1216b, 1216c, and 1216d by dividing the second coding units 1210a and 1210b generated by dividing the first coding unit 1200 in the vertical direction in the horizontal direction, and can determine the third coding units 1226a, 1226b, 1226c, and 1226d by dividing the second coding units 1220a and 1220b generated by dividing the first coding unit 1200 in the horizontal direction in the vertical direction. As has been described above with respect to Figure 11 An operation of dividing the second coding units 1210a, 1210b, 1220a, and 1220b is described, and thus a detailed description thereof is not provided here.
[0149] According to an embodiment, the image decoding apparatus 100 may process the coding units in a preset order. Figure 7The operation of processing the encoding units in a preset order is described, and therefore a detailed description thereof is not provided here. Figure 12 , the image decoding apparatus 100 may determine four square third coding units 1216a, 1216b, 1216c, and 1216d, and 1226a, 1226b, 1226c, and 1226d by dividing the square first coding unit 1200. According to an embodiment, the image decoding apparatus 100 may determine the processing order of the third coding units 1216a, 1216b, 1216c, and 1216d, and 1226a, 1226b, 1226c, and 1226d based on the division method of the first coding unit 1200.
[0150] According to an embodiment, the image decoding device 100 can determine the third coding units 1216a, 1216b, 1216c and 1216d by dividing the second coding units 1210a and 1210b generated by dividing the first coding unit 1200 in the vertical direction in the horizontal direction, and can process the third coding units 1216a, 1216b, 1216c and 1216d in the following processing order 1217: first, the third coding units 1216a and 1216c included in the left second coding unit 1210a are processed in the vertical direction, and then the third coding units 1216b and 1216d included in the right second coding unit 1210b are processed in the vertical direction.
[0151] According to an embodiment, the image decoding device 100 can determine the third coding units 1226a, 1226b, 1226c and 1226d by dividing the second coding units 1220a and 1220b generated by dividing the first coding unit 1200 in the horizontal direction in the vertical direction, and can process the third coding units 1226a, 1226b, 1226c and 1226d in the following processing order 1227: first, the third coding units 1226a and 1226b included in the upper second coding unit 1220a are processed in the horizontal direction, and then the third coding units 1226c and 1226d included in the lower second coding unit 1220b are processed in the horizontal direction.
[0152] Reference Figure 12, square third coding units 1216a, 1216b, 1216c, and 1216d and 1226a, 1226b, 1226c, and 1226d can be determined by dividing the second coding units 1210a, 1210b, 1220a, and 1220b, respectively. Although the second coding units 1210a and 1210b determined by dividing the first coding unit 1200 in the vertical direction are different from the second coding units 1220a and 1220b determined by dividing the first coding unit 1200 in the horizontal direction, the third coding units 1216a, 1216b, 1216c, and 1216d and 1226a, 1226b, 1226c, and 1226d divided from the second coding units 1210a and 1210b and the second coding units 1220a and 1220b ultimately show the same shaped coding units divided from the first coding unit 1200. In this way, by recursively dividing the coding units in different ways based on at least one of the block shape information and the information about the division shape pattern, the image decoding device 100 can process multiple coding units in different orders even if the coding units are ultimately determined to be the same shape.
[0153] Figure 13 Described is a process of determining a depth of a coding unit as a shape and size of the coding unit change when the coding unit is recursively split such that a plurality of coding units are determined, according to an embodiment.
[0154] According to an embodiment, the image decoding apparatus 100 may determine the depth of a coding unit based on a preset standard. For example, the preset standard may be the length of the long side of the coding unit. When the length of the long side of the coding unit before being split is 2n (n>0) times the length of the long side of the current coding unit after being split, the image decoding apparatus 100 may determine that the depth of the current coding unit is increased by n compared to the depth of the coding unit before being split. In the following description, a coding unit with an increased depth is referred to as a coding unit with a deeper depth.
[0155] Reference Figure 13According to an embodiment, the image decoding apparatus 100 may determine a second coding unit 1302 and a third coding unit 1304 at a deeper depth by dividing the square first coding unit 1300 based on block shape information indicating a square shape (for example, the block shape information may be represented as "0: SQUARE"). Assuming that the size of the square first coding unit 1300 is 2N×2N, the second coding unit 1302 determined by dividing the width and height of the first coding unit 1300 by 1 / 2 may have a size of N×N. Furthermore, the third coding unit 1304 determined by dividing the width and height of the second coding unit 1302 by 1 / 2 may have a size of N / 2×N / 2. In this case, the width and height of the third coding unit 1304 are 1 / 4 of the width and height of the first coding unit 1300. When the depth of the first coding unit 1300 is D, the depth of the second coding unit 1302 whose width and height are 1 / 2 of the width and height of the first coding unit 1300 may be D+1, and the depth of the third coding unit 1304 whose width and height are 1 / 4 of the width and height of the first coding unit 1300 may be D+2.
[0156] According to an embodiment, the image decoding device 100 can determine the second coding unit 1312 or 1322 and the third coding unit 1314 or 1324 of a deeper depth by dividing the non-square first coding unit 1310 or 1320 based on block shape information indicating a non-square shape (for example, the block shape information can be represented as "1: NS_VER" indicating a non-square shape in which the height is longer than the width, or can be represented as "2: NS_HOR" indicating a non-square shape in which the width is longer than the height).
[0157] The image decoding apparatus 100 may determine the second coding unit 1302, 1312, or 1322 by dividing at least one of the width and the height of the first coding unit 1310 having a size of N×2N. That is, the image decoding apparatus 100 may determine the second coding unit 1302 having a size of N×N or the second coding unit 1322 having a size of N×N / 2 by dividing the first coding unit 1310 in a horizontal direction, or may determine the second coding unit 1312 having a size of N / 2×N by dividing the first coding unit 1310 in horizontal and vertical directions.
[0158] According to an embodiment, the image decoding apparatus 100 may determine the second coding unit 1302, 1312, or 1322 by dividing at least one of the width and the height of the first coding unit 1320 having a size of 2N×N. That is, the image decoding apparatus 100 may determine the second coding unit 1302 having a size of N×N or the second coding unit 1312 having a size of N / 2×N by dividing the first coding unit 1320 in a vertical direction, or may determine the second coding unit 1322 having a size of N×N / 2 by dividing the first coding unit 1320 in horizontal and vertical directions.
[0159] According to an embodiment, the image decoding apparatus 100 may determine the third coding unit 1304, 1314, or 1324 by dividing at least one of the width and the height of the second coding unit 1302 having a size of N×N. That is, the image decoding apparatus 100 may determine the third coding unit 1304 having a size of N / 2×N / 2, the third coding unit 1314 having a size of N / 4×N / 2, or the third coding unit 1324 having a size of N / 2×N / 4 by dividing the second coding unit 1302 in vertical and horizontal directions.
[0160] According to an embodiment, the image decoding apparatus 100 may determine the third coding unit 1304, 1314, or 1324 by dividing at least one of the width and the height of the second coding unit 1312 having a size of N / 2×N. That is, the image decoding apparatus 100 may determine the third coding unit 1304 having a size of N / 2×N / 2 or the third coding unit 1324 having a size of N / 2×N / 4 by dividing the second coding unit 1312 in a horizontal direction, or may determine the third coding unit 1314 having a size of N / 4×N / 2 by dividing the second coding unit 1312 in vertical and horizontal directions.
[0161] According to an embodiment, the image decoding apparatus 100 may determine the third coding unit 1304, 1314, or 1324 by dividing at least one of the width and the height of the second coding unit 1322 having a size of N×N / 2. That is, the image decoding apparatus 100 may determine the third coding unit 1304 having a size of N / 2×N / 2 or the third coding unit 1314 having a size of N / 4×N / 2 by dividing the second coding unit 1322 in a vertical direction, or may determine the third coding unit 1324 having a size of N / 2×N / 4 by dividing the second coding unit 1322 in vertical and horizontal directions.
[0162] According to an embodiment, the image decoding apparatus 100 may split the square coding unit 1300, 1302, or 1304 in a horizontal direction or a vertical direction. For example, the image decoding apparatus 100 may determine a first coding unit 1310 having a size of N×2N by splitting the first coding unit 1300 having a size of 2N×2N in a vertical direction, or may determine a first coding unit 1320 having a size of 2N×N by splitting the first coding unit 1300 in a horizontal direction. According to an embodiment, when the depth is determined based on the length of the longest side of the coding unit, the depth of the coding unit determined by splitting the first coding unit 1300 having a size of 2N×2N in a horizontal direction or a vertical direction may be the same as the depth of the first coding unit 1300.
[0163] According to an embodiment, the width and height of the third coding unit 1314 or 1324 may be 1 / 4 of the width and height of the first coding unit 1310 or 1320. When the depth of the first coding unit 1310 or 1320 is D, the depth of the second coding unit 1312 or 1322 whose width and height are 1 / 2 of the width and height of the first coding unit 1310 or 1320 may be D+1, and the depth of the third coding unit 1314 or 1324 whose width and height are 1 / 4 of the width and height of the first coding unit 1310 or 1320 may be D+2.
[0164] Figure 14 Depths that may be determined based on shapes and sizes of coding units and partial indices (PIDs) for distinguishing between coding units, according to an embodiment, are illustrated.
[0165] According to an embodiment, the image decoding apparatus 100 may determine second coding units of various shapes by dividing the square first coding unit 1400. Figure 14 , the image decoding apparatus 100 may determine the second coding units 1402a and 1402b, 1404a and 1404b, and 1406a, 1406b, 1406c, and 1406d by dividing the first coding unit 1400 in at least one of the vertical direction and the horizontal direction based on the information about the division shape pattern. That is, the image decoding apparatus 100 may determine the second coding units 1402a and 1402b, 1404a and 1404b, and 1406a, 1406b, 1406c, and 1406d based on the information about the division shape pattern of the first coding unit 1400.
[0166] According to an embodiment, the depths of the second coding units 1402a and 1402b, the second coding units 1404a and 1404b, and the second coding units 1406a, 1406b, 1406c, and 1406d determined based on the information on the division shape mode of the square-shaped first coding unit 1400 may be determined based on the length of their long sides. For example, since the length of the side of the square-shaped first coding unit 1400 is equal to the length of the long side of the non-square second coding units 1402a and 1402b and 1404a and 1404b, the first coding unit 1400 and the non-square second coding units 1402a and 1402b and 1404a and 1404b may have the same depth, for example, D. However, when the image decoding device 100 divides the first coding unit 1400 into four square second coding units 1406a, 1406b, 1406c and 1406d based on the information about the division shape pattern, because the length of the side of the square second coding units 1406a, 1406b, 1406c and 1406d is 1 / 2 of the length of the side of the first coding unit 1400, the depth of the second coding units 1406a, 1406b, 1406c and 1406d can be D+1, which is 1 deeper than the depth D of the first coding unit 1400.
[0167] According to an embodiment, the image decoding apparatus 100 may determine a plurality of second coding units 1412a and 1412b and 1414a, 1414b, and 1414c by horizontally dividing the first coding unit 1410 whose height is longer than its width based on information about the division shape pattern. According to an embodiment, the image decoding apparatus 100 may determine a plurality of second coding units 1422a and 1422b and 1424a, 1424b, and 1424c by vertically dividing the first coding unit 1420 whose width is longer than its height based on information about the division shape pattern.
[0168] According to an embodiment, the depths of the second coding units 1412a and 1412b, the second coding units 1414a, 1414b, and 1414c, the second coding units 1422a and 1422b, and the second coding units 1424a, 1424b, and 1424c determined based on the information on the division shape mode of the non-square first coding unit 1410 or 1420 may be determined based on the length of their long sides. For example, since the length of the side of the square second coding units 1412a and 1412b is 1 / 2 of the length of the long side of the non-square first coding unit 1410 having a height longer than a width, the depth of the square second coding units 1412a and 1412b is D+1, which is 1 deeper than the depth D of the non-square first coding unit 1410.
[0169] In addition, the image decoding apparatus 100 may divide the non-square first coding unit 1410 into an odd number of second coding units 1414a, 1414b, and 1414c based on the information about the division shape pattern. The odd number of second coding units 1414a, 1414b, and 1414c may include the non-square second coding units 1414a and 1414c and the square second coding unit 1414b. In this case, since the length of the long side of the non-square second coding units 1414a and 1414c and the length of the side of the square second coding unit 1414b are 1 / 2 of the length of the long side of the first coding unit 1410, the depth of the second coding units 1414a, 1414b, and 1414c may be D+1, which is 1 deeper than the depth D of the non-square first coding unit 1410. The image decoding apparatus 100 may determine the depths of the coding units split from the first coding unit 1420 having a non-square shape having a width longer than a height by using the above-described method of determining the depths of the coding units split from the first coding unit 1410 .
[0170] According to an embodiment, when the odd-numbered split coding units do not have equal sizes, the image decoding apparatus 100 may determine a PID for identifying the split coding units based on a size ratio between the coding units. Figure 14 , the width of the center-positioned coding unit 1414b among the odd-numbered divided coding units 1414a, 1414b, and 1414c may be equal to the widths of the other coding units 1414a and 1414c, and its height may be twice the heights of the other coding units 1414a and 1414c. That is, in this case, the center-positioned coding unit 1414b may include two other coding units 1414a or 1414c. Therefore, when the PID of the center-positioned coding unit 1414b is 1 based on the scanning order, the PID of the coding unit 1414c located adjacent to the coding unit 1414b may increase by 2 and thus may be 3. That is, there may be discontinuity in the PID values. According to an embodiment, the image decoding apparatus 100 may determine whether the odd-numbered divided coding units are not of equal size based on whether there is discontinuity in the PIDs used to identify the divided coding units.
[0171] According to an embodiment, the image decoding apparatus 100 may determine whether to use a specific splitting method based on a PID value for identifying a plurality of coding units determined by splitting a current coding unit. Figure 14, the image decoding apparatus 100 may determine an even number of coding units 1412a and 1412b or an odd number of coding units 1414a, 1414b, and 1414c by dividing the first coding unit 1410 into a rectangular shape having a height longer than a width. The image decoding apparatus 100 may identify a plurality of coding units using PIDs indicating the respective coding units. According to an embodiment, the PID may be obtained from a sample at a preset position (e.g., an upper left sample) of each coding unit.
[0172] According to an embodiment, the image decoding device 100 may determine a coding unit at a preset position among the divided coding units by using a PID for distinguishing between the coding units. According to an embodiment, when information about a division shape mode of a first coding unit 1410 having a rectangular shape whose height is longer than its width indicates that the coding unit is divided into three coding units, the image decoding device 100 may divide the first coding unit 1410 into three coding units 1414a, 1414b, and 1414c. The image decoding device 100 may assign a PID to each of the three coding units 1414a, 1414b, and 1414c. The image decoding device 100 may compare the PIDs of the odd-numbered divided coding units to determine the coding unit at the center position among the odd-numbered divided coding units. The image decoding device 100 may determine the coding unit 1414b having a PID corresponding to an intermediate value among the PIDs of the coding units as the coding unit at the center position among the coding units determined by dividing the first coding unit 1410. According to an embodiment, when the divided coding units do not have equal sizes, the image decoding apparatus 100 may determine a PID for distinguishing between the divided coding units based on a size ratio between the coding units. Figure 14, the width of coding unit 1414b generated by dividing the first coding unit 1410 may be equal to the widths of the other coding units 1414a and 1414c, and its height may be twice the height of the other coding units 1414a and 1414c. In this case, when the PID of coding unit 1414b at the center position is 1, the PID of coding unit 1414c located adjacent to coding unit 1414b may increase by 2 and thus may be 3. When the PIDs do not increase uniformly as described above, the image decoding apparatus 100 may determine that the coding unit is divided into a plurality of coding units, wherein the plurality of coding units includes coding units having sizes different from those of other coding units. According to an embodiment, when the information about the division shape pattern indicates that the coding unit is divided into an odd number of coding units, the image decoding apparatus 100 may divide the current coding unit such that a coding unit at a preset position (e.g., a coding unit at the center position) among the odd number of coding units has a size different from that of the other coding units. In this case, the image decoding apparatus 100 may determine the coding units at the center position having different sizes by using the PIDs of the coding units. However, the PID and the size or position of the encoding unit at the preset position are not limited to the above examples, and various PIDs and various positions and sizes of the encoding unit may be used.
[0173] According to an embodiment, the image decoding apparatus 100 may use a preset data unit in which a coding unit starts to be recursively split.
[0174] Figure 15 It is illustrated that a plurality of coding units are determined based on a plurality of preset data units included in a picture according to an embodiment.
[0175] According to an embodiment, a preset data unit may be defined as a data unit in which a coding unit is recursively split starting from at least one of block shape information and information about a division shape pattern. That is, the preset data unit may correspond to a coding unit for determining a highest depth of a plurality of coding units split from a current picture. Hereinafter, for convenience of description, the preset data unit is referred to as a reference data unit.
[0176] Depending on the embodiment, the reference data unit may have a preset size and a preset size shape. Depending on the embodiment, the reference data unit may include M×N samples. Here, M and N may be equal to each other and may be integers expressed as powers of 2. That is, the reference data unit may have a square shape or a non-square shape and may be divided into an integer number of coding units.
[0177] According to an embodiment, the image decoding apparatus 100 may divide a current picture into a plurality of reference data units. According to an embodiment, the image decoding apparatus 100 may divide the plurality of reference data units divided from the current picture by using information about a division shape pattern for each reference data unit. The operation of dividing the reference data units may correspond to a division operation using a quadtree structure.
[0178] According to an embodiment, the image decoding apparatus 100 may predetermine the minimum size allowed for the reference data unit included in the current picture. Therefore, the image decoding apparatus 100 may determine various reference data units having a size equal to or larger than the minimum size, and may determine one or more coding units by using block shape information and information about a division shape mode with reference to the determined reference data units.
[0179] Reference Figure 15 , the image decoding apparatus 100 may use a square reference coding unit 1500 or a non-square reference coding unit 1502. Depending on an embodiment, the shape and size of the reference coding unit may be determined based on various data units (e.g., a sequence, a picture, a slice, a slice segment, a maximum coding unit, etc.) that can include one or more reference coding units.
[0180] According to an embodiment, the bitstream receiver 110 of the image decoding apparatus 100 may obtain at least one of reference coding unit shape information and reference coding unit size information for each of various data units from the bitstream. Figure 3 The operation of dividing the current coding unit 300 describes the operation of dividing the square reference coding unit 1500 into one or more coding units, and the above has been described about Figure 4 The operation of splitting the current coding unit 400 or 450 describes an operation of splitting the non-square reference coding unit 1502 into one or more coding units, and therefore, a detailed description thereof is not provided here.
[0181] According to an embodiment, the image decoding apparatus 100 may determine the size and shape of a reference coding unit using a PID for identifying the size and shape of a reference coding unit based on some data units previously determined based on preset conditions. That is, the bitstream obtainer 110 may obtain only the PID for identifying the size and shape of a reference coding unit for each slice, slice segment, or maximum coding unit from the bitstream, where each slice, slice segment, or maximum coding unit is a data unit (e.g., a data unit with a size equal to or smaller than a slice) among various data units (e.g., a sequence, a picture, a slice, a slice segment, a maximum coding unit, etc.) that meets the preset conditions. The image decoding apparatus 100 may determine the size and shape of the reference data unit for each data unit that meets the preset conditions using the PID. When obtaining and using reference coding unit shape information and reference coding unit size information from the bitstream based on each data unit having a relatively small size, the use of the bitstream may be inefficient. Therefore, only the PID may be obtained and used, rather than directly obtaining the reference coding unit shape information and reference coding unit size information. In this case, at least one of the size and shape of the reference coding unit corresponding to the PID for identifying the size and shape of the reference coding unit may be predetermined. That is, the image decoding apparatus 100 may determine at least one of sizes and shapes of reference coding units included in a data unit serving as a unit for obtaining a PID by selecting at least one of sizes and shapes of the reference coding units that is predetermined based on the PID.
[0182] According to an embodiment, the image decoding apparatus 100 may use one or more reference coding units included in a maximum coding unit. That is, the maximum coding unit divided from the picture may include one or more reference coding units, and the coding unit may be determined by recursively dividing each reference coding unit. According to an embodiment, at least one of the width and height of the maximum coding unit may be an integer multiple of at least one of the width and height of the reference coding unit. According to an embodiment, the size of the reference coding unit may be obtained by dividing the maximum coding unit n times based on a quadtree structure. That is, according to various embodiments, the image decoding apparatus 100 may determine the reference coding unit by dividing the maximum coding unit n times based on a quadtree structure, and may divide the reference coding unit based on at least one of block shape information and information about a division shape mode.
[0183] Figure 16 A processing block serving as a unit for determining an order of reference coding units included in the picture 1600 according to an embodiment is illustrated.
[0184] According to an embodiment, the image decoding apparatus 100 may determine one or more processing blocks partitioned from a picture. A processing block is a data unit partitioned from a picture including one or more reference coding units, and the one or more reference coding units included in the processing block may be determined according to a specific order. That is, the determination order of the one or more reference coding units determined in each processing block may correspond to one of various types of orders for determining reference coding units and may vary according to the processing block. The determination order of the reference coding units determined for each processing block may be one of various orders (e.g., raster scan order, zigzag scan, N-shaped scan, upper right diagonal scan, horizontal scan, and vertical scan), but is not limited to the scan order.
[0185] According to an embodiment, the image decoding apparatus 100 may obtain processing block size information and determine the size of one or more processing blocks included in a picture. The image decoding apparatus 100 may obtain processing block size information from a bitstream and determine the size of one or more processing blocks included in a picture. The size of the processing block may be a preset size of a data unit indicated by the processing block size information.
[0186] According to an embodiment, the bitstream obtainer 110 of the image decoding apparatus 100 may obtain processing block size information from the bitstream based on each specific data unit. For example, the processing block size information may be obtained from the bitstream based on a data unit such as an image, a sequence, a picture, a slice, or a slice segment. That is, the bitstream obtainer 110 may obtain processing block size information from the bitstream based on each of the various data units. The image decoding apparatus 100 may determine the size of one or more processing blocks partitioned from the picture using the obtained processing block size information. The size of the processing block may be an integer multiple of the size of the reference coding unit.
[0187] According to an embodiment, the image decoding apparatus 100 may determine the sizes of the processing blocks 1602 and 1612 included in the picture 1600. For example, the image decoding apparatus 100 may determine the sizes of the processing blocks based on processing block size information obtained from a bitstream. Figure 16 According to an embodiment, the image decoding apparatus 100 may determine the width of the processing blocks 1602 and 1612 to be four times the width of the reference coding unit, and may determine the height of the processing blocks 1602 and 1612 to be four times the height of the reference coding unit. The image decoding apparatus 100 may determine the order in which one or more reference coding units in one or more processing blocks are determined.
[0188] According to an embodiment, the image decoding apparatus 100 may determine the processing blocks 1602 and 1612 included in the picture 1600 based on the size of the processing blocks, and may determine the determination order of one or more reference coding units included in the processing blocks 1602 and 1612. According to an embodiment, determining the reference coding unit may include determining the size of the reference coding unit.
[0189] According to an embodiment, the image decoding apparatus 100 may obtain determination order information of one or more reference coding units included in one or more processing blocks from a bitstream, and may determine a determination order for the one or more reference coding units based on the obtained determination order information. The determination order information may be defined as an order or direction for determining the reference coding units in the processing block. That is, the determination order of the reference coding units may be determined independently for each processing block.
[0190] According to an embodiment, the image decoding apparatus 100 may obtain the determination order information of the reference coding units from the bitstream for each specific data unit. For example, the bitstream obtainer 160 may obtain the determination order information of the reference coding units from the bitstream for each data unit (such as an image, sequence, picture, slice, slice segment, or processing block). Because the determination order information of the reference coding units indicates the order used to determine the reference coding units in the processing block, the determination order information may be obtained for each specific data unit including an integer number of processing blocks.
[0191] According to an embodiment, the image decoding apparatus 100 may determine one or more reference coding units based on the determined order.
[0192] According to an embodiment, the bitstream obtainer 110 may obtain determination order information of reference coding units from the bitstream as information related to the processing blocks 1602 and 1612, and the image decoding apparatus 100 may determine the determination order of one or more reference coding units included in the processing blocks 1602 and 1612, and determine one or more reference coding units included in the picture 1600 based on the determination order. Figure 16, the image decoding apparatus 100 may determine determination orders 1604 and 1614 of one or more reference coding units in processing blocks 1602 and 1612, respectively. For example, when determination order information of reference coding units is obtained for each processing block, different types of determination order information of reference coding units may be obtained for processing blocks 1602 and 1612. When the determination order 1604 of the reference coding units in processing block 1602 is a raster scan order, the reference coding units included in processing block 1602 may be determined according to the raster scan order. Conversely, when the determination order 1614 of the reference coding units in another processing block 1612 is a reverse raster scan order, the reference coding units included in processing block 1612 may be determined according to the reverse raster scan order.
[0193] According to an embodiment, the image decoding apparatus 100 may decode the determined one or more reference coding units. The image decoding apparatus 100 may decode the image based on the reference coding units determined as described above. Methods for decoding the reference coding units may include various image decoding methods.
[0194] According to an embodiment, the image decoding device 100 may obtain block shape information indicating the shape of the current coding unit or information about a division shape mode indicating a division method of the current coding unit from a bitstream, and may use the obtained information. The block shape information or the information about the division shape mode may be included in a bitstream associated with various data units. For example, the image decoding device 100 may use the block shape information or the information about the division shape mode included in a sequence parameter set, a picture parameter set, a video parameter set, a slice header, or a slice segment header. In addition, the image decoding device 100 may obtain a syntax element corresponding to the block shape information or the information about the division shape mode from a bitstream according to each maximum coding unit, each reference coding unit, or each processing block, and may use the obtained syntax element.
[0195] Figure 17 Illustrated are coding units that may be determined for each picture when a combination of shapes into which a coding unit may be divided is different for each picture, according to an embodiment.
[0196] Reference Figure 17, the image decoding apparatus 100 may determine the combination of shapes into which the coding units can be divided differently for each picture. For example, the image decoding apparatus 100 may decode the image by using, among at least one picture included in the image, a picture 1700 that can be divided into four coding units, a picture 1710 that can be divided into two or four coding units, and a picture 1720 that can be divided into two, three, or four coding units. To divide the picture 1700 into multiple coding units, the image decoding apparatus 100 may use only the division shape information indicating that the picture 1700 is divided into four square coding units. To divide the picture 1710, the image decoding apparatus 100 may use only the division shape information indicating that the picture 1710 is divided into two or four coding units. To divide the picture 1720, the image decoding apparatus 100 may use only the division shape information indicating that the picture 1720 is divided into two, three, or four coding units. Since such a combination of division shapes is merely an embodiment for describing the operation of the image decoding apparatus 100 , the combination of division shapes should not be construed as being limited to this embodiment, but various combinations of division shapes may be used according to preset data units.
[0197] According to an embodiment, the bitstream obtainer 110 of the image decoding apparatus 100 may obtain a bitstream including an index according to a preset data unit unit (e.g., a sequence, a picture, or a slice), wherein the index indicates a combination of partition shape information. For example, the bitstream obtainer 110 may obtain an index indicating a combination of partition shape information from a sequence parameter set, a picture parameter set, or a slice header. The image decoding apparatus 100 may determine a combination of partition shapes into which a coding unit may be divided according to a predetermined data unit by using the obtained index, and thus may use different combinations of partition shapes according to the preset data unit.
[0198] Figure 18 Various shapes of coding units that may be determined based on division shape information that may be represented as a binary code, according to an embodiment, are illustrated.
[0199] According to an embodiment, the image decoding apparatus 100 may split the coding unit into various shapes by using the block shape information and the division shape information obtained by the bitstream obtainer 110. The shapes into which the coding unit may be divided may correspond to various shapes including those described in the above embodiments.
[0200] Reference Figure 18 , based on the division shape information, the image decoding apparatus 100 may divide the coding units having a square shape in at least one of a horizontal direction and a vertical direction and may divide the coding units having a non-square shape in a horizontal direction or a vertical direction.
[0201] According to an embodiment, when the image decoding apparatus 100 is capable of dividing a coding unit having a square shape in the horizontal and vertical directions to obtain four square coding units, the number of division shapes that can be indicated by the division shape information related to the coding unit having a square shape can be 4. According to an embodiment, the division shape information can be represented as a two-bit binary code, and a binary code can be assigned to each division shape. For example, when the coding unit is not divided, the division shape information can be represented as (00)b; when the coding unit is divided in the horizontal and vertical directions, the division shape information can be represented as (01)b; when the coding unit is divided in the horizontal direction, the division shape information can be represented as (10)b; and when the coding unit is divided in the vertical direction, the division shape information can be represented as (11)b.
[0202] According to an embodiment, when the image decoding apparatus 100 splits a coding unit having a non-square shape in a horizontal direction or a vertical direction, the type of the split shape that may be indicated by the split shape information may be determined according to the number of coding units into which the coding unit is split. Figure 18 , according to an embodiment, the image decoding device 100 may divide the coding unit having a non-square shape into 3 coding units. The image decoding device 100 may divide the coding unit into two coding units, and in this case, the division shape information may be represented as (10)b. The image decoding device 100 may divide the coding unit into three coding units, and in this case, the division shape information may be represented as (11)b. The image decoding device 100 may determine not to divide the coding unit, and in this case, the division shape information may be represented as (0)b. That is, in order to use a binary code indicating the division shape information, the image decoding device 100 may use variable length coding (VLC) instead of fixed length coding (FLC).
[0203] According to the embodiment, referring to Figure 18 , the binary code of the division shape information indicating that the coding unit is not divided can be represented as (0)b. When the binary code of the division shape information indicating that the coding unit is not divided is set to (00)b, even though there is no division shape information set to (01)b, all 2 bits of the binary code of the division shape information must be used. However, as Figure 18 As shown in , when three division shapes are used for coding units having a non-square shape, even by using a 1-bit binary code (0)b as division shape information, the image decoding apparatus 100 can determine not to divide the coding unit, and thus can efficiently use the bitstream. However, the division shape indicated by the division shape information of the coding unit having a non-square shape should not be interpreted as being limited to Figure 18 The three shapes shown in FIG and should be interpreted as including various shapes of the above embodiments.
[0204] Figure 19 Other shapes of coding units that may be determined based on division shape information that may be represented as a binary code, according to an embodiment, are illustrated.
[0205] Reference Figure 19 , based on the division shape information, the image decoding device 100 may divide the coding unit having a square shape in the horizontal direction or the vertical direction and may divide the coding unit having a non-square shape in the horizontal direction or the vertical direction. That is, the division shape information may indicate that the coding unit having a square shape will be divided in one direction. In this case, the binary code of the division shape information indicating that the coding unit having a square shape will not be divided may be represented as (0)b. When the binary code of the division shape information indicating that the coding unit will not be divided is set to (00)b, even though there is no division shape information set to (01)b, all 2-bit binary codes of the division shape information must be used. However, as Figure 19 As shown in , when three division shapes are used for a coding unit having a square shape, even by using a 1-bit binary code (0)b as division shape information, the image decoding apparatus 100 can determine that the coding unit is not divided, and thus can efficiently use the bitstream. However, the division shape indicated by the division shape information of the coding unit having a square shape should not be interpreted as being limited to Figure 19 The three shapes shown in FIG are intended to be construed as including various shapes of the above embodiments.
[0206] According to an embodiment, block shape information or partition shape information may be represented by using a binary code, and such information may be immediately generated as a bitstream. Alternatively, block shape information or partition shape information that may be represented as a binary code may not be immediately generated in a bitstream, and the block shape information or partition shape information that may be represented as a binary code may be used as a binary code input during context-adaptive binary arithmetic coding (CABAC).
[0207] According to an embodiment, the image decoding device 100 will now describe the process of obtaining syntax related to block shape information or partition shape information using CABAC. A bitstream including a binary code for the syntax may be obtained by the bitstream obtainer 110. The image decoding device 100 may detect syntax elements indicating block shape information or partition shape information by debinarizing the binary bit string included in the obtained bitstream. According to an embodiment, the image decoding device 100 may obtain a set of binary bit strings corresponding to the syntax elements to be decoded, and may decode each binary bit using probability information. The image decoding device 100 may repeatedly perform this process until the binary bit string including such decoded binary bits is identical to one of the previously obtained binary bit strings. The image decoding device 100 may determine the syntax elements by debinarizing the binary bit string.
[0208] According to an embodiment, the image decoding apparatus 100 may determine the syntax regarding the binary bit string by performing a decoding process of adaptive binary arithmetic coding, and may update the probability model for the binary bit obtained by the bitstream obtainer 110. Figure 18 According to an embodiment, the bitstream obtainer 110 of the image decoding apparatus 100 may obtain a bitstream indicating a binary code, wherein the binary code indicates partition shape information. The image decoding apparatus 100 may determine the syntax regarding the partition shape information by using the obtained binary code having a size of 1 or 2 bits. To determine the syntax regarding the partition shape information, the image decoding apparatus 100 may update the probability of each of the 2 bits of the binary code. In other words, the image decoding apparatus 100 may update the probability that the next binary bit may have a value of 0 or 1 when decoding, depending on whether the value of the first binary bit of the 2 bits of the binary code is 0 or 1.
[0209] According to an embodiment, when determining the syntax, the image decoding device 100 may update the probability of the binary bits used in the process of decoding the binary bits of the binary bit string used for the syntax, and the image decoding device 100 may determine that specific bits in the binary bit string have the same probability without updating the probability.
[0210] Reference Figure 18, when determining the syntax by using a binary bit string indicating division shape information related to a coding unit having a non-square shape, when the coding unit having a non-square shape is not divided, the image decoding apparatus 100 may determine the syntax regarding the division shape information by using one binary bit having a value of 0. That is, when the block shape information indicates that the current coding unit has a non-square shape, the first binary bit of the binary bit string of the division shape information may be 0 when the coding unit having the non-square shape is not divided, and the first binary bit of the binary bit string of the division shape information may be 1 when the coding unit having the non-square shape is divided into two or three coding units. Therefore, the probability that the first binary bit of the binary bit string of the division shape information related to the coding unit having a non-square shape is 0 may be 1 / 3, and the probability that the first binary bit of the binary bit string of the division shape information related to the coding unit having a non-square shape is 1 may be 2 / 3. As described above, since the division shape information indicating that the coding unit having a non-square shape is not divided may represent only a 1-bit binary bit string having a value of 0, the image decoding apparatus 100 may determine the syntax regarding the division shape information by determining whether the second binary bit is 0 or 1 only when the first binary bit of the division shape information is 1. According to an embodiment, when the first binary bit of the division shape information is 1, the image decoding apparatus 100 may decode the binary bit by determining that the probability that the second binary bit is 0 is the same as the probability that the second binary bit is 1.
[0211] According to an embodiment, the image decoding apparatus 100 may use various probabilities for each bin when determining the bins of the bin string for the shape information. According to an embodiment, the image decoding apparatus 100 may determine the probability of dividing the bins of the shape information differently depending on the orientation of the non-square block. According to an embodiment, the image decoding apparatus 100 may determine the probability of dividing the bins of the shape information differently depending on the area or the length of the long side of the current coding unit. According to an embodiment, the image decoding apparatus 100 may determine the probability of dividing the bins of the shape information differently depending on at least one of the shape of the current coding unit and the length of the long side.
[0212] According to an embodiment, the image decoding apparatus 100 may determine that the probability of dividing the binary bits of the shape information is the same for coding units having a predetermined size or larger. For example, the image decoding apparatus 100 may determine that the probability of dividing the binary bits of the shape information is the same for coding units having a size equal to or larger than 64 samples based on the length of the long side of each coding unit.
[0213] According to an embodiment, the image decoding apparatus 100 may determine initial probabilities of bins constituting a bin string of division shape information based on a slice type (eg, I slice, P slice, B slice, etc.).
[0214] Figure 20 is a block diagram of an image encoding and decoding system for performing loop filtering.
[0215] The encoding end 2010 of the image encoding and decoding system 2000 transmits an encoded bitstream of an image, and the decoding end 2050 receives and decodes the bitstream and outputs a reconstructed image. The encoding end 2010 may have a configuration similar to that of the image encoding apparatus 200 described below, and the decoding end 2050 may have a configuration similar to that of the image decoding apparatus 100.
[0216] At the encoding end 2010, the prediction encoder 2015 outputs a reference image through inter-frame prediction and intra-frame prediction, and the transformer and quantizer 2020 transforms and quantizes the residual data between the reference image and the current input image into quantized transform coefficients and outputs the quantized transform coefficients. The entropy encoder 2025 encodes the quantized transform coefficients into a bitstream and outputs the bitstream. The quantized transform coefficients are reconstructed into data in the spatial domain through the inverse quantizer and inverse transformer 2030, and the reconstructed data in the spatial domain is output as a reconstructed image through the deblocking filter 2035 and the loop filter 2040. The reconstructed image can be used as a reference image for the next input image through the prediction encoder 2015.
[0217] The encoded image data in the bitstream received by the decoding end 2050 is reconstructed into residual data in the spatial domain through the entropy decoder 2055 and the inverse quantizer and inverse transformer 2060. As the residual data and the reference image output from the prediction decoder 2075 are combined, image data in the spatial domain is formed, and the deblocking filter 2065 and the loop filter 2070 can filter the image data in the spatial domain and output a reconstructed image for the current original image. The reconstructed image can be used as a reference image for the next original image through the prediction decoder 2075.
[0218] The loop filter 2040 of the encoding end 2010 performs loop filtering by using filter information input according to user input or system settings. The filter information used by the loop filter 2040 is output to the entropy encoder 2025 and transmitted to the decoding end 2050 together with the encoded image data. The loop filter 2070 of the decoding end 2050 can perform loop filtering based on the filter information input from the decoding end 2050.
[0219] Figure 21An example of filtering units included in a maximum coding unit and filtering performance information of the filtering units according to an embodiment is illustrated.
[0220] When the filtering unit of the loop filter 2040 of the encoding end 2010 and the filtering unit of the loop filter 2070 of the decoding end 2050 include the same as that according to the reference Figures 3 to 5 When the coding units of the described embodiments are similar to data units, the filter information may include block shape information and partition shape information of the data unit for indicating the filtering unit and loop filtering performance information indicating whether to perform loop filtering on the filtering unit.
[0221] According to an embodiment, the filtering units included in the maximum coding unit 2100 may have the same block shape and division shape as the coding units included in the maximum coding unit 2100. Also, according to an embodiment, the filtering units included in the maximum coding unit 2100 may be divided based on the sizes of the coding units included in the maximum coding unit 2100. Figure 21 For example, the filtering unit may include a filtering unit 2140 having a square shape and a depth of D, filtering units 2132 and 2134 having a non-square shape and a depth of D, filtering units 2112, 2114, 2116, 2152, 2154 and 2164 having a square shape and a depth of D+1, filtering units 2162 and 2166 having a non-square shape and a depth of D+1, and filtering units 2122, 2124, 2126 and 2128 having a square shape and a depth of D+2.
[0222] As shown in Table 1, block shape information, split shape information (depth), and loop filtering performance information of a filtering unit included in the maximum coding unit 2100 may be encoded.
[0223] [Table 1]
[0224]
[0225] Processing and reference of determining a plurality of coding units by recursively splitting the coding unit according to block shape information and block splitting information according to an embodiment Figure 13 The processing described is the same. The loop filtering execution information of the filtering unit according to the embodiment indicates that loop filtering is performed on the filtering unit when the flag value is 1, and indicates that loop filtering is not performed on the filtering unit when the flag value is 0. Referring to Table 1, information for determining the data unit of the filtering unit to be filtered by the loop filters 2040 and 2070 can all be encoded and transmitted as filter information.
[0226] Since the coding units configured according to the embodiment are configured to minimize the error from the original image, it is desirable to have high spatial correlation in the coding units. Therefore, since the filtering units are determined based on the coding units according to the embodiment, the operation of determining the filtering units separately from the operation of determining the coding units can be omitted. In addition, since the filtering units are determined based on the coding units according to the embodiment and the information for determining the division shape of the filtering units can be omitted, the transmission bit rate of the filter information can be saved.
[0227] Although it is described in the above embodiment that the filtering unit is determined based on the coding unit according to the embodiment, the filtering unit may be split up to an arbitrary depth based on the coding unit, and thus the shape of the filtering unit may be determined only up to the arbitrary depth.
[0228] The operation of determining the filtering unit described in the above embodiments can be applied not only to loop filtering but also to various embodiments such as deblocking filtering and adaptive loop filtering.
[0229] According to an embodiment, the image decoding device 100 may divide the current coding unit using at least one of block shape information and partition shape information. The block shape information may be predetermined to indicate that only a square shape is used, and the partition shape information may be predetermined to indicate that the current coding unit is not divided or is divided into four square coding units. That is, the coding units of the current coding unit may always have a square shape according to the block shape information, and the current coding unit may not be divided or is divided into four square coding units based on the partition shape information. The image decoding device 100 may obtain a bitstream generated using a predetermined encoding method by using the bitstream obtainer 110, wherein the predetermined encoding method is predetermined to use only such block shape and partition shape, and the image decoding device 100 may use only the predetermined block shape and partition shape. In this case, the image decoding device 100 can resolve compatibility issues with the predetermined encoding method by using a predetermined decoding method similar to the predetermined encoding method. According to an embodiment, when the image decoding apparatus 100 uses a predetermined decoding method using only predetermined block shapes and division shapes among various shapes that can be indicated by the block shape information and division shape information, the block shape information indicates only a square shape, and therefore the image decoding apparatus 100 may not perform a process of obtaining block shape information from the bitstream. A syntax indicating whether to use a predetermined decoding method may be used, and such syntax may be obtained from the bitstream based on data units having various shapes, wherein the data units may include various coding units such as a sequence, a picture, a slice unit, and a maximum coding unit. That is, the bitstream obtainer 110 may determine whether to obtain syntax indicating block shape information from the bitstream based on the syntax indicating whether to use the predetermined decoding method.
[0230] Figure 23 Indices of coding units according to a zigzag scanning order are shown, according to an embodiment.
[0231] The image decoding apparatus 100 according to an embodiment may scan the lower layer data units included in the upper layer data units according to a zigzag scan order. In addition, the image decoding apparatus 100 according to an embodiment may sequentially access data according to a zigzag scan index in the coding units included in the processing block or the maximum coding unit.
[0232] As reference Figures 3 and 4 As described above, the image decoding apparatus 100 according to an embodiment may divide the reference coding unit into at least one coding unit. In this case, coding units having a square shape and coding units having a non-square shape may coexist in the reference coding unit. According to an embodiment, the image decoding apparatus 100 may access data based on a zigzag scan index included in each coding unit in the reference coding unit. In this case, the method of applying the zigzag scan index may change depending on whether there is a coding unit having a non-square shape in the reference coding unit.
[0233] According to an embodiment, when there is no coding unit having a non-square shape in the reference coding unit, the coding unit of the lower depth in the reference coding unit may have a continuous zigzag scan index. For example, according to an embodiment, the coding unit of the higher depth may include four coding units of the lower depth. The boundaries of the four coding units of the lower depth may be continuous, and the coding units of the lower depth may be scanned in a zigzag scan order according to the index indicating the zigzag scan order. The index indicating the zigzag scan order according to the embodiment may be set to a number that increases according to the zigzag scan order for the coding unit. In this case, the deeper coding units of the same depth may be scanned according to the zigzag scan order.
[0234] According to an embodiment, when there is at least one coding unit having a non-square shape in the reference coding unit, the image decoding apparatus 100 may divide each of the coding units in the reference coding unit into sub-blocks, and may scan the divided sub-blocks according to a zigzag scanning order. For example, when there are coding units having a non-square shape in the vertical direction or the horizontal direction in the reference coding unit, zigzag scanning may be performed by using the divided sub-blocks. In addition, for example, when the reference coding unit is divided into an odd number of coding units, zigzag scanning may be performed by using sub-blocks. A sub-block is a coding unit that is no longer divided or a coding unit obtained by dividing an arbitrary coding unit, and may have a square shape. For example, four sub-blocks having a square shape may be divided from a coding unit having a square shape. In addition, for example, two sub-blocks having a square shape may be divided from a coding unit having a non-square shape.
[0235] Reference Figure 23 For example, the image decoding apparatus 100 according to an embodiment may scan the coding units 2302, 2304, 2306, 2308, and 2310 of a lower depth in the coding unit 2300 according to a zigzag scanning order. The coding unit 2300 and the coding units 2302, 2304, 2306, 2308, and 2310 are upper layer coding units and lower layer coding units, respectively. The coding unit 2300 includes coding units 2306 and 2310 having a non-square shape in the horizontal direction. The coding units 2306 and 2310 having a non-square shape have discontinuous boundaries with the coding units 2302 and 2304 having a square shape that are adjacent to each other. In addition, the coding unit 2308 has a square shape and is a coding unit at the center when the coding unit having a non-square shape is divided into an odd number of coding units. Similar to the coding units 2306 and 2310 having a non-square shape, the coding unit 2308 has a discontinuous boundary with the coding units 2302 and 2304 adjacent to each other and having a square shape. When the coding unit 2300 includes the coding units 2306 and 2310 having a non-square shape or the coding unit 2308 located at the center when the coding unit having a non-square shape is divided into an odd number of coding units, since the adjacent boundaries between the coding units are discontinuous, it may not be possible to set a continuous zigzag scan index. Therefore, the image decoding device 100 can continuously set the zigzag scan index by dividing the coding unit into sub-blocks. In addition, the image decoding device 100 can perform continuous zigzag scanning on the coding units 2306 and 2310 having a non-square shape or the coding unit 2308 located at the center of the odd number of coding units.
[0236] Figure 23 The coding unit 2320 is obtained by dividing the coding units 2302, 2304, 2306, 2308, and 2310 in the coding unit 2300 into subblocks. Because a zigzag scan index can be set for each subblock and the adjacent boundaries between the subblocks are continuous, the subblocks can be scanned according to a zigzag scan order. For example, in the decoding device according to the embodiment, the coding unit 2308 can be divided into subblocks 2322, 2324, 2326, and 2328. In this case, the subblocks 2322 and 2324 can be scanned after data processing is performed on the subblock 2330, and the subblocks 2326 and 2328 can be scanned after data processing is performed on the subblock 2332. In addition, the subblocks can be scanned according to a zigzag scan order.
[0237] In the above embodiments, data units are scanned according to a zigzag scanning order for data storage, data loading, and data access.
[0238] In addition, in the above embodiments, although the data units can be scanned according to a zigzag scanning order, the scanning order of the data units can be one of various orders (such as a raster scanning order, an N-shaped scanning order, an upper right diagonal scanning order, a horizontal scanning order, and a vertical scanning order), and should not be limited to a zigzag scanning order.
[0239] Furthermore, in the above embodiments, although the coding units in the reference coding unit are scanned, the present disclosure is not limited thereto, and a target to be scanned may be an arbitrary block in the processing block or the maximum coding unit.
[0240] Furthermore, in the above embodiments, although a block is divided into sub-blocks and scanning is performed according to a zigzag scanning order only when there is at least one block having a non-square shape, the block may be divided into sub-blocks and scanning may be performed according to a zigzag scanning order even when there are no blocks having a non-square shape for a simplified embodiment.
[0241] The image decoding apparatus 100 according to an embodiment may generate prediction data by performing inter prediction or intra prediction on a coding unit, may generate residual data by performing inverse transformation on a transformation unit included in a current coding unit, and may reconstruct the current coding unit by using the generated prediction data and the residual data.
[0242] The prediction mode of the coding unit according to an embodiment may be at least one of an intra mode, an inter mode, and a skip mode. According to an embodiment, the prediction mode may be independently selected according to the coding unit.
[0243] According to an embodiment, when a coding unit having a 2N×2N shape is split into two coding units having a 2N×N shape or an N×2N shape, inter-mode prediction and intra-mode prediction may be performed on each coding unit, respectively. In addition, according to an embodiment, a skip mode may be applied to a coding unit having a 2N×N or N×2N shape.
[0244] The image decoding device 100 according to an embodiment may allow dual prediction to be performed in skip mode for coding units having an 8×4 or 4×8 shape. Because only skip mode information about the coding unit is received in skip mode, the use of residual data for the coding unit is omitted. Therefore, in this case, the overhead of inverse quantization and inverse transform can be reduced. Alternatively, the image decoding device 100 according to an embodiment may allow dual prediction to be performed on coding units to which skip mode is applied, thereby improving decoding efficiency. In addition, according to an embodiment, while allowing dual prediction to be performed on coding units having an 8×4 or 4×8 shape, the image decoding device 100 may set the number of interpolation taps to a relatively small value during motion compensation, thereby effectively using storage bandwidth. For example, an interpolation filter with a tap number less than 8 (for example, a 2-tap interpolation filter) may be used instead of an 8-tap interpolation filter.
[0245] In addition, the image decoding apparatus 100 according to an embodiment may signal intra prediction information or inter prediction information about each region included in the current coding unit by dividing the region into a preset shape (for example, division based on a diagonal line).
[0246] According to an embodiment, the image decoding apparatus 100 can obtain a prediction sample of the current coding unit using the neighboring samples of the current coding unit using the intra mode. In this case, intra prediction is performed by using pre-reconstructed neighboring samples, and the samples are called reference samples.
[0247] Figure 24 is a diagram of reference samples used for intra prediction of a coding unit according to an embodiment. Figure 24 For a coding unit 2400 having a non-square block shape, a horizontal length of w, and a vertical length of h, w+h upper reference samples 2402, w+h left reference samples 2404, and one upper left reference sample 2406 are required. That is, a total of 2(w+h)+1 reference samples are required. To prepare the reference samples, padding may be performed on portions where no reference samples exist, and reference sample filtering may be performed for each prediction mode to reduce quantization errors included in the reconstructed reference samples.
[0248] Although the number of reference samples when the block shape of the current coding unit is a non-square shape has been described in the above embodiments, the number of reference samples is equally applied even when the current coding unit is a rectangular shape.
[0249] The above-mentioned various embodiments describe operations related to the image decoding method performed by the image decoding apparatus 100. Operations of the image encoding apparatus 200 for performing an image encoding method corresponding to the reverse order process of the image decoding method will be described through various embodiments.
[0250] Figure 2 is a block diagram of an image encoding apparatus 200 for encoding an image based on at least one of block shape information and division shape information according to an embodiment.
[0251] The image encoding apparatus 200 may include an encoder 220 and a bitstream generator 210. The encoder 220 may receive an input image and may encode the input image. The encoder 220 may encode the input image and thereby obtain at least one syntax element. The syntax element may include at least one of a skip flag, a prediction mode, a motion vector difference, a motion vector prediction method (or index), a transform quantization coefficient, a coding block mode, a coding block flag, an intra-prediction mode, a direction flag, a merge flag, a delta QP (delta QP), a reference index, a prediction direction, and a transform index. The encoder 220 may determine a context model based on block shape information including at least one of a shape, a direction, an aspect ratio, or a size of a coding unit.
[0252] The bitstream generator 210 may generate a bitstream based on the encoded input image. For example, the bitstream generator 210 may generate a bitstream by entropy encoding syntax elements based on a context model. In addition, the image encoding apparatus 200 may transmit the bitstream to the image decoding apparatus 100.
[0253] According to an embodiment, the encoder 220 of the image encoding apparatus 200 may determine the shape of the coding unit. For example, the coding unit may have a square shape or a non-square shape, and information indicating the shape may be included in the block shape information.
[0254] According to an embodiment, the encoder 220 may determine which shape the coding unit is to be divided into. The encoder 220 may determine the shape of at least one coding unit included in the coding unit, and the bitstream generator 210 may generate a bitstream including division shape information, wherein the division shape information includes information about the shape of the coding unit.
[0255] Depending on the embodiment, the encoder 220 may determine whether the coding unit is divided or not divided. When the encoder 220 determines that only one coding unit is included in the coding unit or the coding unit is not divided, the bitstream generator 210 may generate a bitstream including division shape information indicating that the coding unit is not divided. In addition, the encoder 220 may divide the coding unit into multiple coding units, and the bitstream generator 210 may generate a bitstream including division shape information indicating that the coding unit is divided into multiple coding units.
[0256] According to an embodiment, information indicating the number of coding units into which the coding unit is to be split or the direction in which the coding unit is to be split may be included in the split shape information. For example, the split shape information may indicate whether the coding unit is split in at least one of a vertical direction and a horizontal direction or whether the coding unit is not split.
[0257] The image encoding apparatus 200 determines information about a division shape pattern based on a division shape pattern of a coding unit. The image encoding apparatus 200 determines a context model based on at least one of a shape, direction, aspect ratio, or size of the coding unit. The image encoding apparatus 200 generates information about a division shape pattern for dividing the coding unit as a bitstream based on the context model.
[0258] To determine the context model, the image encoding apparatus 200 may obtain an arrangement for corresponding at least one of the shape, orientation, aspect ratio, or size of the coding unit to an index for the context model. The image encoding apparatus 200 may obtain the index for the context model based on at least one of the shape, orientation, aspect ratio, or size of the coding unit in the arrangement. The image encoding apparatus 200 may determine the context model based on the index for the context model.
[0259] To determine the context model, the image encoding apparatus 200 may further determine the context model based on block shape information, wherein the block shape information includes at least one of a shape, a direction, an aspect ratio, or a size of a neighboring coding unit adjacent to the coding unit. In addition, the neighboring coding unit may include at least one of a coding unit located below the left, to the left, above the left, above, above the right, to the right, or below the right of the coding unit.
[0260] In addition, to determine the context model, the image encoding apparatus 200 may compare the width length of the upper adjacent coding unit with the width length of the coding unit. In addition, the image encoding apparatus 200 may compare the height lengths of the left adjacent coding unit and the right adjacent coding unit with the height length of the coding unit. In addition, the image encoding apparatus 200 may determine the context model based on the comparison result.
[0261] Operation and reference of the image encoding device 200 Figures 3 to 24 The operation of the described image decoding apparatus 100 is similar, and therefore a detailed explanation thereof is not provided here.
[0262] In the following, reference is made to Figures 25 to 37 , an image decoding apparatus 2500 and a method thereof and an image encoding apparatus 2700 and a method thereof according to embodiments will now be described.
[0263] Figure 25 is a block diagram showing the configuration of an image decoding apparatus 2500 according to an embodiment.
[0264] The image decoding apparatus 2500 obtains a bit stream and then performs decoding, thereby outputting a reconstructed image.
[0265] The encoded image data in the bit stream obtained by the image decoding apparatus 2500 through entropy decoding, inverse quantization, and inverse transformation is reconstructed as residual data in the spatial domain.
[0266] The image decoding apparatus 2500 generates prediction samples based on a previously decoded reference image or previously decoded neighboring samples, and reconstructs image data in the spatial domain by combining residual data with the prediction samples. The image decoding apparatus 2500 then performs filtering on the image data in the spatial domain and outputs a reconstructed image. The reconstructed image can be used as a reference image for the next original image.
[0267] The processing performed by the image decoding apparatus 2500 to decode an image may include prediction processing, transform processing, and filtering processing. Prediction processing refers to the process of generating a prediction block for a current block, and transform processing refers to the process of transforming or inversely transforming residual data of the current block in the frequency domain into residual data in the spatial domain. Filtering processing refers to the process of changing the pixel values of image data generated by combining the prediction block with the residual data.
[0268] According to an embodiment, each of the prediction process, the transform process, and the filtering process may include at least one processing mode.
[0269] The image decoding apparatus 2500 may determine a processing mode applicable to the current block based on a motion vector resolution (hereinafter referred to as MVR) of the current block, and may decode the current block based on the determined processing mode.
[0270] Figure 29 A processing mode included in each of the prediction process, the transform process, and the filter process is shown.
[0271] In an embodiment, the prediction processing may include at least one of an inter-frame prediction processing mode, an intra-frame prediction processing mode, a skip processing mode, a direct processing mode, an adaptive motion vector prediction (AMVP) processing mode, an affine processing mode, a bidirectional optical flow (BIO) processing mode, a decoder-side motion vector derivation (DMVD) processing mode, an illumination compensation (IC) processing mode, an overlapped block motion compensation (OBMC) processing mode, an inter-frame prediction correction (IPR) processing mode, and a prediction block generation mode.
[0272] In an embodiment, the transform processing may include at least one of a multiple transform (MT) processing mode, a non-separable secondary transform (NSST) processing mode, a rotation transform (ROT) processing mode, a discrete sine transform (DST) processing mode, and a discrete cosine transform (DCT) processing mode.
[0273] In an embodiment, the filtering process may include at least one of a deblocking processing mode, a sample adaptive offset (SAO) processing mode, a bilateral filter (BF) processing mode, and an adaptive loop filter (ALF) processing mode.
[0274] First, the processing modes included in the prediction process, the transform process, and the filter process will now be briefly described. In order to clearly describe the embodiments of the present disclosure, the explanation of the algorithms of the following processing modes is omitted.
[0275] Inter-frame prediction processing mode refers to a processing method that uses the similarity between the current image and another image. A reference block similar to the current block of the current image is detected from a reference image decoded before the current image, and a prediction block is determined from the current block. Furthermore, the coordinate distance between the current block and the prediction block can be represented as a motion vector, and the difference between the current block and the prediction block can be represented as residual data. Therefore, by performing inter-frame prediction on the current block, rather than directly outputting the image information of the current block, an index indicating the reference image, a motion vector, and residual data are output, thereby improving encoding and decoding efficiency.
[0276] Intra-frame prediction processing mode refers to a processing method that utilizes spatial similarity within an image. A prediction block similar to the current block is generated from the values of neighboring pixels of the current block, and the difference between the pixel values of the current and predicted blocks is represented as residual data. Rather than directly outputting the image information of the current block, information about the prediction block generation mode and the residual data are output, thereby improving encoding and decoding efficiency.
[0277] The skip processing mode searches for a reference block in a reference image by using motion information of a neighboring block as motion information of a current block, and determines a prediction block determined from the reference block as the current block.
[0278] The direct processing mode, an example of an inter-frame prediction processing mode, searches for a reference block in a reference image by using the motion information of a neighboring block as the motion information of the current block, and determines a prediction block from the reference block. The current block is then reconstructed as a combination of residual data and the prediction block. The direct processing mode may also be referred to as a merge processing mode.
[0279] The AMVP processing mode, which is an example of an inter-frame prediction processing mode, determines the motion vector of the current block by combining a differential motion vector with the motion vectors of neighboring blocks, and searches for a reference block corresponding to the motion vector in a reference image specified based on a reference picture list and a reference picture index. The current block is then reconstructed as a combination of a prediction block and residual data.
[0280] The affine processing mode refers to a process of transforming or inversely transforming a motion vector indicating translational motion of a block into a motion vector indicating rotational motion, enlargement, or reduction.
[0281] The BIO processing mode refers to a process for sample-based motion vector enhancement performed on block-based motion compensation for bidirectional prediction.
[0282] The DMVD processing mode refers to a scheme of inducing a motion vector performed by the decoder side, and induces a motion vector of a current block through template matching or bilateral matching.
[0283] The IC processing mode refers to a scheme for improving prediction efficiency by compensating for illumination of a current block and / or a reference block in a reference image when a current block is decoded through an inter prediction processing mode.
[0284] The OBMC processing mode refers to a scheme for performing motion compensation by weighted summing of reconstructed pixels of a current block and reconstructed pixels at a current position due to motion of a neighboring block.
[0285] The IPR processing mode refers to a scheme for changing a pixel value of a prediction block determined from a reference image of a current block by using a linear model between a reconstructed block and the prediction block.
[0286] A prediction block generation mode refers to a scheme used to generate a prediction block for a current block in intra prediction processing mode. For example, a prediction block generation mode may include multiple different prediction block generation modes. HEVC provides 35 prediction block generation modes, including intra_planar mode, intra_DC mode, and intra_angular mode.
[0287] The MT processing mode refers to a scheme for transforming residual data in the spatial domain into residual data in the frequency domain or inversely transforming residual data in the frequency domain into residual data in the spatial domain by sequentially using a plurality of transform kernels.
[0288] The NSST processing mode refers to a transformation scheme performed between kernel transformation and quantization or between inverse quantization and inverse kernel transformation, and may be applied only to some parts of the current block.
[0289] The ROT processing mode refers to a scheme for partially exchanging at least one value between rows or between columns of a frequency coefficient matrix. Partial exchange between rows or between columns does not mean that the values of a specific row or column are unconditionally exchanged at a 1:1 ratio, but may mean that the values between two rows or between two columns are partially exchanged by using a specific function such as a trigonometric function.
[0290] The DST processing mode refers to a scheme for transforming residual data in the spatial domain into residual data in the frequency domain or inversely transforming residual data in the frequency domain into residual data in the spatial domain by using a DST transform kernel.
[0291] The DCT processing mode refers to a scheme for transforming residual data in the spatial domain into residual data in the frequency domain or inversely transforming residual data in the frequency domain into residual data in the spatial domain by using a DCT transform kernel.
[0292] The deblocking mode refers to a scheme for reducing blocking artifacts occurring at boundaries between blocks.
[0293] The SAO processing mode refers to a scheme for minimizing an error between a reconstructed image and an original image by adding an offset to the reconstructed samples.
[0294] The BF processing mode refers to a scheme for replacing pixel values of a reconstructed block with a weighted average value between pixel values of a current block and pixel values of neighboring blocks.
[0295] The ALF processing mode refers to a scheme for changing a pixel value by using a filter selected from a plurality of filters, the change being performed on each of a plurality of pixel groups included in a reconstructed current block.
[0296] In an embodiment, it is determined whether to apply Figure 29 The order of the processing modes shown in may be predetermined. In addition, when it is determined according to a predetermined syntax to apply one of the processing modes, the determination of whether to apply other processing modes may not be performed based on the result of the determination. In an embodiment, after it is determined whether to apply the skip processing mode in the prediction process, it may be sequentially determined whether to apply the inter-frame prediction processing mode, the direct processing mode, and the AMVP processing mode. When it is determined whether to apply the skip processing mode, it may be determined whether to apply the inter-frame prediction processing mode, and when it is determined to apply the skip processing mode, it may be determined whether to apply the inter-frame prediction processing mode, the direct processing mode, and the AMVP processing mode. That is, obtaining information about the inter-frame prediction processing mode, the direct processing mode, and the AMVP processing mode may be skipped.
[0297] In an embodiment, when a processing mode applicable to a current block is designated based on an MVR of the current block, the image decoding apparatus 2500 may decode the current block by using the designated processing mode.
[0298] Reference Figure 25 , the image decoding apparatus 2500 may include a bitstream obtainer 2510 and a decoder 2530 .
[0299] The image decoding apparatus 2500 may be included in the image decoding apparatus 100. For example, the bitstream obtainer 2510 may be included in Figure 1 The decoder 2530 may be included in the bitstream obtainer 110 of the image decoding apparatus 100 shown in , and the decoder 2530 may be included in the decoder 120 of the image decoding apparatus 100 .
[0300] The bitstream obtainer 2510 obtains a bitstream for the encoded image. The bitstream may include information about the encoded image data and the encoding mode.
[0301] The decoder 2530 decodes the image based on information obtained from the bitstream. In an embodiment, the decoder 2530 may output a reconstructed image by performing a prediction process, a transform process, and a filter process on a block as a target to be decoded.
[0302] The block type may be a square shape or a rectangular shape, or may be any geometric shape. The block according to an embodiment is not limited to a data unit of a preset size, and may include a maximum coding unit, a coding unit, a prediction unit, and a transformation unit in a block unit according to a tree structure.
[0303] In an embodiment, the decoder 2530 may determine an applicable processing mode for the current block based on the MVR corresponding to the current block. An applicable processing mode refers to a processing mode that is applicable to the current block. An applicable processing mode may be actually applied to the current block, or may not be applied based on information included in the bitstream. An unapplicable processing mode, which will be described below, refers to a processing mode that is impossible to apply to the current block.
[0304] The MVR of the current block may refer to the accuracy of the pixel position indicated by the motion vector of the current block, among the pixels included in the reference image (or the interpolated reference image). The MVR of the current block may be selected from at least one candidate MVR. The at least one candidate MVR may include, for example, at least one of an MVR of 1 / 8 pixel units, an MVR of 1 / 4 pixel units, an MVR of 1 / 2 pixel units, an MVR of 1 pixel units, an MVR of 2 pixel units, an MVR of 4 pixel units, and an MVR of 8 pixel units, but is not limited thereto. In another embodiment, the candidate MVRs may include only one MVR.
[0305] Figure 30Shown are positions of pixels that can be indicated by motion vectors according to MVR of 1 / 4 pixel unit, MVR of 1 / 2 pixel unit, MVR of 1 pixel unit, and MVR of 2 pixel unit when the minimum MVR selectable for the current block is MVR of 1 / 4 pixel unit.
[0306] Figure 30 (a), (b), (c) and (d) respectively show the coordinates of pixels (marked by black squares) that can be indicated by motion vectors of 1 / 4 pixel unit MVR, 1 / 2 pixel unit MVR, 1 pixel unit MVR and 2 pixel unit MVR based on the coordinate (0,0).
[0307] When the minimum MVR is an MVR of 1 / 4 pixel unit, the coordinates of the pixel indicated by the motion vector of the MVR of 1 / 4 pixel unit becomes (a / 4, b / 4) (a and b are integers), the coordinates of the pixel indicated by the motion vector of the MVR of 1 / 2 pixel unit becomes (2c / 4, 2d / 4) (c and d are integers), the coordinates of the pixel indicated by the motion vector of the MVR of 1 pixel unit becomes (4e / 4, 4f / 4) (e and f are integers), and the coordinates of the pixel indicated by the motion vector of the MVR of 2 pixel unit becomes (8g / 4, 8h / 4) (g and h are integers). That is, when the minimum MVR has 2 m (m is an integer) pixel unit, it can be obtained by 2 n (n is an integer) The coordinates of the pixel indicated by the MVR in pixel units become (i*2 n-m / 2 -m ,j*2 n-m / 2 -m )(i and j are integers.) Although a motion vector is determined according to a specific MVR, the motion vector is represented by coordinates in an image interpolated according to a 1 / 4 pixel unit corresponding to the minimum MVR.
[0308] In an embodiment, since the image encoding apparatus 2700 determines a motion vector in an image interpolated according to the minimum MVR, in order to express the motion vector (and the predicted motion vector) by using an integer, the reciprocal of the pixel-unit value of the minimum MVR (for example, when the minimum MVR has 2 m (m is an integer) 2 in pixel units -m ) can be multiplied by the motion vector (and the predicted motion vector). The multiplication by 2 can be used in the image encoding device 2700 and the image decoding device 2500. -m The motion vector in integer units.
[0309] When the motion vector of the MVR of 1 / 2 pixel units starting from the coordinates (0,0) indicates the coordinates (2 / 4,6 / 4) and the minimum MVR has a 1 / 4 pixel unit, the motion vector encoding device 2700 and the image decoding device 2500 can determine (2,6) obtained by multiplying (2 / 4,6 / 4) by the integer 4 as the motion vector.
[0310] In an embodiment, the bitstream obtainer 2510 may obtain information about the MVR of the current block from the bitstream in units of blocks, slices, or pictures. The decoder 2530 may determine the MVR of the current block from the information about the MVR included in the bitstream. Alternatively, the decoder 2530 may directly determine the MVR of the current block according to a preset standard without obtaining information about the MVR.
[0311] In an embodiment, the bitstream obtainer 2510 may obtain information about the MVR in each inter-predicted coding unit. Figure 31 Shows the syntax for obtaining information about MVR from a bitstream.
[0312] Reference Figure 31 , when the slice including the current coding unit in phrase a is not slice 1, cu_skip_flag is extracted in phrase b. cu_skip_flag indicates whether skip mode will be applied to the current coding unit. When it is checked in phrase c that skip mode will be applied, the current coding unit is processed in skip mode. When it is checked in phrase d that skip mode will not be applied, pred_mode_flag is extracted in phrase e. pred_mode_flag indicates whether the current coding unit is intra-predicted or inter-predicted. When the current coding unit is not intra-predicted, that is, in phrase f, the current coding unit is inter-predicted, pred_mvr_idx is extracted in phrase g. pred_mvr_idx is an index indicating the MVR of the current coding unit, and the MVR corresponding to each index is as shown in Table 2.
[0313] [Table 2]
[0314]
[0315] In an embodiment, when the MVR of the current block is determined, the decoder 2530 determines a processing mode corresponding to the MVR of the current block from a plurality of processing modes included in at least one of a prediction process, a transform process, and a filtering process. The number of processing modes corresponding to the MVR of the current block may be one or more.
[0316] In an embodiment, the decoder 2530 may determine at least one applicable processing mode based on the MVR of the current block. For example, based on the MVR of the current block, the affine processing mode of the prediction process may be determined as the applicable processing mode, or the affine processing mode of the prediction process and the MT processing mode of the transform process may be determined as the applicable processing modes.
[0317] In an embodiment, the decoder 2530 may determine at least one disapplicable processing mode based on the MVR of the current block.
[0318] In an embodiment, the decoder 2530 may determine at least one applicable processing mode and at least one non-applicable processing mode based on the MVR of the current block.
[0319] In an embodiment, when the MVR of the current block corresponds to a preset MVR, the decoder 2530 may determine at least one applicable processing mode and / or at least one non-applicable processing mode.
[0320] For example, when the preset motion vector is in 1 / 4 pixel units and the motion vector of the current block is in 1 / 4 pixel units, the decoder 2530 may determine the affine processing mode as an applicable processing mode for the current block. Alternatively, when the motion vector of the current block is in 1 / 4 pixel units, the skip processing mode and the direct processing mode may be determined as non-applicable processing modes for the current block. Alternatively, when the motion vector of the current block is in 1 / 4 pixel units, the BIO processing mode may be determined as an applicable processing mode for the current block, and the IC processing mode may be determined as a non-applicable processing mode for the current block.
[0321] Figures 32 to 34 Examples of applicable processing modes and / or non-applicable processing modes predetermined for MVR are shown.
[0322] Reference Figure 32 , when the MVR of the current block is a 1 / 4 pixel unit, the affine processing mode is determined to be applicable to the current block, and when the MVR of the current block is a 1 / 2 pixel unit, a 1 pixel unit, or a 2 pixel unit, the DMVD processing mode is determined to be applicable to the current block.
[0323] Reference Figure 33 , when the MVR of the current block is a 1 / 4 pixel unit, the DST processing mode is determined to be not applicable to the current block, and when the MVR of the current block is a 1 / 2 pixel unit, a 1 pixel unit, or a 2 pixel unit, the ROT processing mode is determined to be not applicable to the current block.
[0324] In addition, refer to Figure 34When the MVR of the current block is in 1 / 4 pixel units, the affine processing mode and the IC processing mode are determined to be applicable to the current block, and the BF processing mode is determined to be not applicable. When the MVR of the current block is in 1 / 2 pixel units, 1 pixel unit, or 2 pixel units, the ROT processing mode is determined to be applicable to the current block, and the OBMC processing mode and the SAO processing mode are determined to be not applicable.
[0325] In an embodiment, the decoder 2530 may determine at least one applicable processing mode for the current block based on the motion vector of the current block, and may obtain information about the applicable processing mode from the bitstream. The information about the applicable processing mode may include information about whether the applicable processing mode is applied and information about at least one specific setting among specific settings related to the processing mode.
[0326] The decoder 2530 may obtain information about the applicable processing mode from the bitstream and may decode the current block according to the applicable processing mode. In an embodiment, the decoder 2530 may determine whether to apply the applicable processing mode to the current block based on the information obtained from the bitstream, and may decode the current block using the applicable processing mode based on the determination result.
[0327] In an embodiment, decoding the current block according to an applicable processing mode does not mean applying only the applicable processing mode to the current block. In an embodiment, the decoder 2530 may process the current block according to a processing mode whose application should be determined before the applicable processing mode in a predetermined order (i.e., predetermined syntax), and then apply the applicable processing mode to the current block. Alternatively, after processing the current block according to the applicable processing mode, the current block may be decoded based on another processing mode whose application was determined according to the predetermined syntax.
[0328] For example, when the applicable processing mode corresponding to MVR is the affine processing mode, the decoder 2530 may perform prediction processing on the current block based on the affine processing mode, and may then decode the current block by applying the processing mode included in the transformation processing and the processing mode included in the filtering processing to the current block that has undergone prediction processing.
[0329] For example, when the applicable processing mode corresponding to MVR is the SAO processing mode, the decoder 2530 may decode the current block by applying the SAO processing mode to the current block after applying the processing mode of the prediction process and the processing mode of the transform process to the current block.
[0330] Figures 35 to 37 FIG. 1 shows a portion of the syntax according to an embodiment. Figure 35In phrase A, the current block is inter-predicted, and when the current slice is a P slice, it is determined in phrase B whether the index of the MVR corresponds to 0 (i.e., a 1 / 4 pixel unit). When the index of the MVR is 0, the direct processing mode is determined as the applicable processing mode for the current block. In phrase C, cu_direct indicating whether the direct processing mode is applied is extracted, and the direct processing mode may be applied to the current block based on the extracted information.
[0331] When Figure 35 When the current block is inter-frame predicted in phrase A, Figure 36 In phrase D of
[0065] , it is determined whether the current slice is a B slice. When the current slice is a B slice, it is determined in phrase E whether the index of MVR corresponds to 0 (i.e., a 1 / 4 pixel unit). When the index of MVR is 0, the direct processing mode is determined as the applicable processing mode for the current block. In phrase F, cu_direct indicating whether the direct processing mode is to be applied is extracted, and the direct processing mode may be applied to the current block based on the extracted information.
[0332] Reference Figure 35 and Figure 36 , when the MVR of the current block corresponds to a 1 / 4 pixel unit, the direct processing mode is determined as an applicable processing mode, and the direct processing mode is applied to the current block based on information indicating whether to apply, the information being obtained from a bitstream.
[0333] Reference Figure 37 , it is determined in phrase G whether the MVR index of the current block corresponds to 0 (i.e., 1 / 4 pixel unit) or 3 (i.e., 2 pixel unit), and thus ipr_flag is extracted in phrase H. ipr_flag indicates whether the IPR processing mode is applied to the current block. That is, when the MVR index of the current block corresponds to the 1 / 4 pixel unit or the 2 pixel unit, the IPR processing mode is determined as an applicable processing mode, and the IPR processing mode is applied to the current block based on information indicating whether to apply, the information being obtained from the bitstream.
[0334] Although not shown, when the MVR index of the current block corresponds to 0 (i.e., 1 / 4 pixel unit), mtr_idx can be extracted. mtr_idx indicates whether the MT processing mode is applied to the current block. That is, when the MVR index of the current block corresponds to the 1 / 4 pixel unit, the MT processing mode is determined to be an applicable processing mode, and the MT processing mode is applied to the current block based on information indicating whether to apply the MT processing mode, which is obtained from the bitstream.
[0335] For example, when the MVR index of the current block corresponds to 0 (i.e., a 1 / 4 pixel unit), information indicating whether the BIO processing mode is applied to the current block may be extracted. That is, when the MVR index of the current block corresponds to a 1 / 4 pixel unit, the BIO processing mode is determined as an applicable processing mode, and the BIO processing mode is applied to the current block based on the information indicating whether to apply the BIO processing mode, the information being obtained from the bitstream.
[0336] In an embodiment, the decoder 2530 may determine an inapplicable processing mode for the current block based on the MVR of the current block, and may skip obtaining information related to the determined inapplicable processing mode from the bitstream. In this regard, skipping obtaining information means not obtaining information related to a specific processing mode from the bitstream. When obtaining information related to the inapplicable processing mode is skipped, information about another processing mode may be obtained based on the syntax.
[0337] In an embodiment, when one of the processing modes is determined as an applicable processing mode with a preset MVR and the MVR of the current block is different from the preset MVR, the decoder 2530 may determine the one processing mode as an unapplicable processing mode for the current block.
[0338] In an embodiment, when one of the processing modes is determined as an unapplicable processing mode with a preset MVR and the MVR of the current block is equal to the preset MVR, the decoder 2530 may determine the one processing mode as an unapplicable processing mode for the current block.
[0339] For example, when the applicable processing mode corresponding to the MVR of 1 / 4 pixel unit is the affine processing mode, and the MVR of the current block is not a 1 / 4 pixel unit, the decoder 2530 may determine the affine processing mode as an unapplicable processing mode and may skip obtaining information related to the affine processing mode from the bitstream.
[0340] For example, when the inapplicable processing mode corresponding to the MVR of 1 / 4 pixel unit is the affine processing mode, and the MVR of the current block is the 1 / 4 pixel unit, the decoder 2530 may skip obtaining information related to the affine processing mode from the bitstream.
[0341] In an embodiment, the decoder 2530 may determine applicable processing modes and non-applicable processing modes for the current block based on the MVR of the current block. The decoder 2530 may then obtain information about applicable processing modes from the bitstream and may skip obtaining information related to non-applicable processing modes. The decoder 2530 obtains information about applicable processing modes from the bitstream and skips obtaining information related to non-applicable processing modes. In other words, the decoder 2530 may determine whether to obtain information related to at least one of a plurality of processing modes from the bitstream based on the MVR of the current block.
[0342] That is, when it is predetermined that a specific processing mode is applicable to a 1 / 4 pixel unit, the decoder 2530 may determine whether to obtain information related to the specific processing mode from the bitstream based on a comparison result between the MVR of the current block and the MVR of the 1 / 4 pixel unit. When the MVR of the current block is a 1 / 4 pixel unit, the decoder 2530 may determine to obtain information related to the specific processing mode from the bitstream, and when the MVR of the current block is not a 1 / 4 pixel unit, the decoder 2530 may determine not to obtain information related to the specific processing mode from the bitstream.
[0343] In an embodiment, when an applicable processing mode is determined based on the MVR of the current block and application of the applicable processing mode is confirmed, the decoder 2530 may check a processing mode that cannot be redundantly applied with the applicable processing mode and may skip obtaining information related to the checked processing mode. When only one processing mode is applicable from a plurality of processing modes based on a predetermined syntax, the plurality of processing modes may be referred to as redundant processing modes.
[0344] For example, in a case where the MT processing mode, NSST processing mode, ROT processing mode, DST processing mode, and DCT processing mode correspond to redundant processing modes, when the applicable processing mode of the current block is the MT processing mode, and it is determined that the MT processing mode is applied to the current block, obtaining information related to the NSST processing mode, ROT processing mode, DST processing mode, and DCT processing mode that cannot be redundantly applied can be skipped.
[0345] Furthermore, in an embodiment, before the decoder 2530 applies the applicable processing mode determined based on the MVR of the current block to the current block, the decoder 2530 may skip obtaining information related to the processing mode that should first be determined based on a predetermined syntax whether to apply from the bitstream. In this case, the applicable processing mode and the processing mode that should first be determined based on the predetermined syntax whether to apply may be included in the same process among the prediction process, the transform process, and the filtering process.
[0346] In detail, in a case where it is necessary to determine whether to apply the 'q' processing mode based on syntax priority in order to apply the 'p' processing mode to the current block, when the 'p' processing mode is determined to be an applicable processing mode, the decoder 2530 may skip obtaining information related to the 'q' processing mode and therefore may not determine whether to apply the 'q' processing mode.
[0347] For example, when the applicable processing mode for the current block is the AMVP processing mode, before the decoder 2530 applies the AMVP processing mode to the current block according to the syntax, the decoder 2530 may skip obtaining information related to the skip processing mode and the direct processing mode that should first be determined whether to apply.
[0348] In an embodiment, when the decoder 2530 determines an applicable processing mode based on the MVR of the current block and confirms that the applicable processing mode is not to be applied based on information obtained from the bitstream, the decoder 2530 may apply another processing mode to the current block, and the other processing mode is included in the same processing (i.e., prediction processing, transform processing or filtering processing) to which the applicable processing mode belongs.
[0349] Furthermore, in an embodiment, when an unapplicable processing mode is determined based on the MVR of the current block, the decoder 2530 may apply another processing mode to the current block, the another processing mode being included in the same process to which the unapplicable processing mode belongs.
[0350] In an embodiment, the decoder 2530 may determine an applicable processing mode for the current block based on the MVR of the current block, and may determine specific settings related to the applicable processing mode. The specific settings may refer to options to be considered when processing the current block according to the processing mode. A processing mode may have multiple options, and the decoder 2530 may check the applicable processing mode block based on the MVR of the current block and the options related to the applicable processing mode.
[0351] For example, the specific settings of the AMVP processing mode may include information on whether unidirectional prediction is performed and whether bidirectional prediction is performed. In addition, the specific settings of the affine processing mode may include information on the affine type, for example, whether it is a rotation type or a scaling type. Alternatively, the specific settings of the DCT processing mode may include information on the kernel type, for example, whether it is a DCT-II kernel or a DCT-VIII kernel.
[0352] As described above, the MVR of the current block may be determined for a slice or picture including the current block.The MVR determined for the slice or picture may be the MVR of each of the blocks included in the slice or picture.
[0353] In an embodiment, when the current slice is a predicted (P) slice or a bi-predicted (B) slice, and the current picture is a predicted (P) picture or a bi-predicted (B) picture, when the MVR of the current block corresponds to a preset MVR, the decoder 2530 may apply the inter-prediction processing mode to all blocks included in the current slice or the current picture. That is, the decoder 2530 may process all blocks included in the current slice or the current picture using an inter-prediction scheme that considers temporal redundancy. Generally, P slices, B slices, P pictures, and B pictures may include all of inter-predicted blocks and intra-predicted blocks, but when the MVR determined for a picture or slice corresponds to the preset MVR, the decoder 2530 may determine that all blocks included in the slice or picture have been inter-predicted.
[0354] In an embodiment, when the MVR of the current block is determined for a slice or picture including the current block, the decoder 2530 may process a block encoded using an intra prediction processing mode in the slice or picture by using a prediction block generation mode corresponding to the MVR of the current block.
[0355] As described above, the prediction block generation mode indicates a scheme for generating a prediction block in the intra prediction processing mode. In an embodiment, the decoder 2530 may determine a prediction block generation mode corresponding to the MVR of the current block from a plurality of prediction block generation modes for generating prediction blocks according to intra prediction. The decoder 2530 may then generate a prediction block for a block encoded using the intra prediction processing mode among blocks included in the current slice or current picture by using the prediction block generation mode corresponding to the MVR of the current block.
[0356] As described above, the applicable processing mode and / or non-applicable processing mode for the current block may be determined based on the MVR of the current block. In an embodiment, the decoder 2530 may determine the MVR of the current block based on the type of processing mode applied to the current block. When the processing mode applied to the current block is an applicable processing mode mapped to a preset MVR, the decoder 2530 may determine the preset MVR as the MVR of the current block. In other words, when an affine processing mode is applied to the current block and mapped to a 1 / 4 pixel unit resolution as the applicable processing mode, the decoder 2530 may determine the MVR of the current block as a 1 / 4 pixel unit.
[0357] In reference Figure 32 In the description, when the affine processing mode is applied to the current block, the decoder 2530 may determine the MVR of the current block as a 1 / 4 pixel unit, and when the DMVD processing mode is applied to the current block, the decoder 2530 may determine the MVR of the current block as one of a 1 / 2 pixel unit, a 1 pixel unit, and a 2 pixel unit.
[0358] Figure 26 is a flowchart for describing an image decoding method according to an embodiment.
[0359] At S2610 , the image decoding apparatus 2500 determines an applicable processing mode for the current block based on the MVR of the current block.
[0360] As described above, the image decoding apparatus 2500 may obtain information indicating the MVR of the current block from the bitstream and may determine the MVR of the current block based on the obtained information. In an embodiment, the image decoding apparatus 2500 may directly determine the MVR of the current block.
[0361] Furthermore, in an embodiment, the image decoding apparatus 2500 may determine an inapplicable processing mode for the current block based on the MVR of the current block.
[0362] At S2620 , the image decoding apparatus 2500 may obtain information about an applicable processing mode from a bitstream, and may decode the current block according to the applicable processing mode based on the information.
[0363] The image decoding apparatus 2500 may skip obtaining information about an unapplicable processing mode for a current block from a bitstream.
[0364] The image decoding device 2500 can determine whether to apply the applicable processing mode to the current block based on information obtained from the bitstream, and when it is confirmed that the applicable processing mode is applied, the image decoding device 2500 can decode the current block according to the applicable processing mode.
[0365] In an embodiment, when it is confirmed that the applicable processing mode is not applied, the image decoding apparatus 2500 may decode the current block according to another processing mode.
[0366] In an embodiment, the image decoding apparatus 2500 may decode the current block according to another processing mode without applying the unapplicable processing mode.
[0367] Figure 27 27 is a block diagram showing the configuration of an image encoding device 2700 according to an embodiment.
[0368] Reference Figure 27According to an embodiment, the image encoding apparatus 2700 may include an encoder 2710 and a bitstream generator 2730. The image encoding apparatus 2700 may be included in the above-described image encoding apparatus 200. For example, the encoder 2710 of the image encoding apparatus 2700 may be included in the encoder 220 of the image encoding apparatus 200, and the bitstream generator 2730 of the image encoding apparatus 2700 may be included in the bitstream generator 210 of the image encoding apparatus 200.
[0369] The image encoding apparatus 2700 may encode an original image by performing a prediction process, a transform process, and a filtering process on the original image, and may generate a bitstream including data related to the image.
[0370] The encoder 2710 may determine an MVR corresponding to the current block. The MVR of the current block may be selected from at least one candidate MVR. The at least one candidate MVR may include, for example, at least one of an MVR of 1 / 8 pixel units, an MVR of 1 / 4 pixel units, an MVR of 1 / 2 pixel units, an MVR of 1 pixel units, an MVR of 2 pixel units, an MVR of 4 pixel units, and an MVR of 8 pixel units, but is not limited thereto.
[0371] In an embodiment, the encoder 2710 may select one candidate MVR from at least one candidate MVR as the MVR of the current block, and may determine the motion vector of the current block according to the selected MVR.
[0372] To determine the motion vector of the current block, the encoder 2710 may interpolate a reference image according to a minimum MVR among at least one candidate MVR.
[0373] In an embodiment, when a candidate MVR of a minimum pixel unit (i.e., a minimum MVR) among at least one candidate MVR has a 1 / n pixel unit (where n is a natural number), the encoder 2710 may generate sub-pel pixels of 1 / n pixel units from integer pixels of a reference image to estimate motion, and may determine a motion vector of the current block indicating a sub-pel pixel of a maximum 1 / n pixel unit.
[0374] Depending on the characteristics of the current image, determining a motion vector based on an MVR in small pixel units may be inefficient compared to determining a motion vector based on an MVR in large pixel units. When determining a motion vector based on an MVR in small pixel units, a larger number of bits may be required to represent the magnitude of the motion vector (or differential motion vector) compared to determining the motion vector based on an MVR in large pixel units, and this may be inefficient in terms of bit rate. Therefore, for example, the MVR may be adaptively determined according to the resolution of the image, so that the bit rate can be reduced while minimizing degradation in the quality of the reconstructed image.
[0375] In an embodiment, the encoder 2710 may adaptively determine the MVR of the current block and may determine a motion vector in pixel units of the determined MVR. For example, when the pixel unit of the MVR of the current block is 1 / 2, the encoder 2710 may determine a motion vector indicating a pixel in a 1 / 2 pixel unit in a reference image interpolated according to the minimum MVR.
[0376] For example, when at least one candidate MVR includes a 1 / 4 pixel MVR, a 1 / 2 pixel MVR, and a 1 pixel MVR, the encoder 2710 may determine the motion vector of the current block in 1 / 4 pixel units in a reference image interpolated based on the 1 / 4 pixel MVR, which is the minimum MVR, and may determine the motion vector of the current block in 1 / 2 pixel units in a reference image interpolated based on the 1 / 4 pixel MVR. Furthermore, the encoder 2710 may determine the candidate MVR selected based on the cost as the MVR of the current block. A rate-distortion cost may be used in calculating the cost.
[0377] In an embodiment, the encoder 2710 may determine the MVR per picture, per slice, or per block based on a preset standard.
[0378] In an embodiment, when the MVR of the current block is determined, the encoder 2710 may determine at least one processing mode corresponding to the MVR of the current block, the processing mode being from a plurality of processing modes included in at least one of a prediction process, a transform process, and a filtering process. The number of processing modes corresponding to the MVR of the current block may be one or more.
[0379] In an embodiment, the encoder 2710 may determine at least one applicable processing mode based on the MVR of the current block.
[0380] In an embodiment, the encoder 2710 may determine at least one disapplicable processing mode based on the MVR of the current block.
[0381] In an embodiment, the encoder 2710 may determine at least one applicable processing mode and at least one non-applicable processing mode based on the MVR of the current block.
[0382] In an embodiment, when the MVR of the current block corresponds to a preset MVR, the encoder 2710 may determine at least one applicable processing mode and / or at least one non-applicable processing mode.
[0383] In an embodiment, when the affine processing mode is mapped to the applicable processing mode for the MVR of 1 / 4 pixel unit and the MVR of the current block is the 1 / 4 pixel unit, the encoder 2710 may determine the affine processing mode as the applicable processing mode.
[0384] Furthermore, in an embodiment, when the affine processing mode is mapped to an applicable processing mode for an MVR of a 1 / 4 pixel unit, and the MVR of the current block is different from the 1 / 4 pixel unit, the encoder 2710 may determine the affine processing mode as an inapplicable processing mode.
[0385] Furthermore, in an embodiment, when the affine processing mode is mapped to an inapplicable processing mode for an MVR of a 1 / 2 pixel unit and the MVR of the current block is a 1 / 2 pixel unit, the encoder 2710 may determine the affine processing mode as an inapplicable processing mode.
[0386] In an embodiment, the encoder 2710 may encode the current block according to an applicable processing mode for the current block. In an embodiment, the encoder 2710 may not apply an unapplicable processing mode for the current block to the current block.
[0387] In an embodiment, the encoder 2710 may determine whether to apply an applicable processing mode to the current block, and based on the determination result, the encoder 2710 may encode the current block according to the applicable processing mode. For example, when the applicable processing mode is the affine processing mode, it may be determined whether to apply the affine processing mode to the current block. When it is determined that the affine processing mode is to be applied, the affine processing mode may be applied to the current block.
[0388] In an embodiment, encoding the current block according to an applicable processing mode does not mean applying only the applicable processing mode to the current block. In an embodiment, the encoder 2710 may process the current block according to a processing mode whose application should be determined in a predetermined order (i.e., a predetermined syntax) before applying the applicable processing mode, and then apply the applicable processing mode to the current block. Alternatively, after processing the current block according to the applicable processing mode, the current block may be encoded according to another processing mode whose application is determined according to the predetermined syntax.
[0389] In an embodiment, when an unapplicable processing mode for a current block is determined, the encoder 2710 may encode the current block according to a processing mode other than the unapplicable processing mode.
[0390] Furthermore, in an embodiment, when it is determined that the applicable processing mode determined based on the MVR of the current block is not applied, the encoder 2710 may encode the current block according to a processing mode other than the applicable processing mode.
[0391] In an embodiment, the bitstream generator 2730 may generate a bitstream including information related to a processing mode applied to the current block. In an embodiment, the bitstream generator 2730 may add information about an MVR of the current block to the bitstream.
[0392] In an embodiment, when an applicable processing mode determined based on the MVR of the current block is applied to the current block, the bitstream generator 2730 may generate a bitstream including information about the applicable processing mode.
[0393] In an embodiment, information about an unapplicable processing mode determined based on the MVR of the current block may not be included in the bitstream.
[0394] In an embodiment, when an applicable processing mode is determined based on the MVR of the current block and application of the applicable processing mode is confirmed, the encoder 2710 may check for a processing mode that cannot be redundantly applied with the applicable processing mode. The bitstream generated by the bitstream generator 2730 may not include information about the processing mode that cannot be redundantly applied with the applicable processing mode. When only one processing mode is applicable from a plurality of processing modes based on a predetermined syntax, the plurality of processing modes may be referred to as redundant processing modes.
[0395] Furthermore, in an embodiment, before the encoder 2710 applies the applicable processing mode determined based on the MVR of the current block to the current block, the encoder 2710 may determine the processing mode, for which application should first be determined based on a predetermined syntax, as an unapplicable processing mode. In this case, the applicable processing mode and the processing mode, for which application should first be determined based on a predetermined syntax, may be included in the same process among the prediction process, the transform process, and the filtering process.
[0396] Specifically, in order to apply another processing mode to the current block, in a case where it is necessary to determine whether to apply one processing mode based on the syntax first, when the other processing mode is determined to be an applicable processing mode, the encoder 2710 may determine the one processing mode as an unapplicable processing mode. Information about the processing mode determined to be unapplicable may not be included in the bitstream.
[0397] In an embodiment, when an applicable processing mode determined based on the MVR of the current block is not applied to the current block, information about the applicable processing mode may not be included in the bitstream.
[0398] In an embodiment, the encoder 2710 may determine an applicable processing mode for the current block based on the MVR of the current block, and may determine specific settings related to the applicable processing mode. The specific settings may refer to options to be considered when processing the current block according to the processing mode.
[0399] As described above, the MVR of the current block may be determined for a slice or picture including the current block.The MVR determined for the slice or picture may be the MVR of each of the blocks included in the slice or picture.
[0400] In an embodiment, when the current slice is a predicted (P) slice or a bi-predicted (B) slice, and the current picture is a predicted (P) picture or a bi-predicted (B) picture, when the MVR of the current block corresponds to a preset MVR, the encoder 2710 may apply the inter-frame prediction processing mode to all blocks included in the current slice or the current picture.
[0401] In addition, in an embodiment, when the MVR of the current block is determined for the current slice or current picture including the current block, the encoder 2710 may generate a prediction block of a block to which the intra-frame prediction processing mode will be applied, included in the current slice or current picture, according to the prediction block generation mode corresponding to the MVR of the current block.
[0402] As described above, the applicable processing mode and / or non-applicable processing mode for the current block may be determined based on the MVR of the current block. In an embodiment, the encoder 2710 may determine the MVR of the current block based on the type of processing mode to be applied to the current block. When the processing mode applied to the current block corresponds to an applicable processing mode mapped to a preset MVR, the encoder 2710 may determine the preset MVR as the MVR of the current block. In other words, when an affine processing mode is applied to the current block and mapped to a 1 / 4 pixel unit resolution as the applicable processing mode, the encoder 2710 may determine the MVR of the current block to be a 1 / 4 pixel unit.
[0403] In reference Figure 32 In the description, when the affine processing mode is determined to be applied to the current block, the encoder 2710 may determine the MVR of the current block as a 1 / 4 pixel unit, and when the DMVD processing mode is determined to be applied to the current block, the encoder 2710 may determine the MVR of the current block as one of a 1 / 2 pixel unit, a 1 pixel unit, and a 2 pixel unit.
[0404] Figure 28 is a flowchart for describing an image encoding method according to an embodiment.
[0405] At S2810 , the image encoding apparatus 2700 determines an applicable processing mode based on the MVR of the current block.
[0406] The image encoding apparatus 2700 may determine one of the at least one candidate MVRs as the MVR of the current block. In an embodiment, the image encoding apparatus 2700 may determine the MVR for each picture, each slice, or each block. The MVR determined for a picture, slice, or maximum coding unit may be the MVR of a block included in the picture, slice, or maximum coding unit.
[0407] Also, in an embodiment, the image encoding apparatus 2700 may determine an inapplicable processing mode for the current block based on the MVR of the current block.
[0408] At S2820, the image encoding apparatus 2700 may encode the current block according to an applicable processing mode.
[0409] The image encoding apparatus 2700 may not apply the unapplicable processing mode determined for the current block to the current block. In an embodiment, the image encoding apparatus 2700 may encode the current block according to another processing mode instead of the unapplicable processing mode.
[0410] The image encoding apparatus 2700 may determine whether to apply an applicable processing mode for a current block, and when it is determined to apply, the image encoding apparatus 2700 may encode the current block according to the applicable processing mode.
[0411] In an embodiment, when it is determined that the applicable processing mode is not applied, the image encoding apparatus 2700 may encode the current block according to another processing mode.
[0412] In an embodiment, the image encoding apparatus 2700 may generate a bitstream including information indicating an MVR of a current block and information related to a processing mode applied to the current block.
[0413] Since the applicable processing mode is applied to the current block, the generated bitstream may not include information about the unapplicable processing mode and information about the processing mode determined to be the unapplicable processing mode.
[0414] The embodiments may be implemented as a computer-executable program, and the program may be stored in a medium.
[0415] The medium may store the computer executable program continuously or may temporarily store the computer executable program to execute or download the computer executable program. In addition, the medium may be any of a variety of recording means or storage means including a single hardware or a combination of multiple hardware, and may be distributed in a network, and is not limited to media directly connected to the computer system. The medium may be configured to store program instructions, and examples of the medium may include magnetic media (such as a hard disk, floppy disk, or magnetic tape), optical recording media (such as a compact disk read-only memory (CD-ROM) or a digital versatile disk (DVD)), magneto-optical media (such as a floppy disk, ROM, random access memory (RAM), and flash memory). In addition, other examples of the medium may include recording media and storage media managed by an application store that distributes applications or a website or server that supplies or distributes various other software.
[0416] While the present disclosure has been particularly shown and described with reference to embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the disclosure as defined by the following claims.
Claims
1. An image decoding method, comprising: obtaining, from a bitstream, first information indicating a motion vector resolution of a current unit among a plurality of motion vector resolutions including a first motion vector resolution and a second motion vector resolution; When the first information indicates a first motion vector resolution, obtaining second information indicating whether a merge mode is applied to the current unit from the bitstream; as well as When the second information indicates that the merge mode is applied to the current unit, decoding the current unit based on the merge mode, wherein, when the first information indicates the second motion vector resolution, the second information is not obtained from the bitstream, The picture is divided into at least one maximum coding unit. Among them, one maximum coding unit among the at least one maximum coding unit is divided into at least one coding unit including the current unit.
2. An image decoding device, comprising: an obtainer configured to obtain, from a bitstream, first information indicating a motion vector resolution of a current unit among a plurality of motion vector resolutions including a first motion vector resolution and a second motion vector resolution, and when the first information indicates the first motion vector resolution, obtain, from the bitstream, second information indicating whether a merge mode is applied to the current unit; a decoder configured to, when the second information indicates that the merge mode is applied to the current unit, decode the current unit based on the merge mode, wherein, when the first information indicates the second motion vector resolution, the second information is not obtained from the bitstream, The picture is divided into at least one maximum coding unit. Among them, one maximum coding unit among the at least one maximum coding unit is divided into at least one coding unit including the current unit.
3. An image encoding method, comprising: determining a motion vector resolution of the current unit from a plurality of motion vector resolutions including a first motion vector resolution and a second motion vector resolution; determining whether a merge mode is applied to the current unit when the first motion vector resolution is determined as the motion vector resolution of the current unit; When it is determined that the merge mode is applied to the current unit, encoding the current block based on the merge mode; as well as generating a bitstream including first information indicating a motion vector resolution of a current unit among the plurality of motion vector resolutions and second information indicating whether a merge mode is applied to the current unit, When the second motion vector resolution is determined as the motion vector resolution of the current unit, the second information is not included in the bitstream, The picture is divided into at least one maximum coding unit. Among them, one maximum coding unit among the at least one maximum coding unit is divided into at least one coding unit including the current unit.
4. A method for transmitting a bitstream, the method comprising: Send bitstream, The bit stream is generated by an image coding method, and the image coding method includes: determining a motion vector resolution of the current unit from a plurality of motion vector resolutions including a first motion vector resolution and a second motion vector resolution; determining whether a merge mode is applied to the current unit when the first motion vector resolution is determined as the motion vector resolution of the current unit; When it is determined that the merge mode is applied to the current unit, encoding the current block based on the merge mode; and generating a bitstream including first information indicating a motion vector resolution of a current unit among the plurality of motion vector resolutions and second information indicating whether a merge mode is applied to the current unit, When the second motion vector resolution is determined as the motion vector resolution of the current unit, the second information is not included in the bitstream, The picture is divided into at least one maximum coding unit. Among them, one maximum coding unit among the at least one maximum coding unit is divided into at least one coding unit including the current unit.
Citation Information
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Method and device for encoding / decoding motion vector
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