Pixel circuit, driving method and display device

Abstract

A pixel circuit, a driving method and a display device. The pixel circuit comprises a light emitting element (10), a driving circuit (11), a first reset circuit (12), a first control circuit (13) and a second control circuit (14); the first reset circuit (12) controls writing of a first initial voltage (Vi1) into a first node (N1) under the control of a first scanning signal; the first control circuit (13) controls communication between a power supply voltage terminal (Vd) and a second node (N2) under the control of a second light emitting control signal; the second control circuit (14) controls communication between a third node (N3) and a first pole of the light emitting element (10) under the control of a first light emitting control signal; the driving circuit (11) controls communication between the second node (N2) and the third node (N3) under the control of the potential of the first node (N1); and a second pole of the light emitting element (10) is electrically connected with a first voltage terminal (V1).

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a pixel circuit, a driving method and a display device. Background Art

[0002] In related art, parasitic capacitance exists between the gate and source of the driver transistor in a pixel driver circuit. During the reset phase of the pixel driver circuit, the gate voltage of the driver transistor is initialized to an initial voltage. Due to the coupling effect of the parasitic capacitance, the source voltage of the driver transistor also changes accordingly. When resetting different grayscales during the reset phase, the gate voltage of the driver transistor changes by different amounts, and thus the source voltage of the driver transistor also changes by different amounts. This, in turn, results in different source voltages of the driver transistor after the reset phase, and thus different gate-source voltages (Vgs) of the driver transistor. Furthermore, because the gate-source voltage (Vgs) of the driver transistor affects its threshold voltage, this can cause image retention in the display panel. Summary of the Invention

[0003] The main purpose of the present invention is to provide a pixel circuit, a driving method and a display device to solve the problem of afterimage in the related art.

[0004] In one aspect, an embodiment of the present invention provides a pixel circuit, including a light-emitting element, a driving circuit, a first reset circuit, a first control circuit, and a second control circuit, wherein:

[0005] The first reset circuit is connected to the first scan line, the first initial voltage terminal and the first node respectively, and is used to control the first initial voltage provided by the first initial voltage terminal to be written into the first node under the control of the first scan signal provided by the first scan line;

[0006] The first control circuit is electrically connected to the second light-emitting control line, the power supply voltage terminal and the second node respectively, and is used to control the connection between the power supply voltage terminal and the second node under the control of the second light-emitting control signal provided by the second light-emitting control line;

[0007] The second control circuit is electrically connected to the first light emitting control line, the third node, and the first electrode of the light emitting element, respectively, and is configured to control the connection between the third node and the first electrode of the light emitting element under the control of the first light emitting control signal provided by the first light emitting control line;

[0008] The control terminal of the driving circuit is electrically connected to the first node, the first terminal of the driving circuit is electrically connected to the second node, and the second terminal of the driving circuit is electrically connected to the third node, and the driving circuit is configured to control the second node to be connected to the third node under the control of the potential of the first node;

[0009] The second electrode of the light emitting element is electrically connected with the first voltage terminal.

[0010] Optionally, the pixel circuit further comprises a data writing circuit and a threshold compensation circuit.

[0011] The threshold compensation circuit is electrically connected with the second scan line, the first node and the third node respectively, and is configured to control the communication between the first node and the third node under the control of a second scan signal provided by the second scan line.

[0012] The data writing circuit is electrically connected with the third scan line, the data line and the second node respectively, and is configured to write a data voltage provided by the data line into the second node under the control of a third scan signal provided by the third scan line.

[0013] Optionally, the pixel circuit further comprises a second reset circuit, which is electrically connected with the second scan line, a second initial voltage terminal and the first electrode of the light emitting element respectively, and is configured to write a second initial voltage provided by the second initial voltage terminal into the first electrode of the light emitting element under the control of a second scan signal provided by the second scan line.

[0014] Optionally, the pixel circuit further comprises a coupling circuit.

[0015] The first end of the coupling circuit is electrically connected with the first node, the second end of the coupling circuit is electrically connected with the power voltage terminal, and the coupling circuit is configured to store electric energy and control the electric potential of the first node.

[0016] Optionally, the transistors included in the first light emitting control circuit and the transistors included in the second light emitting control circuit are both p-type transistors.

[0017] The first light emitting control signal and the second light emitting control signal are provided by the same light emitting control signal generation circuit.

[0018] The first light emitting control signal is an n-level light emitting control signal provided by the light emitting control signal generation circuit, the second light emitting control signal is an n+1-level light emitting control signal provided by the light emitting control signal generation circuit, and n is a positive integer.

[0019] Optionally, the transistors in the first reset circuit, the transistors in the second reset circuit, the transistors in the data writing circuit and the transistors in the threshold compensation circuit are all p-type transistors.

[0020] The first scan signal, the second scan signal and the third scan signal are provided by the same scan signal generation circuit.

[0021] The first scan signal is an mth scan signal provided by the scan signal generation circuit, the second scan signal is an m+1th scan signal provided by the scan signal generation circuit, and the third scan signal is an m+2th scan signal provided by the scan signal generation circuit; m is a positive integer.

[0022] Optionally, the transistor in the first reset circuit and the transistor in the threshold compensation circuit are oxide transistors.

[0023] Optionally, the first reset circuit includes a first transistor.

[0024] The control electrode of the first transistor is electrically connected to the first scan line, the first electrode of the first transistor is electrically connected to the first initial voltage terminal, and the second electrode of the first transistor is electrically connected to the first node.

[0025] Optionally, the first control circuit includes a second transistor, and the second control circuit includes a third transistor.

[0026] The control electrode of the second transistor is electrically connected to the second light-emitting control line, the first electrode of the second transistor is electrically connected to the power voltage terminal, and the second electrode of the second transistor is electrically connected to the first node.

[0027] The control electrode of the third transistor is electrically connected to the first light-emitting control line, the first electrode of the third transistor is electrically connected to the third node, and the second electrode of the third transistor is electrically connected to the first electrode of the light-emitting element.

[0028] Optionally, the data write-in circuit includes a fourth transistor, and the threshold compensation circuit includes a fifth transistor.

[0029] The control electrode of the fourth transistor is electrically connected to the third scan line, the first electrode of the fourth transistor is electrically connected to the data line, and the second electrode of the fourth transistor is electrically connected to the second node.

[0030] The control electrode of the fifth transistor is electrically connected to the second scan line, the first electrode of the fifth transistor is electrically connected to the first node, and the second electrode of the fifth transistor is electrically connected to the third node.

[0031] Optionally, the second reset circuit includes a sixth transistor.

[0032] The control electrode of the sixth transistor is electrically connected to the second scan line, the first electrode of the sixth transistor is electrically connected to the second initial voltage terminal, and the second electrode of the sixth transistor is electrically connected to the first electrode of the light-emitting element.

[0033] The coupling circuit includes a storage capacitor;

[0034] A first terminal of the storage capacitor is electrically connected to the first node, and a second terminal of the storage capacitor is electrically connected to the power supply voltage terminal.

[0035] Optionally, the driving circuit includes a driving transistor;

[0036] The control electrode of the driving transistor is electrically connected to the first node, the first electrode of the driving transistor is electrically connected to the second node, and the second electrode of the driving transistor is electrically connected to the third node.

[0037] In a second aspect, an embodiment of the present invention further provides a driving method, which is applied to the above-mentioned pixel circuit, wherein the display period includes a reset phase; the driving method includes:

[0038] In the reset phase, the first reset circuit controls the writing of the first initial voltage into the first node under the control of the first scan signal; and the first control circuit controls the connection between the power supply voltage terminal and the second node under the control of the second light-emitting control signal.

[0039] Optionally, the pixel circuit further includes a data writing circuit, a threshold compensation circuit, a second reset circuit and a coupling circuit;

[0040] The display cycle further includes a data writing phase and a light emitting phase arranged after the reset phase; the driving method further includes:

[0041] During the data writing phase, the second reset circuit, under the control of the second scanning signal, writes a second initial voltage into the first electrode of the light-emitting element so that the light-emitting element does not emit light; the data writing circuit, under the control of the third scanning signal, writes the data voltage into the second node; and the threshold compensation circuit, under the control of the second scanning signal, controls the connection between the first node and the third node.

[0042] At the beginning of the data writing phase, the driving circuit controls the connection between the second node and the third node under the control of the potential of the first node, so as to charge the coupling circuit through the data voltage, thereby changing the potential of the first node, until the driving circuit disconnects the second node from the third node;

[0043] In the light-emitting stage, the first control circuit controls the connection between the power supply voltage terminal and the second node under the control of the second light-emitting control signal; the second control circuit controls the connection between the third node and the first pole of the light-emitting element under the control of the first light-emitting control signal, and the driving circuit drives the light-emitting element to emit light.

[0044] In a third aspect, the present application also provides a display device comprising the pixel circuit.

[0045] The pixel circuit, the driving method and the display device provided by the embodiments of the present application can write the first initial voltage to the control end of the driving circuit through the first reset circuit before the data voltage is written to the first end of the driving circuit, and the first control circuit can write the power voltage to the first end of the driving circuit under the control of the second light-emitting control signal, so as to provide a bias voltage for the driving transistor in the driving circuit, and make the driving transistor keep in a reset state, thereby improving the hysteresis of the driving transistor and eliminating the residual image. BRIEF DESCRIPTION OF DRAWINGS

[0046] Figure 1 is a structural diagram of the pixel circuit according to an embodiment of the present application;

[0047] Figure 2 is a structural diagram of the pixel circuit according to at least one embodiment of the present application;

[0048] Figure 3 is a structural diagram of the pixel circuit according to at least one embodiment of the present application;

[0049] Figure 4 is a circuit diagram of the pixel circuit according to at least one embodiment of the present application;

[0050] Figure 5 is a working timing diagram of at least one embodiment of the pixel circuit according to the present application. Figure 4 BRIEF DESCRIPTION OF DRAWINGS DETAILED DESCRIPTION

[0051] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0052] The transistors used in all the embodiments of the present application can be triodes, thin-film transistors, field effect transistors or other devices with the same characteristics. In the embodiments of the present application, in order to distinguish the two poles of the transistor except the control pole, one pole is called the first pole and the other pole is called the second pole.

[0053] In actual operation, when the transistor is a thin-film transistor or a field effect transistor, the first pole can be a drain, and the second pole can be a source; or the first pole can be a source, and the second pole can be a drain.

[0054] As shown in Figure 1As shown, the pixel circuit comprises a light emitting element 10, a driving circuit 11, a first reset circuit 12, a first control circuit 13 and a second control circuit 14.

[0055] The first reset circuit 12 is connected with a first scan line G1, a first initial voltage terminal I1 and a first node N1 respectively, and is configured to write a first initial voltage Vi1 provided by the first initial voltage terminal I1 into the first node N1 under the control of a first scan signal provided by the first scan line G1.

[0056] The first control circuit 13 is connected with a second light emitting control line E2, a power voltage terminal Vd and a second node N2 respectively, and is configured to control the communication between the power voltage terminal Vd and the second node N2 under the control of a second light emitting control signal provided by the second light emitting control line E2; the power voltage terminal Vd is configured to provide a power voltage VDD.

[0057] The second control circuit 14 is connected with a first light emitting control line E1, a third node N3 and a first pole of the light emitting element 10 respectively, and is configured to control the communication between the third node N3 and the first pole of the light emitting element 10 under the control of a first light emitting control signal provided by the first light emitting control line E1.

[0058] The control end of the driving circuit 11 is connected with the first node N1, the first end of the driving circuit 11 is connected with the second node N2, and the second end of the driving circuit 11 is connected with the third node N3; the driving circuit 11 is configured to control the communication between the second node N2 and the third node N3 under the control of the potential of the first node N1.

[0059] The second pole of the light emitting element is connected with a first voltage terminal V1.

[0060] In at least one embodiment of the present application, the first voltage terminal V1 can be a low voltage terminal or a ground terminal, but is not limited thereto.

[0061] As shown in the pixel circuit of the embodiment of the present application, Figure 1 In the working process of the pixel circuit of the embodiment of the present application, a display period comprises a reset stage arranged before a data writing stage.

[0062] In the reset stage, the first reset circuit 12 controls the writing of the first initial voltage Vi1 into the first node N1 under the control of the first scan signal, and the first control circuit 14 controls the communication between the power voltage terminal Vd and the second node N2 under the control of the second light emitting control signal.

[0063] The pixel circuit comprises a first reset circuit 12 and a first control circuit 14. Before a data voltage is written into a first end of a driving circuit 11, the first reset circuit 12 writes a first initial voltage V11 into a control end of the driving circuit 11. The first control circuit 14, under the control of a second light-emitting control signal, writes a power supply voltage VDD into the first end of the driving circuit 11, so as to provide a bias voltage for a driving transistor in the driving circuit 11, and make the driving transistor keep a reset state, improve the hysteresis of the driving transistor, and eliminate residual images.

[0064] In a specific implementation, the hysteresis of the driving transistor causes the characteristics of the driving transistor to be relatively slow. Before the data voltage is written, the embodiment of the present application quickly resets the gate-source voltage of the driving transistor, which is beneficial to the recovery speed of the driving transistor, and thus improves the hysteresis of the driving transistor and improves the recovery speed of the hysteresis.

[0065] In addition, in the pixel circuit, the first control circuit 13 is electrically connected with a second light-emitting control line E2 and works under the control of a second light-emitting control signal provided by the second light-emitting control line E2, and the second control circuit 14 is electrically connected with a first light-emitting control line E1 and works under the control of a first light-emitting control signal provided by the first light-emitting control line E1, so as to ensure the normal operation of the timing in the light-emitting stage and ensure the display effect.

[0066] As shown in FIG. 1, Figure 2 As shown in FIG. 1, Figure 1 The pixel circuit can further comprise a data writing circuit 21 and a threshold compensation circuit 22.

[0067] The threshold compensation circuit 22 is electrically connected with a second scanning line G2, the first node N1 and the third node N3, respectively, and is used to control the communication between the first node N1 and the third node N3 under the control of a second scanning signal provided by the second scanning line G2.

[0068] The data writing circuit 21 is electrically connected with a third scanning line G3, a data line D1 and the second node N2, respectively, and is used to write a data voltage Vdata provided by the data line D1 into the second node N2 under the control of a third scanning signal provided by the third scanning line G3.

[0069] In the present application, as Figure 2In at least one embodiment of the pixel circuit shown, the first reset circuit 12 is electrically connected to the first scan line G1 and operates under the control of the first scan signal; the threshold compensation circuit 22 is electrically connected to the second scan line G2 and operates under the control of the second scan signal; the data write circuit 21 is electrically connected to the third scan line G3 and operates under the control of the third scan signal; through the coordination of the various scan signals, the initialization and data write timing can be guaranteed to proceed normally, and the initialization and threshold voltage compensation effects can be guaranteed.

[0070] The pixel circuit described in at least one embodiment of the present invention may further include a second reset circuit; the second reset circuit is electrically connected to the second scan line, the second initial voltage terminal and the first electrode of the light-emitting element, respectively, and is used to write the second initial voltage provided by the second initial voltage terminal into the first electrode of the light-emitting element under the control of the second scan signal provided by the second scan line, so as to control the light-emitting element not to emit light and clear the residual charge in the first electrode of the light-emitting element.

[0071] The pixel circuit according to at least one embodiment of the present invention may further include a coupling circuit;

[0072] A first end of the coupling circuit is electrically connected to the first node, and a second end of the coupling circuit is electrically connected to the power supply voltage end. The coupling circuit is used to store electrical energy and control the potential of the first node.

[0073] like Figure 3 As shown, in Figure 2 Based on at least one embodiment of the pixel circuit shown, the pixel circuit according to at least one embodiment of the present invention further includes a second reset circuit 31 and a coupling circuit 32;

[0074] The second reset circuit 31 is electrically connected to the second scan line G2, the second initial voltage terminal I2, and the first electrode of the light-emitting element 10, respectively, and is configured to write the second initial voltage Vi2 provided by the second initial voltage terminal I2 into the first electrode of the light-emitting element 10 under the control of the second scan signal provided by the second scan line G2;

[0075] A first end of the coupling circuit 32 is electrically connected to the first node N1 , and a second end of the coupling circuit 32 is electrically connected to the power supply voltage terminal Vd. The coupling circuit 32 is used to store electrical energy and control the potential of the first node N1 .

[0076] The present invention Figure 3 In at least one embodiment of the pixel circuit shown, when in operation, a display cycle further includes a data writing phase and a light emitting phase arranged after the reset phase;

[0077] In the data writing stage, the second reset circuit 31 writes the second initial voltage Vi2 into the first electrode of the light emitting element 10 under the control of the second scan signal, so that the light emitting element 10 does not emit light; the data writing circuit 21 writes the data voltage Vdata into the second node N2 under the control of the third scan signal; the threshold compensation circuit 22 controls the communication between the first node N1 and the third node N3 under the control of the second scan signal;

[0078] At the beginning of the data writing stage, the driving circuit 11 controls the communication between the second node N2 and the third node N3 under the control of the potential of the first node N1, so as to charge the coupling circuit 32 by the data voltage Vdata, to change the potential of the first node N1, until the driving circuit 11 disconnects the second node N2 and the third node N3, at this time, the potential of N1 is Vdata+Vth, and Vth is the threshold voltage of the driving transistor in the driving circuit 11;

[0079] In the light emitting stage, the first control circuit 13 controls the communication between the power supply voltage terminal Vd and the second node N2 under the control of the second light emitting control signal; the second control circuit 14 controls the communication between the third node N3 and the first electrode of the light emitting element 10 under the control of the first light emitting control signal, and the driving circuit 11 drives the light emitting element 10 to emit light.

[0080] Optionally, the transistors included in the first light emitting control circuit and the transistors included in the second light emitting control circuit are both p-type transistors.

[0081] The first light emitting control signal and the second light emitting control signal are provided by the same light emitting control signal generation circuit.

[0082] The first light emitting control signal is the nth light emitting control signal provided by the light emitting control signal generation circuit, and the second light emitting control signal is the n+1th light emitting control signal provided by the light emitting control signal generation circuit; n is a positive integer.

[0083] In specific implementation, the first light emitting control signal and the second light emitting control signal can be adjacent two light emitting control signals provided by the same light emitting control signal generation circuit.

[0084] Optionally, the transistors in the first reset circuit, the transistors in the second reset circuit, the transistors in the data writing circuit, and the transistors in the threshold compensation circuit are all p-type transistors.

[0085] The first scan signal, the second scan signal, and the third scan signal are provided by the same scan signal generation circuit.

[0086] The first scanning signal is the mth level scanning signal provided by the scanning signal generating circuit, the second scanning signal is the m+1th level scanning signal provided by the scanning signal generating circuit, and the third scanning signal is the m+2th level scanning signal provided by the scanning signal generating circuit; m is a positive integer.

[0087] In a specific implementation, the first scanning signal, the second scanning signal, and the third scanning signal may be adjacent three-level scanning signals provided by the same scanning signal generating circuit.

[0088] In at least one embodiment of the present invention, the transistor in the first reset circuit and the transistor in the threshold compensation circuit are oxide transistors.

[0089] Oxide transistors have low leakage current and low mobility. Therefore, in at least one embodiment of the present invention, the transistors in the first reset circuit and the transistors in the threshold compensation circuit can be configured as oxide thin-film transistors to achieve low leakage and ensure the stability of the potential of the control terminal of the drive circuit; but the present invention is not limited to this.

[0090] Optionally, the first reset circuit includes a first transistor;

[0091] The control electrode of the first transistor is electrically connected to the first scan line, the first electrode of the first transistor is electrically connected to the first initial voltage terminal, and the second electrode of the first transistor is electrically connected to the first node.

[0092] Optionally, the first control circuit includes a second transistor, and the second control circuit includes a third transistor;

[0093] The control electrode of the second transistor is electrically connected to the second light emitting control line, the first electrode of the second transistor is electrically connected to the power supply voltage terminal, and the second electrode of the second transistor is electrically connected to the first node;

[0094] The control electrode of the third transistor is electrically connected to the first light emitting control line, the first electrode of the third transistor is electrically connected to the third node, and the second electrode of the third transistor is electrically connected to the first electrode of the light emitting element.

[0095] Optionally, the data writing circuit includes a fourth transistor, and the threshold compensation circuit includes a fifth transistor;

[0096] The control electrode of the fourth transistor is electrically connected to the third scan line, the first electrode of the fourth transistor is electrically connected to the data line, and the second electrode of the fourth transistor is electrically connected to the second node;

[0097] A control electrode of the fifth transistor is electrically connected to the second scan line, a first electrode of the fifth transistor is electrically connected to the first node, and a second electrode of the fifth transistor is electrically connected to the third node.

[0098] Optionally, the second reset circuit includes a sixth transistor;

[0099] The control electrode of the sixth transistor is electrically connected to the second scan line, the first electrode of the sixth transistor is electrically connected to the second initial voltage terminal, and the second electrode of the sixth transistor is electrically connected to the first electrode of the light emitting element;

[0100] The coupling circuit includes a storage capacitor;

[0101] A first terminal of the storage capacitor is electrically connected to the first node, and a second terminal of the storage capacitor is electrically connected to the power supply voltage terminal.

[0102] Optionally, the driving circuit includes a driving transistor;

[0103] The control electrode of the driving transistor is electrically connected to the first node, the first electrode of the driving transistor is electrically connected to the second node, and the second electrode of the driving transistor is electrically connected to the third node.

[0104] like Figure 4 As shown, in Figure 3 On the basis of at least one embodiment of the pixel circuit shown, in the pixel circuit according to at least one embodiment of the present invention, the light emitting element is an organic light emitting diode O1;

[0105] The first reset circuit 12 includes a first transistor T1;

[0106] The gate of the first transistor T1 is electrically connected to the first scan line G1, the source of the first transistor T1 is electrically connected to the first initial voltage terminal I1, and the drain of the first transistor T1 is electrically connected to the first node N1;

[0107] The first control circuit 13 includes a second transistor T2, and the second control circuit 14 includes a third transistor T3;

[0108] The gate of the second transistor T2 is electrically connected to the second light emitting control line E2, the source of the second transistor T2 is electrically connected to the power supply voltage terminal Vd, and the drain of the second transistor T2 is electrically connected to the first node N1; the power supply voltage terminal is used to provide a power supply voltage VDD;

[0109] The gate of the third transistor T3 is electrically connected to the first light emitting control line E1, the source of the third transistor T3 is electrically connected to the third node N3, and the drain of the third transistor T3 is electrically connected to the anode of O1;

[0110] The cathode of O1 is electrically connected to the low voltage terminal Vs, and the low voltage terminal is used to provide a low voltage VSS;

[0111] The data writing circuit 21 includes a fourth transistor T4, and the threshold compensation circuit 22 includes a fifth transistor T5;

[0112] The gate of the fourth transistor T4 is electrically connected to the third scan line G3, the source of the fourth transistor T4 is electrically connected to the data line D1, and the drain of the fourth transistor T4 is electrically connected to the second node N2;

[0113] The gate of the fifth transistor T5 is electrically connected to the second scan line G2, the source of the fifth transistor T5 is electrically connected to the first node N1, and the second electrode of the fifth transistor T5 is electrically connected to the third node;

[0114] The second reset circuit 31 includes a sixth transistor T6;

[0115] The gate of the sixth transistor T6 is electrically connected to the second scan line G2, the source of the sixth transistor T6 is electrically connected to the second initial voltage terminal I2, and the drain of the sixth transistor T6 is electrically connected to the anode of O1;

[0116] The coupling circuit 32 includes a storage capacitor C1;

[0117] A first end of the storage capacitor C1 is electrically connected to the first node N1, and a second end of the storage capacitor C1 is electrically connected to the power supply voltage terminal Vd;

[0118] The driving circuit 11 includes a driving transistor T0;

[0119] A gate of the driving transistor T0 is electrically connected to the first node N1 , a source of the driving transistor T0 is electrically connected to the second node N2 , and a drain of the driving transistor T0 is electrically connected to the third node N3 .

[0120] exist Figure 4 In at least one embodiment of the pixel circuit shown, all transistors are p-type transistors, and all transistors may be low-temperature polysilicon transistors, but the present invention is not limited thereto.

[0121] exist Figure 4In at least one embodiment of the pixel circuit shown, T2 and T3 respond to different light-emitting control signals, T1, T5 and T4 respond to different scanning signals, ensuring that initialization, data writing and threshold compensation, OLED (Organic Light Emitting Diode) light-emitting three time sequences proceed normally, thereby ensuring threshold voltage compensation and display effect.

[0122] As shown in Figure 5 , the present application as shown in Figure 4 At least one embodiment of the pixel circuit shown in operation, the display period can include the initialization phase t1, data writing phase t2 and light-emitting phase t3 arranged in turn;

[0123] In the initialization phase t1, G1 and E2 provide low voltage signals, G2, G3 and E1 provide high voltage signals, T1 and T2 are opened to write Vi1 into N1 and VDD into N2, to reset the gate-source voltage of T0, so that T0 is in the conduction bias state, which can improve the hysteresis effect of T0 and eliminate the residual image;

[0124] In the data writing phase t2, G1 provides a high voltage signal, G2 and G3 provide low voltage signals, E1 and E2 provide high voltage signals, D1 provides a data voltage Vdata, T5, T4 and T6 are all opened, the data voltage Vdata is written into N2, the communication between N1 and N3 is controlled, and Vi2 is written into the anode of O1, so that O1 does not emit light and the residual charge at the anode of O1 is cleared;

[0125] At the beginning of the data writing phase t2, T0 is opened to charge C1 through Vdata to raise the potential of N1 until the potential of N1 becomes Vdata+Vth, and T0 is turned off; wherein Vth is the threshold voltage of T0;

[0126] In the light-emitting phase t3, G1, G2 and G3 provide high voltage signals, E1 and E2 provide low voltage signals, T2 and T3 are opened, and T0 drives O1 to emit light.

[0127] As shown in Figure 5 , the first scanning signal provided by G1, the second scanning signal provided by G2 and the third scanning signal provided by G3 can provide adjacent three-level scanning signals for the same scanning signal generation circuit, and the first light-emitting control signal provided by E1 and the second light-emitting control signal provided by E2 can provide adjacent two-level light-emitting control signals for the same light-emitting control signal generation circuit, thereby reducing the number of scanning signal generation circuits used by the display device, and the number of light-emitting control signal generation circuits used by the display device, simplifying the structure and saving cost.

[0128] In Figure 5In the embodiment, the first interval time period t01 between t1 and t2, and the second interval time period t02 between t2 and t3, are redundant timings to ensure that G1, G2 and G3 share a scanning signal generating circuit and that E1 and E2 share a light emitting control signal generating circuit.

[0129] like Figure 4 、 Figure 5 As shown, at least one embodiment of the pixel driving circuit needs to turn on the driving transistor T0 during the data writing phase. Therefore, the voltage difference Vi1-VDD between the first initial voltage Vi1 and the power supply voltage VDD needs to be less than the threshold voltage Vth of T0. The absolute value of VDD can be greater than 1.5 times the absolute value of Vth. For example, the absolute value of VDD can be 1.6 times, 1.8 times, 2 times, etc., of the absolute value of Vth to ensure that the bias effect can be quickly achieved in a relatively short time.

[0130] Optionally, the voltage value of Vi1 is greater than or equal to -4V and less than or equal to -2V, the voltage value of VDD is greater than or equal to 4V and less than or equal to 5.5V, and Vth is greater than or equal to -3.5V and less than or equal to -2V.

[0131] In at least one embodiment of the present invention, the voltage value of Vi2 is greater than or equal to -4V and less than or equal to -2V.

[0132] The driving method according to an embodiment of the present invention is applied to the above-mentioned pixel circuit, wherein the display period includes a reset phase; the driving method includes:

[0133] In the reset phase, the first reset circuit controls the writing of the first initial voltage into the first node under the control of the first scan signal; and the first control circuit controls the connection between the power supply voltage terminal and the second node under the control of the second light-emitting control signal.

[0134] In the driving method described in an embodiment of the present invention, before the data voltage is written into the first end of the driving circuit, in the initialization stage, the first reset circuit writes the first initial voltage into the control end of the driving circuit, and the first control circuit, under the control of the second light-emitting control signal, controls the power supply voltage to be written into the first end of the driving circuit to provide a bias voltage to the driving transistor in the driving circuit 11, so that the driving transistor maintains a reset state, improves the hysteresis of the driving transistor, and thus eliminates the afterimage.

[0135] In at least one embodiment of the present invention, the pixel circuit further includes a data writing circuit, a threshold compensation circuit, a second reset circuit, and a coupling circuit; the display cycle further includes a data writing phase and a light emitting phase arranged after the reset phase; and the driving method further includes:

[0136] During the data writing phase, the second reset circuit, under the control of the second scanning signal, writes a second initial voltage into the first electrode of the light-emitting element so that the light-emitting element does not emit light; the data writing circuit, under the control of the third scanning signal, writes the data voltage into the second node; and the threshold compensation circuit, under the control of the second scanning signal, controls the connection between the first node and the third node.

[0137] At the beginning of the data writing phase, the driving circuit controls the connection between the second node and the third node under the control of the potential of the first node, so as to charge the coupling circuit through the data voltage, thereby changing the potential of the first node, until the driving circuit disconnects the second node from the third node;

[0138] In the light-emitting stage, the first control circuit controls the connection between the power supply voltage terminal and the second node under the control of the second light-emitting control signal; the second control circuit controls the connection between the third node and the first pole of the light-emitting element under the control of the first light-emitting control signal, and the driving circuit drives the light-emitting element to emit light.

[0139] The display device according to the embodiment of the present invention includes the above-mentioned pixel circuit.

[0140] The display device provided in the embodiment of the present invention can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, or the like.

[0141] The display device provided in at least one embodiment of the present invention may be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, or a navigator.

[0142] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as within the scope of protection of the present invention.

Claims

1. A pixel circuit comprising a light-emitting element, a driving circuit, a first reset circuit, a first control circuit, and a second control circuit, wherein: The first reset circuit is connected to the first scan line, the first initial voltage terminal and the first node respectively, and is used to control the first initial voltage provided by the first initial voltage terminal to be written into the first node under the control of the first scan signal provided by the first scan line; The first control circuit is electrically connected to the second light-emitting control line, the power supply voltage terminal and the second node respectively, and is used to control the connection between the power supply voltage terminal and the second node under the control of the second light-emitting control signal provided by the second light-emitting control line; The second control circuit is electrically connected to the first light emitting control line, the third node, and the first electrode of the light emitting element, respectively, and is configured to control the connection between the third node and the first electrode of the light emitting element under the control of the first light emitting control signal provided by the first light emitting control line; The control terminal of the driving circuit is electrically connected to the first node, the first terminal of the driving circuit is electrically connected to the second node, and the second terminal of the driving circuit is electrically connected to the third node, and the driving circuit is configured to control the communication between the second node and the third node under the control of the potential of the first node; The second electrode of the light emitting element is electrically connected to the first voltage terminal; The pixel circuit further includes a data writing circuit and a threshold compensation circuit; The threshold compensation circuit is electrically connected to the second scan line, the first node and the third node respectively, and is used to control the connection between the first node and the third node under the control of the second scan signal provided by the second scan line; The data writing circuit is electrically connected to the third scan line, the data line and the second node respectively, and is used to write the data voltage provided by the data line into the second node under the control of the third scan signal provided by the third scan line; The pixel circuit further includes a second reset circuit; the second reset circuit is electrically connected to the second scan line, the second initial voltage terminal, and the first electrode of the light-emitting element, respectively, and is configured to write a second initial voltage provided by the second initial voltage terminal into the first electrode of the light-emitting element under the control of a second scan signal provided by the second scan line; The transistors in the first reset circuit, the transistors in the second reset circuit, the transistors in the data writing circuit, and the transistors in the threshold compensation circuit are all p-type transistors; The first scanning signal, the second scanning signal and the third scanning signal are provided by the same scanning signal generating circuit; The first scanning signal is the mth level scanning signal provided by the scanning signal generating circuit, the second scanning signal is the m+1th level scanning signal provided by the scanning signal generating circuit, and the third scanning signal is the m+2th level scanning signal provided by the scanning signal generating circuit; m is a positive integer.

2. The pixel circuit according to claim 1, wherein: Also included is a coupling circuit; A first end of the coupling circuit is electrically connected to the first node, and a second end of the coupling circuit is electrically connected to the power supply voltage end. The coupling circuit is used to store electrical energy and control the potential of the first node.

3. The pixel circuit according to claim 1, wherein: The transistor included in the first control circuit and the transistor included in the second control circuit are both p-type transistors; The first light-emitting control signal and the second light-emitting control signal are provided by the same light-emitting control signal generating circuit; The first light-emitting control signal is an nth level light-emitting control signal provided by the light-emitting control signal generating circuit, and the second light-emitting control signal is an n+1th level light-emitting control signal provided by the light-emitting control signal generating circuit; n is a positive integer.

4. The pixel circuit according to claim 1, wherein: The transistor in the first reset circuit and the transistor in the threshold compensation circuit are oxide transistors.

5. The pixel circuit according to claim 1, wherein: The first reset circuit includes a first transistor; The control electrode of the first transistor is electrically connected to the first scan line, the first electrode of the first transistor is electrically connected to the first initial voltage terminal, and the second electrode of the first transistor is electrically connected to the first node.

6. The pixel circuit according to claim 1, wherein: The first control circuit includes a second transistor, and the second control circuit includes a third transistor; The control electrode of the second transistor is electrically connected to the second light emitting control line, the first electrode of the second transistor is electrically connected to the power supply voltage terminal, and the second electrode of the second transistor is electrically connected to the first node; The control electrode of the third transistor is electrically connected to the first light emitting control line, the first electrode of the third transistor is electrically connected to the third node, and the second electrode of the third transistor is electrically connected to the first electrode of the light emitting element.

7. The pixel circuit according to claim 1, wherein: The data writing circuit includes a fourth transistor, and the threshold compensation circuit includes a fifth transistor; The control electrode of the fourth transistor is electrically connected to the third scan line, the first electrode of the fourth transistor is electrically connected to the data line, and the second electrode of the fourth transistor is electrically connected to the second node; A control electrode of the fifth transistor is electrically connected to the second scan line, a first electrode of the fifth transistor is electrically connected to the first node, and a second electrode of the fifth transistor is electrically connected to the third node.

8. The pixel circuit according to claim 2, wherein: The second reset circuit includes a sixth transistor; The control electrode of the sixth transistor is electrically connected to the second scan line, the first electrode of the sixth transistor is electrically connected to the second initial voltage terminal, and the second electrode of the sixth transistor is electrically connected to the first electrode of the light emitting element; The coupling circuit includes a storage capacitor; A first terminal of the storage capacitor is electrically connected to the first node, and a second terminal of the storage capacitor is electrically connected to the power supply voltage terminal.

9. The pixel circuit according to claim 1, wherein: The driving circuit includes a driving transistor; The control electrode of the driving transistor is electrically connected to the first node, the first electrode of the driving transistor is electrically connected to the second node, and the second electrode of the driving transistor is electrically connected to the third node.

10. A driving method, applied to the pixel circuit according to any one of claims 1 to 9, wherein a display cycle includes a reset phase; the driving method comprising: In the reset phase, the first reset circuit controls the first initial voltage to be written into the first node under the control of the first scan signal; The first control circuit controls the connection between the power supply voltage terminal and the second node under the control of the second light emitting control signal.

11. The driving method according to claim 10, wherein: The pixel circuit further includes a data writing circuit, a threshold compensation circuit, a second reset circuit and a coupling circuit; The display cycle further includes a data writing phase and a light emitting phase arranged after the reset phase; the driving method further includes: During the data writing phase, the second reset circuit, under the control of the second scanning signal, writes a second initial voltage into the first electrode of the light-emitting element so that the light-emitting element does not emit light; the data writing circuit, under the control of the third scanning signal, writes the data voltage into the second node; and the threshold compensation circuit, under the control of the second scanning signal, controls the connection between the first node and the third node. At the beginning of the data writing phase, the driving circuit controls the connection between the second node and the third node under the control of the potential of the first node, so as to charge the coupling circuit through the data voltage, thereby changing the potential of the first node, until the driving circuit disconnects the second node from the third node; In the light-emitting stage, the first control circuit controls the connection between the power supply voltage terminal and the second node under the control of the second light-emitting control signal; the second control circuit controls the connection between the third node and the first pole of the light-emitting element under the control of the first light-emitting control signal, and the driving circuit drives the light-emitting element to emit light.

12. A display device comprising the pixel circuit according to any one of claims 1 to 9.

Images