Serial port FIFO multi-byte data receiving method based on DSP

Abstract

This invention discloses a DSP-based serial port FIFO multi-byte data reception method. By cooperating with the serial port's receive FIFO module, it solves the problems of interrupted data reception and excessive chip overhead caused by DSP serial port receive interruption. It also prevents the data in the receive array from being constantly misaligned and solves the overflow problem caused by receiving more than 16 bytes of data in a single frame using the DSP's serial port FIFO. This invention enables multi-byte reception using only the DSP's SCI module and timer module, thus allowing the reception of multi-byte backhaul data from the inertial measurement unit and the control of the optoelectronic pod to be completed using only a DSP chip.

Description

Technical Field

[0001] This invention relates to a DSP-based serial port FIFO multi-byte data receiving method, belonging to the field of inertial navigation system calibration technology. Background Technology

[0002] To meet the requirements of miniaturized and low-cost optoelectronic pod control, an integrated inertial measurement unit (IMU) is used for end-point feedback. Most IMUs use the RS422 serial port protocol to transmit the data they collect. Since the IMU measures the angular velocity and acceleration of an object in three-dimensional space, the amount of data transmitted back for each frame is relatively large.

[0003] In current technologies, the common approach is to use an FPGA to read multi-byte data from the serial port and transmit it to the main control chip for drive control. However, using an FPGA increases the overall cost of the optoelectronic pod control solution. Other solutions utilize the serial port (SCI) receive interrupt of a DSP to receive multi-byte data. If this DSP also runs the optoelectronic pod control program, the serial port interrupt is easily interrupted by other interrupts, leading to data overwriting, incomplete data reception, and serial port reception errors, preventing the interrupt from re-entering. If the DSP is used solely for data reception, this also results in a high overall cost for the optoelectronic pod control solution and fails to meet the miniaturization requirements. Summary of the Invention

[0004] To address the aforementioned technical problems, this invention provides a DSP-based serial port FIFO multi-byte data reception method.

[0005] The present invention is achieved through the following technical solutions.

[0006] This invention provides a method for receiving multi-byte data via serial port FIFO based on a DSP. The DSP has a timer module and an SCI module, and the SCI module has the function of receiving FIFO data. The method specifically includes the following steps:

[0007] ① Initialize the DSP and configure the SCI and timer modules;

[0008] ②Suppose that the total length of the data frame to be received is Y bytes, the total length of the receiving array is also Y bytes, the current length of the receiving array is Z, and Z = 0;

[0009] ③ The system enters a timer interrupt. In the interrupt, the system checks the flag indicating how many bytes the FIFO in the SCI module has received. If the number of bytes N received by the FIFO is greater than 0, the system jumps to step ④; otherwise, the system exits the timer interrupt and jumps to step ③.

[0010] ④ Determine whether Z+N is greater than or equal to Y. If yes, store YZ bytes of data in the receiving FIFO into the receiving array, Z=Y, and jump to step ⑥; otherwise, store N bytes of data in the receiving FIFO into the receiving array, Z=Z+N, and jump to step ⑤.

[0011] ⑤ Determine whether the frame header of the received array conforms to the communication protocol. If the frame header of the received array is correct, the system exits the timer interrupt and jumps to step ③; otherwise, the system exits the timer interrupt and jumps to step ②.

[0012] ⑥ Determine whether the checksum of the received array conforms to the communication protocol. If the checksum of the received array is incorrect, the system exits the timer interrupt and jumps to step ②; otherwise, output the flag indicating successful reception, the system exits the timer interrupt, and data reception ends.

[0013] In step ①, the SCI receive FIFO depth is set to 16 bytes, and the timer interrupt frequency is set to X Hz.

[0014] X is greater than P / (16*Q), and X is not an integer multiple of P / (16*Q), where P is the baud rate of serial communication, Q is the length of 1 byte, and X is the interrupt frequency of the timer.

[0015] In step ②, Y must be greater than 16 in the total length Y bytes of a data frame.

[0016] The beneficial effects of this invention are as follows: by using the serial port receive FIFO module, the problems of interrupted data reception and excessive chip overhead in DSP serial port reception are solved; by using the timer module to periodically clear the data in the serial port receive FIFO, the problem of overflow caused by the DSP serial port FIFO receiving a frame of data exceeding 16 bytes is solved; by setting the timer interrupt frequency, the problem of continuous misalignment of the receive array data is prevented, making the data reception method applicable to sensors that transmit a frame of serial port data with a total length greater than 16 bytes. Attached Figure Description

[0017] Figure 1 This is a flowchart of the present invention. Detailed Implementation

[0018] The technical solution of the present invention is further described below, but the scope of protection is not limited to what is described.

[0019] like Figure 1 As shown, a method for receiving multi-byte data via serial port FIFO based on a DSP is described. The DSP has a timer module and an SCI module, and the SCI module has the function of receiving FIFO data. The method specifically includes the following steps:

[0020] ① Initialize the DSP and configure the SCI module and timer module to implement the receive FIFO function of the SCI module and the interrupt function of the timer module;

[0021] ②Suppose that the total length of the data frame to be received is Y bytes, the total length of the receiving array is also Y bytes, the current length of the receiving array is Z, and Z = 0;

[0022] ③ The system enters a timer interrupt. In the interrupt, the system checks the flag indicating how many bytes the FIFO in the SCI module has received. If the number of bytes N received by the FIFO is greater than 0, the system jumps to step ④; otherwise, the system exits the timer interrupt and jumps to step ③.

[0023] ④ Determine whether Z+N is greater than or equal to Y. If yes, store YZ bytes of data in the receiving FIFO into the receiving array, Z=Y, and jump to step ⑥; otherwise, store N bytes of data in the receiving FIFO into the receiving array, Z=Z+N, and jump to step ⑤.

[0024] ⑤ Determine whether the frame header of the received array is consistent with the frame header of the communication protocol. If the frame header of the received array is consistent with the frame header of the communication protocol, the system exits the timer interrupt and jumps to step ③; otherwise, the system exits the timer interrupt and jumps to step ②.

[0025] ⑥ Calculate the checksum of the received array according to the communication protocol, and determine whether the checksum of the received array is consistent with the calculated checksum. If the checksum of the received array is inconsistent with the calculated checksum, the system exits the timer interrupt and jumps to step ②; otherwise, output the flag bit of successful reception, the system exits the timer interrupt, and data reception ends.

[0026] In step ①, the SCI receive FIFO depth is set to 16 bytes, and the timer interrupt frequency is set to X Hz.

[0027] Specifically, let the baud rate of serial communication be P bps, the length of 1 byte be Q bits, the interrupt frequency of the timer be X Hz, X be greater than P / (16*Q), and X be not an integer multiple of P / (16*Q).

[0028] In step ②, Y must be greater than 16 in the total length Y bytes of a data frame.

[0029] After receiving the data, the received data is converted using formulas to obtain the actual angular velocity and acceleration signals of the current optoelectronic pod in three-dimensional space.

[0030] This invention addresses the high cost of using FPGA to read multi-byte data from a serial port, the susceptibility of DSP serial port (SCI) receive interrupts to interrupt the reception of multi-byte data, leading to data overwriting, incomplete data reception, and significant chip overhead from multiple interrupt entries, which affects the operation of other programs. Furthermore, the DSP's serial port only has a 16-level FIFO buffer, causing overflow when receiving more than 16 bytes of data in a single frame. By coordinating timer interrupts with the serial port's receive FIFO module, this invention solves the problems of interrupted data reception and excessive chip overhead associated with DSP serial port receive interrupts, prevents data misalignment in the receive array, and resolves the overflow issue caused by receiving more than 16 bytes of data in a single frame using the DSP's serial port FIFO.

[0031] In summary, this invention enables multi-byte reception using only the SCI module and timer module of a DSP, thus allowing the reception of multi-byte data transmitted back from the inertial measurement unit and the control of the optoelectronic pod to be completed using only a DSP chip; it greatly simplifies the control software program of the optoelectronic pod and significantly reduces costs.

Claims

1. A method for receiving multi-byte data via serial port FIFO based on DSP, characterized in that: The DSP has a timer module and an SCI module, and the SCI module has the function of receiving FIFO, specifically including the following steps: ① Initialize the DSP and configure the SCI and timer modules; ②Suppose that the total length of the data frame to be received is Y bytes, the total length of the receiving array is also Y bytes, the current length of the receiving array is Z, and Z = 0; ③ The system enters a timer interrupt. In the interrupt, the system checks the flag indicating how many bytes the FIFO in the SCI module has received. If the number of bytes N received by the FIFO is greater than 0, the system jumps to step ④; otherwise, the system exits the timer interrupt and jumps to step ③. ④ Determine whether Z+N is greater than or equal to Y. If yes, store YZ bytes of data in the receiving FIFO into the receiving array, Z=Y, and jump to step ⑥; otherwise, store N bytes of data in the receiving FIFO into the receiving array, Z=Z+N, and jump to step ⑤. ⑤ Determine whether the frame header of the received array conforms to the communication protocol. If the frame header of the received array is correct, the system exits the timer interrupt and jumps to step ③; otherwise, the system exits the timer interrupt and jumps to step ②. ⑥ Determine whether the checksum of the received array conforms to the communication protocol. If the checksum of the received array is incorrect, the system exits the timer interrupt and jumps to step ②; otherwise, output the flag indicating successful reception, the system exits the timer interrupt, and data reception ends.

2. The DSP-based serial port FIFO multi-byte data receiving method as described in claim 1, characterized in that: In step ①, the SCI receive FIFO depth is set to 16 bytes, and the timer interrupt frequency is set to X Hz.

3. The DSP-based serial port FIFO multi-byte data receiving method as described in claim 2, characterized in that: X is greater than P / (16*Q), and X is not an integer multiple of P / (16*Q), where P is the baud rate of serial communication, Q is the length of 1 byte, and X is the interrupt frequency of the timer.

4. The DSP-based serial port FIFO multi-byte data receiving method as described in claim 1, characterized in that: In step ②, Y must be greater than 16 in the total length Y bytes of a data frame.

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