A high-frequency LLC converter dynamic adjustment frequency domain analysis control method

Abstract

The application provides a frequency domain analysis control method for dynamic adjustment of a high-frequency LLC converter, in order to reduce the calculation power consumption of a microcontroller, reduce the cost, and optimize the dynamic response speed, the converter is subjected to frequency domain modeling analysis, the average input current is estimated by the voltage of a resonance capacitor, the quantitative relationship between the load current and the resonance voltage is calculated by using the relationship between the average input current and the output current, the mathematical formula of the dynamic adjustment time and the frequency is calculated based on the frequency domain graph of the converter, and the high-frequency half-bridge LLC converter main loop control is realized by programming based on the mathematical formula, the PID control is introduced into the main control loop, the difference between the target frequency and the original frequency is segmented, the segmentation number n is set, and the output voltage overshoot oscillation problem during dynamic adjustment is solved.

Description

Technical Field

[0001] This invention relates to the field of switching power supply loop control technology. Background Technology

[0002] With the large-scale increase in phased array radar array units, the power density requirements of secondary power supply modules in distributed power supply systems are also increasing. High-frequency LLC converters, as a type of resonant converter, have the following advantages: ① They can implement soft-switching technology across the entire load range; ② At high frequencies (above MHz), the power density of the entire circuit is significantly improved, while the overall circuit efficiency is relatively low. However, with the significant increase in switching frequency and the increasingly prominent periodic pulsating load characteristics of phased array radars, the loop control of high-frequency LLC converters is becoming increasingly complex. Various switching losses and circuit conduction losses are also increasing significantly, and the dynamic response time during load switching is deteriorating. Therefore, hybrid loop control methods for high-frequency LLC converters have been extensively researched and applied, especially in applications requiring periodic pulsating load power supply.

[0003] Currently, loop control optimization in high-frequency LLC converters mainly involves three levels: sampling strategy optimization, control strategy optimization, and control algorithm optimization. Sampling strategy optimization relies on hardware such as ADC / DAC and high-speed sampling circuits, which is costly and introduces significant additional losses, leading to reduced circuit efficiency. It also fails to mitigate the dynamic response degradation under periodic pulsating loads. Control strategy optimization primarily involves simplifying complex algorithms and combining various algorithms under different circuit load conditions for loop control. This approach meets the loop control requirements of high-frequency LLC converters to some extent and improves efficiency, but it doesn't address the dynamic response degradation problem under periodic pulsating loads. Control algorithm optimization mainly involves constructing new algorithms through more accurate small-signal modeling and signal integrity analysis, primarily relying on the evolution and simplification of transfer functions. This approach currently focuses more on time-domain analysis and lacks breakthroughs.

[0004] As the secondary power supply modules of phased array radar power supply systems rapidly develop towards higher frequency and higher power density, the dynamic response problem of the periodic pulsating load of phased array units is becoming increasingly serious. Therefore, it is very important and meaningful to enable high-frequency LLC converters to have a better loop control strategy while meeting the requirements of high power density and fast dynamic response of the secondary part of the phased array radar power supply system. Summary of the Invention

[0005] To address the shortcomings of existing high-frequency LLC converter loop control methods and the problem of deteriorated dynamic response under periodic pulsating loads, this invention provides a frequency domain analysis control method for dynamic adjustment of high-frequency LLC converters. This method can optimize the loop control of high-frequency LLC converters, thereby improving their circuit efficiency and alleviating the problem of deteriorated dynamic response under periodic pulsating loads.

[0006] To achieve the above objectives, the present invention adopts the following technical solution:

[0007] At the main loop control level of the high-frequency half-bridge LLC converter, frequency domain modeling and analysis are first performed on the converter. The average input current is directly estimated using the charge voltage of the resonant capacitor. Then, the quantitative relationship between the load current and the resonant voltage of the resonant tank is estimated using the basic relationship between the average input current and the output current. Finally, the direct mathematical relationship between the load adjustment time and the converter frequency and load condition under different loads can be calculated using the geometric relationship corresponding to the frequency domain diagram of the high-frequency half-bridge LLC converter. Based on this mathematical relationship, the converter is programmed to achieve the main loop control of the high-frequency half-bridge LLC converter. When the load changes, PID control is introduced into the main loop control of the high-frequency half-bridge LLC converter for adjustment. The frequency difference between the target frequency calculated by the main loop control algorithm and the original frequency is segmented, and the number of adjustment steps for segmentation is set to n. While ensuring the dynamic adjustment speed, the value of n is also guaranteed, thereby solving the problem of output voltage overshoot oscillation during dynamic adjustment. To facilitate the explanation of this invention, a half-bridge LLC resonant converter circuit is used here as a vehicle to illustrate the dynamically adjusted frequency domain analysis and control method.

[0008] First, the frequency domain analysis and control method of half-bridge LLC resonant converter is explained. Figure 2 The diagram illustrates the application of frequency domain analysis control methods in a half-bridge LLC resonant converter. The circuit mainly consists of a DC source, an upper MOSFET, a lower MOSFET, a resonant inductor, a resonant capacitor, an isolation transformer, a sampling network, a controller, and an output capacitor. Within one operating cycle, assuming the converter's efficiency is ideally 100%, the change in charge in the resonant slot is equivalent to the total charge of the entire resonant converter network. Therefore, the input energy of the entire resonant converter is equal to its output energy. Circuit analysis shows that the energy conversion of the entire converter network within one cycle ends when the parasitic capacitor of the upper MOSFET completes discharge and the parasitic capacitor of the lower MOSFET completes charging. Based on the above, and considering the monotonic voltage variation characteristic of the resonant converter capacitor, the change in charge of its resonant network is calculated as Q. inputConsidering the influence of the parasitic capacitances of the upper and lower MOSFETs in the energy exchange process of the half-bridge LLC converter, the charge of these parasitic capacitances needs to be removed when calculating the input charge. Based on this, the charge change of the new resonant network is Q. input1 The input current I of the entire resonant network of the resonant converter is estimated based on the charge change of the resonant converter. in Based on the symmetry of the resonant capacitor voltage waveform within a complete cycle of the converter, the corresponding input current calculation formula is simplified, and the values ​​of the resonant slot capacitor voltage at times t0 and t2 are calculated. Based on the symmetry of the frequency domain trajectories of the resonant capacitor voltage and resonant current corresponding to the resonant slot of the converter, the resonant capacitor voltage at the moment of load change is calculated. Assuming the load changes from light to heavy load at times t2-t3, the corresponding switching frequency needs to be reduced. The cycle difference under the new load condition is calculated based on the charging formula of the resonant capacitor voltage. Based on this cycle difference, the new switching frequency value under the new load condition can be calculated. Based on the symmetry characteristic, the cycle difference corresponding to the load reduction and the corresponding switching frequency value under the new load condition can also be calculated.

[0009] The high-speed sampling circuit is used to collect the output load current and output voltage of the high-frequency LLC converter cycle by cycle. In actual acquisition, the load voltage and load current are detected separately. First, before the start of each cycle of the converter, the output load current is initially collected and compared with the reference current. Then, the output voltage is collected in the second half of the working cycle and compared with the reference voltage. At the same time, when performing current sampling processing, the microprocessor processes and analyzes the sampled voltage of the previous cycle based on PID control, thereby improving the working efficiency of the microprocessor at high frequency.

[0010] The corresponding algorithm logic is written into the microprocessor, and the sampled values ​​obtained by the hardware circuit are used as the input parameters of the microprocessor to complete the main loop control of the high-frequency LLC converter. The microcontroller's interrupt mechanism is used to mitigate the oscillation problem of the high-frequency LLC converter under large load changes. The specific control method is as follows: Within one cycle, the interrupt entry point is set when the load change difference exceeds a certain threshold. The Ki, Kp, and intergal parameters in the PID control are set according to the target frequency estimated by the main control loop algorithm, and an initial frequency error value (error) is set. A new frequency is calculated based on the formula: Temporary output frequency = Temporary frequency + Kp * error + Ki * intergal. The new error frequency is continuously added and compared with the frequency error threshold. If the frequency error is lower than the set threshold, the output frequency is assigned as the working frequency of the new load. If the frequency error is higher than the set threshold, the process iterates until the requirements are met.

[0011] By introducing the PID control logic described in this invention, voltage overshoot and oscillation issues corresponding to large load changes are mitigated through gradual PID control. Combining these control methods, loop control of the high-frequency half-bridge LLC converter can be achieved, and the dynamic response and output voltage oscillation problems of periodically pulsating loads can be resolved.

[0012] Advantages and significant effects of the present invention:

[0013] 1. All loop controls are implemented using digital control methods, which are more flexible and have higher control precision compared to traditional analog control methods.

[0014] 2. Analyzing the operating state of a high-frequency LLC half-bridge converter from a frequency domain perspective is more intuitive and efficient. Simultaneously, based on this, the period difference under different load steady-state conditions is calculated, and the resonant frequency under new load conditions is determined. This value is directly assigned by the microcontroller, greatly improving the dynamic response speed and enhancing the performance of the main control loop.

[0015] When the load changes significantly, PID control is introduced to intervene and gradually adjust the load. This can suppress output voltage overshoot and oscillation when the load changes over a wide range. Attached Figure Description

[0016] Figure 1 This is a block diagram of the control system of the present invention;

[0017] Figure 2 This is a schematic diagram illustrating the application of frequency domain analysis control methods in a half-bridge LLC resonant converter;

[0018] Figure 3 This is a flowchart of the control program of the present invention. Detailed Implementation

[0019] This invention proposes a frequency domain analysis control method for dynamic adjustment of high-frequency LLC converters. The following logic is used to realize the loop control of high-frequency half-bridge LLC converters and solve the problems of dynamic response and output voltage oscillation of periodic pulsating loads.

[0020] When the LLC resonant converter system starts working, the corresponding load change is not significant. The main control loop begins operation, which rapidly calculates the period difference corresponding to load fluctuations based on the frequency domain characteristics of the high-frequency half-bridge LLC and quickly calculates the target frequency value. Based on the target frequency value, the gate of the high-frequency half-bridge LLC is driven and rapidly adjusted, thereby realizing the closed-loop control of the system and achieving rapid dynamic response to load changes. When the corresponding load change is large, PID control intervenes and performs stepwise control to alleviate voltage overshoot and oscillation problems corresponding to large load changes.

[0021] The technical solution of the present invention will now be described with reference to the accompanying drawings in the embodiments of the present invention:

[0022] like Figure 1 , 2 The control system of this invention includes a half-bridge LLC topology circuit, an output voltage and current acquisition circuit, a microcontroller-based control circuit, and an isolated drive circuit. The DC source Vin, MOSFETs M1 and M2, resonant inductor Lr, resonant capacitor Cr, transformer T1, output capacitor Cout, diodes D3 and D4, and output load Rout constitute the half-bridge LLC resonant converter circuit. Resistors R3 and R4 form the output voltage sampling network. The microcontroller-based control circuit includes analog-to-digital converters ADC0 and ADC1, a logic control unit, and a clock module. The input terminal of ADC0 is connected to the positive output terminal of the output capacitor Cout of the half-bridge LLC topology circuit to detect the output load current value. The input terminal of ADC1 is connected between the output detection voltage divider resistors R1 and R2 to detect the output voltage. One output of the logic control unit is connected to the clock module after passing through the VCO module, and the output of the clock module is connected to the gates of the two MOSFETs on the primary side of the half-bridge LLC topology circuit.

[0023] like Figure 3 The control method of the control system of the present invention is to sample the output load and output voltage of the half-bridge LLC, and perform difference analysis between the sampled and reference values. The corresponding difference analysis is sent to the microprocessor for processing, and the processing result is sent to the drive circuit to drive the gate of the switching transistor of the half-bridge LLC converter to act. Finally, the loop control of the high-frequency half-bridge LLC converter is realized, its loop dynamic response performance is optimized and its output voltage overshoot oscillation problem is solved.

[0024] Includes the following steps:

[0025] Within one operating cycle, assuming the converter's efficiency is ideally 100%, the change in charge in the resonant slot is equivalent to the total charge of the entire resonant converter network. Therefore, the input energy of the entire resonant converter is equal to its output energy. Circuit analysis shows that the energy conversion of the entire converter network within one cycle ends when the parasitic capacitor of the upper transistor completes discharge and the parasitic capacitor of the lower transistor completes charging. Based on the above, and considering the monotonic voltage variation characteristic of the resonant converter capacitor, the charge change of its resonant network is estimated to be Q. input The corresponding estimation formula is as follows, and the corresponding V cr Represents the voltage across the resonant capacitor of the resonant slot:

[0026]

[0027] Considering the influence of the parasitic capacitances of the upper and lower MOSFETs in the energy exchange process of the half-bridge LLC converter, the charge of these parasitic capacitances needs to be removed when calculating the input charge. Based on this, the charge change of the new resonant network is Q. input1 The corresponding calculation formula is as follows:

[0028]

[0029] Based on the above formula 2, the input current of the entire resonant network of the converter is estimated to be I. in The corresponding calculation formula is as follows:

[0030]

[0031]

[0032] Since the resonant capacitor voltage waveform of the converter is symmetrical over a complete cycle, the corresponding input current calculation formula is simplified as follows:

[0033] I in =C r f s (V in -2V Cr (t0))=C r f s (2V Cr (t2)-V in (4)

[0034] The formulas for calculating the corresponding resonant tank capacitor voltage at times t0 and t2 are as follows:

[0035]

[0036]

[0037] Based on the symmetry of the frequency domain trajectories of the resonant capacitor voltage and resonant current corresponding to the resonant slot of the converter, the resonant capacitor voltages at times t3 and t4 can be calculated as follows:

[0038]

[0039]

[0040] Assuming the load changes from light to heavy load between time t2 and t3, the corresponding switching frequency needs to be reduced. Based on the charging formula for the resonant capacitor voltage, the period difference under the new load condition can be calculated. The corresponding period difference calculation formula is as follows:

[0041]

[0042]

[0043] Based on the aforementioned cycle difference, the formula for calculating the new switching frequency under the new load is as follows:

[0044]

[0045] Based on the symmetry characteristic, the corresponding cycle difference when the load decreases and the corresponding switching frequency calculation formula under the new load condition can also be calculated.

[0046] The high-speed sampling circuit is used to collect the output load current and output voltage of the high-frequency LLC converter cycle by cycle. In actual acquisition, the load voltage and load current are detected separately. First, before the start of each cycle of the converter, the output load current is initially collected and compared with the reference current. Then, the output voltage is collected in the second half of the working cycle and compared with the reference voltage. At the same time, when performing current sampling processing, the microprocessor processes and analyzes the sampled voltage of the previous cycle based on PID control, thereby improving the working efficiency of the microprocessor at high frequency.

[0047] The algorithm logic corresponding to steps 6, 7, and 8 above is written into the microprocessor, and the sampled values ​​obtained by the hardware circuit are used as the input parameters of the microprocessor, thereby completing the main loop control of the high-frequency LLC converter.

[0048] To further reduce voltage oscillation issues in high-frequency LLC converters during load switching, PID control is added to the main loop control to implement intervention control during load switching when the load actually changes (large load changes). Based on the target frequency pre-calculated by the main loop control, the difference between the target frequency and the original frequency is calculated, and the PID control is used to achieve gradual control and adjustment based on the frequency difference.

[0049] By utilizing microcontroller interrupts, the oscillation problem of high-frequency LLC converters under large load changes can be mitigated. The specific control method is as follows:

[0050] 1) Within a cycle, the interrupt entry point is defined as the time when the load change difference exceeds a certain threshold (the threshold is designed according to the specific situation);

[0051] 2) Based on the target frequency estimated under the main control loop algorithm, set the Ki, Kp, and intergal parameter values ​​in the PID control, and set the initial frequency error value error at the same time;

[0052] 3) Calculate a new frequency based on the formula: Temporary Output Frequency = Temporary Frequency + Kp * error + Ki * intergal. Simultaneously, continuously add new error frequencies and compare them with the frequency error threshold. If the frequency error is lower than the set threshold, assign the output frequency as the working frequency of the new load. If the frequency error is higher than the set threshold, iterate until the requirements are met. Table 1 compares the control algorithm proposed in this invention with the PID control algorithm under the condition of 1MHz, corresponding to load switching from half load to full load and from full load to half load. The table shows that the control algorithm proposed in this invention improves the dynamic response performance by 67.2%-71% compared to PID control under the same test environment, demonstrating significant optimization. Furthermore, the overshoot under the half-load to full-load condition is less than 5%, effectively mitigating the overshoot oscillation problem of the output voltage under this condition.

[0053] Table 1. Performance Comparison of the Invention and Traditional PID Control Algorithms

[0054] Indicator Name This invention PID algorithm Operating frequency (MHz) 1 1 Output voltage (V) 24 24 Input voltage (V) 400 400 Rated output current (A) 10 10 Maximum output power (W) 240 240 Half-load to full-load overshoot (%) 4.2 4 Response: Full - 50% (μs) Approximately 85 Approximately 300 Response: 50% - Full (μs) Approximately 105 Approximately 320

Claims

1. A frequency domain analysis and control method for dynamic adjustment of a high-frequency LLC converter, characterized in that: The main loop control section of the high-frequency half-bridge LLC converter first performs frequency domain modeling and analysis, estimating the average input current using the voltage of the resonant capacitor. Then, the relationship between the average input current and output current is used to estimate the quantitative relationship between the load current and the resonant voltage. Next, the geometric relationship corresponding to the frequency domain diagram of the high-frequency half-bridge LLC converter is used to calculate the mathematical model between the load adjustment time, the converter frequency, and the load condition. Based on this mathematical model, programming is performed to control the main loop of the high-frequency half-bridge LLC converter. Finally, PID control is introduced into the high-frequency half-bridge LLC converter to segment the frequency difference between the target frequency and the original frequency, selecting the segmentation step number n. Within one working cycle, the converter's efficiency is set to 100%, and the input energy of the resonant converter equals the output energy. Within one cycle, the energy conversion of the converter network ends when the parasitic capacitor of the upper MOSFET completes discharge and the parasitic capacitor of the lower MOSFET completes charging. Based on the settings and the monotonic variation characteristic of the resonant converter capacitor voltage, the charge change of its resonant network is calculated. When actually calculating the input charge, the charge of its parasitic capacitance is removed, and based on this, the new charge change of the resonant network is calculated. The input current of the converter resonant network is calculated based on the charge change of the new resonant network. Based on the fact that the resonant capacitor voltage waveform of the converter is symmetrical within a complete cycle, the calculation formula for the input current of the resonant converter is simplified to obtain a simplified value of the input current. Based on the symmetry of the frequency domain trajectories of the resonant capacitor voltage and resonant current in the converter resonant slot, the resonant capacitor voltage values ​​at different times of load transformation are calculated. The cycle difference under the new load condition is calculated based on the charging formula of the resonant capacitor voltage, and its value is obtained. Based on the above cycle difference, the new switching frequency value under the new load condition is calculated. Based on the symmetry characteristics, the cycle difference corresponding to the load reduction and the corresponding switching frequency value under the new load condition are calculated. The output load current and output voltage of the high-frequency LLC converter are collected cycle by cycle using a high-speed sampling circuit. In actual acquisition, the load voltage and load current are detected separately. First, before the start of each cycle of the converter, the output load current is initially collected and compared with the reference current. The output voltage is collected in the second half of the working cycle and compared with the reference voltage. At the same time, when performing current sampling processing, the microprocessor processes and analyzes the sampled voltage of the previous cycle based on PID control, thereby improving the working efficiency of the microprocessor at high frequencies. PID control is added to the main loop control to realize intervention control when the load is switched. Based on the target frequency calculated in advance by the main loop control, the difference between it and the original frequency is calculated. Based on the frequency difference, PID control is used to realize gradual control and adjustment.

2. The frequency domain analysis and control method for dynamic adjustment of a high-frequency LLC converter according to claim 1 or claim 1, characterized in that: Within a cycle, the time point when the load change difference exceeds a specific threshold is used as the entry point for the interrupt. Based on the target frequency estimated under the main control loop algorithm, the Ki, Kp, and intergal parameter values ​​in the PID control are set, and the initial frequency error value error is set. A new frequency is calculated based on the formula Temporary Output Frequency = Temporary Frequency + Kp * error + Ki * intergal, and the new error frequency is continuously added and compared with the frequency error threshold. If the frequency error is lower than the set threshold, the output frequency is assigned as the working frequency of the new load. If the frequency error is higher than the set threshold, the process iterates until the requirements are met.

3. The frequency domain analysis and control method for dynamic adjustment of a high-frequency LLC converter according to claim 1, characterized in that: The control circuit, centered around a microcontroller, includes analog-to-digital converters ADC0 and ADC1, a logic control unit, and a clock module. The input of ADC0 is connected to the positive terminal of the output capacitor Cout of the half-bridge LLC topology circuit to detect the output load current. The input of ADC1 is connected between the output detection voltage divider resistors R1 and R2 to detect the output voltage. One output of the logic control unit is connected to the clock module after passing through the VCO module, and the output of the clock module is connected to the gates of the two MOSFETs on the primary side of the half-bridge LLC topology circuit.

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