LED device, LED structure and method for preparing the same

Abstract

An LED device, an LED structure and a method for manufacturing the LED structure. The method for manufacturing the LED structure includes: growing a first conductivity type semiconductor layer (3) on a substrate (1); growing an active layer (4) on the first conductivity type semiconductor layer (3), the active layer (4) including a quantum well layer (401), an insertion layer (402) and a barrier layer (403) which are stacked, the insertion layer (402) including a first insertion layer (4021) and a second insertion layer (4022) which are stacked, and a quantum-confined Stark effect is generated between the first insertion layer (4021) and the quantum well layer (401); the materials of the quantum well layer (401), the first insertion layer (4021) and the barrier layer (403) are all III-V group semiconductor materials, and the material of the second insertion layer (4022) contains Si-N bonds and is used to repair the V-shaped defects of the first insertion layer (4021); growing a second conductivity type semiconductor layer (5) on the active layer (4), and the conductivity types of the first conductivity type semiconductor layer (3) and the second conductivity type semiconductor layer (5) are opposite. The present disclosure can prevent the optoelectronic performance of a light-emitting diode (LED) from degrading.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor technology, and in particular, to an LED device, an LED structure, and a method for manufacturing the LED structure. Background Art

[0002] In recent years, light emitting diodes (LEDs) have been widely used in lighting, backlighting, display, and other fields as a new generation of green light sources.

[0003] Currently, a light emitting diode includes a P-type semiconductor layer, an active layer, and an N-type semiconductor layer that are stacked. The N-type semiconductor is used to provide electrons, and the P-type semiconductor is used to provide holes. The electrons provided by the N-type semiconductor and the holes provided by the P-type semiconductor can recombine in the active layer to generate light. However, the optoelectronic performance of this light emitting diode is likely to decrease. Summary of the Invention

[0004] The purpose of the present disclosure is to provide an LED device, an LED structure, and a method for manufacturing the LED structure, which can prevent the optoelectronic performance of the light emitting diode from decreasing.

[0005] According to one aspect of the present disclosure, there is provided a method for manufacturing an LED structure, including:

[0006] Growing a first conductivity type semiconductor layer on a substrate;

[0007] Growing an active layer on the first conductivity type semiconductor layer, the active layer including a quantum well layer, an insertion layer, and a barrier layer that are stacked, the insertion layer including a first insertion layer and a second insertion layer that are stacked, and a quantum-confined Stark effect is generated between the first insertion layer and the quantum well layer; the materials of the quantum well layer, the first insertion layer, and the barrier layer are all III-V semiconductor materials, and the material of the second insertion layer contains Si-N bonds and is used to repair the V-type defects of the first insertion layer;

[0008] Growing a second conductivity type semiconductor layer on the active layer, the conductivity type of the first conductivity type semiconductor layer being opposite to that of the second conductivity type semiconductor layer.

[0009] Further, the material of the quantum well layer is InGaN, the material of the barrier layer is GaN, the material of the first insertion layer is AlGaN or AlInGaN, and the material of the second insertion layer is selected from at least one of SiN, Si-doped AlGaN, Si-doped GaN, and Si-doped AlN.

[0010] Further, the Si-N bonds in the second insertion layer are realized by introducing a silicon source into the reaction chamber, and the silicon source includes silane and / or disilane.

[0011] Further, the growth method of the insertion layer includes:

[0012] While introducing an Al source, a Ga source, ammonia gas, and a carrier gas into the reaction chamber, growing the first insertion layer;

[0013] While introducing an Al source, a Ga source, an Si source, ammonia gas, and a carrier gas into the reaction chamber, growing the second insertion layer, and the material of the second insertion layer is Si-doped AlGaN.

[0014] Further, the growth method of the insertion layer includes:

[0015] While introducing an Al source, a Ga source, ammonia gas, and a carrier gas into the reaction chamber, growing the first insertion layer;

[0016] Closing the Al source and the Ga source, while introducing an Si source, ammonia gas, and a carrier gas into the reaction chamber, growing the second insertion layer, and the material of the second insertion layer is SiN.

[0017] Further, the growth method of the insertion layer includes:

[0018] While introducing an Al source, a Ga source, ammonia gas, and a carrier gas into the reaction chamber, growing the first insertion layer;

[0019] Closing the Al source, while introducing a Ga source, an Si source, ammonia gas, and a carrier gas into the reaction chamber, growing the second insertion layer, and the material of the second insertion layer is Si-doped GaN.

[0020] Further, the growth method of the insertion layer includes:

[0021] While introducing an Al source, a Ga source, ammonia gas, and a carrier gas into the reaction chamber, growing the first insertion layer;

[0022] Closing the Ga source, while introducing an Al source, an Si source, ammonia gas, and a carrier gas into the reaction chamber, growing the second insertion layer, and the material of the second insertion layer is Si-doped AlN.

[0023] Further, the ratio of the molar rate of the Si source to the molar rate of the Ga source is 1 / 107 - 1 / 105.

[0024] Further, the ratio of the growth time of one second insertion layer to the growth time of the insertion layer is 1 / 100 - 1 / 5.

[0025] According to one aspect of the present disclosure, there is provided an LED structure, including:

[0026] The active layer includes a quantum well layer, an insertion layer, and a barrier layer which are stacked. The insertion layer includes a first insertion layer and a second insertion layer which are stacked. A quantum-confined Stark effect is generated between the first insertion layer and the quantum well layer. The materials of the quantum well layer, the first insertion layer, and the barrier layer are all III-V semiconductor materials. The material of the second insertion layer contains Si-N bonds and is used to repair the V-type defects in the first insertion layer.

[0027] Further, the material of the quantum well layer is InGaN, the material of the barrier layer is GaN, the material of the first insertion layer is AlGaN or AlInGaN, and the material of the second insertion layer is selected from at least one of SiN, Si-doped AlGaN, Si-doped GaN, and Si-doped AlN.

[0028] Further, the insertion layer includes a plurality of the first insertion layers and a plurality of the second insertion layers, and the first insertion layers and the second insertion layers are alternately distributed.

[0029] According to one aspect of the present disclosure, an LED device is provided, including the above-mentioned LED structure.

[0030] For the LED device, LED structure, and preparation method of the LED structure of the present disclosure, the active layer includes a quantum well layer, an insertion layer, and a barrier layer which are stacked. The insertion layer includes a first insertion layer and a second insertion layer which are stacked. A quantum-confined Stark effect is generated between the first insertion layer and the quantum well layer. The Si-N bonds in the material of the second insertion layer can repair the V-type defects in the first insertion layer formed due to the lattice mismatch between the material of the first insertion layer and the material of the quantum well layer, thereby being able to solve the problem of the reduction in the optoelectronic performance of the light-emitting diode caused by the lattice mismatch between the first insertion layer and the quantum well layer and prevent the reduction in the optoelectronic performance of the light-emitting diode. Description of the Drawings

[0031] Figure 1 is a schematic diagram of a light-emitting diode in the related art;

[0032] Figure 2 is a flowchart of the preparation method of the LED structure according to Embodiment 1 of the present disclosure;

[0033] Figure 3 is a schematic diagram of the LED structure according to Embodiment 1 of the present disclosure;

[0034] Figure 4 is another schematic diagram of the LED structure according to Embodiment 1 of the present disclosure;

[0035] Figure 5 is a schematic diagram of the insertion layer in the LED structure according to Embodiment 1 of the present disclosure;

[0036] Figure 6It is a schematic diagram of the insertion layer in the LED structure of Embodiment 5 of the present disclosure.

[0037] Explanation of reference numerals: 1, substrate; 2, buffer layer; 3, first conductivity type semiconductor layer; 4, active layer; 401, quantum well layer; 402, insertion layer; 4021, first insertion layer; 4022, second insertion layer; 403, barrier layer; 5, second conductivity type semiconductor layer. Detailed implementation manners

[0038] Here, the exemplary embodiments will be described in detail, and the examples are shown in the drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. On the contrary, they are merely examples of devices consistent with some aspects of the present disclosure as detailed in the appended claims.

[0039] The terms used in the present disclosure are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure. Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be the ordinary meanings understood by those of ordinary skill in the field to which the present disclosure belongs. The "first", "second" and similar terms used in the specification and claims of the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, the terms such as "a" or "one" do not indicate a quantity limitation, but indicate that there is at least one. "Plurality" or "several" means two or more. Unless otherwise specified, the terms such as "front part", "rear part", "lower part" and / or "upper part" are only for convenience of description and are not limited to a position or a spatial orientation. The terms such as "include" or "comprise" mean that the elements or items appearing before "include" or "comprise" cover the elements or items listed after "include" or "comprise" and their equivalents, and do not exclude other elements or items. The terms such as "connect" or "couple" are not limited to physical or mechanical connections, and may include electrical connections, whether direct or indirect. The singular forms of "a", "the" and "said" used in the specification and claims of the present disclosure are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more of the associated listed items.

[0040] In the related art, such as Figure 1As shown, a light-emitting diode (LED) includes a first-conductivity-type semiconductor layer 3, an active layer 4, and a second-conductivity-type semiconductor layer 5 which are stacked. The active layer 4 includes a quantum well layer 401 and a barrier layer 403. The material of the quantum well layer 401 is InGaN, and the material of the barrier layer 403 is GaN. In order to enable the light-emitting diode to generate light with a longer wavelength, the content of In component in the quantum well layer 401 is often increased, and an insertion layer 402 is formed between the quantum well layer 401 and the barrier layer 403 using AlGaN. A quantum-confined Stark effect (QCSE) is generated between the insertion layer 402 and the quantum well layer 401, narrowing the bandgap of the quantum well to increase the emission wavelength. However, the lattice constant of the 100 crystal orientation of the material of the quantum well layer 401 is relatively large, and the lattice constant of the 100 crystal orientation of the material of the insertion layer 402 is relatively small. There is a large lattice mismatch problem between the material of the insertion layer 402 and the material of the quantum well layer 401, resulting in poor lattice quality of the epitaxially grown material of the insertion layer 402 and generating V-type defects. As the thickness of the insertion layer 402 increases, the V-type defects in the material of the insertion layer 402 will be amplified and form pits or holes, causing the In component in the material of the quantum well layer 401 to decompose and precipitate and escape during the subsequent high-temperature epitaxial growth process, affecting the uniformity of the In component and at the same time reducing the content of the In component in the material of the quantum well layer 401, thereby reducing the optoelectronic performance of the light-emitting diode (LED).

[0041] Embodiment 1

[0042] Figure 2 is a flowchart of a method for preparing an LED structure according to Embodiment 1 of the present disclosure. Figure 3 and Figure 4 is a schematic diagram of an LED structure according to Embodiment 1 of the present disclosure. Figure 5 is a schematic diagram of an insertion layer in an LED structure according to Embodiment 1 of the present disclosure.

[0043] As Figure 2 shown, the method for preparing an LED structure according to Embodiment 1 may include steps S100 to S120, where:

[0044] Step S100: Grow a first-conductivity-type semiconductor layer on a substrate.

[0045] Step S110: Grow an active layer on the first-conductivity-type semiconductor layer. The active layer includes a quantum well layer, an insertion layer, and a barrier layer which are stacked. The insertion layer includes a first insertion layer and a second insertion layer which are stacked. A quantum-confined Stark effect is generated between the first insertion layer and the quantum well layer; the materials of the quantum well layer, the first insertion layer, and the barrier layer are all III-V group semiconductor materials, and the material of the second insertion layer contains Si-N bonds and is used to repair the V-type defects of the first insertion layer.

[0046] Step S120: Grow a second-type semiconductor layer on the active layer. The conductivity type of the first-type semiconductor layer is opposite to that of the second-type semiconductor layer.

[0047] The manufacturing method of the LED structure of this embodiment is as Figures 3 to 5 shown. The active layer 4 includes a quantum well layer 401, an insertion layer 402, and a barrier layer 403 that are stacked. The insertion layer 402 includes a first insertion layer 4021 and a second insertion layer 4022 that are stacked. A quantum-confined Stark effect is generated between the first insertion layer 4021 and the quantum well layer 401. The Si-N bonds in the material of the second insertion layer 4022 can repair the V-type defects in the first insertion layer 4021 formed due to the lattice mismatch between the material of the first insertion layer 4021 and the material of the quantum well layer 401, thereby solving the problem of the reduction in the optoelectronic performance of the light-emitting diode caused by the lattice mismatch between the first insertion layer 4021 and the quantum well layer 401, and preventing the reduction in the optoelectronic performance of the light-emitting diode.

[0048] The following details each step of this embodiment:

[0049] In step S100, grow a first-type semiconductor layer on a substrate.

[0050] As Figure 3 shown, the substrate 1 can be one of a sapphire substrate 1, a silicon carbide substrate 1, and a silicon substrate 1, and this embodiment does not limit this. In addition, before forming the first-type semiconductor layer 3, this embodiment can also form a buffer layer 2 on the substrate 1. The first-type semiconductor layer 3 can be grown on the buffer layer 2. Among them, the first-type semiconductor layer 3 can be formed in a reaction chamber, and its forming process can include: atomic layer deposition (ALD, Atomic layer deposition), or chemical vapor deposition (CVD, Chemical Vapor Deposition), or molecular beam epitaxy (MBE, Molecular Beam Epitaxy), or plasma-enhanced chemical vapor deposition (PECVD, Plasma Enhanced Chemical Vapor Deposition), or low-pressure chemical vapor deposition (LPCVD, Low Pressure Chemical Vapor Deposition), or metal organic chemical vapor deposition, or a combination thereof. The buffer layer 2 and the first-type semiconductor layer 3 can both be group III-V semiconductor materials, such as GaN, etc. Among them, the material of the first-type semiconductor layer 3 can be N-type GaN.

[0051] In step S110, an active layer is grown on the first-conductivity-type semiconductor layer. The active layer includes a quantum well layer, an insertion layer, and a barrier layer which are stacked. The insertion layer includes a first insertion layer and a second insertion layer which are stacked. A quantum-confined Stark effect is generated between the first insertion layer and the quantum well layer. The materials of the quantum well layer, the first insertion layer, and the barrier layer are all III-V semiconductor materials. The material of the second insertion layer contains Si-N bonds and is used to repair the V-shaped defects of the first insertion layer.

[0052] As Figure 3 shown, the active layer 4 can be a single quantum well structure, which includes a quantum well layer 401, an insertion layer 402, and a barrier layer 403. Of course, as Figure 4 shown, the active layer 4 can also be a multi-quantum well structure, where the quantum well layer 401 and the barrier layer 403 are alternately arranged, and an insertion layer 402 is provided between any adjacent quantum well layer 401 and barrier layer 403. The material of the quantum well layer 401 can be InGaN, and the material of the barrier layer 403 can be GaN, but the embodiments of the present disclosure do not make special limitations on this. The formation process of the quantum well layer 401 and the barrier layer 403 can refer to the formation process of the first-conductivity-type semiconductor layer 3.

[0053] As Figure 5 shown, the insertion layer 402 includes a first insertion layer 4021 and a second insertion layer 4022 which are stacked. Among them, the top and bottom of the insertion layer 402 are both the first insertion layer 4021. A quantum-confined Stark effect (QCSE) is generated between the first insertion layer 4021 and the quantum well layer 401, narrowing the bandgap of the quantum well to increase the emission wavelength. The material of the first insertion layer 4021 can be AlGaN or AlInGaN. The material of the second insertion layer 4022 can be Si-doped AlGaN. Taking the material of the quantum well layer 401 as InGaN as an example, the Si-N bonds in the material of the second insertion layer 4022 can repair the V-shaped defects in the first insertion layer 4021 formed due to the lattice mismatch between the material of the first insertion layer 4021 and the material of the quantum well layer 401, avoiding the formation of pits or holes in the above-mentioned V-shaped defects, and preventing the In component in the material of the quantum well layer 401 from decomposing and precipitating during the subsequent high-temperature epitaxial growth process.

[0054] As Figure 5As shown, the formation processes of the first insertion layer 4021 and the second insertion layer 4022 may refer to the formation process of the first-conductivity-type semiconductor layer 3. Among them, the Si-N bonds in the second insertion layer 4022 are achieved by introducing a silicon source into the reaction chamber. The silicon source may include silane and / or disilane, but the embodiments of the present disclosure do not make special limitations thereto. For example, taking the material of the first insertion layer 4021 as AlGaN, the growth method of the insertion layer 402 may include: simultaneously introducing an Al source, a Ga source, ammonia gas, and a carrier gas into the reaction chamber to grow the first insertion layer 4021; simultaneously introducing an Al source, a Ga source, an Si source, ammonia gas, and a carrier gas into the reaction chamber to grow the second insertion layer 4022. Among them, the ratio of the molar rate of introducing the Si source to the molar rate of introducing the Ga source may be 1 / 107 - 1 / 105, such as 1 / 107, 1 / 106, 1 / 105, etc. The ratio of the growth time of one second insertion layer 4022 to the growth time of the insertion layer 402 may be 1 / 100 - 1 / 5, such as 1 / 100, 1 / 60, 1 / 20, 1 / 5, etc. Optionally, the ratio of the molar rate of introducing the Si source to the molar rate of introducing the Ga source during the growth of the first insertion layer 4021 may be 1 / 107 - 1 / 105. The molar rate of introducing the Ga source during the growth of the first insertion layer 4021 may be the same as the molar rate of introducing the Ga source during the growth of the second insertion layer 4022.

[0055] In step S120, a second-conductivity-type semiconductor layer is grown on the active layer, and the conductivity types of the first-conductivity-type semiconductor layer and the second-conductivity-type semiconductor layer are opposite.

[0056] As Figure 3 and Figure 4 shown, the second-conductivity-type semiconductor layer 5 may be a group III-V semiconductor material, such as GaN, etc. Taking the material of the first-conductivity-type semiconductor layer 3 as N-type GaN, the material of the second-conductivity-type semiconductor layer 5 may be P-type GaN. The formation process of the second-conductivity-type semiconductor layer 5 may refer to the formation process of the first-conductivity-type semiconductor layer 3.

[0057] As Figures 3 to 5 shown, the LED structure prepared in this embodiment may include an active layer 4. The active layer 4 may include a quantum well layer 401, an insertion layer 402, and a barrier layer 403 which are stacked. The insertion layer 402 includes a first insertion layer 4021 and a second insertion layer 4022 which are stacked, and a quantum-confined Stark effect is generated between the first insertion layer 4021 and the quantum well layer 401. The materials of the quantum well layer 401, the first insertion layer 4021, and the barrier layer 403 are all group III-V semiconductor materials. The material of the second insertion layer 4022 contains Si-N bonds and is used to repair the V-type defects of the first insertion layer 4021.

[0058] Example Two

[0059] The LED structure and the preparation method of the LED structure in the second embodiment of the present disclosure are substantially the same as those of the LED structure and the preparation method of the LED structure in the first embodiment of the present disclosure, and the difference lies only in the growth method of the insertion layer and the material of the second insertion layer in the insertion layer. Among them, the material of the second insertion layer in the LED structure of the second embodiment of the present disclosure may be Si-doped GaN, and the growth method of the insertion layer may be: simultaneously introducing an Al source, a Ga source, ammonia gas, and a carrier gas into the reaction chamber to grow the first insertion layer; closing the Al source, and simultaneously introducing a Ga source, an Si source, ammonia gas, and a carrier gas into the reaction chamber to grow the second insertion layer.

[0060] Example Three

[0061] The LED structure and the preparation method of the LED structure in the third embodiment of the present disclosure are substantially the same as those of the LED structure and the preparation method of the LED structure in the first embodiment of the present disclosure, and the difference lies only in the growth method of the insertion layer and the material of the second insertion layer in the insertion layer. Among them, the material of the second insertion layer in the LED structure of the third embodiment of the present disclosure may be Si-doped AlN, and the growth method of the insertion layer may be: simultaneously introducing an Al source, a Ga source, ammonia gas, and a carrier gas into the reaction chamber to grow the first insertion layer; closing the Ga source, and simultaneously introducing an Al source, an Si source, ammonia gas, and a carrier gas into the reaction chamber to grow the second insertion layer.

[0062] Example Four

[0063] The LED structure and the preparation method of the LED structure in the fourth embodiment of the present disclosure are substantially the same as those of the LED structure and the preparation method of the LED structure in the first embodiment of the present disclosure, and the difference lies only in the growth method of the insertion layer and the material of the second insertion layer in the insertion layer. Among them, the material of the second insertion layer in the LED structure of the fourth embodiment of the present disclosure may be SiN, and the growth method of the insertion layer may be: simultaneously introducing an Al source, a Ga source, ammonia gas, and a carrier gas into the reaction chamber to grow the first insertion layer; closing the Al source and the Ga source, and simultaneously introducing an Si source, ammonia gas, and a carrier gas into the reaction chamber to grow the second insertion layer.

[0064] Example Five

[0065] Figure 6 It is a schematic diagram of the insertion layer in the LED structure of the fifth embodiment of the present disclosure. The LED structure and the preparation method of the LED structure in the fifth embodiment of the present disclosure are substantially the same as those of the LED structure and the preparation method of the LED structure in any one of the first to fourth embodiments of the present disclosure, and the difference lies only in the structure of the insertion layer. As Figure 6As shown, the insertion layer 402 of the fifth embodiment of the present disclosure may include a plurality of first insertion layers 4021 and a plurality of second insertion layers 4022, and the first insertion layers 4021 and the second insertion layers 4022 are alternately arranged. Among them, the number of the second insertion layers 4022 may be 2 - 20, such as 2, 4, 6, 9, 17, 20, etc. The materials of the plurality of second insertion layers 4022 are the same.

[0066] Embodiment Six

[0067] The LED structure and the manufacturing method of the LED structure of the sixth embodiment of the present disclosure are substantially the same as those of the fifth embodiment of the present disclosure, with the only difference being that: for the plurality of second insertion layers of the sixth embodiment of the present disclosure, the materials of two second insertion layers are different, and the material of any second insertion layer is selected from one of SiN, Si-doped AlGaN, Si-doped GaN, and Si-doped AlN.

[0068] Embodiment Seven

[0069] The seventh embodiment of the present disclosure provides an LED device. The LED device may include the LED structure in any one of the first to sixth embodiments. Of course, the LED device may further include a first electrode electrically connected to the first-conductive-type semiconductor layer and a second electrode electrically connected to the second-conductive-type semiconductor layer. Since the LED structure included in the LED device of the seventh embodiment of the present disclosure is the same as the LED structures in the above embodiments, it has the same beneficial effects, which will not be elaborated herein.

[0070] The above is only the preferred embodiment of the present disclosure, and does not impose any formal restrictions on the present disclosure. Although the present disclosure has been disclosed in the above preferred embodiment, it is not intended to limit the present disclosure. Any person skilled in the art can make some changes or modifications to equivalent embodiments by using the disclosed technical content within the scope of the technical solution of the present disclosure. However, as long as it does not depart from the technical content of the present disclosure, any simple modification, equivalent change, and modification made to the above embodiments according to the technical essence of the present disclosure still fall within the scope of the technical solution of the present disclosure.

Claims

1. A method for preparing an LED structure, characterized in that, Comprising: Growing a first conductivity type semiconductor layer (3) on a substrate (1); Growing an active layer (4) on the first conductivity type semiconductor layer (3), the active layer (4) including a quantum well layer (401), an insertion layer (402), and a barrier layer (403) arranged in a stacked manner, the insertion layer (402) including a first insertion layer (4021) and a second insertion layer (4022) arranged in a stacked manner, a quantum-confined Stark effect is generated between the first insertion layer (4021) and the quantum well layer (401) to narrow the bandgap of the quantum well and improve the emission wavelength; the materials of the quantum well layer (401), the first insertion layer (4021), and the barrier layer (403) are all III-V group semiconductor materials, and the material of the second insertion layer (4022) contains Si-N bonds for repairing V-type defects of the first insertion layer (4021); Growing a second conductivity type semiconductor layer (5) on the active layer (4), the conductivity type of the first conductivity type semiconductor layer (3) is opposite to that of the second conductivity type semiconductor layer (5).

2. The manufacturing method of the LED structure according to claim 1, characterized in that, The material of the quantum well layer (401) is InGaN, the material of the barrier layer (403) is GaN, the material of the first insertion layer (4021) is AlGaN or AlInGaN, and the material of the second insertion layer (4022) is selected from at least one of SiN, Si-doped AlGaN, Si-doped GaN, and Si-doped AlN.

3. The manufacturing method of the LED structure according to claim 1 or 2, characterized in that, The Si-N bonds in the second insertion layer (4022) are achieved by introducing a silicon source into the reaction chamber, and the silicon source includes silane and / or disilane.

4. The method for preparing the LED structure according to claim 2, wherein The growth method of the insertion layer (402) includes: Simultaneously introducing an Al source, a Ga source, ammonia gas, and a carrier gas into the reaction chamber to grow the first insertion layer (4021); Simultaneously introducing an Al source, a Ga source, a Si source, ammonia gas, and a carrier gas into the reaction chamber to grow the second insertion layer (4022), and the material of the second insertion layer (4022) is Si-doped AlGaN.

5. The manufacturing method of the LED structure according to claim 2, characterized in that, The growth method of the insertion layer (402) includes: Simultaneously introducing an Al source, a Ga source, ammonia gas, and a carrier gas into the reaction chamber to grow the first insertion layer (4021); Closing the Al source and the Ga source, and simultaneously introducing a Si source, ammonia gas, and a carrier gas into the reaction chamber to grow the second insertion layer (4022), and the material of the second insertion layer (4022) is SiN.

6. The manufacturing method of the LED structure according to claim 2, characterized in that, The growth method of the insertion layer (402) includes: Simultaneously introducing an Al source, a Ga source, ammonia gas, and a carrier gas into the reaction chamber to grow the first insertion layer (4021); Closing the Al source, and simultaneously introducing a Ga source, a Si source, ammonia gas, and a carrier gas into the reaction chamber to grow the second insertion layer (4022), and the material of the second insertion layer (4022) is Si-doped GaN.

7. The manufacturing method of the LED structure according to claim 2, characterized in that, The growth method of the insertion layer (402) includes: Simultaneously introducing an Al source, a Ga source, ammonia gas, and a carrier gas into the reaction chamber to grow the first insertion layer (4021); Turn off the Ga source, and simultaneously introduce an Al source, an Si source, ammonia gas, and a carrier gas into the reaction chamber to grow the second insertion layer (4022), and the material of the second insertion layer (4022) is Si-doped AlN.

8. The preparation method of the LED structure according to any one of claims 4-7, characterized in that The ratio of the molar rate of the Si source to the molar rate of the Ga source is 1 / 107 - 1 / 105.

9. The manufacturing method of the LED structure according to any one of claims 4-7, characterized in that, The ratio of the growth time of one of the second insertion layers (4022) to the growth time of the insertion layer (402) is 1 / 100 - 1 / 5.

10. An LED structure, characterized in that, Comprising: An active layer (4), including a quantum well layer (401), an insertion layer (402), and a barrier layer (403) stacked. The insertion layer (402) includes a first insertion layer (4021) and a second insertion layer (4022) stacked. A quantum-confined Stark effect is generated between the first insertion layer (4021) and the quantum well layer (401), narrowing the bandgap of the quantum well to increase the emission wavelength. The materials of the quantum well layer (401), the first insertion layer (4021), and the barrier layer (403) are all III-V group semiconductor materials, and the material of the second insertion layer (4022) contains Si-N bonds for repairing the V-type defects of the first insertion layer (4021).

11. The LED structure according to claim 10, characterized in that, The material of the quantum well layer (401) is InGaN, the material of the barrier layer (403) is GaN, the material of the first insertion layer (4021) is AlGaN or AlInGaN, and the material of the second insertion layer (4022) is selected from at least one of SiN, Si-doped AlGaN, Si-doped GaN, and Si-doped AlN.

12. The LED structure according to claim 10, wherein The insertion layer (402) includes a plurality of the first insertion layers (4021) and a plurality of the second insertion layers (4022), and the first insertion layers (4021) and the second insertion layers (4022) are alternately distributed.

13. An LED device, characterized in that, Comprising the LED structure according to any one of claims 10 - 12.

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