Handshaking system, method and related device for three-dimensional convolutional neural network
By optimizing data block storage and retrieval using register groups and comparators in a three-dimensional convolutional neural network, the problem of low handshake efficiency between the DMA transport module and the computing module is solved, achieving more efficient data processing.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHENZHEN INTELLIFUSION TECHNOLOGIES CO LTD
- Filing Date
- 2021-12-31
- Publication Date
- 2026-06-23
AI Technical Summary
In 3D convolutional neural networks, the handshake efficiency between the DMA transport module and the computation module is low, resulting in excessive computational latency and making it difficult to effectively process 3D convolutional data.
By employing a register set and comparator design, and comparing the recorded handshake data with the data from a 3D convolutional neural network, the storage and retrieval process of data blocks is optimized, thereby improving the efficiency of data block recording.
By quickly determining whether the cached data block contains the required data, the amount of data processing is reduced, handshake efficiency is improved, and computation latency is reduced.
Smart Images
Figure CN116432706B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of data processing, and in particular to a handshake system, method and related equipment for a three-dimensional convolutional neural network. Background Technology
[0002] Convolutional neural networks (CNNs) are a highly efficient recognition method that has emerged in recent years and attracted widespread attention, demonstrating outstanding performance in large-scale image processing. Because this network avoids complex preprocessing of images and can directly input the original image, it has gained wider application.
[0003] Convolutional neural networks (CNNs) are generally composed of convolutional layers, pooling layers, and fully connected layers (FC layers). CNNs are well-suited for processing two-dimensional planar images. However, the demand for processing spherical images is increasing. Examples include comprehensive visual processing of drones, robots, autonomous vehicles, molecular regression problems, and global weather and climate models. Three-dimensional convolution is typically used with multi-frame data and output frames, performing convolution operations simultaneously on the entire channel of k consecutive frames.
[0004] In recent years, three-dimensional convolutional deep neural networks have developed rapidly. Experiments have shown that three-dimensional convolutional deep neural networks are a good feature learner that can simultaneously simulate appearance and motion.
[0005] As can be seen from the above description, 3D convolution has one more dimension than traditional 2D convolution. The input image of traditional 2D convolution is generally channel, height, and width; while the input image of 3D convolution is channel, depth, height, and width, which is an additional dense dimension compared to 2D convolution.
[0006] In hardware design, 3D convolution computation modules generally require DMA (Direct Memory Access) to move data from DDR or on-chip memory to the computation buffer, ensuring computation speed. However, moving data from one dimension at a time with DMA presents a problem: 3D convolution requires data across three dimensions, and if the data volume in one dimension is too large, subsequent computation modules may be unable to proceed, as they require data from all three dimensions. This results in significant latency, or excessive computation delay.
[0007] Another design approach is to move a portion of the width data first, then switch to the height dimension to move another portion of the data, then switch to the dense dimension and the channel dimension, then switch back to the width dimension, and so on. This method can greatly reduce computational latency, but how to achieve a fast handshake between the subsequent computation module and the front-end DMA transport module has become an urgent problem to be solved. Summary of the Invention
[0008] This invention provides a handshake method, apparatus, computer device, and storage medium for a three-dimensional convolutional neural network, to improve the efficiency of successful handshake between subsequent computing modules and the preceding DMA transport module.
[0009] To address the aforementioned technical problems, this application provides a handshake system for a three-dimensional convolutional neural network, comprising: a DMA transport component and a data computation component, electrically connected to each other; the DMA transport component including at least three register groups, which are sequentially connected in series; and each register group having at least three comparators connected to it.
[0010] The register group is used to record handshake data information;
[0011] The comparators connected to the register group are used to compare the handshake data information in the register with the data information of one dimension in the three-dimensional convolutional neural network.
[0012] To address the aforementioned technical problems, embodiments of this application provide a handshake method for a three-dimensional convolutional neural network, comprising:
[0013] Acquire the data to be transferred, and write the data to be transferred into a cache in data blocks of a preset size as cache data blocks;
[0014] According to the preset storage method, the size of the cached data block is written to the register group to obtain the data block record information;
[0015] Upon receiving a data processing request, the required data information, including three-dimensional coordinates, is obtained from the data processing request.
[0016] Based on the three-dimensional coordinates and the data block record information, determine whether the cached data block contains data corresponding to the required data information;
[0017] If the cached data block contains data corresponding to the required data information, a response signal indicating that valid data exists in the cached data block is generated.
[0018] Optionally, writing the data to be transferred into a cache in data blocks of a preset size, as cached data blocks, includes:
[0019] The data to be transported is divided into data blocks of a preset size to obtain each transport block;
[0020] For each transport block, it is written to the cache sequentially along the first dimension, the second dimension, and the third dimension to obtain the cache data block.
[0021] Optionally, the data block record information structure is a triple, wherein the first element of the triple is the total size of the first dimension, the second element of the triple is the total size of the second dimension, and the third element of the triple is the total size of the third dimension.
[0022] Optionally, the step of writing the size of the cached data block to the register group according to a preset storage method to obtain the data block record information includes:
[0023] Each time a data block is successfully cached, the data block record information in the first register group is updated based on the size of the cached data block;
[0024] The data block record information in the first register group is compared with a preset first dimension threshold. If the first preset condition is met, the data block record information in the first register group is transferred to the second register group, and the data block record information in the first register group is reset.
[0025] The data block record information in the first register group is compared with a preset second dimension threshold. If the second preset condition is met, the data block record information in the first register group is transferred to the third register group, and the data block record information in the first register group is reset.
[0026] Optionally, determining whether the cached data block contains data corresponding to the required data information based on the three-dimensional coordinates and the data block record information includes:
[0027] For each register group, each element in the three-dimensional coordinates is compared with the corresponding scale of the data block size stored in the register group, and a bitwise AND operation is performed to obtain the logical value corresponding to each register group. If at least one of the logical values corresponding to the register group is true, it is determined that the cached data block contains the data corresponding to the required data information; otherwise, it is determined that the cached data block does not contain the data corresponding to the required data information.
[0028] To address the aforementioned technical problems, this application also provides a handshake device for a three-dimensional convolutional neural network, comprising:
[0029] The data block writing module is used to acquire the data to be transferred and write the data to be transferred into a cache in data blocks of a preset size as cache data blocks;
[0030] The data block information storage module is used to write the size of the cached data block into the register group according to a preset storage method to obtain data block record information;
[0031] The request receiving module is used to obtain the required data information from the data processing request when it receives the data processing request. The required data information includes three-dimensional coordinates.
[0032] The comparison query module is used to determine whether the cached data block contains data corresponding to the required data information based on the three-dimensional coordinates and the data block record information;
[0033] The request-response module is used to generate a response signal indicating that valid data exists in the cached data block if the cached data block contains data corresponding to the requested data information.
[0034] Optionally, the data block writing module includes:
[0035] The data partitioning unit is used to divide the data to be transported into data blocks of a preset size to obtain each transport block;
[0036] The cache writing unit is used to write to the cache sequentially along the first dimension, the second dimension, and the third dimension for each transport block to obtain the cache data block.
[0037] Optionally, the preset size corresponding to the cached data block is (ci_num, h_num, d_num), and the data block information storage module includes:
[0038] The data block update unit is used to update the data block record information in the first register group based on the size of the cached data block each time the data block is successfully cached;
[0039] The first storage unit is used to compare the data block record information in the first register group with a preset first dimension threshold. If the first preset condition is met, the data block record information in the first register group is transferred to the second register group, and the data block record information in the first register group is reset.
[0040] The second storage unit compares the data block record information in the first register group with a preset second dimension threshold. If the second preset condition is met, the data block record information in the first register group is transferred to the third register group, and the data block record information in the first register group is reset.
[0041] Optionally, the comparison query module includes:
[0042] Logical value calculation unit, used for
[0043] For each register group, each element in the three-dimensional coordinates is compared with the corresponding scale of the size of the data block stored in the register group, and a bitwise AND operation is performed to obtain the logical value corresponding to each register group.
[0044] The result determination unit is configured to determine that if at least one logical value corresponding to the register group is true, the cached data block contains the data corresponding to the required data information; otherwise, the cached data block does not contain the data corresponding to the required data information.
[0045] To address the aforementioned technical problems, this application also provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the steps of the handshake method for the three-dimensional convolutional neural network described above.
[0046] To address the aforementioned technical problems, this application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the handshake method for the three-dimensional convolutional neural network described above.
[0047] The handshake system, method, apparatus, computer device, and storage medium for a three-dimensional convolutional neural network provided in this invention acquire the data to be transferred and write it into a cache in a data block of a preset size as a cache data block; according to a preset storage method, the size of the cache data block is written to a register group to obtain data block record information; when a data operation request is received, the required data information, including three-dimensional coordinates, is obtained from the data operation request; based on the three-dimensional coordinates and the data block record information, it is determined whether the cache data block contains data corresponding to the required data information; if the cache data block contains data corresponding to the required data information, a response signal indicating the presence of valid data in the cache data block is generated. This achieves the goal of recording the data size during caching to determine the progress of data storage, thereby quickly calculating whether to cache the required data without traversing and searching through the data, reducing the amount of data operation and improving handshake efficiency. Attached Figure Description
[0048] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0049] Figure 1 This is a flowchart of an embodiment of the handshake system of the three-dimensional convolutional neural network of this application;
[0050] Figure 2 This is a flowchart of an embodiment of the handshake method for a three-dimensional convolutional neural network according to this application;
[0051] Figure 3 This is a schematic diagram of the structure of one embodiment of the handshake device for a three-dimensional convolutional neural network according to this application;
[0052] Figure 4 This is a schematic diagram of the structure of one embodiment of the computer device according to this application. Detailed Implementation
[0053] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein in the specification of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application; the terms "comprising" and "having," and any variations thereof, in the specification, claims, and foregoing drawings of this application, are intended to cover non-exclusive inclusion. The terms "first," "second," etc., in the specification, claims, or foregoing drawings of this application are used to distinguish different objects, not to describe a particular order.
[0054] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0055] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0056] Please see Figure 1 , Figure 1 This application illustrates a handshake system for a three-dimensional convolutional neural network, comprising: a DMA transport component and a data computation component, electrically connected to each other; the DMA transport component including at least three register groups connected serially in sequence; and each register group having at least three comparators connected to it.
[0057] The register set is used to record handshake data information;
[0058] The comparators in the register group are used to compare the handshake data in the registers with the data in one dimension of the three-dimensional convolutional neural network.
[0059] Please see Figure 2 , Figure 2 A handshake method for a three-dimensional convolutional neural network provided by an embodiment of the present invention is illustrated below:
[0060] S201: Obtain the data to be transferred and write the data to be transferred into a data block of preset size into a cache as a cache data block.
[0061] The preset size can be selected based on the size of the data to be transferred and the processor's execution capability; no specific limitation is made here.
[0062] Optionally, the data to be transferred is written to the cache in data blocks of a preset size. The cached data blocks include:
[0063] The data to be transferred is divided into data blocks of a preset size to obtain each transfer block;
[0064] For each transport block, write it to the cache sequentially along the first, second, and third dimensions to obtain a cache data block.
[0065] S202: Write the size of the cached data block to the register group according to the preset storage method to obtain the data block record information.
[0066] Preferably, the data block record information structure is (ci_cnt, h_cnt, d_cnt), where ci_cnt is the total size of the first dimension, h_cnt is the total size of the second dimension, and d_cnt is the total size of the third dimension.
[0067] Preferably, the preset size corresponding to the cached data block is (ci_num, h_num, d_num). According to the preset storage method, the size of the cached data block is written to the register group, and the data block record information obtained includes:
[0068] Each time a data block is successfully cached, the data block record information in the first register group is updated based on the size of the cached data block;
[0069] The data block record information in the first register group is compared with the preset first dimension threshold. If the first preset condition is met, the data block record information in the first register group is transferred to the second register group, and the data block record information in the first register group is reset.
[0070] The data block record information in the first register group is compared with the preset second dimension threshold. If the second preset condition is met, the data block record information in the first register group is transferred to the third register group, and the data block record information in the first register group is reset.
[0071] Among them, the preset threshold for the first dimension refers to the preset threshold for the first dimension, which can be set according to actual needs.
[0072] The first preset condition refers to the condition that meets the data block record information transfer condition. In this embodiment, the preset threshold of the first dimension is used as the first preset condition. In order to ensure the efficiency of data query, a threshold is set for each dimension. After the threshold is reached or exceeded, the data is recorded to the next register group, and the relevant data in this register group is reset to ensure the efficiency of storage and the efficiency of subsequent data query.
[0073] In a specific example, the preset size of the cached data block is (8, 8, 4). Before the first data block caching, the system is initialized and all register groups are reset to 0. During the first data caching, ci_cnt is incremented by ci_num, resulting in 8. Since d_cnt and h_cnt are both 0, h_cnt is incremented by h_num and d_cnt is incremented by d_num. Therefore, the values of the three registers in the first register group 1 are 8, 8, and 4.
[0074] During the second data buffering, since h_cnt and ci_cnt are not 0, only ci_cnt is added. Therefore, the values of the three registers in register group 1 are 16, 8, and 4.
[0075] During the fourth handshake, since ci_cnt+ci_num=24+8=32>=input_channel_num(32), where input_channel_num is the preset threshold of the first dimension and its value is 32, the value of register group 1 is passed to register group 2 and ci_cnt is reset to 0.
[0076] During the 5th buffering, since ci_cnt, h_cnt, and h_num are added at this time, the values of the three registers in register group 1 are 8, 16, and 4.
[0077] The subsequent cache writes are similar to those described above. When the cache is written for the 12th time, since h_cnt = 16 >= height in register group 2, and height is the preset threshold of the first dimension, the value of the second register group is passed to the third register group.
[0078] After 16 cache iterations, all caching ends, and the process moves on to the next configuration.
[0079] S203: Upon receiving a data processing request, obtain the required data information from the data processing request, which includes three-dimensional coordinates.
[0080] Specifically, when data querying or data processing is required, a data processing request containing the required data information is generated, and when the request is received, the required data information is extracted.
[0081] In this context, three-dimensional coordinates refer to information used to characterize the spatial location of the required data information in the data to be transported. In this embodiment, the origin of the coordinate system is constructed with the vertex where the data to be transported first begins to be transported, and the direction of transport is the direction of the coordinate axis.
[0082] S204: Based on the three-dimensional coordinates and data block record information, determine whether the cached data block contains the data corresponding to the required data information.
[0083] Optionally, based on the three-dimensional coordinates and data block record information, determining whether the cached data block contains data corresponding to the required data information includes:
[0084] For each register group, each element in the three-dimensional coordinates is compared with the corresponding scale of the data block size stored in the register group, and a bitwise AND operation is performed to obtain the logical value corresponding to each register group.
[0085] If at least one of the register groups has a true logical value, then the cached data block contains the data corresponding to the required data information; otherwise, the cached data block does not contain the data corresponding to the required data information.
[0086] Specifically, in one embodiment, the logical value of valid data_valid is calculated using the following formula:
[0087] data_valid1=(c_x<=ci_cnt)&&(h_x<=h_cnt)&&(d_x<=d_cnt)
[0088] data_valid2=(c_x<=ci_cnt)&&(h_x<=h_cnt)&&(d_x<=d_cnt)
[0089] data_valid3=(c_x<=ci_cnt)&&(h_x<=h_cnt)&&(d_x<=d_cnt)
[0090] data_valid=data_valid1||data_valid2||data_valid3
[0091] Where (c_x, h_x, d_x) are three-dimensional coordinates, and data_valid1, data_valid2 and data_valid3 are the valid data corresponding to each register group;
[0092] If the logical value of data_valid is true, then the cached data block contains the data corresponding to the required data information; otherwise, the cached data block does not contain the data corresponding to the required data information.
[0093] It should be understood that three-dimensional coordinates refer to information used to characterize the spatial location of the required data information in the data to be transferred. When the data to be transferred is transferred in a preset three-dimensional order, after each cached data block is transferred and updated, the size of the cached data block recorded in the data block record information is consistent with the three-dimensional coordinates of the cached data block in the data to be transferred.
[0094] S205: If the cached data block contains data corresponding to the required data information, a response signal indicating that valid data exists in the cached data block is generated.
[0095] In this embodiment, the data to be transferred is acquired and written into a cache in a data block of a preset size as a cache data block. The size of the cache data block is written to the register group according to a preset storage method to obtain data block record information. When a data operation request is received, the required data information, including three-dimensional coordinates, is obtained from the data operation request. Based on the three-dimensional coordinates and the data block record information, it is determined whether the cache data block contains data corresponding to the required data information. If the cache data block contains data corresponding to the required data information, a response signal indicating the presence of valid data in the cache data block is generated. This achieves the goal of determining the data storage progress by recording the data size during caching, thereby quickly calculating whether to cache the required data without having to traverse and search through the data, reducing the amount of data operation and improving handshake efficiency.
[0096] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.
[0097] Figure 3 A schematic block diagram of a handshake device for a three-dimensional convolutional neural network, corresponding one-to-one with the handshake method of the three-dimensional convolutional neural network in the above embodiments, is shown. Figure 3 As shown, the handshake device of this three-dimensional convolutional neural network includes a data block writing module 31, a data block information storage module 32, a request receiving module 33, a comparison and query module 34, and a request response module 35. Detailed descriptions of each functional module are as follows:
[0098] The data block writing module 31 is used to obtain the data to be transferred and write the data to be transferred into a cache in a data block of a preset size as a cache data block;
[0099] The data block information storage module 32 is used to write the size of the cached data block to the register group according to a preset storage method to obtain the data block record information;
[0100] The request receiving module 33 is used to obtain the required data information from the data processing request when it receives the data processing request. The required data information includes three-dimensional coordinates.
[0101] The comparison query module 34 is used to determine whether the cached data block contains the data corresponding to the required data information based on the three-dimensional coordinates and data block record information.
[0102] The request-response module 35 is used to generate a response signal that there is valid data in the cached data block if the cached data block contains data corresponding to the required data information.
[0103] Optionally, the data block writing module 31 includes:
[0104] The data partitioning unit is used to divide the data to be transferred into data blocks of a preset size to obtain each transfer block;
[0105] The cache write unit is used to write to the cache sequentially along the first, second, and third dimensions for each transport block to obtain a cache data block.
[0106] Optionally, the data block information storage module 32 includes:
[0107] The data block update unit is used to update the data block record information in the first register group based on the size of the cached data block each time the data block is successfully cached;
[0108] The first storage unit is used to compare the data block record information in the first register group with a preset first dimension threshold. If the first preset condition is met, the data block record information in the first register group is transferred to the second register group, and the data block record information in the first register group is reset.
[0109] The second storage unit compares the data block record information in the first register group with a preset second-dimensional threshold. If the second preset condition is met, the data block record information in the first register group is transferred to the third register group, and the data block record information in the first register group is reset.
[0110] Optionally, the comparison query module 34 includes:
[0111] Logical value calculation unit, used for
[0112] For each register group, each element in the three-dimensional coordinates is compared with the corresponding scale of the size of the data block stored in the register group, and a bitwise AND operation is performed to obtain the logical value corresponding to each register group.
[0113] The result determination unit is used to determine that if at least one of the register groups has a true logical value, the cached data block contains the data corresponding to the required data information; otherwise, the cached data block does not contain the data corresponding to the required data information.
[0114] Specific limitations regarding the handshake mechanism for 3D convolutional neural networks can be found in the limitations on the handshake method for 3D convolutional neural networks described above, and will not be repeated here. Each module in the aforementioned handshake mechanism for 3D convolutional neural networks can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device as software, so that the processor can call and execute the operations corresponding to each module.
[0115] To address the aforementioned technical problems, embodiments of this application also provide a computer device. Please refer to [link / reference needed]. Figure 4 , Figure 4 This is a basic structural block diagram of the computer device in this embodiment.
[0116] The computer device 4 includes a memory 41, a processor 42, and a network interface 43 that are interconnected via a system bus. It should be noted that only the computer device 4 with components connected to the memory 41, processor 42, and network interface 43 is shown in the figure; however, it should be understood that it is not required to implement all the components shown, and more or fewer components can be implemented alternatively. Those skilled in the art will understand that the computer device described here is a device capable of automatically performing numerical calculations and / or information processing according to pre-set or stored instructions, and its hardware includes, but is not limited to, microprocessors, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), digital signal processors (DSPs), embedded devices, etc.
[0117] The computer device can be a desktop computer, laptop, handheld computer, or cloud server, etc. The computer device can interact with the user via a keyboard, mouse, remote control, touchpad, or voice control.
[0118] The memory 41 includes at least one type of readable storage medium, including flash memory, hard disk, multimedia card, card-type memory (e.g., SD or D-interface display memory), random access memory (RAM), static random access memory (SRAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), programmable read-only memory (PROM), magnetic memory, disk, optical disk, etc. In some embodiments, the memory 41 may be an internal storage unit of the computer device 4, such as the hard disk or memory of the computer device 4. In other embodiments, the memory 41 may also be an external storage device of the computer device 4, such as a plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, etc., equipped on the computer device 4. Of course, the memory 41 may include both the internal storage unit and its external storage device of the computer device 4. In this embodiment, the memory 41 is typically used to store the operating system and various application software installed on the computer device 4, such as program code for controlling electronic documents. In addition, the memory 41 can also be used to temporarily store various types of data that have been output or will be output.
[0119] In some embodiments, the processor 42 may be a central processing unit (CPU), controller, microcontroller, microprocessor, or other data processing chip. The processor 42 is typically used to control the overall operation of the computer device 4. In this embodiment, the processor 42 is used to run program code stored in the memory 41 or process data, such as program code controlling electronic documents.
[0120] The network interface 43 may include a wireless network interface or a wired network interface, which is typically used to establish communication connections between the computer device 4 and other electronic devices.
[0121] This application also provides another embodiment, namely, a computer-readable storage medium storing an interface display program that can be executed by at least one processor to cause the at least one processor to perform the steps of the handshake method of the three-dimensional convolutional neural network as described above.
[0122] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the various embodiments of this application.
[0123] Obviously, the embodiments described above are only some embodiments of this application, not all embodiments. The accompanying drawings show preferred embodiments of this application, but do not limit the patent scope of this application. This application can be implemented in many different forms; rather, the purpose of providing these embodiments is to provide a more thorough and comprehensive understanding of the disclosure of this application. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing specific embodiments, or make equivalent substitutions for some of the technical features. Any equivalent structures made using the content of this application's specification and drawings, directly or indirectly applied to other related technical fields, are similarly within the scope of patent protection of this application.
Claims
1. A handshake system of a three-dimensional convolutional neural network including a DMA transfer component and a data computation component, the DMA transfer component and the data computation component being connected by an electrical connection, characterized by, The DMA transport component includes at least three register groups connected in series. Each register group is connected to at least three comparators. The register group is used to record handshake data information; The comparators connected to the register group are used to compare the handshake data information in the register with the data information of one dimension in the three-dimensional convolutional neural network.
2. A handshake method of a three-dimensional convolutional neural network, characterized by, The handshake system applied to the three-dimensional convolutional neural network of claim 1, wherein the handshake method of the three-dimensional convolutional neural network includes: Acquire the data to be transferred, and write the data to be transferred into a cache in data blocks of a preset size as cache data blocks; According to the preset storage method, the size of the cached data block is written to the register group to obtain the data block record information; Upon receiving a data processing request, the required data information, including three-dimensional coordinates, is obtained from the data processing request. Based on the three-dimensional coordinates and the data block record information, determine whether the cached data block contains data corresponding to the required data information; If the cached data block contains data corresponding to the required data information, a response signal indicating that valid data exists in the cached data block is generated.
3. The handshake method for a three-dimensional convolutional neural network as described in claim 2, characterized in that, The step of writing the data to be transferred into a cache in a data block of a preset size, as a cache data block, includes: The data to be transported is divided into data blocks of a preset size to obtain each transport block; For each transport block, it is written to the cache sequentially along the first dimension, the second dimension, and the third dimension to obtain the cache data block.
4. The handshake method for a three-dimensional convolutional neural network as described in claim 2, characterized in that, The data block records information in a triplet structure, wherein the first element of the triplet is the total size of the first dimension, the second element of the triplet is the total size of the second dimension, and the third element of the triplet is the total size of the third dimension.
5. The handshake method for a three-dimensional convolutional neural network as described in claim 4, characterized in that, The step of writing the size of the cached data block to the register group according to the preset storage method to obtain the data block record information includes: Each time a data block is successfully cached, the data block record information in the first register group is updated based on the size of the cached data block; The data block record information in the first register group is compared with a preset first dimension threshold. If the first preset condition is met, the data block record information in the first register group is transferred to the second register group, and the data block record information in the first register group is reset. The data block record information in the first register group is compared with a preset second dimension threshold. If the second preset condition is met, the data block record information in the first register group is transferred to the third register group, and the data block record information in the first register group is reset.
6. The handshake method for a three-dimensional convolutional neural network as described in claim 4 or 5, characterized in that, The step of determining whether the cached data block contains data corresponding to the required data information based on the three-dimensional coordinates and the data block record information includes: For each register group, each element in the three-dimensional coordinates is compared with the corresponding scale of the size of the data block stored in the register group, and a bitwise AND operation is performed to obtain the logical value corresponding to each register group. If at least one of the register groups has a true logical value, then the cached data block contains the data corresponding to the required data information; otherwise, the cached data block does not contain the data corresponding to the required data information.
7. A handshake device for a three-dimensional convolutional neural network, characterized in that, The handshake system applied to the three-dimensional convolutional neural network of claim 1, wherein the handshake device of the three-dimensional convolutional neural network comprises: The data block writing module is used to acquire the data to be transferred and write the data to be transferred into a cache in data blocks of a preset size as cache data blocks; The data block information storage module is used to write the size of the cached data block into the register group according to a preset storage method to obtain data block record information; The request receiving module is used to obtain the required data information from the data processing request when it receives the data processing request. The required data information includes three-dimensional coordinates. The comparison query module is used to determine whether the cached data block contains data corresponding to the required data information based on the three-dimensional coordinates and the data block record information; The request-response module is used to generate a response signal indicating that valid data exists in the cached data block if the cached data block contains data corresponding to the requested data information.
8. The handshake device for a three-dimensional convolutional neural network as described in claim 7, characterized in that, The data block writing module includes: The data partitioning unit is used to divide the data to be transported into data blocks of a preset size to obtain each transport block; The cache writing unit is used to write to the cache sequentially along the first dimension, the second dimension, and the third dimension for each transport block to obtain the cache data block.
9. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the handshake method of the three-dimensional convolutional neural network as described in any one of claims 1 to 6.
10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the handshake method of the three-dimensional convolutional neural network as described in any one of claims 1 to 6.