A fan rotating speed detection adjusting method, system and storage medium

Abstract

The application provides a fan rotating speed detection and adjustment method, a system and a storage medium, the method comprising: converting real-time detected fan rotating speed information into a standard periodic input signal through a sensor, and receiving the standard periodic input signal and preprocessing it through a fan speed detection module to obtain a fan rotating speed signal; obtaining a real-time rotating speed measurement value based on the fan rotating speed signal, and judging whether the current rotating speed measurement value exceeds a preset overspeed threshold value; if not, caching the current rotating speed measurement value and counting the caching times through a counter; if the count value reaches a preset value, comparing the cached multiple rotating speed measurement values to determine whether the fan rotating speed state is in a normal state or an abnormal state, and correcting fan configuration parameters based on the abnormal state, and making a fan speed regulation module generate a new pulse width modulation waveform to adjust the fan rotating speed. The application has high real-time performance for fan control, and can save a large amount of calculation and storage logic resources.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of servers, and in particular to a fan rotating speed detection and adjustment method and system, and a storage medium. BACKGROUND

[0002] With the progress of science and technology, servers are increasingly widely used in various industries. However, servers generate a large amount of heat during operation, and high temperatures can affect the normal operation of electronic devices, leading to thermal failure, which can affect the effective operation of the entire system and even cause significant losses. Therefore, it is of great significance to control the heat dissipation of the entire server system to ensure stable operation of the system.

[0003] As the main heat dissipation means of the entire server system, the fan needs to monitor the operating state of the fan in real time and adjust the rotating speed of the fan reasonably in combination with the working environment temperature to ensure reliable operation of the system. The detection and adjustment of the rotating speed of the fan in the server are mainly completed by a BMC (Baseboard Management Controller) chip. The current rotating speed of the fan can be calculated by detecting a standard periodic signal fed back by a sensor beside the fan, and the rotating speed of the fan can be adjusted by controlling a PWM (Pulse Width Modulation) waveform with different duty cycles. At present, the calculation and control strategy of the rotating speed of the fan is mainly realized by a processor software due to the convenience of mathematical formula operation of the processor. However, the real-time performance is poor. Although pure hardware logic implementation can control in time, it will consume a large amount of calculation and storage resources and increase the cost.

[0004] As the main means of heat dissipation of the server system, the detection and adjustment of the rotating speed of the fan are completed by a BMC chip. The BMC is a SoC (System on Chip) chip, which is composed of a CPU (Central Processing Unit) core and hardware logic. The hardware logic obtains a period value by detecting a standard periodic signal fed back by a sensor beside the fan and reports the period value to the CPU. The CPU calculates the current rotating speed of the fan and determines a configuration parameter by a temperature control algorithm in combination with the collected temperature. The hardware logic adjusts the rotating speed of the fan by outputting a PWM waveform with different duty cycles according to the configuration parameter, or directly calculates the current rotating speed of the fan according to the collected period value and outputs a PWM waveform with different duty cycles by a fitting prediction algorithm to intervene in the rotating speed of the fan in advance, so as to ensure stable operation of the system.

[0005] At present, the fan speed value is calculated according to the period value reported by the processor according to the hardware logic, then combined with the current system collected temperature, the appropriate parameter is calculated through the temperature control algorithm, and the hardware logic is output with different duty cycle PWM waveform, the real-time performance is poor, the processing response is not timely when the fan is abnormal, and the calculation and storage resources are consumed a lot by using pure hardware logic to realize the calculation of the speed and the prediction of the future speed according to the trend, and then the corresponding PWM waveform is configured and output. SUMMARY

[0006] Therefore, the purpose of the present application is to provide a fan speed detection and adjustment method, system and storage medium, which can solve the problems of poor real-time performance of fan speed detection and adjustment in the prior art, and large calculation and storage resources consumed by using pure hardware logic to realize fan speed detection and adjustment.

[0007] To achieve the above purpose, the present application provides a fan speed detection and adjustment method, which comprises the following steps:

[0008] The real-time detected fan speed information is converted into a standard period input signal by a sensor, and the standard period input signal is received by a fan speed detection module and preprocessed to obtain a fan speed signal;

[0009] A real-time speed measurement value is obtained based on the fan speed signal, and it is determined whether the current speed measurement value exceeds a preset overspeed threshold;

[0010] In response to the current speed measurement value not exceeding the preset overspeed threshold, the current speed measurement value is cached, and the number of cache times is counted by a counter;

[0011] In response to the count value reaching a preset value, the cached multiple speed measurement values are compared, and based on the comparison result, it is determined that the fan speed state is in a normal state or an abnormal state, and the fan configuration parameters are corrected based on the abnormal state, and the fan speed module generates a new pulse width modulation waveform based on the corrected fan configuration parameters to adjust the fan speed.

[0012] In some embodiments, determining that the fan speed state is in a normal state or an abnormal state based on the comparison result comprises:

[0013] In response to the comparison result being that the deviation of the multiple speed measurement values is within a preset error range, it is determined that the fan speed state is in a normal state;

[0014] In response to the comparison result being that the multiple speed measurement values are sequentially increased or sequentially decreased, it is determined that the fan speed state is in an abnormal state.

[0015] In some embodiments, correcting the fan configuration parameters based on the abnormal state comprises:

[0016] storing the abnormal state flag into the abnormal state register based on the abnormal state, and judging whether a pulse width modulation update signal sent by the fan speed regulation module is received within a preset time length;

[0017] in response to that the pulse width modulation update signal is not received within the preset time length, sending a pulse width modulation configuration signal to the fan speed regulation module, so that the fan speed regulation module corrects the fan configuration parameter according to the abnormal state flag.

[0018] In some embodiments, the fan configuration parameter includes a pulse width modulation clock division coefficient, a pulse width modulation waveform period, a pulse width modulation waveform rising point and a pulse width modulation waveform falling point.

[0019] In some embodiments, the fan speed signal is obtained by receiving a standard period input signal by the fan speed detection module and preprocessing the standard period input signal.

[0020] The fan speed signal is obtained by receiving a standard period input signal by the fan speed detection module and filtering the standard period input signal by using a high-frequency clock.

[0021] In some embodiments, the real-time speed measurement value is obtained based on the fan speed signal.

[0022] The fan speed signal is edge detected to obtain the real-time speed measurement value.

[0023] In some embodiments, the method further comprises:

[0024] In response to that the current speed measurement value exceeds a preset overspeed threshold, interrupt information is reported to the processor based on the current speed measurement value.

[0025] In some embodiments, the method further comprises:

[0026] The internal loop test signal is sent to the fan speed detection module and the fan speed regulation module respectively, so that the pulse width modulation waveform output by the fan speed regulation module is directly input to the fan speed detection module for testing.

[0027] Another aspect of the present application also provides a fan speed detection and regulation system, comprising:

[0028] The preprocessing module is configured to convert real-time detected fan speed information into a standard period input signal by a sensor, and to obtain a fan speed signal by receiving the standard period input signal by the fan speed detection module and preprocessing the standard period input signal.

[0029] The judging module is configured to obtain a real-time speed measurement value based on the fan speed signal, and to judge whether the current speed measurement value exceeds a preset overspeed threshold.

[0030] The counting module is configured to cache the current speed measurement value in response to the current speed measurement value not exceeding a preset overspeed threshold, and to count the number of cached values ​​using a counter; and

[0031] The adjustment module is configured to compare multiple cached speed measurement values ​​in response to the count value reaching a preset value, determine whether the fan speed is in a normal or abnormal state based on the comparison result, correct the fan configuration parameters based on the abnormal state, and cause the fan speed control module to generate a new pulse width modulation waveform based on the corrected fan configuration parameters to adjust the fan speed.

[0032] In another aspect, the present invention provides a computer-readable storage medium storing computer program instructions that, when executed by a processor, implement the above-described method.

[0033] In another aspect, the present invention provides a computer device including a memory and a processor, wherein the memory stores a computer program that, when executed by the processor, performs the above-described method.

[0034] The present invention has at least the following beneficial technical effects:

[0035] The fan speed detection and adjustment method of this invention can obtain real-time fan speed measurement values, resulting in high real-time fan control. By preprocessing the standard cycle input signal, glitch signals of different widths with higher precision can be filtered out, yielding more accurate speed measurement values. By caching the speed measurement values ​​and counting the caching times with a counter, and comparing multiple cached speed measurement values ​​when the count reaches a preset value, the method determines whether the fan speed is in a normal or abnormal state based on the comparison result. Based on the abnormal state, the fan configuration parameters are corrected, and the fan speed control module generates a new pulse width modulation waveform based on the corrected fan configuration parameters to adjust the fan speed. This method can save a significant amount of computing and storage logic resources, reduce costs, and contribute to the stable and reliable operation of the entire server system. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other embodiments can be obtained based on these drawings without creative effort.

[0037] Figure 1 This is a schematic diagram of a fan speed detection and adjustment method provided according to an embodiment of the present invention;

[0038] Figure 2This is a schematic diagram of the structure for implementing a fan speed detection and adjustment method according to an embodiment of the present invention;

[0039] Figure 3 This is a schematic diagram of the structure of a fan speed measuring module provided according to an embodiment of the present invention;

[0040] Figure 4 This is a schematic diagram of the structure of a signal analysis and preprocessing module provided in an embodiment of the present invention;

[0041] Figure 5 This is a schematic diagram of the structure of a fan speed control module provided according to an embodiment of the present invention;

[0042] Figure 6 This is a schematic diagram of a PWM waveform provided according to an embodiment of the present invention;

[0043] Figure 7 This is a schematic diagram of a fan speed detection and adjustment system provided according to an embodiment of the present invention;

[0044] Figure 8 A schematic diagram of a computer-readable storage medium for implementing a fan speed detection and adjustment method according to an embodiment of the present invention;

[0045] Figure 9 This is a schematic diagram of the hardware structure of a computer device for performing a fan speed detection and adjustment method according to an embodiment of the present invention. Detailed Implementation

[0046] To make the objectives, technical solutions, and advantages of the present invention clearer, the embodiments of the present invention will be further described in detail below with reference to specific examples and the accompanying drawings.

[0047] It should be noted that all uses of "first" and "second" in the embodiments of the present invention are for the purpose of distinguishing two different entities or different parameters with the same name. Therefore, "first" and "second" are merely for convenience of expression and should not be construed as limiting the embodiments of the present invention. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion, such as other steps or units inherent in a process, method, system, product, or device that includes a series of steps or units.

[0048] Based on the above objectives, the first aspect of the present invention provides an embodiment of a fan speed detection and adjustment method. Figure 1 The diagram shown is a schematic representation of an embodiment of the fan speed detection and adjustment method provided by the present invention. Figure 1 As shown, the embodiments of the present invention include the following steps:

[0049] Step S10: The real-time detected fan speed information is converted into a standard cycle input signal by the sensor, and the standard cycle input signal is received by the fan speed measurement module and preprocessed to obtain the fan speed signal;

[0050] Step S20: Obtain the real-time speed measurement value based on the fan speed signal, and determine whether the current speed measurement value exceeds the preset overspeed threshold;

[0051] Step S30: In response to the current speed measurement value not exceeding the preset overspeed threshold, the current speed measurement value is cached, and the number of cached times is counted by a counter;

[0052] Step S40: In response to the count value reaching the preset value, the multiple cached speed measurement values ​​are compared, and the fan speed status is determined to be in a normal or abnormal state based on the comparison result. The fan configuration parameters are corrected based on the abnormal state, and the fan speed control module generates a new pulse width modulation waveform based on the corrected fan configuration parameters to adjust the fan speed.

[0053] The fan speed detection and adjustment method of this invention can obtain real-time fan speed measurement values, resulting in high real-time fan control. By preprocessing the standard cycle input signal, glitch signals of different widths with higher precision can be filtered out, yielding more accurate speed measurement values. By caching the speed measurement values ​​and counting the caching times using a counter, and comparing multiple cached speed measurement values ​​when the count reaches a preset value, the method determines whether the fan speed is in a normal or abnormal state based on the comparison result. Based on the abnormal state, the fan configuration parameters are corrected, and the fan speed control module generates a new pulse width modulation waveform based on the corrected fan configuration parameters to adjust the fan speed. This method can save a significant amount of computing and storage logic resources, reduce costs, and contribute to the stable and reliable operation of the entire server system.

[0054] In some embodiments, determining whether the fan speed is in a normal or abnormal state based on the comparison result includes: determining that the fan speed is in a normal state in response to the comparison result being that the deviation of multiple speed measurement values ​​is within a preset error range; and determining that the fan speed is in an abnormal state in response to the comparison result being that multiple speed measurement values ​​increase or decrease sequentially.

[0055] In some embodiments, correcting fan configuration parameters based on an abnormal state includes: storing an abnormal state flag in an abnormal state register based on an abnormal state, and determining within a preset time period whether a pulse width modulation update signal sent by the fan speed control module has been received; in response to not receiving a pulse width modulation update signal within the preset time period, sending a pulse width modulation configuration signal to the fan speed control module so that the fan speed control module corrects the fan configuration parameters according to the abnormal state flag.

[0056] In some embodiments, the fan configuration parameters include the pulse width modulation clock division factor, the pulse width modulation waveform period, the pulse width modulation waveform rise point, and the pulse width modulation waveform fall point.

[0057] In some embodiments, receiving a standard periodic input signal through a fan speed measurement module and preprocessing it to obtain a fan speed signal includes: receiving a standard periodic input signal through a fan speed measurement module and performing jitter filtering on the standard periodic input signal using a high-frequency clock to obtain a fan speed signal.

[0058] In some embodiments, obtaining a real-time speed measurement value based on the fan speed signal includes: performing edge detection on the fan speed signal to obtain a real-time speed measurement value.

[0059] In some embodiments, the method further includes: in response to the current speed measurement value exceeding a preset overspeed threshold, reporting interrupt information to the processor based on the current speed measurement value.

[0060] In some embodiments, the method further includes sending an internal loopback test signal to the fan speed measurement module and the fan speed control module respectively, so that the pulse width modulation waveform output by the fan speed control module is directly input to the fan speed measurement module for testing.

[0061] In this embodiment, the internal loopback function is enabled by configuring the processor register to generate a PWM waveform with appropriate parameters, which is directly connected to the fan speed measurement module for period value measurement. This speeds up the debugging efficiency of the function code and is beneficial for locating interface signal problems during product operation.

[0062] Figure 2 A schematic diagram of a fan speed detection and adjustment method according to an embodiment of the present invention is shown. Figure 2 As shown, a fan speed detection and adjustment module is designed inside the BMC (Baseboard Management Controller) chip. This module can directly interact with the processor via the AHB (Advanced High Performance Bus) bus, receive bus read / write control signals to obtain the configuration parameters required by the fan speed measurement and adjustment module, measure and analyze the periodic signal input from the fan speed sensor, preprocess abnormal situations in a timely manner, and record information such as the fan speed period measurement value and abnormal status value for the CPU (processor) to query and further process. At the same time, this module is connected to the GPIO (General-purpose input / output) module, and information interaction with the external fan is realized by multiplexing the functions with GPIO, which can save a separate pin.

[0063] The fan speed detection and adjustment module is internally divided into four sub-modules. The first module is the fan speed measurement module, which receives the external input signal, filters and jitters, and performs edge detection to obtain the period value of the standard period signal fed back by the sensor. The second module is the signal analysis and preprocessing module, which preprocesses the period value of the standard period signal fed back by the sensor from the fan speed measurement module, and obtains a more accurate speed value by averaging multiple results after caching. It can also detect abnormal information in advance and output control signals to the fan speed control module to correct the current speed. The third module is the fan speed control module, which receives configuration information from the register configuration module and the signal analysis and preprocessing module, generates a PWM (Pulse Width Modulation) waveform with a corresponding duty cycle, and outputs it externally to realize the adjustment and control of the fan speed. The fourth module is the register configuration module, which receives system configuration information and outputs control signals to the fan speed measurement module and the fan speed control module. At the same time, it can obtain the speed period measurement value and abnormal status value given by the signal analysis and preprocessing module.

[0064] Figure 3 A schematic diagram of the structure of a fan speed measuring module provided according to an embodiment of the present invention is shown. Figure 3 As shown, the standard periodic input signal tach_in, corresponding to the external fan speed, is first processed by a high-precision debounce module to filter out corresponding glitches. Here, a high-frequency clock ahb_clk is used as the debounce clock. When a change in the input signal is detected, the input signal values ​​of the debounce time register tach_debounce for each ahb_clk are continuously checked. If all values ​​are the values ​​after the change, it is considered a true change, thus achieving the purpose of filtering glitches. The width of the glitches to be filtered out can be flexibly configured by setting the value of the tach_debounce register. Furthermore, using a high-frequency clock ahb_clk for debounce avoids using a frequency-divided speed measurement sampling clock with a higher debounce frequency. The input signal may experience waveform distortion; the filtered signal undergoes edge detection via a sampling clock and a counter calculates the number of sampling clock cycles between two rising or falling edges as the period value for latching to obtain the speed measurement value tach_value; the sampling clock is generated by dividing the high-frequency clock ab_clk, and the division coefficient can be flexibly configured by the sampling division register tach_div; the overspeed interrupt generation logic compares the measured speed measurement value tach_value with the threshold configured in the overspeed threshold register tach_threshold, and when the threshold is reached, an overspeed interrupt tach_intr is generated in time and reported to the CPU for processing.

[0065] Figure 4 A schematic diagram of the structure of a signal analysis preprocessing module provided according to an embodiment of the present invention is shown. Figure 4As shown, the signal analysis and preprocessing module internally designs a data buffer queue to buffer the speed measurement value tach_value given by the fan speed measurement module. Each time the data is buffered, the corresponding period counter is incremented by 1. Whenever the period counter reaches 10 (assuming the preset value is 10), a judgment and averaging logic is initiated to process the buffered data. When the fan rotates at a normal constant speed, the deviation of each measured tach_value is small. After averaging 10 data points, a more accurate speed value of the current fan can be obtained and sent to the speed register for latching. When the buffered 10 data points have a large consecutive deviation, showing an increase or decrease, the judgment logic will recognize that the speed is continuously slowing down or speeding up. At this time, the latest tach_value will be sent to the speed register for latching and the exception handling logic will be entered. The exception handling logic outputs the corresponding speed-up / slow-down flag to the exception status register bit and simultaneously starts the timeout counter. When the countdown reaches 1 second ( If, assuming a preset timeout of 1 second, no PWM update signal is received from the fan speed control module, it indicates that the upper layer has not processed the issue in time. In this case, a PWM configuration signal will be sent to the fan speed control module. The fan speed control module will then correct the previous fan configuration parameters based on the value of the abnormal status register, generate a PWM waveform to adjust the fan speed, and continue to wait for further processing from the CPU. In addition, the abnormal handling logic will first check all bits of the speed measurement value tach_value given by the fan speed measurement module. If all bits are 1, it means the counter has reached its full range and the set speed detection counter cannot detect the speed value. This situation is considered an abnormal condition where the fan speed is too slow or even stops. In this case, the abnormal information will be written to the corresponding abnormal status register bit, and a PWM configuration signal will be immediately sent to the fan speed control module. The fan speed control module will then use the register to determine if the fan has been abnormally shut down. If so, it will retrieve the preset fan experience value parameter, generate a PWM waveform to adjust the fan speed and bring it back to the normal value.

[0066] Figure 5 A schematic diagram of the structure of a fan speed control module provided according to an embodiment of the present invention is shown. Figure 5 As shown, the PWM clock generation logic first divides the high-frequency clock ab_clk according to the division coefficient pwm_div given by the PWM clock divider register to obtain the clock pwm_clk required for the PWM waveform generator to work; the PWM waveform generator will generate PWM waveform signals with corresponding duty cycles according to the PWM waveform period register pwm_period, the PWM waveform rising point register rising_point, the PWM waveform falling point register falling_point, and the PWM work enable register pwm_work_en. Figure 6 A schematic diagram of a PWM waveform provided according to an embodiment of the present invention is shown. Figure 6As shown, the PWM waveform generator also receives abnormal status values ​​and PWM configuration signals from the signal analysis and preprocessing module. By judging the value of the corresponding bit of the abnormal status, it knows the current fan status and decides whether to immediately generate the corresponding waveform parameters or directly read the corresponding empirical value parameters from the PWM parameter empirical value register table to generate the corresponding PWM waveform signal to adjust the current fan speed. In addition, the PWM waveform generator generates a PWM update signal every time it receives new parameters configured by the processor through the AHB interface. This signal is input to the signal analysis and preprocessing module to determine whether the processor has responded to the speed change in a timely manner during the timeout counting period.

[0067] The register configuration module primarily parses the AHB bus interface read / write timing, receives system configuration information from the processor, and outputs control signals such as PWM waveform period, PWM waveform rise point, PWM waveform fall point, PWM enable, frequency division factor, and fan overspeed threshold to the fan speed measurement module and fan speed control module. Simultaneously, it can acquire speed cycle measurement values ​​and abnormal status values ​​from the signal analysis and preprocessing module and report them to the processor for further monitoring and processing of fan speed. Additionally, the register module can provide an internal loopback test signal. This signal, when sent to the fan speed measurement module and fan speed control module, enables the internal loopback test function, allowing the PWM waveform output from the fan speed control module to be directly input to the fan speed measurement module for period detection, facilitating internal function debugging and troubleshooting during the product phase.

[0068] The following is an exemplary embodiment of the fan speed detection and adjustment method of the present invention:

[0069] 1) After the BMC chip detects that the server is powered on, the processor will send empirical parameters of fan speed, such as PWM clock division coefficient, PWM waveform period, PWM waveform rise point, and PWM waveform fall point, as well as PWM working enable signal to the fan speed control module through the AHB interface. The module will start to generate a PWM waveform with the corresponding duty cycle, which will be multiplexed with the GPIO module and then output to the external control fan to generate a certain speed.

[0070] 2) As the server system operates and is affected by the external environment, the temperature will change continuously. The processor will adjust the fan speed according to the temperature change and the current fan speed configuration PWM waveform parameters. The fan speed measurement module will measure the period value tach_value of the standard period input signal fed back by the sensor corresponding to the fan speed in real time. After being cached and processed by the signal analysis preprocessing module, a more accurate speed reporting value is obtained, which is then used by the processor to query and obtain the current fan speed in real time through the AHB interface.

[0071] 3) When the period value tach_value of the standard period input signal fed back by the sensor detected by the fan speed measurement module exceeds the fan overspeed threshold, it will immediately report an interrupt to the CPU. The CPU will perform a series of power-saving heat dissipation processes based on the current ambient temperature and fan speed and send PWM waveform parameters to adjust the fan speed.

[0072] 4) The signal analysis and preprocessing module compares the period measurement values ​​(tach_value) of the standard period input signals from 10 cached sensors. If the deviation of the 10 values ​​is small, the average value is taken to obtain a more accurate current fan speed value, which is then latched into the speed register for the processor to query and process. If the 10 speed values ​​show a trend of continuously increasing or decreasing speed, the corresponding indicator bit in the abnormal status register is updated for the processor to query and process. At the same time, a 1-second timeout count is started. If no PWM update signal is received within 1 second, it means that the processor has not processed it in time. At this time, the PWM configuration signal is output to the fan speed control module. The fan speed control module will correct the previous fan configuration parameters according to the value of the abnormal status register, generate a PWM waveform to adjust the fan speed, and continue to wait for further processing by the CPU.

[0073] 5) When the signal analysis and preprocessing module detects that all bits of the speed measurement value tach_value given by the fan speed measurement module are all 1, that is, the counter has reached full scale, it means that the set speed detection counter can no longer detect its speed value, reflecting an abnormal situation where the fan speed is too slow or even stops. At this time, the abnormal information will be written to the corresponding abnormal status register bit, and a PWM configuration signal will be immediately sent to the fan speed control module. The fan speed control module will determine the abnormal fan shutdown through the register, retrieve the preset fan experience value parameter, generate a PWM waveform to adjust the fan speed to return it to the normal value.

[0074] 6) When the processor configuration internal loopback register enables the internal loopback function, the fan speed control module generates a PWM waveform according to the configured appropriate PWM waveform parameters, and then directly sends it to the fan speed measurement module to detect the waveform period. This can accelerate the internal code function verification and assist in the debugging of external interface signals.

[0075] A second aspect of the present invention also provides a fan speed detection and adjustment system. Figure 7 The diagram shown is a schematic representation of an embodiment of the fan speed detection and adjustment system provided by the present invention. Figure 7As shown, a fan speed detection and adjustment system includes: a preprocessing module 10, configured to convert real-time detected fan speed information into a standard cycle input signal through a sensor, and receive the standard cycle input signal through a fan speed measurement module and preprocess it to obtain a fan speed signal; a judgment module 20, configured to obtain a real-time speed measurement value based on the fan speed signal, and determine whether the current speed measurement value exceeds a preset overspeed threshold; a counting module 30, configured to cache the current speed measurement value in response to the current speed measurement value not exceeding the preset overspeed threshold, and count the number of cached times using a counter; and an adjustment module 40, configured to compare multiple cached speed measurement values ​​in response to the count value reaching a preset value, and determine whether the fan speed state is in a normal or abnormal state based on the comparison result, and correct the fan configuration parameters based on the abnormal state, and cause the fan speed adjustment module to generate a new pulse width modulation waveform based on the corrected fan configuration parameters to adjust the fan speed.

[0076] A third aspect of the present invention also provides a computer-readable storage medium. Figure 8 A schematic diagram of a computer-readable storage medium for implementing a fan speed detection and adjustment method according to an embodiment of the present invention is shown. Figure 8 As shown, the computer-readable storage medium 3 stores computer program instructions 31. When executed by a processor, the computer program instructions 31 implement the method of any of the above embodiments.

[0077] It should be understood that, where there is no conflict, all the embodiments, features and advantages described above for the fan speed detection and adjustment method according to the present invention are equally applicable to the fan speed detection and adjustment system and storage medium according to the present invention.

[0078] A fourth aspect of the present invention also provides a computer device, including as follows: Figure 9 The memory 402 and processor 401 shown are provided. The memory 402 stores a computer program that, when executed by the processor 401, implements the method of any of the above embodiments.

[0079] like Figure 9 The diagram shown is a hardware structure schematic of an embodiment of the computer device for executing the fan speed detection and adjustment method provided by the present invention. Figure 9 Taking the computer device shown as an example, this computer device includes a processor 401 and a memory 402, and may also include an input device 403 and an output device 404. The processor 401, memory 402, input device 403, and output device 404 can be connected via a bus or other means. Figure 9Taking a bus connection as an example, input device 403 can receive input digital or character information, and generate key signal inputs related to user settings and function control of the fan speed detection and adjustment system. Output device 404 may include display devices such as a display screen.

[0080] Memory 402, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as the program instructions / modules corresponding to the fan speed detection and adjustment method in this embodiment. Memory 402 may include a program storage area and a data storage area, wherein the program storage area may store the operating system and application programs required for at least one function; the data storage area may store data created by using the fan speed detection and adjustment method, etc. Furthermore, memory 402 may include high-speed random access memory and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other non-volatile solid-state storage device. In some embodiments, memory 402 may optionally include memory remotely located relative to processor 401, and these remote memories can be connected to the local module via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0081] The processor 401 executes various server functions and data processing by running non-volatile software programs, instructions, and modules stored in the memory 402, thereby implementing the fan speed detection and adjustment method of the above method embodiment.

[0082] Finally, it should be noted that the computer-readable storage medium (e.g., memory) described herein can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. By way of example, and not limitation, non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM), which can act as external cache memory. By way of example, and not limitation, RAM can be obtained in various forms, such as synchronous RAM (DRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct Rambus RAM (DRRAM). The storage devices disclosed herein are intended to include, but are not limited to, these and other suitable types of memory.

[0083] Those skilled in the art will also understand that the various exemplary logic blocks, modules, circuits, and algorithm steps described in conjunction with the disclosure herein can be implemented as electronic hardware, computer software, or a combination of both. To clearly illustrate this interchangeability between hardware and software, the functionality of various illustrative components, blocks, modules, circuits, and steps has been generally described. Whether this functionality is implemented as software or as hardware depends on the specific application and the design constraints imposed on the system as a whole. Those skilled in the art can implement the functionality in various ways for each specific application, but such implementation decisions should not be construed as departing from the scope of the embodiments disclosed herein.

[0084] The above are exemplary embodiments disclosed in this invention. However, it should be noted that various changes and modifications can be made without departing from the scope of the embodiments of this invention as defined by the claims. The functions, steps, and / or actions of the methods according to the disclosed embodiments described herein do not need to be performed in any particular order. Furthermore, although the elements disclosed in the embodiments of this invention may be described or claimed individually, they may be understood as multiple unless explicitly limited to a singular number.

[0085] It should be understood that, as used herein, the singular form "a" is intended to include the plural form as well, unless the context clearly supports an exception. It should also be understood that, as used herein, "and / or" refers to any and all possible combinations of one or more of the associatedly listed items. The embodiment numbers disclosed above are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0086] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of the invention (including the claims) is limited to these examples. Within the framework of the invention, technical features of the above embodiments or different embodiments can be combined, and many other variations of different aspects of the invention exist, which are not provided in the details for the sake of brevity. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the invention should be included within the protection scope of the invention.

Claims

1. A method for detecting and adjusting fan speed, characterized in that, Includes the following steps: The real-time detected fan speed information is converted into a standard cycle input signal by the sensor, and the standard cycle input signal is received by the fan speed measurement module and preprocessed to obtain the fan speed signal. Based on the fan speed signal, a real-time speed measurement value is obtained, and it is determined whether the current speed measurement value exceeds a preset overspeed threshold. In response to the current speed measurement value not exceeding the preset overspeed threshold, the current speed measurement value is cached, and the number of cached times is counted by a counter; In response to the count value reaching a preset value, multiple cached speed measurement values ​​are compared, and the fan speed status is determined to be in a normal or abnormal state based on the comparison result. Specifically, in response to the comparison result that the deviation of the multiple speed measurement values ​​is within a preset error range, the fan speed status is determined to be in a normal state; in response to the comparison result that the multiple speed measurement values ​​increase or decrease sequentially, the fan speed status is determined to be in an abnormal state. The fan configuration parameters are corrected based on the abnormal state, wherein an abnormal state flag is stored in the abnormal state register based on the abnormal state, and it is determined within a preset time period whether a pulse width modulation update signal is received from the fan speed control module. In response to the failure to receive the pulse width modulation update signal within the preset time period, a pulse width modulation configuration signal is sent to the fan speed control module, so that the fan speed control module corrects the fan configuration parameters according to the abnormal state flag, and generates a new pulse width modulation waveform based on the corrected fan configuration parameters to adjust the fan speed.

2. The method according to claim 1, characterized in that, The fan configuration parameters include the pulse width modulation clock division factor, the pulse width modulation waveform period, the pulse width modulation waveform rise point, and the pulse width modulation waveform fall point.

3. The method according to claim 1, characterized in that, The standard cycle input signal is received by the fan speed measurement module and preprocessed to obtain the fan speed signal, which includes: The standard periodic input signal is received by the fan speed measurement module, and the fan speed signal is obtained by filtering and jittering the standard periodic input signal using a high-frequency clock.

4. The method according to claim 1, characterized in that, The real-time speed measurement values ​​obtained based on the fan speed signal include: Edge detection is performed on the fan speed signal to obtain a real-time speed measurement value.

5. The method according to claim 1, characterized in that, Also includes: In response to the current speed measurement value exceeding the preset overspeed threshold, an interrupt information is reported to the processor based on the current speed measurement value.

6. The method according to claim 1, characterized in that, Also includes: Internal loopback test signals are sent to the fan speed measurement module and the fan speed control module respectively, so that the pulse width modulation waveform output by the fan speed control module is directly input to the fan speed measurement module for testing.

7. A fan speed detection and adjustment system, characterized in that, include: The preprocessing module is configured to convert the real-time detected fan speed information into a standard cycle input signal through a sensor, and receive the standard cycle input signal through the fan speed measurement module and preprocess it to obtain the fan speed signal; The judgment module is configured to obtain a real-time speed measurement value based on the fan speed signal and determine whether the current speed measurement value exceeds a preset overspeed threshold. The counting module is configured to cache the current speed measurement value in response to the current speed measurement value not exceeding the preset overspeed threshold, and to count the number of cached values ​​using a counter. as well as The adjustment module is configured to compare multiple cached speed measurement values ​​in response to a count value reaching a preset value, and determine whether the fan speed status is in a normal or abnormal state based on the comparison result. Specifically, if the comparison result indicates that the deviation of the multiple speed measurement values ​​is within a preset error range, the fan speed status is determined to be in a normal state; if the comparison result indicates that the multiple speed measurement values ​​increase or decrease sequentially, the fan speed status is determined to be in an abnormal state. The fan configuration parameters are corrected based on the abnormal state, wherein an abnormal state flag is stored in the abnormal state register based on the abnormal state, and it is determined within a preset time period whether a pulse width modulation update signal is received from the fan speed control module. In response to the failure to receive the pulse width modulation update signal within the preset time period, a pulse width modulation configuration signal is sent to the fan speed control module, so that the fan speed control module corrects the fan configuration parameters according to the abnormal state flag, and generates a new pulse width modulation waveform based on the corrected fan configuration parameters to adjust the fan speed.

8. A computer-readable storage medium, characterized in that, The system stores computer program instructions that, when executed by a processor, implement the method as described in any one of claims 1-6.

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