Method for generating memory self-test algorithm circuitry

Abstract

A method for generating a memory built-in self-test (MBIST) circuit includes providing an editable file, parsing the editable file to obtain a memory test data, wherein the editable file is edited and customized by a user for a memory test algorithm, and wherein the memory test data corresponds to the memory test algorithm, and generating a MBIST circuit based on the memory test data.

Claims

1. A method for generating a memory-built-in self-test circuit, characterized in that, Include: Provides an editable file; The editable file is parsed to obtain memory test data, wherein the editable file is edited by a user and a user defines a memory test algorithm, and wherein the memory test data corresponds to the memory test algorithm. and A built-in memory self-test circuit is generated based on the memory test data. The memory test data includes an address data, an address mask data, a pattern data, or a combination of the address data, the address mask data, and the pattern data.

2. The method for generating a memory-built-in self-test circuit as described in claim 1, characterized in that, This address data corresponds to the memory unit address to be tested, recorded by the memory testing algorithm.

3. The method for generating a memory-built-in self-test circuit as described in claim 1, characterized in that, The address mask data corresponds to the memory test algorithm and records the addresses of memory cells that are not to be tested.

4. The method for generating a memory-built-in self-test circuit as described in claim 1, characterized in that, This pattern data corresponds to the data pattern recorded by the memory testing algorithm for writing or reading from memory cells.

5. A machine-readable medium comprising a plurality of instructions, characterized in that, When the plurality of instructions are executed on a computing device, the computing device causes the computing device to perform an operation comprising the following steps: A syntax parsing is performed on an editable file to obtain memory test data, wherein the editable file is edited by a user and a custom memory test algorithm is defined, and wherein the memory test data corresponds to the memory test algorithm; and A built-in memory self-test circuit is generated based on the memory test data. The memory test data includes an address data, an address mask data, a pattern data, or a combination of the address data, the address mask data, and the pattern data.

6. The machine-readable medium as claimed in claim 5, characterized in that, The operation also includes the following preliminary step: providing the editable file.

7. The machine-readable medium as claimed in claim 5, characterized in that, The address data corresponds to the memory test algorithm and records the memory cell address to be tested, while the address mask data corresponds to the memory test algorithm and records the memory cell address not to be tested.

8. The machine-readable medium as claimed in claim 5, characterized in that, This pattern data corresponds to the data pattern recorded by the memory testing algorithm for writing or reading from memory cells.

Images