Manufacturing method of trench gate type MOSFET module and structure thereof

Abstract

The application discloses a manufacturing method of a trench gate type MOSFET module and a structure thereof, and the method comprises the following steps: etching a first surface of a wafer to form a plurality of groove structures; forming a gate electrode in the groove structures; depositing a second oxide layer on the first surface, etching the second oxide layer to form a gate contact and a source contact; etching a second surface of the wafer to form a plurality of first recesses and a plurality of first bosses in a horizontal and vertical staggered mode, so that each of the groove structures is located in each of the first bosses; etching a functional surface of a support to prepare a plurality of second recesses and a plurality of second bosses; bonding the first bosses in the second recesses, so that the first recesses and the second bosses are arranged in a corresponding mode; forming a drain contact on the second oxide layer of the wafer; forming a surface metal layer on surfaces of the gate contact, the source contact and the drain contact respectively, and depositing a protective layer between the surface metal layers; and cutting along a cutting path to form the trench gate type MOSFET module.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor, in particular to a manufacturing method of a trench gate MOSFET module and a structure thereof. BACKGROUND

[0002] With the development trend of thinning and small volume of electronic products, surface mount MOSFET modules have also been widely developed and applied. The traditional plastic package MOSFET surface mount module fixes the MOSFET chip on the bracket through the electrical interface material, and then performs molding. However, it has the problems of large volume, high thickness and poor heat dissipation. Since additional leads are needed to realize the electrical interconnection of the gate, source and surface mount bracket metal pins of the MOSFET chip, parasitic inductance is generated, which affects the application effect. At the same time, the flexible adjustment of the number of MOSFET chips is also limited. If the existing technology needs to use multiple MOSFET chips in parallel, it needs to provide larger surface mount brackets and more leads to complete the preparation of the module. SUMMARY

[0003] Therefore, the present application solves the problems of large volume, high thickness, poor heat dissipation and parasitic inductance in the prior art surface mount module by matching the design of the trench gate MOSFET chip structure and the corresponding bracket structure. The obtained trench gate MOSFET module includes at least one unit structure with complete electrical function. Multiple unit structures can be used in parallel. The drain is designed to be led out to the surface of the module through the conductive metal layer for easy application and adhesion. The conductive metal layer designed on the five surfaces of the chip can realize the conduction of larger current and the flexible connection of multiple unit structures. The bracket is designed from the plastic package material in the prior art to high-thermal-conductivity insulating ceramic material. The mechanical properties, thermal properties and reliability of the module are improved.

[0004] To achieve the above-mentioned purpose, the present application mainly adopts the following technical solutions:

[0005] The embodiment of the present application provides a manufacturing method of a trench gate MOSFET module, which comprises the following steps: providing a wafer, etching a first surface of the wafer by using a photoetching plate to form a plurality of groove structures; depositing a first oxide layer on the surface of the groove structure, performing ion implantation at the bottom of the groove structure close to a second surface of the wafer to form an ion implantation area; implanting and pushing in the groove structure to form a gate in the groove structure; depositing a second oxide layer on the first surface, etching the second oxide layer to the gate to form a gate contact after filling; etching the second oxide layer to the wafer at both sides of the gate to form a source contact after filling; etching a second surface of the wafer to form a plurality of first grooves staggered in horizontal and vertical directions, the first grooves isolate a plurality of first bosses from the wafer, so that each groove structure is located in each first boss; providing a support, etching a functional surface of the support to prepare a plurality of second grooves, a plurality of second bosses are formed between the second grooves; forming a conductive metal layer on the surface of the functional surface of the support, the conductive metal layer continuously covers the second grooves, the second bosses and the side surfaces of the second grooves; etching the conductive metal layer at the second bosses to form a conductive metal layer opening; bonding the first boss to the conductive metal layer in the second groove, so that the first groove and the second boss are correspondingly arranged; etching the second oxide layer of the wafer to the conductive metal layer at the second boss to form a drain contact after filling; forming a surface metal layer between the gate contact, the source contact and the drain contact respectively, and depositing a protective layer between the surface metal layers; cutting along a cutting path determined by each conductive metal layer opening to form the trench gate MOSFET module.

[0006] Preferably, the step of forming the conductive metal layer on the surface of the functional surface of the support comprises the following steps: depositing a first insulating layer on the surface of the second groove of the support, the side surface of the second groove and the surface of the second boss to form a continuous first insulating layer; depositing a conductive metal layer on the surface of the first insulating layer, etching the conductive metal layer at the second boss to form a conductive metal layer opening at the second boss; depositing a second insulating layer on the conductive metal layer on the side surface of the second groove and the surface of the second boss; and the second insulating layer covers the conductive metal layer opening.

[0007] Preferably, the method of bonding the first protrusions on the conductive metal layer in the second grooves, so that the first grooves are correspondingly arranged with the second protrusions, comprises: performing a metalization process on the second surface of the wafer to form a drain metal layer on the surface of each first protrusion; forming a dielectric material layer on the surface of the conductive metal layer in the support; and bonding the drain metal layer on the surface of the first protrusion to the conductive metal layer through the dielectric material layer, so that the first grooves are correspondingly arranged with the second protrusions.

[0008] Preferably, the thickness of the wafer is 30-75 μm.

[0009] Preferably, the material of the conductive metal layer and the drain metal layer is at least one of Ti, Ag, Ni, Sn, Cu, Al, and Au; and / or the material of the first insulating layer and the second insulating layer is at least one of Si3N4, USG, BPSG, and SiO2.

[0010] Preferably, the material of the dielectric material layer is at least one of silver paste, tin paste, and eutectic solder.

[0011] Preferably, the protective layer is a polyimide protective layer.

[0012] Preferably, the material of the support is at least one of AlN, Si3N4, SiC, and BN.

[0013] Preferably, in the wafer, the included angle between the first grooves and the first protrusions ranges from 85° to 89°.

[0014] The embodiment of the present application provides a structure of a trench gate type MOSFET module, the structure of the trench gate type MOSFET module comprises at least one unit structure, the unit structure comprises: a support, the functional surface of the support is provided with two second grooves which are parallel to each other and second bosses which are located on the two sides of the second grooves; the functional surface of the support is sequentially provided with a first insulating layer and a conductive metal layer, and the conductive metal layer is provided with an opening at the second boss which is located on the two sides of the unit structure; the second insulating layer is arranged on the side surface of the second groove and the surface of the second boss, and the second insulating layer covers the conductive metal layer opening; a wafer, the second surface of the wafer is provided with two first bosses which are parallel to each other and first grooves which are located on the two sides of the first bosses, the surface of the first boss is provided with a drain metal layer, and the first boss and the second groove are arranged in one-to-one correspondence, so that the drain metal layer is bonded and attached to the conductive metal layer through a dielectric material layer; a trench structure is arranged in each first boss, and the surface of the trench structure is provided with a first oxide layer; a gate is formed in the trench structure; a second oxide layer is arranged on the first surface of the wafer; an ion implantation area is arranged at the bottom of the trench structure and close to the second surface of the wafer; a gate contact is arranged on the first surface of the wafer and connected to the gate; a source contact is arranged on the first surface of the wafer and located at the two sides of the gate; a drain contact is formed on the first surface of the wafer at each second boss and connected to the drain metal layer; a surface metal layer is formed on the surface of the second oxide layer and corresponds to the surface of the gate contact, the source contact and the drain contact; and a protective layer is formed on the surface of the second oxide layer and is in contact with the surface metal layer and exposes part of the surface metal layer.

[0015] Compared with the prior art, the present application can realize the connection of the unit structure of any number of trench gate type MOSFET modules in the wafer level size according to the application requirements, and the drain electrode is led out to the surface of the module through the drain conductive metal layer which exists on the side surface and the bottom of the MOSFET wafer, so that the large current application can be realized, and the current transmission capacity is increased and is more uniform, and the heat concentration effect does not exist. Since the drain contact hole is designed in the cutting channel without occupying the active area, the on-resistance of the module is also guaranteed, the source electrode, the gate electrode and the drain electrode of the module are electrically connected through the patch process, and the problem of increased parasitic inductance caused by the lead connection in the traditional technology is avoided. The wafer and the support can realize stable fixing of the trench gate type MOSFET module through the matching of the groove-boss and the design of the internal insulating dielectric layer and the conductive metal layer, and the chip thickness can be further thinned to reduce the on-resistance, and the support is made of high-thermal-conductivity and electrically-insulating inorganic material, so that the mechanical strength, the reliability and the heat dissipation performance of the module are improved. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 A flowchart of a manufacturing method of a trench gate MOSFET module provided by an embodiment of the present application is shown in

[0017] Figures 2-9 A structural diagram in a manufacturing process of a trench gate MOSFET module provided by an embodiment of the present application is shown in

[0018] Figure 10 A structural diagram of a single unit of a trench gate MOSFET module provided by an embodiment of the present application is shown in DETAILED DESCRIPTION

[0019] The specific embodiments of the present application will be described in detail below with reference to the accompanying drawings. The advantages and features of the present application will be more apparent from the following description. It should be noted that the drawings are very simplified and are not drawn to scale, and are only used to facilitate and clarify the purpose of illustrating the embodiments of the present application.

[0020] A manufacturing method of a trench gate MOSFET module is provided by an embodiment of the present application, Figure 1 A flowchart of a manufacturing method of a trench gate MOSFET module provided by an embodiment of the present application is shown in Figure 1 The method comprises the following steps:

[0021] Step S101: A wafer is provided, and a plurality of trench structures are formed on a first surface of the wafer by etching using a photoetching plate.

[0022] Referring to Figure 2 Here, the wafer 110 is a MOSFET wafer, and a plurality of chips are distributed along a first direction X in the wafer 110. A first surface S1 in the wafer 110 is etched using a photoetching plate having an initial etching pattern, and a plurality of trench structures 120 are formed in the wafer 110 by the photoetching plate. Exemplarily, the longitudinal section of the trench structure 120 can be in a U shape.

[0023] Step S102: A first oxide layer is deposited on the surface of the trench structure, ion implantation is performed at the bottom of the trench structure close to a second surface of the wafer, and an ion implantation area is formed; implantation and push bonding are performed in the trench structure to form a gate in the trench structure.

[0024] Continuing to refer to Figure 2A first oxide layer 121 is deposited on the surface of the formed trench structure 120, and then ion implantation is performed near the second surface S2 of the wafer. After high-temperature annealing, an ion implantation region 123 is formed near the second surface S2 below the trench structure 120. Implantation and push bonding are performed in the trench structure 120, and a gate 122 is formed on the surface of the first oxide layer 121 in the trench structure 120. Here, the gate fills the trench structure. Exemplarily, the material of the gate 122 can be polysilicon.

[0025] Step S103: A second oxide layer is deposited on the first surface, and the second oxide layer is etched to the gate to form a gate contact after filling. The second oxide layer is etched to the wafer on both sides of the gate to form a source contact after filling.

[0026] Referring to Figure 3 A second oxide layer 111 is deposited on the first surface S1, covering the surface of the gate 122 formed in the above step. Then, the second oxide layer 111 on the surface of the gate 122 is etched to the gate 122 to form a gate contact hole. A metal material is filled in the gate contact hole to form a gate contact 131, which is in communication with the gate 122 and used to lead out a gate electrical signal. The second oxide layer 111 on both sides of the gate 122 is continuously etched to the wafer 110 to form a source contact hole. A metal material is filled in the source contact hole to form a source contact 132, which is located on both sides of the gate contact 131 and used to lead out a source electrical signal. Then, the wafer 110 is thinned to have a thickness of 30-75 μm.

[0027] Step S104: The second surface of the wafer is etched to form a plurality of first grooves staggered in the horizontal and vertical directions. The first grooves isolate a plurality of first bosses from the wafer, so that each trench structure is located in each first boss.

[0028] Referring to Figure 4 Photoresist is coated on the second surface S2 of the wafer 110, and the wafer 110 is etched along the first direction X and the second direction Y respectively to obtain a plurality of first grooves (not shown in the figure) extending along the first direction X and a plurality of first grooves 140 extending along the second direction Y. The plurality of first grooves 140 isolate a plurality of first bosses 141 from the wafer 110, so that each trench structure 120 is located in each first boss 141. Here, two adjacent first bosses 141 and three first grooves 140 on both sides of the two first bosses 141 form a MOSFET wafer monomer. After etching, the wafer 110 forms a plurality of MOSFET wafer monomers.

[0029] Step S105: providing a support, etching the functional surface of the support to prepare a plurality of second grooves, and forming a plurality of second protrusions between the plurality of second grooves.

[0030] Referring to Figure 5 A support 150 is provided, and the material of the support 150 is at least one of AlN, Si3N4, SiC, and BN. The support 150 is used as a support body of the wafer 110, and the upper surface of the support 150 is used as a functional surface. Photoresist is coated on the functional surface, and the functional surface of the support 150 is etched by exposure to prepare a plurality of second grooves 151. The second grooves 151 are defined by the photoresist, and a plurality of second protrusions 152 are formed between the plurality of second grooves 151 by the photoresist. The included angle between the surface of the second grooves 151 and the side surface of the second protrusions 152 is 85°-89°.

[0031] Step S106: forming a conductive metal layer on the functional surface of the support, and the conductive metal layer continuously covers the second grooves, the second protrusions, and the side surface of the second grooves; and the conductive metal layer at the second protrusions is etched in intervals to form conductive metal layer openings; and the step S106 is completed by the following steps:

[0032] Step S61: depositing a continuous first insulating layer on the surface of the second grooves, the side surface of the second grooves, and the surface of the second protrusions of the support; referring to Figure 6 A continuous first insulating layer 153 is deposited on the surface of the second grooves 151, the side surface of the second grooves 151, and the surface of the second protrusions 152 of the support 150. The first insulating layer 153 is used to isolate the support 150.

[0033] Step S62: depositing a conductive metal layer on the surface of the first insulating layer, and etching the conductive metal layer at the second protrusions in intervals to form conductive metal layer openings at the second protrusions in intervals; and referring to Figure 6 A conductive metal layer 154 is deposited on the surface of the first insulating layer 153, and the conductive metal layer 154 continuously covers the first insulating layer 153. The conductive metal layer 154 at the second protrusions 152 is etched in intervals to form conductive metal layer openings 156 on the surface of each interval second protrusion 152. Two adjacent second grooves 151 and three second protrusions 152 on both sides of the two second grooves 151 form a support monomer, and the conductive metal layer 154 at the second protrusions 152 is etched in intervals to form conductive metal layer openings 156 on both sides of each support monomer. The material of the conductive metal layer is at least one of Ti, Ag, Ni, Sn, Cu, Al, and Au.

[0034] Step S63: depositing a second insulating layer on the conductive metal layer on the side of the second recess and the surface of the second boss; wherein the second insulating layer covers the conductive metal layer opening. Continue to refer to Figure 6 A second insulating layer 155 is deposited on the conductive metal layer 154 on the side of the second recess 151 and the surface of the second boss 152, the second insulating layer 155 covers the conductive metal layer opening 156, and the conductive metal layer 154 on the surface of the second recess 151 is exposed to form a drain electrode. In the embodiment of the application, the first insulating layer 153 and the second insulating layer 155 can be deposited by a chemical vapor deposition method, and the material of the first insulating layer 153 and the second insulating layer 155 is at least one of Si3N4, USG (un-doped silicon glass), BPSG (doped silicon glass), and SiO2.

[0035] Step S107: bonding the first boss to the conductive metal layer in the second recess, so that the first recess and the second boss are correspondingly arranged. Here, step S107 is completed by the following steps:

[0036] Step S71: performing a metalization process on the second surface of the wafer to form a drain metal layer on the surface of each first boss 141; refer to Figure 7 The second surface S2 of the wafer 110 is subjected to a metalization process, and a drain metal layer 142 is formed on the surface of the first boss of the second surface S2 by electroplating, evaporation or sputtering. Here, the material of the drain metal layer is at least one of Ti, Ag, Ni, Sn, Cu, Al and Au.

[0037] Step S72: forming a dielectric material layer on the surface of the conductive metal layer in the support; continue to refer to Figure 7 A dielectric material layer 157 is formed on the conductive metal layer 154 exposed at the surface of each second recess 151 of the support 150. Here, the material of the dielectric material layer is at least one of silver paste, tin paste and eutectic solder.

[0038] Step S73: bonding the drain metal layer on the surface of the first boss to the conductive metal layer through the dielectric material layer, so that the first recess and the second boss are correspondingly arranged. Continue to refer to Figure 7 The drain metal layer 142 on the surface of each first boss 141 is bonded to the conductive metal layer 154 through the dielectric material layer 157, so that each first recess 140 and each second boss 152 are one-to-one correspondingly arranged, and each first boss 141 and each second recess 151 are one-to-one correspondingly arranged. As Figure 7As shown, the two adjacent first protrusions 141 and the three first grooves 140 on both sides of the two first protrusions 141, and the two adjacent second grooves 151 and the three second protrusions 152 on both sides of the second grooves 151 form a unit structure of the trench-gate MOSFET module.

[0039] Step S108: etching the second oxide layer of the wafer to the conductive metal layer at the second protrusions to form a drain contact after filling. Figure 8 The second oxide layer 111 of the wafer 110 is etched to the conductive metal layer 154 at each second protrusion 152 to form a drain contact hole, and the drain contact hole is filled with a metal material to form a drain contact 133. Here, the drain contact 133 is located at each second protrusion 152 and communicates with the drain metal layer 142 through the dielectric material layer 157 to output a drain electrical signal. Here, the materials of the gate contact 131, the source contact 132 and the drain contact 133 can be at least one of Ti, W, Cu and Al.

[0040] Step S109: forming a surface metal layer between the gate contact, the source contact and the drain contact, and depositing a protective layer between the surface metal layers. Figure 9 A surface metal layer 157 is deposited on the surfaces of the gate contact 131, the source contact 132 and the drain contact 133. Here, the surface metal layer 157 covers the surfaces of each gate contact 131, source contact 132 and drain contact 133, respectively. Then, a protective layer 158 is deposited between the surface metal layers 157. The protective layer 158 covers the gap between each adjacent surface metal layer 157 and exposes the surface metal layer 157 above each gate contact 131, source contact 132 and drain contact 133. In this way, the gate, the source and the drain can be arranged on the same surface of the wafer. Here, the protective layer can be a polyimide protective layer.

[0041] Step S110: cutting along the cutting path determined by each conductive metal layer opening to form the trench-gate MOSFET module. Continue to refer to Figure 9 Cutting along the cutting path A-A' determined by each conductive metal layer opening 156 to form the trench-gate MOSFET module.

[0042] The embodiment of the present application provides a structure of a trench-gate MOSFET module, and the trench-gate MOSFET module structure includes at least one unit structure, Figure 10 A structure diagram of a unit structure of a trench-gate MOSFET module provided by the embodiment of the present application is shown in Figure 10 The unit structure 100 of the trench-gate MOSFET module includes:

[0043] A support 150, which has two second grooves 151 parallel to each other and second bosses 152 on both sides of the second grooves 151 on the functional surface. The material of the support 150 is at least one of AlN, Si3N4, SiC, BN, which is used to support the wafer. The upper surface of the support 150 is the functional surface, and the second grooves 151 and the second bosses 152 on both sides of the second grooves 151 are obtained by etching. The included angle between the side surface of the first groove and the surface of the first boss is in the range of 85°-89°.

[0044] The functional surface of the support 150 is sequentially provided with a first insulating layer 153 and a conductive metal layer 154, and has a conductive metal layer opening 156 at the second boss 152 on both sides of the unit structure. The side surface of the second groove 151 and the surface of the second boss 152 are provided with a second insulating layer 155, which covers the conductive metal layer opening 156. The material of the first insulating layer 153 and the second insulating layer 155 is at least one of Si3N4, USG, BPSG, SiO2.

[0045] A wafer 110, which has two first bosses 141 parallel to each other and first grooves 140 on both sides of the first bosses 141 on the second surface S2. The surface of the first boss 141 is provided with a drain metal layer 142, and the first boss 141 and the second groove 151 are arranged one by one, so that the drain metal layer 142 is bonded and attached to the conductive metal layer 154 through a dielectric material layer 157. The thickness of the wafer 110 is 30-75 um. The material of the conductive metal layer 154 and the drain metal layer 142 is at least one of Ti, Ag, Ni, Sn, Cu, Al, Au. The material of the dielectric material layer 157 is at least one of silver paste, tin paste, eutectic solder.

[0046] A trench structure 120 is arranged in each of the first bosses 141, and the surface of the trench structure 120 is provided with a first oxide layer 121. A gate 122 is formed in the trench structure 120. A second oxide layer 111 is arranged on the first surface S1 of the wafer 110. An ion implantation region 123 is arranged at the bottom of the trench structure 120, close to the second surface S2 of the wafer 110. The material of the gate 122 can be polysilicon.

[0047] A gate contact 131 is disposed on the first surface S1 of the wafer 110 and connected to the gate 122 for leading out a gate electrical signal; a source contact 132 is disposed on the first surface S1 of the wafer 110 at both sides of the gate 122 for leading out a source electrical signal; a drain contact 133 is formed on the first surface S1 of the wafer 110 at each second boss 152 and connected to the drain metal layer 154 for leading out a drain electrical signal; a surface metal layer 157 is formed on the surface of the second oxide layer 111 and covers the gate contact 131, the source contact 132 and the drain contact 133; and a protective layer 158 is formed on the surface of the second oxide layer 111 and in contact with the surface metal layer 157 and exposes part of the surface metal layer 157.

[0048] In summary, the application can realize the connection of any number of unit structure groove gate MOSFET chips in wafer level size according to application requirements, and lead out the drain to the surface of the module through the drain conductive metal layer. The drain metal layer exists on the side and bottom of the MOSFET wafer, which can realize large current application, and the current transmission capacity is also more uniform, and there is no heat concentration effect. Since the drain contact hole is designed in the cutting channel without additional occupation of the active area, the on-resistance of the module is also guaranteed. The source, gate and drain of the module are electrically connected through the patch process, which avoids the problem of increased parasitic inductance caused by lead connection in the traditional technology. The bracket and the wafer can realize stable fixation of the groove gate MOSFET module through the matching of the groove-boss and the design of the internal insulating medium layer and the conductive metal layer. The wafer thickness can be further thinned to reduce the on-resistance, and the bracket material is high-thermal-conductivity and electrically-insulating inorganic material, which improves the mechanical strength, reliability and heat dissipation performance of the module.

[0049] The above only describes the preferred embodiments of the application and is not intended to limit the application. Any person skilled in the art can make various changes, modifications, replacements and variations to these embodiments without departing from the principles and purposes of the application. The scope of the application is defined by the claims and their equivalents.

Claims

1. A manufacturing method of a trench gate type MOSFET module, characterized by, The method comprises: providing a wafer, etching a first surface of the wafer by using a photoetching plate to form a plurality of groove structures; depositing a first oxide layer on the surface of the groove structure, and performing ion implantation at the bottom of the groove structure close to a second surface of the wafer to form an ion implantation region; performing implantation and push bonding in the groove structure to form a gate in the groove structure; depositing a second oxide layer on the first surface, etching the second oxide layer to the gate to form a gate contact after filling; etching the second oxide layer to the wafer on both sides of the gate to form a source contact after filling; etching a second surface of the wafer to form a plurality of first recesses intersecting horizontally and vertically, and the first recesses isolate a plurality of first bosses from the wafer, so that each groove structure is located in each first boss; providing a support, etching a functional surface of the support to prepare a plurality of second recesses, and forming a plurality of second bosses between the plurality of second recesses; forming a conductive metal layer on the surface of the functional surface of the support, and the conductive metal layer continuously covers the second recesses, the second bosses and the side surfaces of the second recesses; spacedly etching the conductive metal layer at the second bosses to form conductive metal layer openings; adhering the first bosses to the conductive metal layer in the second recesses, so that the first recesses are correspondingly arranged with the second bosses; etching the second oxide layer of the wafer to the conductive metal layer at the second bosses to form a drain contact after filling; spacedly forming a surface metal layer on the surfaces of the gate contact, the source contact and the drain contact respectively, and depositing a protective layer between the surface metal layers; cutting along a cutting path determined by each conductive metal layer opening to form the trench gate type MOSFET module.

2. The method of claim 1, wherein, The method comprises: depositing a first insulating layer on the surface of the second recess of the support, the side surface of the second recess and the surface of the second boss to form a continuous first insulating layer; depositing a conductive metal layer on the surface of the first insulating layer, and spacedly etching the conductive metal layer at the second bosses to form conductive metal layer openings at the second bosses; depositing a second insulating layer on the conductive metal layer on the side surface of the second recess and the surface of the second boss, and the second insulating layer covers the conductive metal layer openings.

3. The method of claim 2, wherein, The method comprises: metallizing the second surface of the wafer to form a drain metal layer on the surface of each first boss; forming a dielectric material layer on the surface of the conductive metal layer in the support; adhering the drain metal layer on the surface of the first boss to the conductive metal layer through the dielectric material layer, so that the first recesses are correspondingly arranged with the second bosses.

4. The method of claim 3, wherein, The thickness of the wafer is 30-75 μm.

5. The method of claim 4, wherein, The material of the conductive metal layer and the drain metal layer is at least one of Ti, Ag, Ni, Sn, Cu, Al and Au. And / or the material of the first insulating layer and the second insulating layer is at least one of Si3N4, USG, BPSG, SiO2.

6. The method of claim 5, wherein, The material of the dielectric material layer is at least one of silver paste, tin paste, eutectic solder.

7. The method of claim 6, wherein, The protective layer is a polyimide protective layer.

8. The method of claim 7, wherein, The material of the bracket is at least one of AlN, Si3N4, SiC, BN.

9. The method of claim 8, wherein, In the wafer, the included angle between the first groove and the first boss ranges from 85° to 89°.

10. A structure of a trench gate type MOSFET module, characterized by comprising: The slot gate type MOSFET module structure includes at least one unit structure, and the one unit structure includes: A bracket, the functional surface of the bracket has two second grooves parallel to each other and second bosses on both sides of the second grooves; The functional surface of the bracket is sequentially provided with a first insulating layer and a conductive metal layer, and has a conductive metal layer opening at the second bosses on both sides of the unit structure; a second insulating layer is arranged on the side surface of the second groove and the surface of the second boss, and the second insulating layer covers the conductive metal layer opening; A wafer, the second surface of the wafer has two first bosses parallel to each other and first grooves on both sides of the first bosses, a drain metal layer is arranged on the surface of the first boss, and the first boss and the second groove are arranged one by one, so that the drain metal layer is bonded and fitted with the conductive metal layer through a dielectric material layer; A trench structure is arranged in each first boss, and a first oxide layer is arranged on the surface of the trench structure; A gate is formed in the trench structure; A second oxide layer is arranged on the first surface of the wafer; An ion implantation region is arranged at the bottom of the trench structure and close to the second surface of the wafer; A gate contact is arranged on the first surface of the wafer and connected to the gate; A source contact is arranged on the first surface of the wafer, on both sides of the gate; A drain contact is formed on the first surface of the wafer at each second boss and connected to the drain metal layer; A surface metal layer is formed on the surface of the second oxide layer and corresponds to the gate contact, the source contact and the drain contact; A protective layer is formed on the surface of the second oxide layer, in contact with the surface metal layer and exposing part of the surface metal layer.

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