Implementation method and system of a high diffusion lightweight block cipher (HDLBC)

By designing the High Diffusion Lightweight Block Cipher (HDLBC), employing a generalized Feistel structure and NAND-RX operations, and optimizing the round function, the trade-off between diffusion and hardware consumption in SIMON-like cryptography is resolved, achieving faster diffusion speed and lower hardware consumption.

CN116455558BActive Publication Date: 2026-04-14GUILIN UNIV OF ELECTRONIC TECH
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-05-05
Publication Date
2026-04-14

AI Technical Summary

Technical Problem

Existing lightweight block ciphers struggle to strike a good balance between diffusion properties and hardware footprint, especially SIMON-like ciphers, which exhibit slower diffusion and higher hardware consumption after more iterations.

Method used

A highly diffusive lightweight block cipher (HDLBC) is designed, which adopts a generalized Feistel structure, introduces two F functions (RA1 and RA2) and logical NAND operations, implements a nonlinear layer through NAND-RX operations, and optimizes the round function to reduce hardware consumption and improve diffusivity.

Benefits of technology

While reducing hardware consumption, HDLBC achieves better diffusion and security, resists known attacks such as differential analysis, has competitive hardware performance, and diffuses faster than SIMON-like cryptography.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses an implementation method of a high-diffusion lightweight block cipher (HDLBC), which comprises the following steps: obtaining plaintext or ciphertext as to-be-encrypted / decrypted data; performing R-round encryption / decryption operation on the to-be-encrypted / decrypted data; each round of encryption operation is to perform RA1 function operation, branch XOR operation, RA2 function operation and P permutation on the to-be-encrypted data; in each round of encryption operation, part of bits in a sub-key participates in round key addition operation in the RA1 function operation; the remaining bits participate in round key addition operation in the RA2 function operation; the decryption operation is performed in the reverse order of the encryption operation, and the order of the sub-key used in the R-round decryption operation is opposite to the order of the sub-key used in the R-round encryption operation. The method designed in the application is an F function based on NAND operation and designed to introduce two F functions to realize round functions affecting all branches, so that the diffusion and area consumption of the algorithm are better ensured.
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Description

Technical Field

[0001] This invention pertains to encryption and decryption algorithms in the field of information security, specifically relating to an implementation method and system for a Highly Diffusion Lightweight Block Cipher (HDLBC). Background Technology

[0002] With the emergence of fifth-generation (5G) seamless communication network technology, the application scenarios of the Internet of Things (IoT) will increase, such as smart logistics, smart healthcare, and smart homes. As IoT and 5G technologies become highly integrated, the power of network data is becoming increasingly prominent. However, the rapid growth in the number of network devices and ubiquitous communication pose potential threats to data and privacy security, especially given the large number of resource-constrained devices that are prompting the search for new efficiency trade-offs. Therefore, existing research urgently needs lightweight encryption schemes to protect IoT data security.

[0003] In recent years, a series of lightweight block ciphers suitable for resource-constrained devices have been proposed, such as SCENERY, QTL, RECTANGLE, SIMON and SPECK, SIMECK, GIFT, CRAFT, and PRESENT. In fact, with the increasing demands of lightweight block cipher applications, indicators such as low power consumption, low latency, low area, high throughput, and high diffusion have gradually been used to guide the design of lightweight block ciphers. For example, the lightweight block cipher PRESENT proposed by A. Bogdanov at CHES 2007 requires 2018 equivalent gates for encryption and decryption in hardware implementation using the SMIC 0.18 technology library and has been listed as an ISO / IEC standard. In addition, GIFT, proposed by CHES in 2017, is based on PRESENT and is a lightweight S-box to reduce area consumption. Secondly, the P permutation is optimized to improve its diffusion properties. Midori[9] is designed to achieve excellent energy and efficiency in hardware. PRINCE is designed to meet low latency properties. RECTANGLE is implemented using bit-slice technology for multiple platforms. On the other hand, SIMON was released by the National Security Agency (NSA). It uses AND, Rotation and XOR (AND-RX) operations in the nonlinear layer to replace the traditional S-box. More specifically, SIMON only requires 1751 equivalent gates for encryption and decryption under the SMIC0.13 process library, which is even smaller than the area of ​​PRESENT.

[0004] Because SIMON-like cryptography simplifies the implementation of nonlinear components using modular addition, rotation, XOR, and AND operations, and can be rapidly implemented on both hardware and software platforms, it is well-suited for resource-constrained devices. It's worth noting that due to the use of Feistel structures, the diffusion of SIMON-like cryptography is relatively slow. Therefore, it typically requires more rounds of iteration to improve its diffusion properties. For example, the SHADOW cryptography proposed by GUO et al. in 2021 combines generalized Feistel with AND-RX operations. While cleverly incorporating four F-functions in the round functions to address the relatively slow diffusion, it still requires significant area consumption in hardware implementation. Therefore, finding a better trade-off between diffusion properties and area consumption is an interesting topic in symmetric cryptography design. Summary of the Invention

[0005] To achieve a better trade-off between diffusion and area, this invention proposes a cryptographic algorithm that balances both diffusion properties and area consumption. Specifically, it proposes a novel generalized Feistel structure and designs a lightweight block cipher algorithm, HDLBC, namely, the implementation method and system of a high-diffusion lightweight block cipher, HDLBC, provided by this invention. The method of this invention designs two F-functions (nonlinear layer design), namely RA1 function operation and RA2 function operation. The nonlinear layer of these F-functions is designed using NAND operation, which has the lowest area consumption among nonlinear logic operations. The values ​​of the F-functions are input into the XOR operation of the branches, thus utilizing these two F-functions to influence all branches, further ensuring diffusion. At the same time, area consumption is also considered, better guaranteeing both the diffusion and area consumption of the algorithm.

[0006] Based on this, the present invention provides a method for implementing a Highly Diffusion Lightweight Block Cipher (HDLBC), comprising the following steps:

[0007] Step 1: Obtain the plaintext as the data to be encrypted or the ciphertext as the data to be decrypted;

[0008] Step 2: Perform R rounds of operations using round functions, that is, perform R rounds of encryption operations on the data to be encrypted or perform R rounds of decryption operations on the data to be decrypted;

[0009] In this process, the data to be encrypted is divided into four parts P0||P1||P2||P3 in sequence. Each round of encryption operation involves performing RA1 function operation, branch XOR operation, RA2 function operation, and P permutation on the data to be encrypted. The result of the previous round of encryption operation is used as the data to be encrypted in the next round of encryption operation. In each round of encryption operation, some bits of the subkey participate in the round key addition operation in the RA1 function operation; the remaining bits participate in the round key addition operation in the RA2 function operation.

[0010] The decryption operation is performed in reverse order of the encryption operation, and the order of the subkeys used in the R rounds of decryption is the reverse of the order of the subkeys used in the R rounds of encryption. The permutation rules of the P-permutation in the encryption operation correspond to the permutation rules of the P-permutation in the decryption operation in reverse order. Both the encryption and decryption operations use bit-level permutations, but their permutation rules differ. However, the P-permutation in the decryption process is simply the reverse of the P-permutation in the encryption process. Therefore, the permutation table for the decryption process is the inverse permutation table for the encryption process. The purpose of this invention can be achieved using any existing set of encryption and decryption P-permutation rules.

[0011] Further, optionally, the process of performing RA1 function operation, branch XOR operation, and RA2 function operation on the data to be encrypted in each round of encryption operation is as follows:

[0012] RA1 function operation: Assign P0 to L in the RA1 function. i P2 is assigned to R in the RA1 function. i Then L i and R i Shift left in a loop, then shift the L position to the left. i 'and R i The result of performing a logical AND-NOT operation and R i 'and wheel key SK i Perform an XOR operation, then assign the result to L in the RA1 function operation. i+1 ,Right now

[0013] A single-branch XOR operation: P1 and P3 are respectively ANDed with L in the RA1 function. i+1 Perform an XOR operation to obtain P1' and P3', and use them as L in the RA2 function, respectively. i and R i ,Right now L i =P1',R i =P3';

[0014] RA2 function operation: The L in the RA2 function... i and R i Shift left in a loop, then shift the L position to the left. i'and R i The result of performing a logical AND-NOT operation and R i 'and wheel key sk i Perform an XOR operation, then assign the result to L in the RA2 function operation. i+1 ;

[0015] Secondary branch XOR operation: The result L of the operation between P0 and P2 and the RA2 function is calculated. i+1 Perform XOR operations separately, that is

[0016] Among them, P0', P1', P2', and P3' obtained by the XOR operation of the second branch are used for subsequent P permutation.

[0017] Alternatively, the subkey arrangement process is as follows:

[0018] Obtain the initial key and perform a P permutation, then divide it into two branches, LKey. i and RKey i ;

[0019] RKey i XOR LKey i Assign the value of ' and the current round number i to RKey i+1 ,Right now And LKey i After performing a circular left shift, and then using RKey i Perform logical NAND operations to update LKey i ', and will update the LKey i 'Assign value to LKey i+1 ';

[0020] Among them, RKey i+1 The first 16 bits are used for the round key addition operation in the RA1 function operation of the (i+1)th round of encryption, and the other 16 bits are used for the round key addition operation in the RA2 function operation of the (i+1)th round of encryption; as well as the two branches LKey after assignment. i+1 RKey i+1 Participate in the next round of i+1 subkey arrangement.

[0021] Further, optionally, if the initial key is 64 bits, then RKey i+1 The first 16 bits of the least significant bit are used in the round key addition operation of the RA1 function, and the remaining 16 bits are used in the round key addition operation of the RA2 function; if the initial key is 128 bits, then RKey i+1Of the 32 least significant bits, the first 16 bits are used for round key addition in the RA1 function operation, and the last 16 bits are used for round key addition in the RA2 function operation.

[0022] Further optionally, the permutation corresponding to the P permutation in the encryption operation has the following values:

[0023] When i = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63}, P(i)={57, 49, 41, 33, 25, 17, 9, 1, 59, 51, 43, 35, 27, 19, 11, 3, 61, 53, 45, 37, 29, 21, 13, 5, 63, 55, 47, 39, 31, 23, 15 ,7,56,48,40,32,24,16,8,0,58,50,42,34,26,18,10,2,60,52,44,36,28,20,12,4,62,54,46,38,30,22,14,6};

[0024] The permutation values ​​corresponding to the P permutation in the decryption operation are as follows:

[0025] When i = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63}, P(i)={39,7,47,15,55,23,63,31,38,6,46,14,54,22,62,30,37,5,45,13,53,21,61,29,36,4,44,12,52,20,60 ,28,35,3,43,11,51,19,59,27,34,2,42,10,50,18,58,26,33,1,41,9,49,17,57,25,32,0,40,8,48,16,56,24};

[0026] In the table, i and P(i) correspond to the i-th and P(i)-th bit positions, respectively.

[0027] The present invention also provides a system based on the implementation method of the High Diffusion Lightweight Block Cipher (HDLBC), the system comprising:

[0028] The data acquisition module is used to acquire plaintext as data to be encrypted or ciphertext as data to be decrypted.

[0029] The encryption / decryption round operation module is used to perform R round operations using round functions, that is, to perform R round encryption operations on the data to be encrypted or to perform R round decryption operations on the data to be decrypted;

[0030] The subkey update module is used to update the subkey for each round of encryption and decryption operations;

[0031] In this process, the data to be encrypted is divided into four parts P0||P1||P2||P3 in sequence. Each round of encryption operation involves performing RA1 function operation, branch XOR operation, RA2 function operation, and P permutation on the data to be encrypted. The result of the previous round of encryption operation is used as the data to be encrypted in the next round of encryption operation. In each round of encryption operation, some bits of the subkey participate in the round key addition operation in the RA1 function operation; the remaining bits participate in the round key addition operation in the RA2 function operation.

[0032] The decryption operation is performed in reverse order of the encryption operation, and the order of the subkeys used in the R rounds of decryption is the reverse of the order of the subkeys used in the R rounds of encryption.

[0033] The present invention also provides an electronic terminal, which includes at least:

[0034] One or more processors;

[0035] A memory that stores one or more computer programs;

[0036] The processor invokes the computer program to implement the steps of the implementation method of the High Diffusion Lightweight Block Cipher (HDLBC).

[0037] The present invention also provides a readable storage medium storing a computer program, which is invoked by a processor to implement the steps of the method for implementing a Highly Diffusion Lightweight Block Cipher (HDLBC).

[0038] Beneficial effects

[0039] 1. This invention provides a method for implementing a highly diffusive lightweight block cipher. It finds a nonlinear operation, namely the logical NAND operation, that can replace logical AND and modular addition operations, and then constructs an F function based on NAND-RX operations. The invention utilizes creatively designed round functions to ensure the algorithm's scalability and reduce area consumption. The designed round functions include two F functions (RA1 and RA2), branch XOR, round key addition, and P-permutation steps. To ensure diffusivity, the inputs to the branch XOR operations all come from the F functions, achieving the goal that any bit of the input can affect all branches after one round of operation. Simultaneously, this invention ensures diffusivity using only two F functions, reducing area consumption compared to traditional methods. Furthermore, the RA1 and RA2 functions introduce the logical NAND operation, which has a much lower area consumption than the AND operation, while also achieving the same obfuscation effect as the AND operation. It can effectively replace the AND operation, resulting in lower hardware consumption for the entire algorithm.

[0040] 2. In a further preferred embodiment of the present invention, a logical NAND operation is also introduced in the subkey arrangement process of each round of operation, that is, for LKey... i The update introduced NAND operations, which proved to improve diffusion. Compared with SIMON's key arrangement, this invention uses less resource consumption to achieve better diffusion. Attached Figure Description

[0041] Figure 1 This is a diagram of the round function structure of a High Diffusion Lightweight Block Cipher (HDLBC) as described in this invention.

[0042] Figure 2 This is a key arrangement structure diagram of a High Diffusion Lightweight Block Cipher (HDLBC) as described in this invention;

[0043] Figure 3 This is a diagram of the F-function structure of a High Diffusion Lightweight Block Cipher (HDLBC) as described in this invention.

[0044] Figure 4 This is a P-permutation diagram of the HDLBC-64, a high-diffusion lightweight block cipher described in this invention.

[0045] Figure 5 This is a comparison chart of the throughput of the High Diffusion Lightweight Block Cipher (HDLBC) described in this invention with other cryptographic algorithms. Detailed Implementation

[0046] Most lightweight SIMON-like block ciphers aim to minimize area by sacrificing diffusion. While some ciphers improve diffusion speed, this design involves multiple F-functions, requiring more area consumption. To achieve a better trade-off between diffusion and area, this invention provides a method for implementing a high-diffusion lightweight block cipher (HDLBC). This method designs a novel F-function based on NAND operations, utilizing two F-functions to achieve a balance between diffusion and area consumption, i.e., improving diffusion while minimizing area consumption. The invention will be further described below with reference to embodiments.

[0047] Example 1:

[0048] This embodiment provides a method for implementing a Highly Diffusion Lightweight Block Cipher (HDLBC), which includes the following steps:

[0049] Step 1: Obtain the plaintext as the data to be encrypted or the ciphertext as the data to be decrypted.

[0050] This embodiment uses 64-bit plaintext as an example for illustration. The HDLBC algorithm has a block length of 64 bits and a key length of 64 / 128 bits. First, 64 bits of plaintext are obtained as the data to be encrypted, P, and encryption is performed. The data to be encrypted, P, is divided into four parts in groups of 16 bits from the high bit (left) to the low bit (right), denoted as P = P0||P1||P2||P3.

[0051] Step 2: Perform R rounds of operations using round functions, i.e., perform R rounds of encryption operations on the data to be encrypted or R rounds of decryption operations on the data to be decrypted; wherein, each round of encryption operation involves performing RA1 function operation, branch XOR operation, RA2 function operation, and P permutation on the data to be encrypted, and the result of the previous round of encryption operation is used as the data to be encrypted in the next round of encryption operation; in each round of encryption operation, a portion of the subkey participates in the round key addition operation in the RA1 function operation; the remaining bits participate in the round key addition operation in the RA2 function operation.

[0052] The implementation process is illustrated using a single round of encryption as an example:

[0053] 1) Assign P0 to L in the RA1 function. i P2 is assigned to R in the RA1 function. i Then L i and R i Circularly shift left by 1 bit and 8 bits respectively, i.e., L i '=L i <<<1,R i =R i <<<8. Then shift L to the left. i 'and R iThe result of performing a logical AND-NOT operation and R i 'and wheel key SK i After performing the XOR operation, the value is assigned to L in the RA1 function operation. i+1 ,Right now

[0054] This step introduces logical NAND operations. Compared to the AND operation in the SIMON round function, logical NAND operations can achieve the same obfuscation effect with lower hardware resources.

[0055] 2) Perform a branch XOR operation, and multiply P1 and P3 by the 16-bit L value obtained from the RA1 function operation. i+1 The results P1' and P3' obtained after performing the XOR operation are used as L in the RA2 function. i and R i ,Right now L i =P1',R i =P3'; where the internal operations of the RA2 function are the same as those of the RA1 function.

[0056] 3) Add L to the RA2 function i and R i Circularly shift left by 1 bit and then by 8 bits respectively, and then shift the left-shifted L... i 'and R i The result of performing a logical AND-NOT operation and R i 'and wheel key sk i After performing the XOR operation, the value is assigned to L in the RA1 function operation. i+1 .

[0057] In this embodiment, the wheel key SK i Wheel key sk i It consists of different 16-bit data in the subkey of the current i round.

[0058] 4) Perform a second-order XOR operation, and multiply P0 and P2 by the 16-bit L value obtained from the RA2 function operation. i+1 Perform XOR operations separately, that is Thus, P0', P1', P2', and P3' are the results of the RA2 function's operation.

[0059] 5) Perform P-permutation on P0', P1', P2', and P3', that is, move the i-th state bit to the specified P(i) bit, which can be expressed by the formula:

[0060] i = p(i), 0 ≤ i ≤ 63

[0061] The corresponding values ​​of the P permutation for the encryption operation are shown below:

[0062] When i = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63}, P(i)={57, 49, 41, 33, 25, 17, 9, 1, 59, 51, 43, 35, 27, 19, 11, 3, 61, 53, 45, 37, 29, 21, 13, 5, 63, 55, 47, 39, 31, 23, 15 ,7,56,48,40,32,24,16,8,0,58,50,42,34,26,18,10,2,60,52,44,36,28,20,12,4,62,54,46,38,30,22,14,6};

[0063] The corresponding permutation table is shown in Table 1 below:

[0064] Table 1 Encryption Process

[0065]

[0066] It should be understood that performing R rounds of round operations according to the above encryption operation will ultimately result in the ciphertext corresponding to the plaintext.

[0067] If it is a decryption operation, R rounds of decryption are performed after obtaining the data to be decrypted, finally obtaining the plaintext corresponding to the ciphertext. Since the method described in this invention uses a generalized Feistel structure, its decryption process is the same as the encryption process, i.e., the reverse order of steps 1)-5). Only the order of the subkeys used in the encryption algorithm is reversed; that is, the subkey used in the first round of decryption is the subkey used in the last round of encryption. The corresponding values ​​of the P permutations used are shown below, and the corresponding permutation table is shown in Table 2 below:

[0068] When i = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63}, P(i)={39,7,47,15,55,23,63,31,38,6,46,14,54,22,62,30,37,5,45,13,53,21,61,29,36,4,44,12,52,20,60 ,28,35,3,43,11,51,19,59,27,34,2,42,10,50,18,58,26,33,1,41,9,49,17,57,25,32,0,40,8,48,16,56,24};

[0069] Table 2 Decryption Process

[0070]

[0071] It should be noted that the corresponding values ​​of the two P permutations set in this embodiment are corresponding. In other feasible embodiments, a set of corresponding P permutation values ​​can also be set for the encryption and decryption processes. This invention does not impose specific limitations on this.

[0072] It should also be noted that, in both the encryption process and the key arrangement process described below, the number of bits shifted left in the circular shift can be adaptively adjusted according to application requirements, while ensuring computational feasibility.

[0073] Regarding the subkeys for each round, this invention arranges and updates them according to the following method:

[0074] Obtain the initial key and perform the corresponding value of the P permutation according to the encryption operation, then divide it into two equal 32-bit branches, LKey. i and RKey i ;

[0075] RKey i XOR LKey i Assign the value of ' and the current round number i to RKey i+1 ,Right now And LKey i After performing a 16-bit left shift, and then using RKey i Update LKey using logical NAND operations i', and LKey i 'Assign value to LKey i+1 ', i.e., LKey i '=~((LKey i <<<16)&RKey i ),LKey i +1 =LKey i '.

[0076] Among them, RKey i+1 The first 16 bits are used for the round key addition operation in the RA1 function operation, and the other 16 bits are used for the round key addition operation in the RA2 function operation; as well as the two branches LKey after assignment. i+1 RKey i+1 Participate in the next round of i+1 subkey arrangement.

[0077] Where the initial key is 64 bits, then RKey i+1 The first 16 bits of the least significant bit are used in the round key addition operation of the RA1 function, and the remaining 16 bits are used in the round key addition operation of the RA2 function. If the initial key is 128 bits, the P permutation of the subkey in the encryption operation uses the corresponding 128-bit values ​​shown below, and the corresponding permutation table is shown in Table 3 below (key arrangement does not require decryption operation because, based on the Feistel structure, key arrangement operation is also performed during the encryption process and the result of the key arrangement operation is stored in a register; therefore, when performing the decryption operation, it is only necessary to reverse the key order to decrypt, so the inverse P permutation of the key arrangement does not need to be shown). Next, LKey i and RKey i 64 bits, LKey i The cyclic shift is set to 32 bits. Then RKey i+1 Of the 32 least significant bits, the first 16 bits are used in RA1 to perform round key addition, and the last 16 bits are used in RA2 to perform round key addition.

[0078] When i={0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35, 36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127} P(i)={2, 63, 120, 125, 6, 67, 124, 1, 10, 71, 0, 5, 14, 75, 4, 9, 18, 79, 8, 13, 22, 83, 12, 17, 26, 87, 16, 21, 30, 91, 20, 25, 34, 95 ,24,29,38,99,28,33,42,103,32,37,46,107,36,41,50,111,40,45,54,115,44,49,58,119,48,53,62,123,52,57,66,12 7, 56, 61, 70, 3, 60, 65, 74, 7, 64, 69, 78, 11, 68, 73, 82, 15, 72, 77, 86, 19, 76, 81, 90, 23, 80, 85, 94, 27, 84, 89, 98, 31, 88, 93, 102, 35, 92, 97, 106, 39, 96, 101, 110, 43, 100, 105, 114, 47, 104, 109, 118, 51, 108, 113, 122, 55, 112, 117, 126, 59, 116, 121};

[0079] Table 3. P-permutations in HDLBC (HDLBC-128 version)

[0080]

[0081]

[0082] It should be noted that the subkey arrangement method provided in Embodiment 1 of this invention is a preferred technical means of this invention, but it is not the only feasible one. Other subkey arrangement methods can be used on the basis of the round function set by this invention to ensure the security and feasibility of the algorithm.

[0083] In summary, the method described in this invention employs an F-function (non-linear layer design), aiming to find a non-linear logical operation with lower hardware implementation cost than the logical AND operation, thereby improving the diffusion capability of HDLBC cryptography while reducing hardware implementation cost. Based on the round function designed with two F-functions, this invention divides the initial plaintext into four branches for subsequent parallel obfuscation and diffusion. However, since the input to the branch XOR operation comes from the value of the F-function, correlation issues naturally arise. Therefore, in these simple operations, the skillful construction of the HDLBC cryptographic round function to control correlation directly determines the accuracy of subsequent security analysis. On the other hand, this invention also utilizes the non-linear operation NAND, which achieves the same obfuscation effect with lower hardware resources. On the other hand, the technical solution of this invention designs a novel F-function and a round function based on the F-function. Using only two F-functions, any input bit can influence all branches after one round of computation, thus improving diffusion while controlling area consumption. Furthermore, considering the diffusion of the SIMON algorithm, its diffusion speed is relatively slow due to the limited number of XOR operations. While this invention adds XOR operations to the round function of HDLBC, HDLBC still exhibits better diffusion than SIMON ciphers and retains hardware advantages. Specifically, at the bit level, HDLBC-128 requires seven full diffusion rounds, while SIMON-128 requires nine. Therefore, this invention attributes its superior diffusion speed to the carefully designed round function. Security analysis of the method described in this invention shows that HDLBC can achieve sufficient security margins against known attacks, such as differential cryptanalysis, linear cryptanalysis, impossible differential cryptanalysis, and zero-correlation cryptanalysis.

[0084] The hardware performance of the present invention was tested, and the comparison results of the HDLBC cryptographic hardware performance of the present invention are shown in Tables 4 and 5:

[0085] Table 4 is based on Hardware resource comparison of HDLBC with other cryptographic methods

[0086]

[0087]

[0088] Table 5 compares the hardware resources of HDLBC based on 0.13 □m with other cryptographic methods.

[0089]

[0090] This invention proposes a novel lightweight block cipher family, HDLBC, based on the use of NAND-RX combined with a generalized Feistel structure. HDLBC overcomes the difficulty of traditional Feistel structures where only half of the plaintext is changed after one iteration; thanks to the use of NAND operations in the nonlinear layer and a newly designed round function, HDLBC achieves a trade-off between diffusion and hardware consumption. (See Tables 4 and 5 for details.) Figure 5 As shown, HDLBC achieves competitive hardware performance compared to current high-efficiency lightweight block ciphers (especially compared to SIMON). Furthermore, this invention demonstrates that HDLBC is resistant to differential analysis, linear analysis, impossible differential analysis, zero-correlation linear analysis, and integral analysis.

[0091] The method provided in the embodiments of the present invention was tested, and the HDLBC-64-64 algorithm data provided by the present invention is shown below:

[0092] Plaintext: 0000-0000-0000-0000

[0093] Key: 0000-0000-0000-0000

[0094] Ciphertext: F074-0EEB-19D6-B2B9

[0095] Plaintext: 0000-0000-0000-0000

[0096] Key: FFFF-FFFF-FFFF-FFFF

[0097] Ciphertext: 3773-EE79-34B0-3643

[0098] Plaintext: FFFF-FFFF-FFFF-FFFF

[0099] Key: 0000-0000-0000-0000

[0100] Ciphertext: E4CA-6277-1706-0E7D

[0101] Plaintext:FFFF-FFFF-FFFF-FFFF

[0102] Key:FFFF-FFFF-FFFF-FFFF

[0103] Ciphertext:92CC-91E7-4E1D-34B5

[0104] Plaintext:0123-4567-89AB-CDEF

[0105] Key: 0123-4567-89AB-CDEF

[0106] Ciphertext:20B4-ACD6-393C-2242

[0107] Example 2:

[0108] This embodiment also provides a system based on the implementation method of the Highly Diffusion Lightweight Block Cipher (HDLBC), which includes at least: a data acquisition module, an encryption / decryption round operation module, and a subkey update module.

[0109] The data acquisition module is used to acquire plaintext as data to be encrypted or ciphertext as data to be decrypted; the encryption / decryption round operation module is used to perform R round operations using a round function, that is, to perform R round encryption operations on the data to be encrypted or to perform R round decryption operations on the data to be decrypted; the subkey update module is used to update the subkey for each round of encryption / decryption operation.

[0110] In this process, the data to be encrypted is divided into four parts P0||P1||P2||P3 in sequence. Each round of encryption operation involves performing RA1 function operation, branch XOR operation, RA2 function operation, and P permutation on the data to be encrypted. The result of the previous round of encryption operation is used as the data to be encrypted in the next round of encryption operation. In each round of encryption operation, some bits of the subkey participate in the round key addition operation in the RA1 function operation; the remaining bits participate in the round key addition operation in the RA2 function operation.

[0111] The decryption operation is performed in reverse order of the encryption operation, and the order of the subkeys used in the R rounds of decryption is the reverse of the order of the subkeys used in the R rounds of encryption.

[0112] Furthermore, the encryption / decryption operation module can be divided into: RA1 function operation layer, branch XOR operation layer, RA2 function operation layer, and P permutation layer.

[0113] Take the encryption process as an example:

[0114] The RA1 function operation layer is used to assign P0 to L in the RA1 function. i P2 is assigned to R in the RA1 function. i Then L i and Ri Shift left in a loop, then shift the L position to the left. i 'and R i The result of performing a logical AND-NOT operation and R i 'and wheel key SK i Perform an XOR operation, then assign the result to L in the RA1 function operation. i+1 ,Right now

[0115] The branch XOR operation is used to perform a single branch XOR operation, that is, to compare P1 and P3 with the result L of the RA1 function. i +1 Perform an XOR operation to obtain P1' and P3', and use them as L in the RA2 function, respectively. i and R i ,Right now L i =P1',R i =P3'.

[0116] The RA2 function operation layer is used to perform a single branch XOR operation on L. i and R i Shift left in a loop, then shift the L position to the left. i 'and R i The result of performing a logical AND-NOT operation and R i 'and wheel key sk i Perform an XOR operation, then assign the result to L in the RA2 function operation. i+1 .

[0117] The branch XOR operation layer is also used to perform secondary branch XOR operations, that is, to perform operations on P0 and P2 with L in the RA2 function respectively. i+1 Perform XOR operations separately, that is

[0118] The P-permutation layer is used to perform P-permutations on P0', P1', P2', and P3' during the encryption process.

[0119] Corresponding to the decryption process, the RA1 function operation layer is used to perform the RA1 function operation in the decryption process, the branch XOR operation layer is used to perform the first branch operation and the second branch operation in the decryption process, the RA2 function operation layer is used to perform the RA2 function operation in the decryption process, and the P permutation layer is used to perform the P permutation in the decryption process.

[0120] The specific implementation process of the encryption / decryption operation module and the subkey update module can be referred to the relevant description in Example 1.

[0121] It should be understood that the implementation process of each module can be referred to the content described in the aforementioned method. The above division of functional modules is only a logical functional division. In actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. At the same time, the above-mentioned integrated units can be implemented in the form of hardware or software functional units.

[0122] Example 3:

[0123] This embodiment also provides an electronic terminal, which includes at least: one or more processors; and a memory storing one or more computer programs; wherein the processor calls the computer programs to implement the steps of the method for implementing a highly diffusive lightweight block cipher. The specific execution is as follows:

[0124] Step 1: Obtain the plaintext as the data to be encrypted or the ciphertext as the data to be decrypted;

[0125] Step 2: Perform R rounds of operations using round functions, that is, perform R rounds of encryption operations on the data to be encrypted or perform R rounds of decryption operations on the data to be decrypted.

[0126] The processor invokes the computer program to implement the arrangement and updating of sub-keys for each round, specifically as follows:

[0127] Obtain the initial key and perform the P permutation (according to Table 1), then divide it into two branches, LKey, left and right. i and RKey i ;

[0128] RKey i XOR LKey i Assign the value of ' and the current round number i to RKey i+1 ,Right now And LKey i After performing a 16-bit left shift, and then using RKey i Update LKey using logical NAND operations i ', and LKey i 'Assign value to LKey i+1 ', i.e., LKey i '=~((LKey i <<<16)&RKey i ),LKey i +1 =LKey i '.

[0129] Please refer to the explanation of the method above for the specific implementation process of each step.

[0130] The memory may include high-speed RAM, and may also include a non-volatile defibrillator, such as at least one disk storage device.

[0131] If the memory and processor are implemented independently, they can be interconnected via a bus to communicate with each other. This bus can be an industry-standard architecture bus, an external device interconnect bus, or an extended industry-standard architecture bus, etc. The bus can be categorized as an address bus, data bus, control bus, etc.

[0132] Optionally, in a specific implementation, if the memory and processor are integrated on a single chip, the memory and processor can communicate with each other through an internal interface.

[0133] It should be understood that, in the embodiments of the present invention, the processor may be a Central Processing Unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor. The memory may include read-only memory and random access memory, and provides instructions and data to the processor. A portion of the memory may also include non-volatile random access memory. For example, the memory may also store device type information.

[0134] Example 4:

[0135] This embodiment also provides a readable storage medium storing a computer program that is invoked by a processor to implement the steps of the method for implementing a highly diffusive lightweight block cipher. The specific execution is as follows:

[0136] Step 1: Obtain the plaintext as the data to be encrypted or the ciphertext as the data to be decrypted;

[0137] Step 2: Perform R rounds of operations using round functions, that is, perform R rounds of encryption operations on the data to be encrypted or perform R rounds of decryption operations on the data to be decrypted.

[0138] The computer program is called by the processor to implement the arrangement and updating of sub-keys for each round, specifically as follows:

[0139] Obtain the initial key and perform the P permutation (according to Table 1), then divide it into two branches, LKey, left and right. i and RKey i ;

[0140] RKey i XOR LKey i Assign the value of ' and the current round number i to RKey i+1 ,Right now And LKey i After performing a 16-bit left shift, and then using RKey i Update LKey using logical NAND operations i ', and LKey i 'Assign value to LKey i+1 ', i.e., LKey i '=~((LKey i <<<16)&RKey i ),LKey i +1 =LKey i '.

[0141] Please refer to the explanation of the method above for the specific implementation process of each step.

[0142] The readable storage medium is a computer-readable storage medium, which can be an internal storage unit of the controller described in any of the foregoing embodiments, such as the controller's hard drive or memory. The readable storage medium can also be an external storage device of the controller, such as a plug-in hard drive, Smart Media Card (SMC), Secure Digital (SD) card, or Flash Card equipped on the controller. Further, the readable storage medium can include both the controller's internal storage unit and external storage devices. The readable storage medium is used to store the computer program and other programs and data required by the controller. The readable storage medium can also be used to temporarily store data that has been output or will be output.

[0143] Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned readable storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0144] It should be emphasized that the examples described in this invention are illustrative rather than limiting. Therefore, this invention is not limited to the examples described in the specific embodiments. Any other embodiments derived by those skilled in the art based on the technical solutions of this invention, without departing from the spirit and scope of this invention, whether modifications or substitutions, are also within the protection scope of this invention.

Claims

1. A method for implementing a Highly Diffusion Lightweight Block Cipher (HDLBC), characterized in that: Includes the following steps: Step 1: Obtain the plaintext as the data to be encrypted or the ciphertext as the data to be decrypted; Step 2: Perform R rounds of operations using round functions, that is, perform R rounds of encryption operations on the data to be encrypted or perform R rounds of decryption operations on the data to be decrypted; The data to be encrypted is divided into four parts in sequence. Each round of encryption operation involves performing RA1 function operation, branch XOR operation, RA2 function operation, and P permutation on the data to be encrypted. The result of the previous round of encryption operation is used as the data to be encrypted in the next round of encryption operation. In each round of encryption operation, some bits of the subkey participate in the round key addition operation in the RA1 function operation; the remaining bits participate in the round key addition operation in the RA2 function operation. The decryption operation is the reverse of the encryption operation, and the order of the subkeys used in the R rounds of decryption is the reverse of the order of the subkeys used in the R rounds of encryption. The process of performing RA1 function operation, branch XOR operation, and RA2 function operation on the data to be encrypted in each round of encryption operation is as follows: RA1 function operation: Assigned to the RA1 function , Assigned to the RA1 function Then and Shift left in a loop, then shift the result to the left. and The result of performing a logical AND and NOT operation and wheel key Perform an XOR operation, then assign the result to the function in RA1. ,Right now ; A single-branch XOR operation: and In the operation with the RA1 function respectively Performing an XOR operation yields and And respectively used as the RA2 function and ,Right now , , , ; RA2 function operations: The operations performed by the RA2 function... and Shift left in a loop, then shift the result to the left. and The result of performing a logical AND and NOT operation and wheel key Perform an XOR operation, then assign the result to the value in the RA2 function. ; Secondary branch XOR operation: and In the operations with the RA2 function respectively Perform XOR operations separately, that is , ; Among them, the XOR operation of the second branch is obtained , , , Used for subsequent P-permutation.

2. The method according to claim 1, characterized in that: The subkey arrangement process is as follows: Obtain the initial key and perform a P permutation, then divide it into two branches. and ; Will XOR Assign the value of the current round number i to ,Right now ; and will After performing a circular left shift, and Perform logical NAND operations for updating And will update Assign to ; in, The first 16 bits are used for the round key addition operation in the RA1 function operation of the (i+1)th round of encryption, and the other 16 bits are used for the round key addition operation in the RA2 function operation of the (i+1)th round of encryption; as well as the two branches after assignment. , Participate in the next round of i+1 subkey arrangement.

3. The method according to claim 2, characterized in that: If the initial key is 64 bits, then The first 16 bits of the least significant bit are used in the round key addition operation of the RA1 function, and the remaining 16 bits are used in the round key addition operation of the RA2 function; if the initial key is 128 bits, then... Of the 32 least significant bits, the first 16 bits are used in the round key addition operation in the RA1 function operation, and the last 16 bits are used in the round key addition operation in the RA2 function operation.

4. The method according to claim 1, characterized in that: The permutation values ​​corresponding to the P permutation in the encryption operation are as follows: When i = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63}, P(i)={57,49,41,33,25,17,9,1,59,51,43,35,27,19,11,3,61,53,45,37,29,21,13,5,63,55,47,39,31,23,15 ,7,56,48,40,32,24,16,8,0,58,50,42,34,26,18,10,2,60,52,44,36,28,20,12,4,62,54,46,38,30,22,14,6}; The permutation values ​​corresponding to the P permutation in the decryption operation are as follows: When i = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63}, P(i)={39,7,47,15,55,23,63,31,38,6,46,14,54,22,62,30,37,5,45,13,53,21,61,29,36,4,44,12,52,20,60 ,28,35,3,43,11,51,19,59,27,34,2,42,10,50,18,58,26,33,1,41,9,49,17,57,25,32,0,40,8,48,16,56,24}; In the table, i and P(i) correspond to the i-th and P(i)-th bit positions, respectively.

5. A system based on the method of any one of claims 1-4, characterized in that: include: The data acquisition module is used to acquire plaintext as data to be encrypted or ciphertext as data to be decrypted. The encryption / decryption round operation module is used to perform R round operations using round functions, that is, to perform R round encryption operations on the data to be encrypted or to perform R round decryption operations on the data to be decrypted; The subkey update module is used to update the subkey for each round of encryption and decryption operations; The data to be encrypted is divided into four parts in sequence. Each round of encryption operation involves performing RA1 function operation, branch XOR operation, RA2 function operation, and P permutation on the data to be encrypted. The result of the previous round of encryption operation is used as the data to be encrypted in the next round of encryption operation. In each round of encryption operation, some bits of the subkey participate in the round key addition operation in the RA1 function operation; the remaining bits participate in the round key addition operation in the RA2 function operation. The decryption operation is performed in reverse order of the encryption operation, and the order of the subkeys used in the R rounds of decryption is the reverse of the order of the subkeys used in the R rounds of encryption.

6. An electronic terminal, characterized in that: At least including: One or more processors; A memory that stores one or more computer programs; The processor invokes the computer program to implement the steps of the method according to any one of claims 1-4.

7. A readable storage medium, characterized in that: A computer program is stored, which is invoked by a processor to implement the steps of the method according to any one of claims 1-4.