A method for optimizing seed layer materials for copper electroplating and fabricating thin-film circuits

Abstract

The present invention relates to an optimized method for preparing seed layer materials and thin-film circuits for copper electroplating. It innovatively uses sputtered, low-doped copper alloy thin films (50-200 nm) on top of a transparent conductive film (50-150 nm) in a silicon-based heterojunction solar cell as the base film for copper electroplating metallized grid lines. The low-doped copper alloy material contains other alloying elements such as nickel, zirconium, titanium, and chromium, with a total addition amount not exceeding 5 wt%. The low-doped copper alloy material exhibits good conductivity similar to pure copper, reduces the thermal expansion and contraction characteristics of copper, increases oxidation resistance and weather resistance, reduces the roughness of the copper coating, and improves adhesion to the transparent conductive film. This facilitates the subsequent fabrication of copper electroplated grid lines (5-20 μm). Because the density of copper electroplated grid lines is higher than that of grid lines printed with low-temperature silver paste, their conductivity is superior to that of low-temperature silver paste, which helps improve the conversion efficiency of heterojunction solar cells. Simultaneously, electroplated copper grid lines can reduce the production cost of silicon-based heterojunction solar cells, facilitating large-scale mass production.

Description

Technical Field

[0001] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin film circuits, belonging to the application fields of silicon-based heterojunction solar cells and heterojunction perovskite tandem solar cells. Background Technology

[0002] With the rapid development of society and science and technology, the demand for functional materials is becoming increasingly urgent. New functional materials have become crucial for the development of new technologies and emerging industries. With the development of industries such as displays, touchscreens, semiconductors, and solar energy, a new functional material—transparent conducting oxide (TCO) thin films—has emerged and developed. A transparent conducting oxide film refers to a thin film material with a transmittance of over 80% in the visible light range, high conductivity, and a resistivity below 1 x 10⁻³ cm. It is known that metals such as Au, Ag, Pt, Cu, Rh, Pd, Al, and Cr all exhibit some degree of transmittance when forming thin films 3-15 nm thick, and have all been used in transparent thin film electrodes. However, these metal thin films absorb too much light, have low hardness, and poor stability. Therefore, the use of metal oxides as the main transparent conductive film material (TCO) has gradually developed. These films share common optoelectronic properties such as wide bandgap, high transmittance in the visible spectrum, and low resistivity, and have broad application prospects in solar cells, flat panel displays, special functional window coatings, and other optoelectronic devices. Among them, In2O3-based (In2O3:Sn, abbreviated as ITO) films have the most mature preparation technology and the most widespread application. However, due to the high price of In2O3 in ITO films, the production cost is relatively high. Non-indium oxide materials such as tin oxide or zinc oxide have also been studied considerably in recent years, but currently, in the fields of LEDs, solar cells, displays, and touch screens, the cost-effectiveness of these new conductive film materials cannot yet compare with that of indium oxide materials.

[0003] To obtain high-quality ITO films with high transmittance in the visible spectrum, high conductivity, stable performance, good adhesion, and the ability to meet various requirements for different applications, various ITO thin film preparation technologies have been developed both domestically and internationally to regulate and improve the material's properties. While each technology has its own characteristics, they all aim to improve film performance, reduce reaction temperature, increase control precision, simplify preparation costs, and adapt to large-scale production. Currently, the main technologies include vacuum evaporation, chemical vapor deposition (CVD), pulsed laser deposition (PLD), and vacuum sputtering. Vacuum sputtering is the preferred process for achieving large-area uniformity and mass production capabilities; therefore, the quality and performance of the coating material (target) used for thin film sputtering become extremely important. With the increasing size of electronic components such as LCD TVs, touch screens, and thin-film solar cells, obtaining ITO films with higher transmittance and electrical properties is a pressing need.

[0004] A sputtering target is a base material with a fixed shape used for sputtering coating. Sputtering targets can be broadly classified into two categories based on material: metals and ceramics. Based on the manufacturing process, they can be roughly divided into smelting processes and powder metallurgy processes. Most metal targets are manufactured using smelting processes (Al, Sb, Bi, Cd, Ce, Co, Cu, Ge, Au, Hf, In, Ir, Fe, Pb, Mg, Ni, Ni-Cr).

[0005] Due to factors such as grain size control and significant differences in melting points of alloy components, only a few target materials (As, B, Cr, Co, Mn, Mo, Ni-Cr, Permalloy, Re, Ru, Te, W, 90W-10Ti) are processed using powder metallurgy. Among ceramic targets, only SiO2, ThF4, and Na3AlF6 are processed using smelting; most are processed using powder metallurgy (pressing + sintering, hot pressing, hot homogenization), including oxides (Al2O3, BaTiO3, PbTiO3, CeO2, ITO, LiNbO3, SiO, Ta2O5, TiO2, ZrO2, HfO2, MgO), carbides (SiC, TiC, TaC, WC), and borides (TiB2, Zr...). The oxide sputtering targets include (B2, LaB6), nitrides (Si3N4, TaN, TiN), fluorides (CaF2, CeF3, MgF2), sulfides (CdS, MoS2, TaS2), selenides (CdSe, PbSe, MoSe), tellurides (CdTe, MoTe), and silicides (MoSi2, TaSi2, TiSi2, WSi2). Fluorides, sulfides, selenides, and tellurides may be toxic during manufacturing and use and must be handled with care. Carbides, borides, and nitrides all have very high melting points and are typically manufactured using hot pressing (at extremely high temperatures). Traditionally, oxide sputtering targets are produced using hot pressing or cold homogenization followed by sintering. However, this process results in poor material mixing uniformity and uneven stress distribution during sintering, making it difficult to produce high-density, large-size oxide sputtering targets.

[0006] In recent years, due to the continuous expansion of production capacity for silicon wafers, solar cells, and modules, the cost of photovoltaic power generation has also seen a substantial decline. Therefore, reducing the proportion of the base operating system (BOS) cost in the overall cost structure of photovoltaic power generation systems has become more important. This means that high-efficiency modules will play the most crucial role in reducing system costs, as they can save more BOS costs while providing the same amount of electricity. Among all solar cell technologies, research on silicon-based heterojunction (HJT) solar cells is of great significance because they possess advantages such as high conversion efficiency (25.5%), simple structure, low process temperature (<250℃), fewer process steps, and low temperature coefficient.

[0007] Compared to traditional P-type monocrystalline / polycrystalline solar cells, N-type monocrystalline substrate HJT cells offer advantages such as high efficiency, simple manufacturing process, LID-free (light-induced polarization), PID-free (voltage-dependent polarization), low temperature coefficient, high power generation, low light-induced degradation, low power generation cost, and bifacial illumination capability. These characteristics ensure more reliable photovoltaic modules, lower power plant construction costs, and longer lifespans, making them ideal for distributed photovoltaic applications and one of the mainstream technologies for next-generation high-efficiency cells. Using bifacial heterojunction modules, under white background reflectivity, can output >20% more power. Field tests show that bifacial HJT modules can output an average of 15% more power than single-sided HJT modules.

[0008] Perovskite materials are a class of materials with the same crystal structure as calcium titanate (CaTiO3). They were discovered by Gustav Rose in 1839 and later named by the Russian mineralogist LA Perovski. The structural formula of perovskite materials is generally ABX3, where A and B are two cations and X is an anion. This unique crystal structure gives it many unique physicochemical properties, such as absorption rotation, electrocatalysis, etc., and it has considerable applications in the fields of chemistry and physics. A is an organic cation, usually aliphatic or aromatic ammonium, B is a divalent metal cation, such as Ge2+, Sn2+, Pb2+, etc., and X is a halide anion (Cl-, Br-, I-)[5]. In 2009, Tsutomu Miyasaka first used organic-inorganic hybrid perovskite materials CH3NH3PbI3 and CH3NH3PbBr3 to replace dyes in traditional DSSCs as novel photosensitizers, and prepared the first truly meaningful perovskite solar cell. After nearly ten years of development, the conversion efficiency of this solar cell has reached more than 23% in the laboratory, and its lower material cost is an advantage.

[0009] In the fabrication of heterojunction (HJT) solar cells, chemical vapor deposition (PECVD) plays a crucial role in determining product performance. The passivation layer deposited on the incident surface is the intrinsic layer (i), upon which a boron-doped (p) layer is stacked. Similarly, an intrinsic passivation layer (i) is deposited on the back side, followed by a phosphorus-doped (n) layer. The thicknesses of the surface passivation layers i / p and i / n are approximately 15-25 nm. Then, a transparent conductive film (TCO) of approximately 50-200 nm is sputtered onto both sides. Currently, traditional sputtered ITO (indium tin oxide) is mostly used as the TCO, or IWO (indium tungsten oxide) is deposited using RPD (Reactive Plasma Deposition) technology. Conductors on both sides can then be fabricated on the TCO using low-temperature silver paste screen printing or electroforming copper. This completes the fabrication of an HJT solar cell.

[0010] In the metallization process of heterojunction solar cells and heterojunction perovskite tandem solar cells, low-temperature silver paste or low-temperature silver-coated copper paste is often required. Both low-temperature silver paste and low-temperature silver-coated copper paste suffer from high cost and low conductivity, resulting in high contact resistance with the transparent conductive film (TCO) on the surface of heterojunction and heterojunction perovskite tandem solar cells. To improve the electrical performance of metallization, reduce contact resistance, lower metallization production costs, improve cell conversion efficiency, and increase module output power, silver-free electroplating copper processes are gaining increasing attention. Because the transparent conductive film material is a semiconductor (resistance approximately 3-4 x 10⁻⁴ Ω·cm),... -4 The electrical properties are insufficient for direct electroplating of copper grid lines, so a thin layer (<150nm) of good conductors such as aluminum or copper (resistance approximately 4-5x10 Ωcm) is usually sputtered onto the surface of the transparent conductive film first. -6 A seed layer of Ωcm is used, followed by electroplating of thick copper grid lines (>5µm) onto the seed layer. One drawback of using pure copper as the seed layer is that pure copper is prone to oxidation and has a large coefficient of thermal expansion and contraction, easily causing film peeling. Furthermore, pure copper has poor weather resistance, and during future use, it is prone to electron migration due to heat, leading to abnormal protrusions or line breaks in the film over long-term use, thus reducing the lifespan of the component. Extending the lifespan of the thin-film conductors and electrodes and reducing production costs are crucial for expanding its application. Secondly, since TCO coating requires heat treatment to obtain better electrical properties and light transmittance, and pure copper coating is not suitable for heat treatment, TCO sputtering and pure copper sputtering cannot be performed on the same sputtering machine. An additional vacuum sputtering machine is required, thus increasing equipment investment costs. Summary of the Invention

[0011] The purpose of this invention is to provide an optimized method for preparing seed layer materials and thin-film circuits for copper electroplating. A low-doped copper alloy thin film (50-200 nm) is sputtered onto a transparent conductive film (50-150 nm) of a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized grid lines. The low-doped copper alloy material contains a second alloying element such as nickel, zirconium, titanium, or chromium, with a total addition amount not exceeding 5 wt%. The low-doped copper alloy material exhibits good conductivity similar to pure copper, reduces the thermal expansion and contraction characteristics of copper, increases oxidation resistance and weather resistance, reduces the roughness of the copper coating, and improves adhesion to the transparent conductive film. This facilitates the subsequent fabrication of copper electroplated grid lines (5-20 μm). Because the density of copper electroplated grid lines is higher than that of grid lines printed with low-temperature silver paste, their conductivity is superior, which helps improve the conversion efficiency of heterojunction solar cells. Simultaneously, electroplating copper grid lines can reduce the production cost of silicon-based heterojunction solar cells, facilitating large-scale mass production.

[0012] A method for optimizing seed layer materials and thin-film circuit fabrication for copper electroplating involves sputtering a lightly doped copper alloy thin film onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized grid lines. The transparent conductive film in the silicon-based heterojunction solar cell can be indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), or indium tungsten oxide (IWO), etc. During sputtering, the indium tin oxide target is configured with a tin oxide content of 0.5-10 wt%, the indium zinc oxide target with a zinc oxide content of 5-35 wt%, the indium tin zinc oxide target with a tin oxide content of 0.5-10 wt% and a zinc oxide content of 5-35 wt%, and the indium tungsten oxide (IWO) target with a tungsten oxide content of 0.5-3 wt%, with a diameter of 200 nm and a thickness of 12 mm. The preparation of low-copper-doped alloy targets involves melting pure copper, nickel, zirconium, titanium, and chromium particles in a vacuum medium-frequency furnace at 1200℃ using a magnesium-aluminum spinel crucible. The resulting material is then poured into a cast iron mold and shaped, followed by hot rolling and precision machining to produce the desired low-copper-doped alloy target (200nm diameter, 8mm thickness). Regarding the copper alloy composition, the addition of nickel (0.1-5wt%), zirconium (0.1-5wt%), chromium (0.1-5wt%), or pure titanium (0.1-5wt%) is controlled. Besides pure copper, no single element is limited to being added, and the total amount of other elements must not exceed 5wt%. First, the heterojunction silicon wafer, low-copper-doped alloy target, and transparent conductive film target, all processed using the PECVD process, are placed in a vacuum sputtering machine (Taiwan Beiru Technology). The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 2×10 through a throttle valve. -3 The process begins with sputtering 50-150 nm thick transparent conductive (TCO) films on both sides using a pulsed DC power supply. Then, a second 50-200 nm thick low-doped copper film is sputtered using a DC power supply. Finally, copper metal grid lines are formed through photolithography, copper plating, and etching processes, thus completing the fabrication of the copper-plated silicon heterojunction solar cell. A four-point probe resistor can be used to measure the resistance of the copper-plated grid lines, reducing the resistance to as low as 5 x 10⁻⁶. -6 For Ωcm and below, the tensile strength of the copper electroplated grid wire tested by the tensile testing machine is greater than 1.5 N / cm2, and the conversion efficiency of the heterojunction cell measured by the IV tester is greater than 26%.

[0013] The key feature of this invention is its focus on optimizing seed layer materials and thin-film circuit fabrication methods for copper electroplating. It innovatively utilizes sputtered, low-doped copper alloy thin films (50-200 nm) on top of transparent conductive films (50-150 nm) in silicon-based heterojunction solar cells, serving as the base film for copper electroplating metallized grid lines. The low-doped copper alloy material contains other alloying elements such as nickel, zirconium, titanium, and chromium, with a total addition amount not exceeding 5 wt%. This low-doped copper alloy material exhibits good conductivity similar to pure copper, reduces the thermal expansion and contraction characteristics of copper, increases oxidation resistance and weather resistance, reduces the roughness of the copper coating, and improves adhesion to the transparent conductive film. This facilitates the subsequent fabrication of copper electroplated grid lines (5-20 μm). Because the density of copper electroplated grid lines is higher than that of grid lines printed with low-temperature silver paste, their conductivity is superior, contributing to improved conversion efficiency in heterojunction solar cells. Simultaneously, electroplated copper grid lines reduce the production cost of silicon-based heterojunction solar cells, facilitating large-scale mass production. Detailed Implementation

[0014] Example 1:

[0015] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 0.5 wt% Ni), and an indium tin oxide (In₂O₃ + 3 wt% SnO₂) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3×10 through a throttle valve. - 3 Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is deposited on both sides using DC power. Finally, 15µm copper metal grid lines are formed on both sides through photolithography, copper plating, and etching processes, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0016] Example 2:

[0017] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 2.5 wt% Ni), and an indium tin oxide (In₂O₃ + 3 wt% SnO₂) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3×10 through a throttle valve. - 3 Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is deposited on both sides using DC power. Finally, 15µm copper metal grid lines are formed on both sides through photolithography, copper plating, and etching processes, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0018] Example 3:

[0019] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 5wt% Ni), and an indium tin oxide (In₂O₃ + 3wt% SnO₂) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3×10 through a throttle valve. - 3 Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is deposited on both sides using DC power. Finally, 15µm copper metal grid lines are formed on both sides through photolithography, copper plating, and etching processes, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0020] Example 4:

[0021] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 0.5 wt% Zr), and an indium tin oxide (In₂O₃ + 3 wt% SnO₂) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3×10 through a throttle valve. - 3 Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is deposited on both sides using DC power. Finally, 15µm copper metal grid lines are formed on both sides through photolithography, copper plating, and etching processes, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0022] Example 5:

[0023] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film of a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 2.5 wt% Zr), and an indium tin oxide (In₂O₃ + 3 wt% SnO₂) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3×10 through a throttle valve. - 3 Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is deposited on both sides using DC power. Finally, 15µm copper metal grid lines are formed on both sides through photolithography, copper plating, and etching processes, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0024] Example 6:

[0025] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 5wt% Zr), and an indium tin oxide (In₂O₃ + 3wt% SnO₂) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3×10 through a throttle valve. - 3 Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is deposited on both sides using DC power. Finally, 15µm copper metal grid lines are formed on both sides through photolithography, copper plating, and etching processes, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0026] Example 7:

[0027] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 0.5 wt% Cr), and an indium tin oxide (In₂O₃ + 3 wt% SnO₂) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to 3×10⁻³ torr through a throttle valve. Next, a 100nm thick indium tin oxide (ITO) film is sputtered on both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is applied to both sides using DC power. Finally, both sides undergo photolithography, copper plating, and etching processes to form 15µm copper metal grid lines, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0028] Example 8:

[0029] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto the transparent conductive film of a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 2.5 wt% Cr), and an indium tin oxide (In₂O₃ + 3 wt% SnO₂) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3×10 through a throttle valve. - 3 Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is deposited on both sides using DC power. Finally, 15µm copper metal grid lines are formed on both sides through photolithography, copper plating, and etching processes, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0030] Example 9:

[0031] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 5wt% Zr), and an indium tin oxide (In₂O₃ + 3wt% SnO₂) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to 3×10⁻³ torr through a throttle valve. Next, a 100nm thick indium tin oxide (ITO) film is sputtered on both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is applied to both sides using DC power. Finally, both sides undergo photolithography, copper plating, and etching processes to form 15µm copper metal grid lines, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0032] Example 10:

[0033] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 0.5 wt% Ti), and an indium tin oxide (In₂O₃ + 3 wt% SnO₂) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3×10 through a throttle valve. - 3 Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is deposited on both sides using DC power. Finally, 15µm copper metal grid lines are formed on both sides through photolithography, copper plating, and etching processes, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0034] Example 11:

[0035] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 2.5 wt% Ti), and an indium tin oxide (In₂O₃ + 3 wt% SnO₂) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3×10 through a throttle valve. - 3Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is deposited on both sides using DC power. Finally, 15µm copper metal grid lines are formed on both sides through photolithography, copper plating, and etching processes, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0036] Example 12:

[0037] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 5wt% Ti), and an indium tin oxide (In₂O₃ + 3wt% SnO₂) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3×10 through a throttle valve. - 3 Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is deposited on both sides using DC power. Finally, 15µm copper metal grid lines are formed on both sides through photolithography, copper plating, and etching processes, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0038] Example 13:

[0039] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 0.5 wt% Ni), and an indium tin oxide (In₂O₃ + 5 wt% SnO₂) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3×10 through a throttle valve.- 3 Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is deposited on both sides using DC power. Finally, 15µm copper metal grid lines are formed on both sides through photolithography, copper plating, and etching processes, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0040] Example 14:

[0041] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 0.5 wt% Ni), and an indium tin oxide (In₂O₃ + 10 wt% SnO₂) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3×10 through a throttle valve. - 3 Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is deposited on both sides using DC power. Finally, 15µm copper metal grid lines are formed on both sides through photolithography, copper plating, and etching processes, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0042] Example 15:

[0043] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto the transparent conductive film of a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 0.5 wt% Ni), and an indium zinc oxide (In₂O₃ + 10 wt% ZnO) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3×10 through a throttle valve. - 3 Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is deposited on both sides using DC power. Finally, 15µm copper metal grid lines are formed on both sides through photolithography, copper plating, and etching processes, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0044] Example 16:

[0045] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 0.5 wt% Ni), and an indium zinc oxide (In₂O₃ + 20 wt% ZnO) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3×10 through a throttle valve. - 3 Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is deposited on both sides using DC power. Finally, 15µm copper metal grid lines are formed on both sides through photolithography, copper plating, and etching processes, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0046] Example 17:

[0047] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 0.5 wt% Ni), and an indium zinc oxide (In₂O₃ + 30 wt% ZnO) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶.-5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3×10 through a throttle valve. - 3 Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is deposited on both sides using DC power. Finally, 15µm copper metal grid lines are formed on both sides through photolithography, copper plating, and etching processes, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0048] Example 18:

[0049] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 0.5 wt% Ni), and an indium tin zinc oxide (In₂O₃ + 3 wt% SnO₂ + 30 wt% ZnO) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3×10 through a throttle valve. -3 Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is deposited on both sides using DC power. Finally, 15µm copper metal grid lines are formed on both sides through photolithography, copper plating, and etching processes, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0050] Example 19:

[0051] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 0.5 wt% Ni), and an indium tin zinc oxide (In₂O₃ + 5 wt% SnO₂ + 30 wt% ZnO) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3×10 through a throttle valve. -3 Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is deposited on both sides using DC power. Finally, 15µm copper metal grid lines are formed on both sides through photolithography, copper plating, and etching processes, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0052] Example 20:

[0053] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 0.5 wt% Ni), and an indium tin zinc oxide (In₂O₃ + 10 wt% SnO₂ + 30 wt% ZnO) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to 3× through a throttle valve.

[0054] 10 -3 Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is deposited on both sides using DC power. Finally, 15µm copper metal grid lines are formed on both sides through photolithography, copper plating, and etching processes, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0055] Example 21:

[0056] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 0.5 wt% Ni + 0.5 wt% Zr), and an indium tin zinc oxide (In₂O₃ + 10 wt% SnO₂ + 30 wt% ZnO) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to 3×10⁻³ torr through a throttle valve. Next, a 100nm thick indium tin oxide (ITO) film is sputtered on both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is applied to both sides using DC power. Finally, both sides undergo photolithography, copper plating, and etching processes to form 15µm copper metal grid lines, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0057] Example 22:

[0058] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film in a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized gate lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 0.5wt% Ni + 0.5wt% Cr), and an indium tin zinc oxide (In₂O₃ + 3wt% SnO₂) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3×10 through a throttle valve. -3Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film is deposited on both sides using DC power. Finally, 15µm copper metal grid lines are formed on both sides through photolithography, copper plating, and etching processes, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0059] Example 23:

[0060] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film of a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized grid lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 0.5 wt% Ni), and an indium tungsten oxide (In₂O₃ + 0.5 wt% WO₃) target are placed in a vacuum sputtering machine. The vacuum pumping system evacuates the sputtering chamber to a background pressure of 0.7 × 10⁻⁵ - 0.9 × 10⁻⁵ torr. Then, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to 3 × 10⁻³ torr through a throttle valve. Next, a 100nm thick indium tungsten oxide (ITO) film was sputtered onto both sides of the N-type silicon wafer after the PECVD process using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film was deposited on both sides using a DC power supply. Finally, 15µm copper metal grid lines were formed on both sides through photolithography, copper plating, and etching processes, forming the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid line was measured using a four-point probe resistor, the tensile strength of the copper-plated grid line was tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell was measured using an IV meter.

[0061] Example 23:

[0062] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film of a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized grid lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 0.5 wt% Ni), and an indium tungsten oxide (In₂O₃ + 1.0 wt% WO₃) target are placed in a vacuum sputtering machine. The vacuum pumping system evacuates the sputtering chamber to a background pressure of 0.7 × 10⁻⁵ - 0.9 × 10⁻⁵ torr. Then, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to 3 × 10⁻³ torr through a throttle valve. Next, a 100nm thick indium tungsten oxide (ITO) film was sputtered onto both sides of the N-type silicon wafer after the PECVD process using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film was deposited on both sides using a DC power supply. Finally, 15µm copper metal grid lines were formed on both sides through photolithography, copper plating, and etching processes, forming the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid line was measured using a four-point probe resistor, the tensile strength of the copper-plated grid line was tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell was measured using an IV meter.

[0063] Example 23:

[0064] This invention relates to an optimized seed layer material for copper electroplating and a method for preparing thin-film circuits. A lightly doped copper alloy thin film is sputtered onto a transparent conductive film of a silicon-based heterojunction solar cell, serving as the base film for copper electroplating metallized grid lines. First, an N-type silicon wafer that has undergone PECVD processing, a lightly doped copper alloy (Cu + 0.5 wt% Ni), and an indium tungsten oxide (In₂O₃ + 3.0 wt% WO₃) target are placed in a vacuum sputtering machine. The vacuum pumping system evacuates the sputtering chamber to a background pressure of 0.7 × 10⁻⁵ - 0.9 × 10⁻⁵ torr. Then, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to 3 × 10⁻³ torr through a throttle valve. Next, a 100nm thick indium tungsten oxide (ITO) film was sputtered onto both sides of the N-type silicon wafer after the PECVD process using a pulsed DC power supply. Then, a second 100nm thick low-doped copper alloy film was deposited on both sides using a DC power supply. Finally, 15µm copper metal grid lines were formed on both sides through photolithography, copper plating, and etching processes, forming the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid line was measured using a four-point probe resistor, the tensile strength of the copper-plated grid line was tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell was measured using an IV meter.

[0065] Comparative Example 1:

[0066] In existing technologies, methods for preparing conductive indium oxide targets involve adding 10 wt% tin oxide to indium oxide, fabricating a preform using cold homogenization and high-temperature sintering, and then processing it into a target. First, an N-type silicon wafer that has undergone PECVD processing and an indium tin oxide (In₂O₃ + 10% Sn) target are placed in a vacuum sputtering machine. The vacuum pumping system reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 2×10 through a throttle valve. -3 Next, a 100nm thick indium tin oxide (ITO) film is sputtered onto both sides of the PECVD-processed N-type silicon wafer using a pulsed DC power supply. Then, a second 100nm thick pure copper alloy film is deposited on both sides using DC power. Finally, both sides undergo photolithography, copper plating, and etching processes to form 15µm copper metal grid lines, creating the desired copper-plated grid line heterojunction cell. The resistance of the copper-plated grid lines is measured using a four-point probe resistor, the tensile strength of the copper-plated grid lines is tested using a tensile testing machine, and the conversion efficiency of the heterojunction cell is measured using an IV meter.

[0067] The properties of the copper thin-film wires and electrodes prepared in each embodiment and comparative example are shown in the table below:

[0068]

[0069]

[0070]

[0071] As can be seen from the results in the table above, the process of manufacturing the electroplated copper grid line of the present invention first uses a low-copper-doped alloy as the seed layer for electroplating copper, which has the advantages of high tensile strength and high efficiency, and can meet the performance requirements of conductive grid lines for heterojunction cells and heterojunction perovskite tandem cells.

Claims

1. A method for fabricating a silicon-based heterojunction solar cell, characterized in that: The specific method is as follows: 1) First, place the heterojunction silicon wafer, low-doped copper alloy target, and transparent conductive film target (all processed by PECVD) into a vacuum sputtering machine. The vacuum pumping system then reduces the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 2×10 through a throttle valve. -3 torr; 2) Next, a 50-150nm thick transparent conductive film is sputtered on both sides using a pulsed DC power supply, and then a second 50-200nm thick low-copper-doped film is sputtered using a DC power supply. 3) Finally, copper metal grid lines are formed through photolithography, copper electroplating, and etching processes, thus completing the fabrication of the silicon-based heterojunction solar cell with copper grid line metallization. The preparation method of the low copper-doped alloy target is as follows: using a vacuum medium frequency furnace to melt pure solid particles of copper and doped elements at 1200℃, then pouring them into a cast iron mold to form them, and then hot pressing and precision machining to form a low copper-doped alloy target with a diameter of 200nm and a thickness of 8mm. The doping element is one or more elements selected from nickel, zirconium, chromium, and titanium, and the total amount added is 0.1-5 wt%. The tensile strength of the copper grid wire is greater than 1.5 N / cm. 2 .

2. The method for preparing a silicon-based heterojunction solar cell as described in claim 1, characterized in that: The transparent conductive film is an indium tin oxide thin film, and the tin oxide content of the transparent conductive film target material is controlled at 0.5-10 wt%.

3. The method for preparing a silicon-based heterojunction solar cell as described in claim 1, characterized in that: The transparent conductive film is an indium zinc oxide thin film, and the zinc oxide content of the transparent conductive film target material is controlled at 5-35 wt%.

4. The method for preparing a silicon-based heterojunction solar cell as described in claim 1, characterized in that: The transparent conductive film is an indium tin zinc oxide thin film, and the transparent conductive film target material used is controlled with tin oxide content of 0.5-10wt% and zinc oxide content of 5-35wt%.

5. The method for preparing a silicon-based heterojunction solar cell as described in claim 1, characterized in that: The transparent conductive film is an indium tungsten oxide thin film, and the tungsten oxide content of the transparent conductive film target material is controlled to be between 0.5-3.0 wt%.

6. The method for preparing a silicon-based heterojunction solar cell as described in claim 1, characterized in that: The transparent conductive film target has a diameter of 200 nm and a thickness of 12 nm.

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