Solar cell, solar cell quality determination device, solar cell etching device, and solar cell manufacturing method

Abstract

Provided is a solar cell unit capable of shortening the time required for and improving the accuracy of the evaluation of solar cell units used in low-illumination environments. A solar cell unit (1) has a cell region (2) in which back electrode type solar cell units are formed and a blank region (3) other than the cell region on a large-size semiconductor substrate (11). The cell region (2) has a first conductive type region in which a first conductive type (for example, p-type) semiconductor layer and a first electrode layer are formed and a second conductive type region in which a second conductive type (for example, n-type) semiconductor layer and a second electrode layer are formed. The blank region (3) has a first conductive type unit region (4) per unit area in which a first conductive type semiconductor layer is formed, a second conductive type unit region (5) per unit area in which a second conductive type semiconductor layer is formed, and a pn short region (6) in which a first conductive type semiconductor layer, a second conductive type semiconductor layer, and a third electrode layer that electrically shorts them are formed.

Description

Technical Field

[0001] This invention relates to solar cell units, a device for determining the quality of solar cell units, an etching device for solar cell units, and a method for manufacturing solar cell units. Background Technology

[0002] Solar cells are sometimes integrated into electronic devices such as IoT (Internet of Things) devices or wearable devices. From a design perspective, these electronic devices come in various shapes and sizes. Therefore, solar cells integrated into such devices require either shapes that conform to the shape of the electronic device or small-sized solar cells.

[0003] Such solar cell units are obtained by forming one or more solar cell units on a large-size semiconductor substrate (wafer) of a specified size (e.g., a 6-inch semi-square shape), and then cutting one or more solar cell units, for example, using laser dicing. Hereinafter, the large-size semiconductor substrate with one or more solar cell units formed on it before laser dicing will be referred to as a solar cell unit. Furthermore, within a solar cell unit, the area where the solar cell units are formed will be called the cell area, and the remaining area will be called the blank area.

[0004] In the manufacture of solar cell units, particularly in the patterning of the electrode layer in the individual cell region, wet etching is used. There are techniques for measuring photoluminescence characteristics to check (evaluate) leakage current caused by insufficient etching of such electrode layers. Patent documents 1 and 2 disclose techniques for irradiating a semiconductor substrate with light, observing the photoluminescence intensity from the semiconductor substrate, and checking (evaluating) the etching of the semiconductor device based on the photoluminescence intensity. Furthermore, patent documents 1 and 2 disclose techniques for irradiating a semiconductor substrate with light in such a wet etching method, observing the photoluminescence intensity from the semiconductor substrate, and determining the end of etching based on the photoluminescence intensity.

[0005] Patent Document 1: Japanese Patent Application Publication No. 6-13446

[0006] Patent Document 2: Japanese Patent Application Publication No. 2008-210947

[0007] IoT devices or wearable devices and other electronic devices not only operate under high illumination conditions corresponding to outdoor sunlight (e.g., 1 sun (1000W / m²)). 2It is used not only in high-illuminance environments but also in low-illuminance environments corresponding to indoor lighting conditions (e.g., environments with current densities greater than 1 / 1000 and less than 1 / 100 of those obtained outdoors). Therefore, in solar cell units mounted in such electronic devices, high photoelectric conversion efficiency is required not only in high-illuminance environments but also in low-illuminance environments.

[0008] In the manufacturing of such solar cell units, if the photoluminescence intensity is used to determine the quality of the photoelectric conversion characteristics of a single cell region (solar cell), sometimes a high photoluminescence intensity, considered good under high illumination conditions, may be low under low illumination conditions, considered poor. This is believed to be caused by the following factors: Leakage current, which is negligible under high illumination conditions, becomes non-negligible under low illumination conditions. In other words, etching deficiencies, which are negligible under high illumination conditions, become non-negligible under low illumination conditions.

[0009] Regarding this, we considered using the photoluminescence intensity under low-light conditions instead of the photoluminescence intensity under high-illuminance conditions to determine the photoelectric conversion characteristics of individual solar cell regions. However, under low-illuminance conditions, if the irradiation time is not extended, a detectable photoluminescence intensity cannot be obtained, resulting in a longer measurement time. Furthermore, if the photoluminescence intensity is low, the measurement accuracy will decrease due to the detector's detection limit or noise. Additionally, under low-illuminance output, the light source output is unstable, further reducing measurement accuracy.

[0010] Furthermore, in the manufacture of such solar cell units, if the etching completion determination technique based on the aforementioned photoluminescence intensity is used, sometimes the photoluminescence intensity is high under light irradiation corresponding to a high-illuminance environment but low under light irradiation corresponding to a low-illuminance environment. Similarly, this is believed to be caused by the following factors: leakage current that is negligible even under high-illuminance environments becomes non-negligible under low-illuminance environments. In other words, etching insufficiency that is negligible even under high-illuminance environments becomes non-negligible under low-illuminance environments. Summary of the Invention

[0011] Therefore, the purpose of this invention is to provide a solar cell unit, a device for determining the quality of solar cell units that can shorten the time and improve the accuracy of determining the quality of solar cell units used in low-light environments, and a method for manufacturing solar cell units.

[0012] In addition, the present invention aims to provide a method for manufacturing a solar cell and an etching apparatus for a solar cell that can appropriately etch the electrode layer of a solar cell for use in low-light environments.

[0013] The solar cell unit involved in this invention is a solar cell unit having a single cell region on a large-size semiconductor substrate where a back electrode type solar cell is formed, and a blank area elsewhere. The single cell region has a first conductivity type region and a second conductivity type region. The first conductivity type is either p-type or n-type, and the second conductivity type is either p-type or n-type. In the first conductivity type region, a first conductivity type semiconductor layer and a first electrode layer are formed on the back side of the large-size semiconductor substrate. In the second conductivity type region, a second conductivity type semiconductor layer and a second electrode layer are formed on the back side of the large-size semiconductor substrate. The blank area has a first conductivity type unit area per unit area, a second conductivity type unit area per unit area, and a pn short-circuit area. In the first conductivity type unit region, a first conductivity type semiconductor layer is formed on the back side of the large-size semiconductor substrate. In the second conductivity type unit region, a second conductivity type semiconductor layer is formed on the back side of the large-size semiconductor substrate. In the pn short-circuit region, a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and a third electrode layer that electrically short-circuits the first conductivity type semiconductor layer and the second conductivity type semiconductor layer are formed on the back side of the large-size semiconductor substrate.

[0014] The solar cell quality determination device according to the present invention is the aforementioned solar cell quality determination device, comprising: a light irradiation unit that irradiates light onto the main surface of the large-size semiconductor substrate; a photoluminescence observation unit that observes the photoluminescence intensity from the large-size semiconductor substrate; and a quality determination unit that determines the quality of the solar cells in the single-cell region of the solar cell based on the photoluminescence intensity. Assuming that the solar cells in the single-cell region of the solar cell are used in a high-illuminance environment corresponding to outdoor sunlight and a low-illuminance environment corresponding to indoor lighting, the light irradiation unit irradiates light of an intensity lower than the high-illuminance environment and higher than the low-illuminance environment onto the main surface of the large-size semiconductor substrate. The aforementioned quality assessment unit calculates the photoluminescence intensity of the single cell region, the photoluminescence intensity of the first conductivity type unit region, and the photoluminescence intensity of the second conductivity type unit region based on the photoluminescence intensity of the pn short-circuit region. It compares the calculated photoluminescence intensity of the single cell region with the calculated photoluminescence intensity of the first conductivity type unit region and the second conductivity type unit region. The single cell of the solar cell region whose photoluminescence intensity deviates from the calculated photoluminescence intensity of the first conductivity type unit region and the second conductivity type unit region by more than a specified amount is determined to have poor photoelectric conversion characteristics under the aforementioned low illumination environment.

[0015] The present invention relates to a method for manufacturing a solar cell unit having a single cell region on a large-size semiconductor substrate, wherein a single cell with a back electrode type solar cell is formed thereon, and a blank area elsewhere. The single cell region has a first conductivity type region and a second conductivity type region. The first conductivity type is either p-type or n-type, and the second conductivity type is either p-type or n-type. The blank area has a first conductivity type unit area per unit area, a second conductivity type unit area per unit area, and a pn short-circuit area per unit area. The method for manufacturing the solar cell unit includes a semiconductor layer formation step, wherein a first conductivity type semiconductor layer is formed in the first conductivity type region of the single cell region on the back side of the large-size semiconductor substrate; a second conductivity type semiconductor layer is formed in the second conductivity type region of the single cell region on the back side of the large-size semiconductor substrate; a first conductivity type semiconductor layer is formed in the first conductivity type unit area of ​​the blank area on the back side of the large-size semiconductor substrate; a second conductivity type semiconductor layer is formed in the second conductivity type unit area of ​​the blank area on the back side of the large-size semiconductor substrate; and a second conductivity type semiconductor layer is formed in the second conductivity type unit area of ​​the blank area on the back side of the large-size semiconductor substrate. The white area's pn short-circuit region forms a first conductive semiconductor layer and a second conductive semiconductor layer; in the electrode layer formation process, a first electrode layer corresponding to the first conductive semiconductor layer of the first conductive region of the single cell region, a second electrode layer corresponding to the second conductive semiconductor layer of the second conductive region of the single cell region, and a third electrode layer corresponding to the first conductive semiconductor layer and the second conductive semiconductor layer of the pn short-circuit region of the white area and electrically short-circuiting them are formed; and a quality determination process, in which the quality of the single cell in the single cell region of the solar cell unit is determined.In the aforementioned quality determination process, assuming that the solar cell in the aforementioned single-unit region of the aforementioned solar cell unit is used in a high-illuminance environment corresponding to outdoor sunlight and a low-illuminance environment corresponding to indoor lighting, light with an intensity lower than the high-illuminance but higher than the low-illuminance is irradiated onto the main surface of the aforementioned large-size semiconductor substrate. The photoluminescence intensity from the aforementioned single-unit region in the aforementioned large-size semiconductor substrate is observed, and the photoluminescence intensity from the aforementioned first conductivity type unit region, the aforementioned second conductivity type unit region, and the aforementioned pn short-circuit region in the aforementioned large-size semiconductor substrate is also observed. The photoluminescence intensity of the aforementioned single-cell region, the photoluminescence intensity of the aforementioned first conductivity type unit region, and the photoluminescence intensity of the aforementioned second conductivity type unit region are calculated based on the photoluminescence intensity of the aforementioned single-cell region. The calculated photoluminescence intensity of the aforementioned single-cell region is compared with the calculated photoluminescence intensity of the aforementioned first conductivity type unit region and the aforementioned second conductivity type unit region. The single-cell solar cell with a photoluminescence intensity that deviates from the calculated photoluminescence intensity of the aforementioned first conductivity type unit region and the aforementioned second conductivity type unit region by more than a specified amount is judged as having poor photoelectric conversion characteristics under low illumination environment.

[0016] Another method for manufacturing a solar cell according to the present invention is a method for manufacturing a solar cell cell having a single cell region on a semiconductor substrate having a back electrode type solar cell, comprising: a semiconductor layer forming step, wherein a first conductive semiconductor layer is formed on a portion of the single cell region on the back side of the semiconductor substrate, and a second conductive semiconductor layer is formed on another portion of the single cell region on the back side of the semiconductor substrate; and an electrode layer forming step, wherein a conductive film is continuously formed on the first conductive semiconductor layer and the second conductive semiconductor layer on the single cell region on the back side of the semiconductor substrate, and the conductive film is etched to form patterned electrode layers on the first conductive semiconductor layer and the second conductive semiconductor layer, respectively. In the electrode layer formation process described above, when the solar cell in the single area of ​​the solar cell unit is used in a high-illuminance environment corresponding to outdoor sunlight and a low-illuminance environment corresponding to indoor lighting, at least two different intensities of light, namely high-illuminance and low-illuminance, are sequentially irradiated onto the main surface of the semiconductor substrate, and the photoluminescence intensity from the semiconductor substrate is sequentially observed. The etching of the conductive film is then determined based on the photoluminescence intensity of the at least two intensities of light.

[0017] The etching apparatus for solar cell cells according to the present invention is an etching apparatus for forming electrode layers in a single cell region of a solar cell cell having a back electrode type solar cell cell on a semiconductor substrate. It comprises: an etching unit that etches a conductive film continuously deposited on a first conductive semiconductor layer and a second conductive semiconductor layer in the single cell region on the back side of the semiconductor substrate, thereby forming patterned electrode layers in the first and second conductive semiconductor layers respectively; a light irradiation unit that, assuming the solar cell cell in the single cell region of the solar cell cell is used in a high-illuminance environment corresponding to outdoor sunlight and a low-illuminance environment corresponding to indoor lighting, sequentially irradiates at least two different intensities of light—high-illuminance and low-illuminance—on the main surface of the semiconductor substrate in the etching unit; a photoluminescence observation unit that sequentially observes the photoluminescence intensity from the semiconductor substrate in the etching unit; and an etching completion determination unit that determines the end of etching of the conductive film based on the photoluminescence intensity of the at least two intensities of light.

[0018] According to the present invention, it is possible to shorten the time and improve the accuracy of judging the quality of solar cell cells used in low-light environments.

[0019] Furthermore, according to the present invention, it is possible to appropriately etch the electrode layer of a solar cell cell used in a low-light environment. Attached Figure Description

[0020] Figure 1 This is a diagram showing the solar cell unit according to the first embodiment as viewed from the rear side.

[0021] Figure 2 yes Figure 1 Enlarged view of the individual cell region (solar cell), the first conductivity type unit region, the second conductivity type unit region, and the pn short-circuit region in the solar cell unit shown.

[0022] Figure 3 yes Figure 2 The cross-sectional view along line III-III of the single cell region (solar cell cell) shown.

[0023] Figure 4 yes Figure 2 The diagram shows a cross-sectional view along line IV-IV of the first conductivity type unit region, the second conductivity type unit region, and the pn short-circuit region.

[0024] Figure 5A This diagram illustrates the semiconductor layer formation process in the manufacturing method of the solar cell unit according to the first embodiment.

[0025] Figure 5B This diagram illustrates the transparent conductive film formation process in the manufacturing method of the solar cell cell according to the first embodiment.

[0026] Figure 5C This diagram illustrates the metal electrode layer formation process in the manufacturing method of the solar cell cell according to the first embodiment.

[0027] Figure 5D This diagram illustrates the transparent electrode layer formation process in the manufacturing method of the solar cell cell according to the first embodiment.

[0028] Figure 6A This diagram illustrates the semiconductor layer formation process in the manufacturing method of the solar cell unit according to the first embodiment.

[0029] Figure 6B This diagram illustrates the transparent electrode layer formation process (transparent conductive film formation process) in the manufacturing method of the solar cell cell according to the first embodiment.

[0030] Figure 6C This diagram illustrates the metal electrode layer formation process in the manufacturing method of the solar cell cell according to the first embodiment.

[0031] Figure 7 This diagram illustrates the quality determination process and the quality determination device in the manufacturing method of the solar cell unit according to the first embodiment.

[0032] Figure 8 This is a diagram showing the solar cell unit involved in the second embodiment as viewed from the rear side.

[0033] Figure 9 yes Figure 8 An enlarged view of a single cell region (solar cell) in a solar cell unit.

[0034] Figure 10 yes Figure 9 The XX-line cross-sectional view of the individual cell region (solar cell cell) shown.

[0035] Figure 11A This diagram illustrates the semiconductor layer formation process in the manufacturing method of the solar cell cell according to the second embodiment.

[0036] Figure 11B This diagram illustrates the transparent conductive film formation process in the manufacturing method of the solar cell cell according to the second embodiment.

[0037] Figure 11C This diagram illustrates the metal electrode layer formation process in the manufacturing method of the solar cell cell according to the second embodiment.

[0038] Figure 11D This diagram illustrates the transparent electrode layer formation process in the manufacturing method of the solar cell cell according to the second embodiment.

[0039] Figure 12 This is a diagram showing an etching apparatus for a solar cell according to the second embodiment.

[0040] Figure 13A This is a diagram used to illustrate the separation distance of the transparent electrode layer.

[0041] Figure 13B This is a diagram used to illustrate the separation distance of the transparent electrode layer.

[0042] Figure 13C This is a diagram used to illustrate the separation distance of the transparent electrode layer.

[0043] Figure 14A This is a graph showing the relationship between the open-circuit voltage Voc of the semiconductor substrate and the etching time of the transparent electrode layer.

[0044] Figure 14B This is a graph showing the relationship between the fill factor FF of the semiconductor substrate and the etching time of the transparent electrode layer.

[0045] Figure 14C This is a graph showing the relationship between the fill factor FF and the open-circuit voltage Voc of the semiconductor substrate.

[0046] Figure 15 This is a graph showing the relationship between the photoluminescence intensity of the semiconductor substrate and the etching time of the transparent electrode layer.

[0047] Figure 16 This is a diagram illustrating an etching apparatus for a solar cell cell according to a variation of the second embodiment.

[0048] Figure 17 This is an example graph showing the relationship between photoluminescence intensity under high illumination and photoluminescence intensity under low illumination. Detailed Implementation

[0049] Hereinafter, an example of an embodiment of the present invention will be described with reference to the accompanying drawings. Furthermore, the same or equivalent parts are labeled with the same reference numerals in each drawing. Additionally, for convenience, shaded lines, component reference numerals, etc., are sometimes omitted; however, in such cases, refer to the other drawings.

[0050] [First Implementation Method]

[0051] In the first embodiment, techniques related to determining the quality of solar cell cells based on photoluminescence intensity will be described.

[0052] (Solar cell unit)

[0053] Figure 1 This is a diagram showing the solar cell unit according to the first embodiment as viewed from the rear side. Figure 1 The solar cell unit 1 shown has a semiconductor substrate (large-size semiconductor substrate) (wafer) 11 of a specified size (e.g., a 6-inch semi-square shape). The solar cell unit 1 has multiple cell regions 2 on the main surface of the semiconductor substrate 11, each of which has a plurality of solar cell cells formed thereon, and a blank region 3. Furthermore, the solar cell unit 1 has a first conductivity type cell region 4, a second conductivity type cell region 5, and a pn short-circuit region 6 in a portion of the blank region 3.

[0054] <Single cell region: Solar cell>

[0055] The single-cell region 2 is, for example, a region of a heterojunction solar cell that is cut from the solar cell cell 1 by laser cutting to become a back electrode type (also known as a back contact type or back bonding type).

[0056] Solar cells are sometimes integrated into electronic devices such as IoT (Internet of Things) devices or wearable devices. From a design perspective, such electronic devices exist in various shapes and sizes. Therefore, solar cells integrated into such electronic devices require either shapes that conform to the shape of the electronic device or small-sized solar cells.

[0057] Figure 2 yes Figure 1 Enlarged view of the individual cell region (solar cell), the first conductivity type unit region, the second conductivity type unit region, and the pn short-circuit region in the solar cell unit shown. Figure 3 yes Figure 2 The cross-sectional view along line III-III of the individual cell region shown. Figure 4 yes Figure 2 The diagram shows a cross-sectional view along line IV-IV of the first conductivity type unit region, the second conductivity type unit region, and the pn short-circuit region.

[0058] like Figure 2 and Figure 3As shown, the single-unit region 2 has a first conductivity type region 7 and a second conductivity type region 8 on the main surface of the semiconductor substrate 11. Hereinafter, the main surface of the semiconductor substrate 11 on the side that receives light will be referred to as the light-receiving surface, and the main surface on the opposite side of the light-receiving surface of the semiconductor substrate 11 will be referred to as the back surface.

[0059] The first conductive region 7 has a so-called comb-shaped shape, having a plurality of fingers 7f corresponding to comb teeth and a busbar portion 7b corresponding to the support portion of the comb teeth. The busbar portion 7b extends along one side of the semiconductor substrate 11 in a first direction (X direction), and the fingers 7f extend from the busbar portion 7b in a second direction (Y direction) intersecting the first direction.

[0060] Similarly, the second conductive region 8 has a so-called comb-shaped shape, having a plurality of fingers 8f corresponding to comb teeth and a busbar portion 8b corresponding to the support portion of the comb teeth. The busbar portion 8b extends along the edge of the semiconductor substrate 11 opposite to one edge in a first direction (X direction), and the fingers 8f extend from the busbar portion 8b in a second direction (Y direction).

[0061] The fingers 7f and 8f are strips extending along the second direction (Y direction) and are alternately arranged in the first direction (X direction). Furthermore, the comb-shaped form is exemplified below as the first conductive region 7 and the second conductive region 8, but the first conductive region 7 and the second conductive region 8 are not limited to this and can be formed in various shapes.

[0062] In single-unit region 2, a passivation layer 13 and an optical adjustment layer 15 are sequentially formed on the light-receiving side of the semiconductor substrate 11. Additionally, in single-unit region 2, a passivation layer 23, a first conductivity semiconductor layer 25, and a first electrode layer 27 are sequentially formed on a portion of the back side of the semiconductor substrate 11 (first conductivity region 7). Furthermore, in single-unit region 2, a passivation layer 33, a second conductivity semiconductor layer 35, and a second electrode layer 37 are sequentially formed on another portion of the back side of the semiconductor substrate 11 (second conductivity region 8).

[0063] The semiconductor substrate 11 is formed of crystalline silicon material such as monocrystalline silicon or polycrystalline silicon. For example, the semiconductor substrate 11 is an n-type semiconductor substrate doped with an n-type dopant in the crystalline silicon material. Alternatively, the semiconductor substrate 11 may also be a p-type semiconductor substrate doped with a p-type dopant in the crystalline silicon material. Examples of n-type dopants include phosphorus (P). Examples of p-type dopants include boron (B). The semiconductor substrate 11 functions as a photoelectric conversion substrate that absorbs incident light from the light-receiving surface to generate photocarriers (electrons and holes).

[0064] Crystalline silicon is used as the material for the semiconductor substrate 11, so that even when the dark current is small and the intensity of the incident light is low, a relatively high output can be obtained (stable output regardless of the illuminance).

[0065] Passivation layer 13 is formed on the light-receiving side of semiconductor substrate 11. Passivation layer 23 is formed in the first conductivity type region 7 on the back side of semiconductor substrate 11. Passivation layer 33 is formed in the second conductivity type region 8 on the back side of semiconductor substrate 11. Passivation layers 13, 23, and 33 are formed, for example, from a material whose main component is intrinsic (type i) amorphous silicon. Passivation layers 13, 23, and 33 suppress the recombination of charge carriers generated on semiconductor substrate 11 and improve the carrier recovery efficiency.

[0066] An optical adjustment layer 15 is formed on the passivation layer 13 on the light-receiving side of the semiconductor substrate 11. The optical adjustment layer 15 functions as an anti-reflection layer to prevent the reflection of incident light, and also functions as a protective layer to protect the light-receiving side of the semiconductor substrate 11 and the passivation layer 13. The optical adjustment layer 15 is formed, for example, from an insulating material such as silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), or a composite thereof.

[0067] A first conductivity semiconductor layer 25 is formed on the passivation layer 23, i.e., on the first conductivity region 7 on the back side of the semiconductor substrate 11. The first conductivity semiconductor layer 25 is formed, for example, from amorphous silicon material. The first conductivity semiconductor layer 25 is, for example, a p-type semiconductor layer in which a p-type dopant (e.g., boron (B) as described above) is doped into amorphous silicon material.

[0068] The second conductivity semiconductor layer 35 is formed on the passivation layer 33, i.e., on the second conductivity region 8 on the back side of the semiconductor substrate 11. The second conductivity semiconductor layer 35 is formed, for example, from amorphous silicon. The second conductivity semiconductor layer 35 is, for example, an n-type semiconductor layer doped with an n-type dopant (e.g., phosphorus (P) as described above) in amorphous silicon. Alternatively, the first conductivity semiconductor layer 25 may be an n-type semiconductor layer and the second conductivity semiconductor layer 35 may be a p-type semiconductor layer.

[0069] The first conductive semiconductor layer 25 and passivation layer 23, and the second conductive semiconductor layer 35 and passivation layer 33 form a strip extending along the second direction (Y direction) and are alternately arranged in the first direction (X direction). A portion of the second conductive semiconductor layer 35 and passivation layer 33 may also overlap a portion of the adjacent first conductive semiconductor layer 25 and passivation layer 23 (illustration omitted).

[0070] The first electrode layer 27 corresponds to the first conductive semiconductor layer 25, and is specifically formed on the first conductive semiconductor layer 25 in the first conductive region 7 on the back side of the semiconductor substrate 11. The second electrode layer 37 corresponds to the second conductive semiconductor layer 35, and is specifically formed on the second conductive semiconductor layer 35 in the second conductive region 8 on the back side of the semiconductor substrate 11. The first electrode layer 27 has a first transparent electrode layer 28 and a first metal electrode layer 29 sequentially stacked on the first conductive semiconductor layer 25. The second electrode layer 37 has a second transparent electrode layer 38 and a second metal electrode layer 39 sequentially stacked on the second conductive semiconductor layer 35.

[0071] The first transparent electrode layer 28 and the second transparent electrode layer 38 are formed of a transparent conductive material. The transparent conductive material is not particularly limited, and for example, ITO (Indium Tin Oxide: a composite oxide of indium oxide and tin oxide) can be cited.

[0072] The first metal electrode layer 29 and the second metal electrode layer 39 are not particularly limited, and may be formed, for example, from a conductive paste material containing particles of metal such as silver, copper, and aluminum, an insulating resin material, and a solvent.

[0073] The first electrode layer 27 and the second electrode layer 37, namely the first transparent electrode layer 28, the second transparent electrode layer 38, the first metal electrode layer 29, and the second metal electrode layer 39, are strips extending along the second direction (Y direction) and are alternately arranged in the first direction (X direction). The first transparent electrode layer 28 and the second transparent electrode layer 38 are separated from each other, and the first metal electrode layer 29 and the second metal electrode layer 39 are also separated from each other.

[0074] The bandwidth of the first transparent electrode layer 28 in the first direction (X direction) is narrower than the bandwidth of the first metal electrode layer 29 in the first direction (X direction), and the bandwidth of the second transparent electrode layer 38 in the first direction (X direction) is narrower than the bandwidth of the second metal electrode layer 39 in the first direction (X direction).

[0075] <Blank Area>

[0076] like Figure 2 and Figure 4 As shown, in the blank area 3, a passivation layer 13 and an optical adjustment layer 15 are sequentially formed on the light-receiving side of the semiconductor substrate 11. Alternatively, in the blank area 3, passivation layers 23 and 33 may also be stacked on the back side of the semiconductor substrate 11. The blank area 3 has a first conductivity type unit area 4, a second conductivity type unit area 5, and a pn short-circuit area 6.

[0077] <<First Conductivity Type Unit Region>>

[0078] The first-conductivity-type unit region 4 is a region of unit area. In the first-conductivity-type unit region 4, a passivation layer 23 and a first-conductivity-type semiconductor layer 25 are sequentially formed on the back side of the semiconductor substrate 11. The size of the unit area is not particularly limited as long as it is set according to the detection resolution of the photoluminescence observation unit in the later-described superiority determination device.

[0079] <<Second-conductivity-type unit region>>

[0080] The second-conductivity-type unit region 5 is a region of unit area. In the second-conductivity-type unit region 5, a passivation layer 33 and a second-conductivity-type semiconductor layer 35 are sequentially formed on the back side of the semiconductor substrate 11. The size of the unit area is not particularly limited as long as it is set according to the detection resolution of the photoluminescence observation unit in the later-described superiority determination device.

[0081] <<pn short-circuit region>>

[0082] In the pn short-circuit region 6, a passivation layer 23 and a first-conductivity-type semiconductor layer 25 are sequentially formed on a part of the back side of the semiconductor substrate 11, and a passivation layer 33 and a second-conductivity-type semiconductor layer 35 are sequentially formed on another part of the back side of the semiconductor substrate 11. In addition, in the pn short-circuit region 6, a third electrode layer 27A corresponding to the first-conductivity-type semiconductor layer 25 and the second-conductivity-type semiconductor layer 35 and short-circuiting them electrically is formed. The size of the pn short-circuit region 6 is not particularly limited as long as it is set according to the detection resolution of the later-described photoluminescence observation unit.

[0083] (Manufacturing method of solar cell unit)

[0084] Next, refer to Figures 5A to 5D 、 Figures 6A to 6C and Figure 7 to describe the manufacturing method of the solar cell unit according to the first embodiment. Figure 5A and Figure 6A are diagrams showing the semiconductor layer formation process in the manufacturing method of the solar cell unit according to the first embodiment, Figure 5B and Figure 6B are diagrams showing the transparent conductive film formation process (transparent electrode layer formation process) in the manufacturing method of the solar cell unit according to the first embodiment. Figure 5C and Figure 6C are diagrams showing the metal electrode layer formation process in the manufacturing method of the solar cell unit according to the first embodiment, Figure 5D is a diagram showing the transparent electrode layer formation process in the manufacturing method of the solar cell unit according to the first embodiment. In addition, Figure 7This diagram illustrates the quality determination process and the quality determination device in the manufacturing method of the solar cell unit according to the first embodiment.

[0085] First, such as Figure 5A As shown, a passivation layer 23 and a first conductivity semiconductor layer 25 are formed on a portion of the back side of the semiconductor substrate 11, specifically in the first conductivity region 7 of the monomer region 2. Additionally, as... Figure 6A As shown, a passivation layer 23 and a first conductive semiconductor layer 25 are formed in a portion of the first conductive unit region 4 and the pn short-circuit region 6 in the blank region 3 (semiconductor layer formation process).

[0086] For example, after the passivation layer material film and the first conductive semiconductor layer material film are sequentially formed on the entire back side of the semiconductor substrate 11 using CVD or PVD, the passivation layer 23 and the first conductive semiconductor layer 25 can be patterned using an etching method with a resist or metal mask generated by photolithography or printing technology.

[0087] Furthermore, examples of etching solutions for p-type semiconductor layer films include acidic solutions such as hydrofluoric acid containing ozone or a mixture of nitric acid and hydrofluoric acid, while examples of etching solutions for n-type semiconductor layer films include alkaline solutions such as aqueous solutions of potassium hydroxide.

[0088] Alternatively, when using CVD or PVD to stack the passivation layer and the first conductive semiconductor layer on the back side of the semiconductor substrate 11, a mask can be used to simultaneously deposit and pattern the passivation layer 23 and the first conductive semiconductor layer 25.

[0089] Next, as Figure 5A As shown, a passivation layer 33 and a second conductivity semiconductor layer 35 are formed in another portion on the back side of the semiconductor substrate 11, specifically in the second conductivity region 8 within the monomer region 2. Additionally, as... Figure 6A As shown, a passivation layer 33 and a second conductive semiconductor layer 35 are formed in another part of the second conductive unit region 5 and the pn short-circuit region 6 in the blank region 3 (semiconductor layer formation process).

[0090] For example, similar to the above, after the passivation layer material film and the second conductive semiconductor layer material film are sequentially deposited on the entire back side of the semiconductor substrate 11 using CVD or PVD, the passivation layer 33 and the second conductive semiconductor layer 35 can be patterned using a resist generated by photolithography or printing technology, an etching method using a metal mask, or a known stripping method.

[0091] Alternatively, when using CVD or PVD to stack the passivation layer and the second conductive semiconductor layer on the back side of the semiconductor substrate 11, a mask can be used to simultaneously deposit and pattern the passivation layer 33 and the second conductive semiconductor layer 35.

[0092] Furthermore, in this semiconductor layer formation process, the blank area 3 on the back side of the semiconductor substrate 11 may be formed with either a passivation layer 23 or a passivation layer 33. Alternatively, a passivation layer 13 and an optical adjustment layer 15 may be formed on the entire light-receiving surface of the semiconductor substrate 11, namely, the single-unit area 2, the blank area 3, the first conductivity type unit area 4, the second conductivity type unit area 5, and the entire light-receiving surface of the pn short-circuit area 6.

[0093] Next, as Figure 5B As shown, a transparent conductive film 28Z is continuously formed across the first conductive semiconductor layer 25 and the second conductive semiconductor layer 35 in the monomer region 2. Additionally, as... Figure 6B As shown, a transparent electrode layer 28A is continuously formed across the first conductive semiconductor layer 25 and the second conductive semiconductor layer 35 in the pn short-circuit region 6 of the blank region 3 (transparent conductive film formation process: transparent electrode layer formation process). Methods for forming the transparent conductive film 28Z and the transparent electrode layer 28A include, for example, CVD or PVD.

[0094] Next, as Figure 5C As shown, a first metal electrode layer 29 is formed on the first conductive semiconductor layer 25 through a transparent conductive film 28Z in the monomer region 2, and a second metal electrode layer 39 is formed on the second conductive semiconductor layer 35 through a transparent conductive film 28Z. Additionally, as... Figure 6C As shown, a metal electrode layer 29A is formed on the transparent electrode layer 28A in the pn short-circuit region 6 of the blank region 3 (metal electrode layer formation process).

[0095] The first metal electrode layer 29, the second metal electrode layer 39, and the metal electrode layer 29A are formed by printing with a printing material (e.g., ink). Examples of methods for forming the first metal electrode layer 29, the second metal electrode layer 39, and the metal electrode layer 29A include screen printing, inkjet printing, gravure coating, and dispersion printing. Among these, screen printing is preferred.

[0096] Printing materials contain particulate (e.g., spherical) metallic materials within an insulating resin material. Solvents may also be included to adjust viscosity or coatability.

[0097] Examples of insulating resin materials include matrix resins. More specifically, polymeric compounds are preferred as insulating resins, and thermosetting or UV-curing resins are particularly preferred, with epoxy resins, polyurethanes, polyesters, or silicone-based resins being representative examples.

[0098] Examples of metallic materials include silver, copper, and aluminum. Among these, silver paste containing silver particles is preferred.

[0099] For example, the proportion of metallic materials contained in the printing material is more than 85% and less than 95% by weight relative to the total weight of the printing material.

[0100] Next, after printing the first metal electrode layer 29, the second metal electrode layer 39, and the metal electrode layer 29A, the insulating resin in the first metal electrode layer 29, the second metal electrode layer 39, and the metal electrode layer 29A is cured by heat treatment or ultraviolet irradiation treatment.

[0101] Next, as Figure 5D As shown, an etching method using the first metal electrode layer 29 and the second metal electrode layer 39 as masks is used to pattern the transparent conductive film 28Z, thereby forming a first transparent electrode layer 28 and a second transparent electrode layer 38 that are separated and patterned from each other on the first conductive semiconductor layer 25 and the second conductive semiconductor layer 35, respectively (transparent electrode layer formation step). Examples of etching methods include wet etching, and examples of etching solutions include acidic solutions such as hydrochloric acid (HCl). Through the above steps, the solar cell unit 1 of the first embodiment is completed.

[0102] Next, as Figure 7 As shown, light is irradiated onto the solar cell unit 1 (semiconductor substrate 11), and the photoluminescence intensity from the solar cell unit 1 (semiconductor substrate 11) is observed. Based on the photoluminescence intensity, the quality of the individual solar cells in the individual cell region 2 of the solar cell unit 1 is determined (quality determination process). The quality determination device and method for the solar cell unit 1 will be described below.

[0103] (A device and method for determining the quality of solar cell units)

[0104] Next, refer to Figure 7 The device for determining the quality of a solar cell unit 1 according to the first embodiment, namely, the device for determining the quality of photoelectric conversion characteristics of a single cell region (solar cell) 2, will be described, and the method for determining the quality of a solar cell unit 1 according to the first embodiment, namely, the method for determining the quality of photoelectric conversion characteristics of a single cell region 2 of the solar cell in the above-described quality determination process, will also be described. Figure 7As shown, the quality determination device 100 is a device for determining the quality of photoelectric conversion characteristics of individual solar cells in the individual cell region 2 under the aforementioned solar cell unit 1 state. The quality determination device 100 includes a light irradiation unit 110, a photoluminescence observation unit 120, and a quality determination unit 130.

[0105] The light irradiation unit 110 irradiates light onto the light-receiving surface or the back surface of the solar cell unit 1, i.e., the semiconductor substrate 11. Since the back surface is blocked by the metal electrode layer, it is preferable to irradiate light onto the light-receiving surface. The light irradiation unit 110 is, for example, a light irradiation device that irradiates light of a wavelength corresponding to the photoluminescence characteristics of the semiconductor substrate 11.

[0106] When the solar cell in the single area 2 of solar cell unit 1 is under high illuminance conditions corresponding to outdoor sunlight (e.g., 1 sun (1000W / m²)... 2 When used in low-illuminance environments corresponding to indoor lighting environments (for example, environments with current densities greater than 1 / 1000 and less than 1 / 100 of the current density obtained outdoors), the light irradiation unit 110 irradiates the solar cell unit, i.e., the semiconductor substrate 11, with light intensity that is lower than high illuminance but higher than low illuminance.

[0107] The photoluminescence observation unit 120 observes the photoluminescence intensity from the solar cell unit 1, i.e., the semiconductor substrate 11. A known photoluminescence intensity measuring device equipped with a CCD image sensor can be cited as an example of a photoluminescence observation unit.

[0108] Specifically, the photoluminescence observation unit 120 observes the photoluminescence intensity from the single-unit region 2, and also observes the photoluminescence intensity from the first conductivity type unit region 4, the second conductivity type unit region 5, and the pn short-circuit region 6. For example, the photoluminescence observation unit 120 can simultaneously observe the photoluminescence intensity of each region 2, 4, 5, and 6, and perform decomposition and synthesis analysis on a per-pixel basis.

[0109] The quality determination unit 130 determines the quality of the photoelectric conversion characteristics of the solar cell cells in the single cell region 2 based on the photoluminescence intensity. The quality determination unit 130 pre-calculates the area ratio of the first conductivity type region as the area ratio of the first conductivity type region 7 to the first conductivity type unit region 4 in the single cell region 2. Furthermore, the quality determination unit 130 pre-calculates the area ratio of the second conductivity type region as the area ratio of the second conductivity type region 8 to the second conductivity type unit region 5 in the single cell region 2.

[0110] First, the quality determination unit 130 calculates the photoluminescence intensity of a single unit region 2 based on the photoluminescence intensity of the pn short-circuit region 6. Additionally, the quality determination unit 130 calculates the photoluminescence intensity of a first conductivity type unit region 4 based on the photoluminescence intensity of the pn short-circuit region 6. Furthermore, the quality determination unit 130 calculates the photoluminescence intensity of a second conductivity type unit region 5 based on the photoluminescence intensity of the pn short-circuit region 6.

[0111] Next, the quality determination unit 130 compares the calculated photoluminescence intensity of the single cell region 2 with the calculated photoluminescence intensity of the first conductivity type unit region 4 and the second conductivity type unit region 5. Furthermore, the quality determination unit 130 determines that the single cell region 2 of the solar cell whose photoluminescence intensity deviates from the calculated photoluminescence intensity of the first conductivity type unit region 4 and the second conductivity type unit region 5 by more than a predetermined amount as having poor photoelectric conversion characteristics under low illumination conditions.

[0112] At this time, the quality determination unit 130 considers the area ratio of the first conductive type region 7 of the single-unit region 2 to the first conductive type unit region 4, and the area ratio of the second conductive type region 8 of the single-unit region 2 to the second conductive type unit region 5.

[0113] Specifically, the quality determination unit 130 calculates a reference photoluminescence intensity for a first conductivity type region by multiplying the photoluminescence intensity of a first conductivity type unit region 4, based on the photoluminescence intensity of the pn short-circuit region 6, by the area ratio of the first conductivity type regions. Additionally, the quality determination unit 130 calculates a reference photoluminescence intensity for a second conductivity type region by multiplying the photoluminescence intensity of a second conductivity type unit region 5, based on the photoluminescence intensity of the pn short-circuit region 6, by the area ratio of the second conductivity type regions. Furthermore, the quality determination unit 130 calculates a reference photoluminescence intensity by adding the reference photoluminescence intensity of the first conductivity type region and the reference photoluminescence intensity of the second conductivity type region.

[0114] Furthermore, the quality determination unit 130 compares the calculated photoluminescence intensity of the individual cell region 2 with the calculated reference photoluminescence intensity. The quality determination unit 130 determines that the individual cell region 2 of the solar cell has poor photoelectric conversion characteristics under low illumination conditions if the photoluminescence intensity deviates from the calculated reference photoluminescence intensity by more than a specified amount.

[0115] The quality determination unit 130 is composed of, for example, a DSP (Digital Signal Processor) or an FPGA (Field-Programmable Gate Array). The various functions of the quality determination unit 130 are implemented, for example, by executing prescribed software (programs, applications) stored in the memory. The various functions of the quality determination unit 130 can be implemented through a combination of hardware and software, or solely through hardware (electronic circuitry).

[0116] Furthermore, the quality determination unit 130 includes a storage unit. The storage unit stores pre-calculated area ratios of the first conductivity type region and the second conductivity type region. Additionally, the storage unit pre-stores a reference value (prescribed value) for the allowable deviation of photoluminescence intensity used to determine the quality of the photoelectric conversion characteristics of the solar cell cells in the individual cell region 2. The storage unit may be, for example, a rewritable memory such as an EEPROM, or a rewritable disk such as an HDD (Hard Disk Drive) or SSD (Solid State Drive).

[0117] Here, if the photoluminescence intensity is used to determine the photoelectric conversion characteristics of a single solar cell, sometimes a high photoluminescence intensity, considered good under high illumination, may be low under low illumination, considered poor. This is believed to be caused by the following factors: Leakage current, which is negligible under high illumination, becomes non-negligible under low illumination. In other words, insufficient etching of the transparent electrode layer, which is negligible under high illumination, becomes non-negligible under low illumination.

[0118] Regarding this, we considered using the photoluminescence intensity under low-light conditions instead of the photoluminescence intensity under high-illuminance conditions to determine the photoelectric conversion characteristics of individual solar cell regions. However, under low-illuminance conditions, without extending the illumination time, a detectable photoluminescence intensity cannot be obtained, resulting in a longer measurement time. Furthermore, if the photoluminescence intensity is low, the measurement accuracy will decrease due to the detector's detection limit or noise. Additionally, under low-illuminance conditions, the light source output is unstable, leading to reduced measurement accuracy and reproducibility.

[0119] Regarding this point, in the solar cell unit 1 of this embodiment, a first conductive type unit region 4, a second conductive type unit region 5, and a pn short-circuit region 6 are formed in a portion of the blank area 3. Therefore, according to the solar cell unit 1 of this embodiment, the solar cell unit 1 quality determination device 100, and the quality determination step in the manufacturing method of the solar cell unit 1, when measuring the photoluminescence characteristics of a single unit region 2 (solar cell) in the solar cell unit 1 (semiconductor substrate 11), a quality determination benchmark can be calculated based on the first conductive type unit region 4, the second conductive type unit region 5, and the pn short-circuit region 6, and the quality determination of the single unit region 2 (solar cell) to be determined can be performed relative to the calculated benchmark. In this way, a relative value rather than an absolute value evaluation can be performed, so leakage current, i.e., insufficient etching, can be determined regardless of the intensity of the irradiated light. Therefore, even if the irradiated light is greater than the low illumination corresponding to a low illumination environment, leakage current, i.e., insufficient etching of the transparent electrode layer, can be determined with high accuracy in a low illumination environment.

[0120] In this way, the illumination ratio can be increased to match the low-illuminance level in low-illuminance environments, thus shortening the irradiation time required to obtain detectable photoluminescence intensity and reducing measurement time. Furthermore, the photoluminescence intensity can be increased, thereby reducing the influence of detector detection limits or noise and improving measurement accuracy. Additionally, the output of the light source can be increased, resulting in more stable output and improved measurement accuracy and reproducibility.

[0121] Here, in a solar cell unit mounted in a small electronic device such as a small IoT device or wearable device, multiple solar cell units are arranged on a large-size semiconductor substrate (wafer) of a specified size (e.g., a 6-inch semi-square shape). Regarding this, according to the solar cell unit 1, the solar cell unit 1 quality determination device 100, and the manufacturing method of the solar cell unit 1 of this embodiment, multiple cell regions can be observed simultaneously based on the detection resolution of the photoluminescence observation unit, thereby improving productivity.

[0122] However, as a method for evaluating the photoelectric conversion characteristics of a single cell region 2 in the state of a solar cell unit, it is generally known to measure the current-voltage characteristics (IV characteristics) and calculate the photoelectric conversion efficiency by using physical contact with a needle. However, in this method, due to the miniaturization of solar cell units, the proportion of the damage area caused by physical contact to the overall area of ​​the single cell region becomes larger, resulting in a significant decrease in carrier lifetime, i.e., photoelectric conversion efficiency, under low illumination. In this regard, the solar cell unit 1, the solar cell unit 1 quality determination device 100, and the manufacturing method of the solar cell unit 1 according to this embodiment, since the method is based on photoluminescence characteristics that are non-physical contact, can avoid the decrease in carrier lifetime, i.e., photoelectric conversion efficiency, under low illumination caused by damage caused by physical contact.

[0123] However, regarding photoluminescence measurements under low-illuminance conditions, the output of the light source is unstable, leading to reduced measurement accuracy and reproducibility. Therefore, this embodiment aims to maintain a constant light source output and use an ND filter to attenuate the light intensity. In this respect, the output of the light source can be increased, thus eliminating the need for an ND filter.

[0124] The embodiments of the present invention have been described above, but the present invention is not limited to the above embodiments and various modifications and variations are possible. For example, in the first embodiment described above, when considering the area ratio of the first conductive region 7 to the first conductive unit region 4 of the single-unit region 2, and the area ratio of the second conductive region 8 to the second conductive unit region 5 of the single-unit region 2, the reference values ​​of the first conductive unit region 4 and the second conductive unit region 5 are multiplied by the area ratio. However, the measurement result of the single-unit region 2 may also be divided by the area ratio.

[0125] Specifically, in the quality determination unit of the solar cell quality determination device and in the quality determination process of the solar cell manufacturing method,

[0126] Alternatively, the area ratios of the first and second monomers can be calculated as the area ratios of the first conductive region and the second conductive region within a monomer region. The area ratio of the first conductive region can be calculated as the area ratio of the first conductive region relative to the first conductive unit region within a monomer region, and the area ratio of the second conductive region can be calculated as the area ratio of the second conductive region relative to the second conductive unit region within a monomer region.

[0127] The photoluminescence intensity of a single-unit region is calculated by dividing the photoluminescence intensity of a single-unit region based on the photoluminescence intensity of the pn short-circuit region by the first single-unit area ratio and the first conductivity type region area ratio, resulting in the first single-unit photoluminescence intensity per unit region. The photoluminescence intensity of a single-unit region based on the photoluminescence intensity of the pn short-circuit region is also calculated by dividing the photoluminescence intensity of a single-unit region based on the photoluminescence intensity of the pn short-circuit region by the second single-unit area ratio and the second conductivity type region area ratio, resulting in the second single-unit photoluminescence intensity per unit region.

[0128] The calculated photoluminescence intensity of the first monomer unit area is compared with the calculated photoluminescence intensity of the first conductivity unit area, and the calculated photoluminescence intensity of the second monomer unit area is compared with the calculated photoluminescence intensity of the second conductivity unit area.

[0129] A solar cell in a single-cell unit region whose photoluminescence intensity deviates by more than a specified amount relative to the calculated photoluminescence intensity of the first conductivity type unit region, and / or a solar cell in a single-cell unit region whose photoluminescence intensity deviates by more than a specified amount relative to the calculated photoluminescence intensity of the second conductivity type unit region, can be judged as having poor photoelectric conversion characteristics under low illumination conditions.

[0130] Furthermore, in the first embodiment described above, multiple groups of units, each consisting of a first conductivity type unit region 4, a second conductivity type unit region 5, and a pn short-circuit region 6, are configured in each individual unit region 2. However, it is sufficient to configure at least one group. Moreover, from the viewpoint of performance deviation in the main surface of a large-size semiconductor substrate, as in the embodiment described above, it is preferable to configure one group near each individual unit region 2.

[0131] Furthermore, in the first embodiment described above, a solar cell unit having multiple individual regions (solar cell units), a device for determining the quality of such units, and a manufacturing method were illustrated. However, the present invention is not limited to this, and can also be applied to a solar cell unit having a single individual region (solar cell unit), a device for determining the quality of such units, and a manufacturing method thereof.

[0132] Furthermore, while the first embodiment described above illustrates a manufacturing method for etching a transparent electrode layer using a metal electrode layer as a mask, it is not limited to this method. For example, the features of the present invention can also be applied to manufacturing methods for etching a transparent electrode layer using a general metal mask or photoresist as a mask.

[0133] Furthermore, while the first embodiment described above illustrates wet etching using an etching solution, it is not limited to this method. For example, the features of the present invention can also be applied to dry etching.

[0134] Furthermore, in the first embodiment described above, as Figure 3As shown, a heterojunction solar cell and a solar cell unit are illustrated, but the present invention is not limited to heterojunction solar cell and solar cell unit, and can also be applied to various solar cell cells and solar cell units such as homojunction solar cells.

[0135] Furthermore, while the first embodiment described above exemplifies a solar cell unit and a solar cell cell having a crystalline silicon substrate, it is not limited to this. For example, the solar cell unit and the solar cell cell may also have a gallium arsenide (GaAs) substrate.

[0136] [Second Implementation]

[0137] In the second embodiment, the technology related to determining the end of etching of solar cell cells based on photoluminescence intensity will be described.

[0138] (Solar cell unit)

[0139] Figure 8 This is a diagram showing the solar cell unit involved in the second embodiment as viewed from the rear side. Figure 8 The solar cell unit 1 shown has a semiconductor substrate (large-size semiconductor substrate) (wafer) 11 of a specified size (e.g., a 6-inch semi-square shape). The solar cell unit 1 has multiple cell regions 2 on the main surface of the semiconductor substrate 11, each of which is formed with a plurality of solar cell cells, and blank regions 3 thereafter.

[0140] <Single cell region: Solar cell>

[0141] The single-cell region 2 is, for example, a region of a heterojunction solar cell that is cut from the solar cell cell 1 by laser cutting to become a back electrode type (also known as a back contact type or back bonding type).

[0142] Solar cells are sometimes integrated into electronic devices such as IoT (Internet of Things) devices or wearable devices. From a design perspective, such electronic devices exist in various shapes and sizes. Therefore, solar cells integrated into such electronic devices require either shapes that conform to the shape of the electronic device or small-sized solar cells.

[0143] Figure 9 yes Figure 8 An enlarged view of a single cell region (cell solar cell) within a solar cell unit is shown. Figure 10 yes Figure 9 The image shows a cross-sectional view along line XX of a single cell region (solar cell). (See attached image.) Figure 9 and Figure 10 As shown, the single-unit region 2 has a first conductivity type region 7 and a second conductivity type region 8 on the main surface of the semiconductor substrate 11. Hereinafter, the main surface of the semiconductor substrate 11 on the side that receives light will be referred to as the light-receiving surface, and the main surface on the opposite side of the light-receiving surface of the semiconductor substrate 11 will be referred to as the back surface.

[0144] The first conductive region 7, like the one described above, has a so-called comb-shaped shape, having multiple fingers 7f corresponding to comb teeth and a busbar portion 7b corresponding to the support portion of the comb teeth. The second conductive region 8, like the one described above, has a so-called comb-shaped shape, having multiple fingers 8f corresponding to comb teeth and a busbar portion 8b corresponding to the support portion of the comb teeth.

[0145] In single-unit region 2, a passivation layer 13 and an optical adjustment layer 15 are sequentially formed on the light-receiving side of the semiconductor substrate 11. Additionally, in single-unit region 2, a passivation layer 23, a first conductivity semiconductor layer 25, and a first electrode layer 27 are sequentially formed on a portion of the back side of the semiconductor substrate 11 (first conductivity region 7). Furthermore, in single-unit region 2, a passivation layer 33, a second conductivity semiconductor layer 35, and a second electrode layer 37 are sequentially formed on another portion of the back side of the semiconductor substrate 11 (second conductivity region 8).

[0146] The semiconductor substrate 11, passivation layers 13, 23, and 33, optical adjustment layer 15, first conductive semiconductor layer 25, second conductive semiconductor layer 35, first electrode layer 27, and second electrode layer 37 are the same as described above. Additionally, as described above, the first electrode layer 27 has a first transparent electrode layer 28 and a first metal electrode layer 29. The second electrode layer 37 has a second transparent electrode layer 38 and a second metal electrode layer 39.

[0147] <Blank Area>

[0148] In the blank area 3, a passivation layer 13 and an optical adjustment layer 15 may be sequentially formed on the light-receiving side of the semiconductor substrate 11. Alternatively, in the blank area 3, on the back side of the semiconductor substrate 11, a passivation layer 23 and a first conductive semiconductor layer 25 may be formed, or a passivation layer 33 and a second conductive semiconductor layer 35 may be formed.

[0149] (Manufacturing method of solar cell unit)

[0150] Next, refer to Figures 11A to 11D The manufacturing method of the solar cell unit according to the second embodiment will be described. Figure 11A This diagram illustrates the semiconductor layer formation process in the manufacturing method of the solar cell cell according to the second embodiment. Figure 11BThis diagram illustrates the transparent conductive film formation process in the manufacturing method of the solar cell cell according to the second embodiment. Figure 11C This diagram illustrates the metal electrode layer formation process in the manufacturing method of the solar cell cell according to the second embodiment. Figure 11D This diagram illustrates the transparent electrode layer formation process in the manufacturing method of the solar cell according to the second embodiment. Figures 11A to 11D The back side of the semiconductor substrate 11 is shown, while the surface side of the semiconductor substrate 11 is omitted.

[0151] First, such as Figure 11A As shown, a passivation layer 23 and a first conductivity semiconductor layer 25 are formed on a portion of the back side of the semiconductor substrate 11, specifically in the first conductivity region 7 of the monomer region 2 (semiconductor layer formation process). Next, a passivation layer 33 and a second conductivity semiconductor layer 35 are formed on another portion of the back side of the semiconductor substrate 11, specifically in the second conductivity region 8 of the monomer region 2 (semiconductor layer formation process). The method for forming these semiconductor layers is the same as described above.

[0152] Furthermore, in this semiconductor layer formation process, either a passivation layer 23 and a first conductive semiconductor layer 25 can be formed in the blank area 3 on the back side of the semiconductor substrate 11, or a passivation layer 33 and a second conductive semiconductor layer 35 can be formed (illustration omitted). Alternatively, a passivation layer 13 and an optical adjustment layer 15 can be formed on the entire light-receiving surface of the semiconductor substrate 11, i.e., the entire light-receiving surface of the single-unit region 2 and the blank area 3 (illustration omitted).

[0153] Next, as Figure 11B As shown, a transparent conductive film 28Z is continuously formed across the first conductive semiconductor layer 25 and the second conductive semiconductor layer 35 in the monomer region 2 (transparent conductive film formation process). The method for forming the transparent conductive film 28Z is the same as described above, for example, using CVD or PVD.

[0154] Next, as Figure 11C As shown, a first metal electrode layer 29 is formed on the first conductive semiconductor layer 25 through a transparent conductive film 28Z in the monomer region 2, and a second metal electrode layer 39 is formed on the second conductive semiconductor layer 35 through a transparent conductive film 28Z (metal electrode layer formation process). As described above, methods for forming the first metal electrode layer 29 and the second metal electrode layer 39 can include printing methods using printing materials (e.g., ink), such as screen printing, inkjet printing, gravure coating, or dispersion printing. Among these, screen printing is preferred.

[0155] Next, as Figure 11DAs shown, an etching method using the first metal electrode layer 29 and the second metal electrode layer 39 as masks is used to pattern the transparent conductive film 28Z, thereby forming the first transparent electrode layer 28 and the second transparent electrode layer 38 that are separated from each other (transparent electrode layer formation process). Examples of etching methods include wet etching, and examples of etching solutions include acidic solutions such as hydrochloric acid (HCl).

[0156] At this point, the etching of the transparent conductive film 28Z is determined to be complete based on its photoluminescence properties, but the details will be explained later in the section on the etching apparatus and etching method for the solar cell unit 1. Through the above processes, the back electrode type solar cell unit 1 of the second embodiment is completed.

[0157] (Etching device for solar cell units)

[0158] Next, refer to Figure 12 The etching apparatus for the solar cell unit 1 according to the second embodiment, namely the etching apparatus for the transparent electrode layer in the single cell region (solar cell unit) 2, will be described. Figure 12 This diagram illustrates the etching apparatus for a solar cell according to the second embodiment, specifically the etching apparatus for the transparent electrode layer in a single cell region (solar cell). Figure 12 As shown, the etching apparatus 200 is used to form a first transparent electrode layer 28 and a second transparent electrode layer 38 in a single-cell region (solar cell cell) 2 in the above-described transparent electrode layer formation process. The etching apparatus 200 includes an etching unit 210, a light irradiation unit 220, a photoluminescence observation unit 230, and an etching completion determination unit 240.

[0159] Etched section 210 pairs in Figure 11C The transparent conductive film 28Z, which is continuously deposited on the first conductive semiconductor layer 25 and the second conductive semiconductor layer 35 in the monomer region 2 on the back side of the semiconductor substrate 11 shown, is etched, as shown. Figure 11D As shown, a patterned first transparent electrode layer 28 and a second transparent electrode layer 38 are formed on the first conductive semiconductor layer 25 and the second conductive semiconductor layer 35, respectively. For example, as described above, an etching method is used that uses the first metal electrode layer 29 and the second metal electrode layer 39 as masks. Examples of etching methods include wet etching, where the etching section 210 is an etching solution bath. Examples of etching solutions include acidic solutions such as hydrochloric acid (HCl).

[0160] The light irradiation unit 220 irradiates light onto the light-receiving surface or back surface of the semiconductor substrate 11 in the etching unit 210. Since the back surface is blocked by a metal electrode layer, it is preferable to irradiate light onto the light-receiving surface. The light irradiation unit 220 is, for example, a light irradiation device that irradiates light of a wavelength corresponding to the photoluminescence characteristics of the semiconductor substrate 11.

[0161] When the solar cell in the single area 2 of solar cell unit 1 is under high illuminance conditions corresponding to outdoor sunlight (e.g., 1 sun (1000W / m²)... 2 When used in low-illuminance environments corresponding to indoor lighting environments (for example, environments with current densities of 1 / 100 to 1 / 1000 of those obtained outdoors), the light irradiation unit 220 sequentially irradiates the main surface of the semiconductor substrate 11 in the etching unit 210 with light of two different intensities: high-illuminance and low-illuminance.

[0162] Here, as a method for generating low-illuminance light, reducing the output of the light source can lead to instability in the output, potentially resulting in reduced accuracy and reproducibility. Therefore, as a method for generating low-illuminance light, it is preferable to keep the output of the light source constant and use an ND filter for light reduction.

[0163] The photoluminescence observation unit 230 sequentially observes the photoluminescence intensity from the semiconductor substrate 11 in the etching unit 210. A known photoluminescence intensity measuring device equipped with a CCD image sensor can be cited as the photoluminescence observation unit. For example, the photoluminescence observation unit 230 can simultaneously observe the photoluminescence intensity of each individual region 2 and perform decomposition and synthesis analysis on a pixel-by-pixel basis.

[0164] The etching completion determination unit 240 determines the completion of etching of the transparent conductive film 28Z based on the photoluminescence intensity of light of two different intensities. Specifically, if the photoluminescence intensity for high-intensity light is above a predetermined value but the photoluminescence intensity for low-intensity light is below a predetermined value, leakage current may occur due to insufficient etching, which is negligible under high-intensity light but not negligible under low-intensity light. Therefore, the etching completion determination unit 240 determines that the etching of the transparent conductive film 28Z is not complete. The predetermined value can be preset considering both high-intensity and low-intensity environments of the solar cell in the single-cell region 2 of the solar cell unit 1.

[0165] Furthermore, when the photoluminescence intensity for high-illuminance light reaches a predetermined value or higher, and the photoluminescence intensity for low-illuminance light reaches a predetermined value or higher, the etching completion determination unit 240 determines that the etching of the transparent conductive film 28Z has ended.

[0166] Furthermore, if the photoluminescence intensity under high illumination light is less than a specified value even after a specified time, there is a possibility that defects may be caused by factors other than leakage current due to insufficient etching. Therefore, the etching completion determination unit 240 determines that the defects are caused by factors other than insufficient etching of the transparent conductive film 28Z. The specified time can be preset by considering the film formation conditions and etching conditions of the transparent conductive film 28Z.

[0167] The etching completion determination unit 240 is configured, for example, by a processing unit such as a DSP (Digital Signal Processor) or an FPGA (Field-Programmable Gate Array). The various functions of the etching completion determination unit 240 are implemented, for example, by executing predetermined software (programs, applications) stored in the storage unit. The various functions of the etching completion determination unit 240 can be implemented through a combination of hardware and software, or solely through hardware (electronic circuitry).

[0168] In addition, the etching completion determination unit 240 includes a storage unit. The storage unit pre-stores a threshold value (predefined value) for the photoluminescence intensity used to determine the end of etching and an etching time (predefined time). The storage unit is, for example, a rewritable memory such as an EEPROM, or a rewritable disk such as an HDD (Hard Disk Drive) or an SSD (Solid State Drive).

[0169] (Etching method for solar cell units)

[0170] Next, the etching method of the solar cell unit 1 according to the second embodiment, that is, the etching method of the transparent electrode layers 28 and 38 of the single cell region (solar cell unit) 2 in the above-described transparent electrode layer formation process, will be described.

[0171] like Figure 12 As shown, a semiconductor substrate 11 with a transparent conductive film 28Z continuously deposited on a first conductive semiconductor layer 25 and a second conductive semiconductor layer 35 is immersed in an etching section 210 (wet etching). Thereby, the first metal electrode layer 29 and the second metal electrode layer 39 formed on the transparent conductive film 28Z are used as masks to etch the transparent conductive film 28Z, as shown. Figure 11D As shown, a patterned first transparent electrode layer 28 and a second transparent electrode layer 38 are formed in the first conductive semiconductor layer 25 and the second conductive semiconductor layer 35, respectively.

[0172] At this time, the light irradiation unit 220 irradiates the light-receiving surface or back surface of the semiconductor substrate 11 with light of a wavelength corresponding to the photoluminescence characteristics of the semiconductor substrate 11. Specifically, the light irradiation unit 220 sequentially irradiates the main surface of the semiconductor substrate 11 in the etching unit 210 with light of two different intensities: high illuminance and low illuminance. Furthermore, the photoluminescence observation unit 230 sequentially observes the photoluminescence intensity from the semiconductor substrate 11.

[0173] Here, the performance (open-circuit voltage Voc, fill factor FF) of the semiconductor substrate 11 relative to the separation distance of the transparent electrode layers 28 and 38 is related to the photoluminescence intensity characteristics of the semiconductor substrate 11.

[0174] Figures 13A-13C This is a diagram used to illustrate the separation distance of transparent electrode layers 28 and 38. Figure 13A This diagram illustrates the case where (i) the etching of the transparent electrode layers 28 and 38 is insufficient and the separation distance between the transparent electrode layers 28 and 38 is small. Figure 13B This diagram illustrates the situation where (ii) the etching of the transparent electrode layers 28 and 38 is appropriate and the separation distance between the transparent electrode layers 28 and 38 is appropriate. Figure 13C This diagram illustrates the case of (iii) excessive etching of transparent electrode layers 28 and 38 and a large separation distance between transparent electrode layers 28 and 38.

[0175] in addition, Figure 14A This is a graph showing the relationship between the open-circuit voltage Voc of the semiconductor substrate 11 and the etching time of the transparent electrode layers 28 and 38. Figure 14B This is a graph showing the relationship between the fill factor FF of the semiconductor substrate 11 and the etching time of the transparent electrode layers 28 and 38. Figure 14C This is a graph showing the relationship between the fill factor FF and the open-circuit voltage Voc of the semiconductor substrate 11. Additionally, Figure 15 This is a graph showing the relationship between the photoluminescence intensity of the semiconductor substrate 11 and the etching time of the transparent electrode layers 28 and 38.

[0176] like Figure 13A As shown, if (i) the etching of transparent electrode layers 28 and 38 is insufficient and the separation distance between transparent electrode layers 28 and 38 is small, then as Figure 14A (i) and Figure 13B As shown in (i), the Voc and FF of the semiconductor substrate 11 are low. At this time, as Figure 15 As shown in (i), the photoluminescence intensity of the semiconductor substrate 11 is also low.

[0177] Then, if the etching of the transparent electrode layers 28 and 38 progresses and the separation distance between the transparent electrode layers 28 and 38 increases, the Voc and FF of the semiconductor substrate 11 will increase. At this time, the photoluminescence intensity of the semiconductor substrate 11 will also increase.

[0178] Then, as Figure 13B As shown, if (ii) the etching of the transparent electrode layers 28 and 38 becomes appropriate (optimal) and the separation distance of the transparent electrode layers 28 and 38 becomes appropriate (optimal), then as Figure 14A (ii) and Figure 14B As shown in (ii), the Voc and FF of the semiconductor substrate 11 become maximum. At this time, as Figure 15 As shown in (ii), the photoluminescence intensity of the semiconductor substrate 11 also becomes maximum, or the change in photoluminescence intensity becomes saturated, and the increase (change) in photoluminescence intensity per unit time becomes below a specified value.

[0179] Furthermore, if the etching of the transparent electrode layers 28 and 38 progresses and the separation distance between the transparent electrode layers 28 and 38 increases, the Voc of the semiconductor substrate 11 remains at its maximum, but the FF decreases. At this time, the photoluminescence intensity of the semiconductor substrate 11 remains at its maximum.

[0180] That is, such as Figure 13C As shown, if (iii) the etching of transparent electrode layers 28 and 38 becomes excessive and the separation distance between transparent electrode layers 28 and 38 is too large, then as Figure 14A (iii) and Figure 14B As shown in (iii), the Voc of the semiconductor substrate 11 remains at its maximum, but the FF decreases. At this time, as Figure 15 As shown in (iii), the photoluminescence intensity of the semiconductor substrate 11 remains at its maximum.

[0181] Therefore, the moment when (ii) the PL intensity becomes the maximum (the moment of saturation), or the moment when the decrease in photoluminescence intensity per unit time (the amount of change) becomes below a specified value, is the moment when (ii) the etching of the transparent electrode layers 28 and 38 is appropriate (optimal).

[0182] here, Figure 17 This illustrates an example of the relationship between photoluminescence intensity under high illumination and photoluminescence intensity under low illumination. If the end of etching a transparent conductive film is determined based on photoluminescence intensity, then... Figure 17As shown by the rhombus-shaped points, sometimes the photoluminescence intensity is high under light irradiation corresponding to high illumination (e.g., 1 sun) but low under light irradiation corresponding to low illumination (e.g., an environment where the current density is 1 / 110 of that in high illumination). This is believed to be caused by the following factors: Leakage current that is negligible even under high illumination becomes non-negligible under low illumination. In other words, etch insufficiency that is negligible even under high illumination becomes non-negligible under low illumination.

[0183] Therefore, the etching completion determination unit 240 determines the end of etching of the transparent conductive film 28Z based on the photoluminescence intensity of the two light intensities. Specifically, as... Figure 17 As shown in the diamond-shaped dot, even if the photoluminescence intensity for high illumination light is above a specified value and the photoluminescence intensity for low illumination light is below a specified value, there is a leakage current caused by insufficient etching, which is negligible under high illumination but not negligible under low illumination. Therefore, the etching completion determination unit 240 determines that the etching of the transparent conductive film 28Z has not been completed.

[0184] Moreover, such as Figure 17 As shown by the circular dot, when the photoluminescence intensity for high-illuminance light reaches a predetermined value or higher, and the photoluminescence intensity for low-illuminance light reaches a predetermined value or higher, the etching end determination unit 240 determines that the etching of the transparent conductive film 28Z has ended.

[0185] In addition, in such Figure 17 The triangular point indicates that even after a specified time, if the photoluminescence intensity under high illumination light is less than a specified value, there is a possibility of defects caused by factors other than leakage current caused by insufficient etching. Therefore, the etching end judgment unit 240 determines that the defects are caused by factors other than insufficient etching of the transparent conductive film 28Z.

[0186] As explained above, the manufacturing method of the solar cell unit 1 and the etching apparatus 200 of the solar cell unit 1 according to this embodiment determine the end of etching of the transparent conductive film 28Z based not only on the photoluminescence characteristics under high illumination conditions but also on the photoluminescence characteristics under low illumination conditions. This reduces leakage current caused by insufficient etching, which is negligible under high illumination conditions but not negligible under low illumination conditions. Therefore, the etching of the transparent electrode layers 28 and 38 of the single-cell region (solar cell unit) 2 used in low illumination conditions can be appropriately performed. This improves the photoelectric conversion efficiency of the single-cell region (solar cell unit) 2 under low illumination conditions.

[0187] Furthermore, according to the manufacturing method of the solar cell unit 1 and the etching apparatus 200 of the solar cell unit 1 of this embodiment, it is possible to distinguish between the reduction in photoelectric conversion efficiency (lifetime) caused by leakage current due to insufficient etching and the reduction in photoelectric conversion efficiency (lifetime) caused by other factors.

[0188] Here, in a solar cell unit mounted in a small electronic device such as a small IoT device or wearable device, multiple solar cell units are arranged on a large-size semiconductor substrate (wafer) of a specified size (e.g., a 6-inch semi-square shape). Regarding this, according to the manufacturing method of solar cell unit 1 and the etching apparatus 200 of solar cell unit 1 in this embodiment, multiple cell regions can be observed simultaneously based on the detection resolution of the photoluminescence observation unit, thereby improving productivity.

[0189] However, as a known method for determining the end of etching, a method is to measure the current or resistance by using physical contact with a needle. However, in this method, due to the miniaturization of individual solar cell units, the proportion of the damaged area caused by physical contact relative to the overall area of ​​the cell region increases, resulting in a significant decrease in carrier lifetime, i.e., photoelectric conversion efficiency, under low illumination. In this regard, the manufacturing method of the solar cell unit 1 and the etching apparatus 200 of the solar cell unit 1 according to this embodiment, being based on photoluminescence characteristics that are non-physical contact, can avoid the reduction in carrier lifetime, i.e., photoelectric conversion efficiency, under low illumination caused by damage from physical contact.

[0190] However, in actual mass production, it is difficult to set the optimal etching time. For example, if PVD is used to simultaneously deposit transparent electrode layers on multiple semiconductor substrates, the thickness of the transparent electrode layer will vary depending on its position within the PVD apparatus. Thus, if the thickness of the transparent electrode layer varies depending on the semiconductor substrate (wafer), it is difficult to set the optimal etching time when simultaneously etching the transparent electrode layers of multiple semiconductor substrates.

[0191] Regarding this point, such as Figure 16 As shown, when multiple semiconductor substrates 11 are simultaneously immersed in the etching section 210 for etching using the box 115, at least one semiconductor substrate 11 (thick) with the thickest transparent conductive film 28Z and at least one semiconductor substrate 11 (thin) with the thinnest transparent conductive film 28Z can be used as the object for light irradiation, photoluminescence intensity observation and etching completion determination.

[0192] For example, at least one semiconductor substrate 11 (thick) with the thickest transparent conductive film 28Z and at least one semiconductor substrate 11 (thin) with the thinnest transparent conductive film 28Z are respectively disposed at both ends of the housing 115, and the photoluminescence intensity is observed at both ends of the housing 115. Thus, even if there are deviations in the film thickness of the transparent electrode layers 28 and 38 of each semiconductor substrate 11, the multiple transparent electrode layers 28 and 38 can be etched more appropriately.

[0193] Furthermore, when etching multiple semiconductor substrates 11 are simultaneously immersed in the etching section 210 using the 115, it is sufficient to use only the semiconductor substrate 11 (thickest) among the multiple semiconductor substrates 11 with the thickest transparent conductive film 28Z as the object for light irradiation, photoluminescence intensity observation, and etching completion determination.

[0194] For example, at least one semiconductor substrate 11 (thickness) with the thickest transparent conductive film 28Z is disposed at one end of the housing 115, and the photoluminescence intensity is observed at one end of the housing 115.

[0195] The embodiments of the present invention have been described above, but the present invention is not limited to the above embodiments and various modifications and variations are possible. For example, in the above embodiments, the etching end determination is based on the photoluminescence characteristics of light with two intensities: high illuminance and low illuminance. However, the present invention is not limited to this, and the etching end determination can also be based on the photoluminescence characteristics of light with intensities including one or more intensities between high illuminance and low illuminance, or light with intensities of three or more intensities between high illuminance and low illuminance. In this case, the light irradiation unit 220 sequentially irradiates the main surface of the semiconductor substrate 11 in the etching unit 210 with at least two different intensities of light, including high illuminance and low illuminance, the photoluminescence observation unit 230 sequentially observes the photoluminescence intensity from the semiconductor substrate 11 in the etching unit 210, and the etching end determination unit 240 determines the end of etching of the conductive film based on the photoluminescence intensity of the light with at least two intensities.

[0196] Furthermore, in the second embodiment described above, a method for manufacturing a solar cell unit 1 having multiple individual regions (solar cell units) 2 and an etching apparatus were illustrated. However, the present invention is not limited to this, and can also be applied to a method for manufacturing a solar cell unit having a single individual region (solar cell unit).

[0197] Furthermore, in the second embodiment described above, a method for manufacturing a solar cell unit 1 having a blank area 3 and an etching apparatus were illustrated. However, the present invention is not limited to this, and can also be applied to a method for manufacturing a solar cell unit without a blank area, that is, a solar cell unit being a single unit area (solar cell unit).

[0198] Furthermore, while the second embodiment described above illustrates a method and apparatus for etching a transparent electrode layer using a metal electrode layer as a mask, it is not limited to this. For example, the features of the present invention can also be applied to methods and apparatus for etching a transparent electrode layer using a general metal mask or photoresist as a mask.

[0199] Furthermore, while the second embodiment described above illustrates wet etching using an etching solution, it is not limited to this method. For example, the features of the present invention can also be applied to dry etching.

[0200] Furthermore, in the second embodiment described above, as... Figure 10 As shown, a heterojunction solar cell and a solar cell unit are illustrated, but the present invention is not limited to heterojunction solar cell and solar cell unit, and can also be applied to various solar cell cells and solar cell units such as homojunction solar cells.

[0201] Furthermore, while the second embodiment described above exemplifies a solar cell unit and a solar cell cell having a crystalline silicon substrate, it is not limited to this. For example, the solar cell unit and the solar cell cell may also have a gallium arsenide (GaAs) substrate.

[0202] Explanation of reference numerals in the attached figures

[0203] 1…Solar cell unit; 2…Single cell area (solar cell); 3…Blank area; 4…First conductivity type unit area; 5…Second conductivity type unit area; 6…PN short-circuit area; 7…First conductivity type area; 7b, 8b…Busbar section; 7f, 8f…Finger section; 8…Second conductivity type area; 11…Semiconductor substrate (large-size semiconductor substrate); 13, 23, 33…Passivation layer; 15…Optical adjustment layer; 25…First conductivity type semiconductor layer; 27…First electrode layer; 27A…Third electrode layer; 28…First transparent electrode layer (electrode layer); 28 A…Transparent electrode layer; 28Z…Transparent conductive film (conductive film); 29…First metal electrode layer; 29A…Metal electrode layer; 35…Second conductive semiconductor layer; 37…Second electrode layer; 38…Second transparent electrode layer (electrode layer); 39…Second metal electrode layer; 100…Quality / quality determination device; 110…Light irradiation unit; 120…Photoluminescence observation unit (PL observation unit); 130…Quality / quality determination unit; 200…Etching apparatus; 210…Etching unit; 215…Box; 220…Light irradiation unit; 230…Photoluminescence observation unit; 240…Etching completion determination unit.

Claims

1. A solar cell unit having a single cell region on a large-size semiconductor substrate, wherein a single cell with a back electrode type solar cell is formed thereon, and other blank regions. The solar cell unit is characterized in that... The single-unit region has a first conductivity type region and a second conductivity type region, wherein the first conductivity type is either p-type or n-type, and the second conductivity type is either p-type or n-type. In the first conductivity type region, a first conductivity type semiconductor layer and a first electrode layer are formed on the back side of the large-size semiconductor substrate. In the second conductivity type region, a second conductivity type semiconductor layer and a second electrode layer are formed on the back side of the large-size semiconductor substrate. The blank area has a first conductivity type unit area per unit area, a second conductivity type unit area per unit area, and a pn short-circuit area. In the first conductivity type unit region, a first conductivity type semiconductor layer is formed on the back side of the large-size semiconductor substrate. In the second conductivity type unit region, a second conductivity type semiconductor layer is formed on the back side of the large-size semiconductor substrate. In the pn short-circuit region, a first conductive semiconductor layer, a second conductive semiconductor layer, and a third electrode layer that electrically short-circuits the first conductive semiconductor layer and the second conductive semiconductor layer are formed on the back side of the large-size semiconductor substrate.

2. A device for determining the quality of a solar cell unit, which is the device for determining the quality of a solar cell unit as described in claim 1. The device for determining the quality of solar cell units is characterized by having: The light irradiation section irradiates light onto the main surface of the large-size semiconductor substrate. The photoluminescence observation unit observes the photoluminescence intensity from the large-size semiconductor substrate; and The quality assessment unit determines the quality of individual solar cells in the individual region of the solar cell unit based on the photoluminescence intensity. Assuming that the solar cell in the individual region of the solar cell unit is used in a high-illuminance environment corresponding to outdoor sunlight and a low-illuminance environment corresponding to indoor lighting, The light irradiation section irradiates the main surface of the large-size semiconductor substrate with light of an intensity lower than that of high illuminance but higher than that of low illuminance. The quality determination unit calculates the photoluminescence intensity of the single-unit region, the photoluminescence intensity of the first conductivity unit region, and the photoluminescence intensity of the second conductivity unit region based on the photoluminescence intensity of the pn short-circuit region. The quality determination unit compares the calculated photoluminescence intensity of the single-unit region with the calculated photoluminescence intensity of the first conductivity unit region and the second conductivity unit region. The performance evaluation unit determines that solar cells in individual regions whose photoluminescence intensity deviates from the calculated photoluminescence intensity of the first and second conductivity unit regions by more than a specified amount are considered to have poor photoelectric conversion characteristics under low illumination conditions.

3. The device for determining the quality of solar cell units according to claim 2, characterized in that, The quality determination unit considers the area ratio of the first conductive type region to the first conductive type unit region of the single-unit region, and the area ratio of the second conductive type region to the second conductive type unit region of the single-unit region, to compare the calculated photoluminescence intensity of the single-unit region with the calculated photoluminescence intensity of the first conductive type unit region and the second conductive type unit region.

4. The device for determining the quality of solar cell units according to claim 3, characterized in that, The quality determination unit calculates the area ratio of the first conductive region as the area ratio of the first conductive region to the first conductive unit region of the single region, and calculates the area ratio of the second conductive region as the area ratio of the second conductive region to the second conductive unit region of the single region. The quality determination unit calculates the reference photoluminescence intensity of the first conductivity type region, which is obtained by multiplying the photoluminescence intensity of the first conductivity type unit region by the area ratio of the first conductivity type region, based on the photoluminescence intensity of the pn short-circuit region; and the reference photoluminescence intensity of the second conductivity type unit region, which is obtained by multiplying the photoluminescence intensity of the second conductivity type region by the area ratio of the second conductivity type region, based on the photoluminescence intensity of the pn short-circuit region. The quality determination unit calculates the reference photoluminescence intensity by adding the reference photoluminescence intensity of the first conductive region and the reference photoluminescence intensity of the second conductive region. The quality determination unit compares the calculated photoluminescence intensity of the single-unit region with the calculated reference photoluminescence intensity. The performance evaluation unit determines that solar cells in a region where the photoluminescence intensity deviates from the calculated reference photoluminescence intensity by more than a specified amount are defective in photoelectric conversion characteristics under low illumination conditions.

5. A method for manufacturing a solar cell unit, wherein the solar cell unit has a single cell region on a large-size semiconductor substrate in which a back electrode type solar cell is formed, and other blank regions. The method for manufacturing the solar cell unit is characterized in that, The single-unit region has a first conductivity type region and a second conductivity type region, wherein the first conductivity type is either p-type or n-type, and the second conductivity type is either p-type or n-type. The blank area has a first conductivity type unit area per unit area, a second conductivity type unit area per unit area, and a pn short-circuit area. The method for manufacturing the solar cell unit includes: In the semiconductor layer formation process, a first conductive semiconductor layer is formed in the first conductive region of the single-unit region on the back side of the large-size semiconductor substrate, a second conductive semiconductor layer is formed in the second conductive region of the single-unit region on the back side of the large-size semiconductor substrate, a first conductive semiconductor layer is formed in the first conductive unit region of the blank region on the back side of the large-size semiconductor substrate, a second conductive semiconductor layer is formed in the second conductive unit region of the blank region on the back side of the large-size semiconductor substrate, and a first conductive semiconductor layer and a second conductive semiconductor layer are formed in the pn short-circuit region of the blank region on the back side of the large-size semiconductor substrate. In the electrode layer formation process, a first electrode layer corresponding to the first conductive semiconductor layer of the first conductive region of the monomer region, a second electrode layer corresponding to the second conductive semiconductor layer of the second conductive region of the monomer region, and a third electrode layer corresponding to the first conductive semiconductor layer and the second conductive semiconductor layer of the pn short-circuit region of the blank region and electrically short-circuiting them are formed. as well as The quality assessment process involves determining the quality of individual solar cells within the solar cell unit. In the aforementioned superiority / inferiority determination process, When the solar cell in the single-unit region of the solar cell unit is used in a high-illuminance environment corresponding to outdoor sunlight and a low-illuminance environment corresponding to indoor lighting, light of an intensity lower than the high-illuminance environment and higher than the low-illuminance environment is irradiated onto the main surface of the large-size semiconductor substrate. The photoluminescence intensity from the single-unit region in the large-size semiconductor substrate was observed, and the photoluminescence intensity from the first conductivity unit region, the second conductivity unit region, and the pn short-circuit region in the large-size semiconductor substrate was also observed. The photoluminescence intensity of the single-unit region, the photoluminescence intensity of the first conductivity type unit region, and the photoluminescence intensity of the second conductivity type unit region are calculated based on the photoluminescence intensity of the pn short-circuit region. The calculated photoluminescence intensity of the single-unit region is compared with the calculated photoluminescence intensity of the first conductivity unit region and the second conductivity unit region. Solar cells in which the photoluminescence intensity deviates by more than a specified amount from the calculated photoluminescence intensity of the first conductivity unit region and the second conductivity unit region are judged to have poor photoelectric conversion characteristics under low illumination conditions.

6. The method for manufacturing a solar cell unit according to claim 5, characterized in that, In the superiority / inferiority determination process, the photoluminescence intensity of the single-unit region is compared with the calculated photoluminescence intensity of the first conductive type unit region and the calculated photoluminescence intensity of the first conductive type unit region and the second conductive type unit region by considering the area ratio of the first conductive type unit region to the first conductive type unit region and the area ratio of the second conductive type unit region to the second conductive type unit region of the single-unit region.

7. The method for manufacturing a solar cell unit according to claim 6, characterized in that, In the aforementioned superiority / inferiority determination process, Calculate the area ratio of the first conductivity type region as the area ratio of the first conductivity type region to the first conductivity type unit region of the single-unit region, and calculate the area ratio of the second conductivity type region as the area ratio of the second conductivity type region to the second conductivity type unit region of the single-unit region. Calculate the reference photoluminescence intensity of the first conductivity type region by multiplying the photoluminescence intensity of the first conductivity type unit region by the area ratio of the first conductivity type region, which is based on the photoluminescence intensity of the pn short-circuit region; and calculate the reference photoluminescence intensity of the second conductivity type region by multiplying the photoluminescence intensity of the second conductivity type unit region by the area ratio of the second conductivity type region, which is based on the photoluminescence intensity of the pn short-circuit region. The reference photoluminescence intensity is obtained by adding the reference photoluminescence intensity of the first conductivity region and the reference photoluminescence intensity of the second conductivity region. The calculated photoluminescence intensity from the single-cell region is compared with the calculated reference photoluminescence intensity. Individual regions whose photoluminescence intensity deviates from the calculated reference photoluminescence intensity by more than a specified amount are judged as having poor photoelectric conversion characteristics under low illumination conditions.

8. The method for manufacturing a solar cell unit according to any one of claims 5 to 7, characterized in that, In the electrode layer formation process, a conductive film is continuously formed on the first conductive semiconductor layer and the second conductive semiconductor layer in the monomer region on the back side of the large-size semiconductor substrate, and the conductive film is etched to form patterned first electrode layers and second electrode layers on the first conductive semiconductor layer and the second conductive semiconductor layer, respectively.

9. The method for manufacturing a solar cell unit according to claim 8, characterized in that, The first electrode layer and the second electrode layer are transparent electrode layers, and the conductive film is a transparent conductive film. In the electrode layer formation process, a metal electrode layer is formed on the transparent conductive film, and the metal electrode layer is used as a mask to etch the transparent conductive film.

10. The method for manufacturing a solar cell unit according to claim 8 or 9, characterized in that, The etching is a wet etching process using an etching solution.

11. A method for manufacturing a solar cell unit, wherein the solar cell unit has a single-cell region on a semiconductor substrate in which a back electrode type solar cell is formed. The method for manufacturing the solar cell unit is characterized by comprising: In a semiconductor layer formation process, a first conductivity type semiconductor layer is formed in a portion of the monomer region on the back side of the semiconductor substrate, and a second conductivity type semiconductor layer is formed in another portion of the monomer region on the back side of the semiconductor substrate. and In the electrode layer formation process, a conductive film is continuously formed on the first conductive semiconductor layer and the second conductive semiconductor layer in the monomer region on the back side of the semiconductor substrate, and the conductive film is etched to form patterned electrode layers on the first conductive semiconductor layer and the second conductive semiconductor layer, respectively. In the electrode layer formation process, When a solar cell in the assumed individual region of the solar cell unit is used in a high-illuminance environment corresponding to outdoor sunlight and a low-illuminance environment corresponding to indoor lighting, at least two different intensities of light, namely high-illuminance and low-illuminance light, are sequentially irradiated onto the main surface of the semiconductor substrate. The photoluminescence intensity from the semiconductor substrate was observed sequentially. The end of etching of the conductive film is determined based on the photoluminescence intensity of the at least two light intensities.

12. The method for manufacturing a solar cell unit according to claim 11, characterized in that, In the electrode layer formation process, the etching of the conductive film is determined to be complete when the photoluminescence intensity for the high-illuminance light reaches a predetermined value or higher, and the photoluminescence intensity for the low-illuminance light reaches a predetermined value or higher.

13. The method for manufacturing a solar cell unit according to claim 11 or 12, characterized in that, In the electrode layer formation process, if the photoluminescence intensity for high-illuminance light is above a predetermined value and the photoluminescence intensity for low-illuminance light is below a predetermined value, it is determined that the etching of the conductive film is not complete.

14. The method for manufacturing a solar cell unit according to any one of claims 11 to 13, characterized in that, In the electrode layer formation process, if the photoluminescence intensity under high illumination light is less than a specified value even after a specified time, it is determined that the defect is caused by factors other than insufficient etching of the conductive film.

15. The method for manufacturing a solar cell unit according to any one of claims 11 to 14, characterized in that, The electrode layer is a transparent electrode layer, and the conductive film is a transparent conductive film. In the electrode layer formation process, a metal electrode layer is formed on the transparent conductive film, and the metal electrode layer is used as a mask to etch the transparent conductive film.

16. The method for manufacturing a solar cell unit according to any one of claims 11 to 15, characterized in that, The etching is a wet etching process using an etching solution.

17. The method for manufacturing a solar cell unit according to any one of claims 11 to 16, characterized in that, In the electrode layer formation process, A cassette is used to etch multiple semiconductor substrates simultaneously. The semiconductor substrate with the thickest conductive film among the plurality of semiconductor substrates is used as the object for light irradiation, photoluminescence intensity observation and etching end determination.

18. A method for manufacturing a solar cell unit according to any one of claims 11 to 16, characterized in that, In the electrode layer formation process, A cassette is used to etch multiple semiconductor substrates simultaneously. The semiconductor substrate with the thickest conductive film and the semiconductor substrate with the thinnest conductive film among the plurality of semiconductor substrates are used as the objects for light irradiation, photoluminescence intensity observation and etching end determination.

19. An etching apparatus for a solar cell, wherein an electrode layer is formed in a monomer region of the solar cell, the solar cell having said monomer region on a semiconductor substrate in which a back electrode type solar cell monomer is formed. The etching apparatus for the solar cell unit is characterized by having: The etching section etches a conductive film continuously deposited on a first conductive semiconductor layer and a second conductive semiconductor layer in the monomer region on the back side of the semiconductor substrate, so as to form a patterned electrode layer on the first conductive semiconductor layer and the second conductive semiconductor layer respectively. The light irradiation section, when the solar cell in the single cell region of the solar cell unit is used in a high-illuminance environment corresponding to outdoor sunlight and a low-illuminance environment corresponding to indoor lighting, sequentially irradiates the main surface of the semiconductor substrate in the etching section with at least two different intensities of light, namely the high-illuminance and the low-illuminance. The photoluminescence observation unit sequentially observes the photoluminescence intensity from the semiconductor substrate in the etching section; and The etching completion determination unit determines the end of etching of the conductive film based on the photoluminescence intensity of the at least two light intensities.

20. The etching apparatus for a solar cell unit according to claim 19, characterized in that, When the photoluminescence intensity for the high-illuminance light reaches a predetermined value or higher, and the photoluminescence intensity for the low-illuminance light reaches a predetermined value or higher, the etching completion determination unit determines that the etching of the conductive film has ended.

21. The etching apparatus for a solar cell unit according to claim 19 or 20, characterized in that, If the photoluminescence intensity for the high-illuminance light is above a predetermined value and the photoluminescence intensity for the low-illuminance light is below a predetermined value, the etching completion determination unit determines that the etching of the conductive film has not been completed.

22. The etching apparatus for a solar cell unit according to any one of claims 19 to 21, characterized in that, If, even after a specified time, the photoluminescence intensity of the high-illuminance light is less than a specified value, the etching completion determination unit determines that the defect is caused by factors other than insufficient etching of the conductive film.

23. The etching apparatus for a solar cell unit according to any one of claims 19 to 22, characterized in that, The electrode layer is a transparent electrode layer, and the conductive film is a transparent conductive film. The etching unit uses a metal electrode layer formed on the transparent conductive film as a mask to etch the transparent conductive film.

24. The etching apparatus for a solar cell unit according to any one of claims 19 to 23, characterized in that, The etching section performs wet etching using an etching solution.

25. The etching apparatus for a solar cell unit according to any one of claims 19 to 24, characterized in that, The etching unit uses a cassette to simultaneously etch multiple semiconductor substrates. The light irradiation unit, the photoluminescence observation unit, and the etching completion determination unit take at least one semiconductor substrate with the thickest conductive film among the plurality of semiconductor substrates as the object of light irradiation, photoluminescence intensity observation, and etching completion determination.

26. The etching apparatus for a solar cell unit according to any one of claims 19 to 24, characterized in that, The etching unit uses a cassette to simultaneously etch multiple semiconductor substrates. The light irradiation unit, the photoluminescence observation unit, and the etching completion determination unit take at least one semiconductor substrate with the thickest conductive film and at least one semiconductor substrate with the thinnest conductive film among the plurality of semiconductor substrates as the objects of light irradiation, photoluminescence intensity observation, and etching completion determination.

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