Semiconductor wafer position detection device, detection method, and detection system

Abstract

A semiconductor wafer position detection device, a detection method and a detection system, the semiconductor wafer position detection device comprises a chamber, an alignment mark is arranged in the chamber, the detection method comprises: placing a wafer in the chamber, the alignment mark is arranged outside the edge of the wafer, the illumination light is irradiated on the edge of the wafer and the alignment mark from the front, the center area of the wafer is dark, and the edge area is bright, so that the edge of the image of the wafer and the alignment mark have high definition, so that the formation quality of the image of the wafer and the image of the alignment mark in the first to-be-detected image is good, and the first position deviation between the center position of the wafer and the reference point of the reference coordinate system is easily and accurately obtained; the edge of the wafer is provided with a notch, the first to-be-detected image has a clear notch image, the line connecting the position of the notch and the center position of the wafer is accurately obtained according to the clear notch image, the angle between the line connecting the position of the notch and the center position of the wafer and the reference direction is obtained, and the detection precision of the wafer is improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor inspection, and more particularly to a semiconductor wafer position detection device, detection method, and detection system. Background Technology

[0002] Wafers are commonly used as carriers for integrated circuits to fabricate chips. Integrated circuits contain a large number of transistors. During chip fabrication, deviations in the position and angle of the wafer at different process steps can lead to undesirable process results. Furthermore, when wafers are handled in the process equipment, they need to be transferred. Deviations in the transfer position can cause serious problems such as wafer transfer failure, wafer dropping, and wafer breakage. For example, in the chip fabrication process, before ion implantation for doping, notch identification of the wafer is required to determine its angle and position. Traditional identification methods use sensor detection, which has low accuracy and is time-consuming.

[0003] Existing semiconductor wafer position detection devices typically require appropriate lighting and precise wafer positioning and rotation during the detection process within a true chamber. This improves the clarity of the wafer images captured by the camera, thereby enhancing wafer alignment accuracy and detection precision, and ultimately increasing the yield of the manufactured semiconductor chips.

[0004] However, the detection methods of existing semiconductor wafer position detection devices still need improvement. Summary of the Invention

[0005] The problem solved by this invention is to provide a semiconductor wafer position detection device, detection method and detection system to obtain high-quality images of the wafer and alignment marks to improve the performance of the semiconductor wafer position detection device.

[0006] To address the aforementioned problems, the present invention provides a semiconductor wafer position detection device, comprising: a vacuum chamber in which the wafer to be detected is placed, the top of the chamber having an opening; a transparent window disposed at the opening of the chamber and forming a sealed connection with the opening; a wafer support stage located within the vacuum chamber for supporting the wafer; a wafer placed on the wafer support stage; a light-emitting device located outside the chamber and above the transparent window for providing illumination light passing through the transparent window; a reflective device located within the chamber and between the chamber opening and the wafer for reflecting the illumination light to the edge of the wafer; an alignment mark located within the chamber; and an image acquisition device located above the light-emitting device for acquiring images of the wafer and the alignment mark.

[0007] Accordingly, embodiments of the present invention also provide a detection method for a semiconductor wafer position detection device, the semiconductor wafer position detection device including a chamber, an alignment mark disposed in the chamber, the detection method including: placing a wafer in the chamber, the alignment mark being disposed outside the edge of the wafer; emitting illumination light from the front of the wafer and the alignment mark toward the edge of the wafer and the alignment mark; after emitting illumination light toward the edge of the wafer and the alignment mark, obtaining a first image to be tested, the first image to be tested containing an image of the wafer and an image of the alignment mark; obtaining a reference coordinate system of the chamber based on the image of the alignment mark; obtaining the center position of the wafer based on the image of the wafer; and obtaining a first position deviation of the center position of the wafer relative to the reference point based on the center position of the wafer and a reference point of the reference coordinate system.

[0008] Accordingly, embodiments of the present invention also provide a detection system for a semiconductor wafer position detection device. The semiconductor wafer position detection device includes a chamber, in which alignment marks are disposed, and includes: a carrier module, which holds a wafer in the chamber and positions the alignment marks outside the wafer edge; an optical path module, located outside the chamber, which emits illumination light from the front of the wafer and the alignment marks toward the edge of the wafer and the alignment marks; a test image acquisition module, located on the front of the wafer and the alignment marks, which acquires a first test image, the first test image containing an image of the wafer and an image of the alignment marks; and a wafer position deviation acquisition module, which acquires a reference coordinate system of the chamber based on the image of the alignment marks, acquires the center position of the wafer based on the image of the wafer, and acquires the position deviation of the center of the wafer relative to the reference point based on the center position of the wafer and a reference point of the reference coordinate system.

[0009] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0010] The present invention provides a detection method for a semiconductor wafer position detection device, wherein the semiconductor wafer position detection device includes a chamber, an alignment mark is disposed in the chamber, a wafer is placed in the chamber, and the alignment mark is disposed outside the edge of the wafer. Illumination light is emitted from the front of the wafer and the alignment mark toward the wafer and the alignment mark, so that the image of the alignment mark can be clearly displayed in the light in a first test image, which is beneficial to obtain a reference coordinate system in the chamber based on the alignment mark image. The reference point of the reference coordinate system is used as a reference for judging the magnitude of the deviation of the center position of the wafer and is used as a reference for wafer position adjustment. The wafer exposes the alignment mark, and the edge of the wafer is illuminated from the front by the illumination light. As a result, the central area of ​​the wafer is dark, while the edge area is bright. Therefore, the edge clarity of the wafer image is high, which is beneficial for determining the wafer outline based on the illumination light at the edge of the wafer image. Thus, based on the wafer outline and the reference coordinate system, the center position of the wafer can be obtained more accurately. Furthermore, based on the center position of the wafer and the position of the reference point, the first positional deviation of the wafer center position relative to the reference point of the reference coordinate system can be accurately obtained, thereby improving the accuracy and detection precision of the semiconductor wafer position detection device.

[0011] In an optional embodiment, during the step of placing the wafer in the chamber, the edge of the wafer is provided with a notch, and the edge of the wafer is illuminated by illumination light. Therefore, the first image to be tested has a clear image of the notch. Based on the clear image of the notch, the position of the notch can be obtained, and then the line connecting the position of the notch and the center position of the wafer can be obtained. Based on the line connecting the notch and the reference direction, the angle between the line connecting the position of the notch and the center position of the wafer and the reference direction can be obtained, thereby improving the accuracy and detection precision of the semiconductor wafer position detection device. Attached Figure Description

[0012] Figure 1 This is a schematic diagram of the semiconductor wafer position detection device in an embodiment of the present invention;

[0013] Figure 2 This is an optical path diagram of the semiconductor wafer position detection device in an embodiment of the present invention;

[0014] Figure 3 This is a schematic diagram of the wafer edge notch according to an embodiment of the present invention;

[0015] Figure 4 These are images of the wafer and alignment marks obtained in the embodiments of the present invention;

[0016] Figure 5 This is a cross-sectional schematic diagram of the light-emitting device in an embodiment of the present invention;

[0017] Figure 6 This is an exploded view of the light-emitting device in an embodiment of the present invention;

[0018] Figure 7 This is a cross-sectional schematic diagram of the reflective device in an embodiment of the present invention;

[0019] Figure 8 This is a flowchart of the detection method according to an embodiment of the present invention;

[0020] Figure 9 This is a schematic diagram of the structure of placing a wafer in the semiconductor wafer position detection device chamber in an embodiment of the present invention;

[0021] Figure 10 This is a schematic diagram of an image captured by the image acquisition device in an embodiment of the present invention;

[0022] Figure 11 This is a schematic diagram of the first image to be tested according to an embodiment of the present invention;

[0023] Figure 12 This is a schematic diagram of the rectangular coordinate system in the first image to be tested according to an embodiment of the present invention;

[0024] Figure 13 This is a schematic diagram of the line connecting the position of the notch in the first image to be tested in an embodiment of the present invention and the position of the wafer center;

[0025] Figure 14 This is a schematic diagram of the centers of the two sides of the notch in the first image to be tested according to an embodiment of the present invention; wherein, Figure 14 a is a schematic diagram of the center of one side of the notch in the first image to be tested according to an embodiment of the present invention; Figure 14 b is a schematic diagram of the center of the other side of the notch in the first image to be tested in the embodiment of the present invention;

[0026] Figure 15 This is a functional block diagram of the detection system according to an embodiment of the present invention. Detailed Implementation

[0027] As can be seen from the background technology, the detection methods of existing semiconductor wafer position detection devices need to be improved.

[0028] To address the aforementioned problems, this invention provides a detection method for a semiconductor wafer position detection device. The semiconductor wafer position detection device includes a chamber, in which alignment marks are disposed. A wafer is placed in the chamber, and the alignment marks are positioned outside the wafer edge. Illumination light is emitted from the front of the wafer and the alignment marks, so that the image of the alignment marks can be clearly displayed in the light in a first test image. This facilitates the acquisition of a reference coordinate system in the chamber based on the alignment mark image. The reference point of the reference coordinate system serves as a reference for determining the magnitude of the wafer's center position deviation and is also used as a reference for wafer position adjustment. The wafer exposes the alignment mark, and the edge of the wafer is illuminated from the front by the illumination light. As a result, the central area of ​​the wafer is dark, while the edge area is bright. Therefore, the edge clarity of the wafer image is high, which is beneficial for determining the wafer outline based on the illumination light at the edge of the wafer image. Thus, based on the wafer outline and the reference coordinate system, the center position of the wafer can be obtained more accurately. Furthermore, based on the center position of the wafer and the position of the reference point, the first positional deviation of the wafer center position relative to the reference point of the reference coordinate system can be accurately obtained, thereby improving the accuracy and detection precision of the semiconductor wafer position detection device.

[0029] To make the above-mentioned objects, features and advantages of the embodiments of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0030] Figure 1 A schematic diagram of the semiconductor wafer position detection device in an embodiment of the present invention is shown. Figure 2 The optical path diagram of the semiconductor wafer position detection device in an embodiment of the present invention is shown. Figure 3 A schematic diagram of the wafer edge notch of the present invention is shown.

[0031] The semiconductor wafer position detection device includes: a chamber 200 for placing a wafer 400, the top of the chamber 200 having an opening; a light-emitting device 100 located outside the chamber 200 for providing illumination light through the opening of the chamber 200; a reflector 300 located in the chamber 200, between the opening of the chamber 200 and the wafer 400, for reflecting the illumination light to the edge of the wafer 400; an alignment mark (not shown) located in the chamber 200; and an image acquisition device 600 located on top of the light-emitting device 100 for acquiring images of the wafer 400 and the alignment mark.

[0032] The semiconductor wafer position detection device includes: a vacuum chamber 200, in which the wafer to be detected is placed, and the top of the chamber 200 has an opening; a transparent window 500 disposed at the opening of the chamber and forming a sealed connection with the opening; a wafer stage 201 located inside the chamber 200 for supporting the wafer 400; the wafer 400 placed on the wafer stage 201; a light-emitting device 100 located outside the chamber 200 for providing illumination light through the transparent window 500; a reflector 300 located in the chamber 200 and between the opening of the chamber and the wafer 400 for reflecting the illumination light to the edge of the wafer 400; and alignment marks 700 (e.g., ...). Figure 4 As shown, the wafer 400 is located in the chamber 200; the image acquisition device 600 is located on top of the light-emitting device 100 and is used to acquire images of the wafer 400 and the alignment mark 700.

[0033] When the semiconductor wafer position detection device provided in this embodiment of the invention is working, the illumination light provided by the light-emitting device 100 passes through the transparent window 500 of the chamber 200 and is accurately reflected to the edge of the wafer by the reflector 300, so that a ring-shaped area inside and outside the wafer edge can be illuminated. The image acquisition device 600 acquires images of the wafer and the alignment mark 700. Through the image of the wafer, the wafer center is obtained, and through the alignment mark 700, the reference coordinate system of the chamber 200 is obtained. The position of the wafer in the chamber 200 is determined according to the reference coordinate system. The notch on the wafer edge is also presented in the image of the wafer. The corner of the wafer 400 is determined according to the position of the notch on the wafer 400. The illumination light provided by the light-emitting device 100 illuminates the wafer surface, which makes it easier for the image acquisition device 600 to take high-resolution wafer images, and to obtain more accurate information on the wafer position and wafer corner, thereby improving the accuracy and detection precision of the semiconductor wafer position detection device.

[0034] In this embodiment, the chamber 200 is a vacuum chamber.

[0035] like Figure 4 The image shown illustrates the obtained wafer and alignment mark 700. In semiconductor processing, notch 401 is used to calibrate the wafer's rotation angle.

[0036] In this embodiment, the transparent window 500 is located at the opening of the chamber 200 and serves to seal the opening of the chamber, which helps to maintain a vacuum environment inside the chamber 200.

[0037] In this embodiment, the transparent window 500 includes a transparent flange. The material of the transparent flange includes, but is not limited to, plexiglass (polymethyl methacrylate, PMMA), quartz, or polycarbonate (PC).

[0038] In this embodiment, the wafer stage 201 is used to place the wafer, and the edge of the wafer has a notch 401. In semiconductor processing, the notch 401 is used to calibrate the wafer's rotation angle and improve the overlay accuracy of the patterns formed in different steps on the wafer.

[0039] In this embodiment, the wafer stage 201 is movably disposed within the chamber 200. Specifically, the semiconductor wafer position detection device further includes an adjustment device connected to the bottom of the wafer stage. The adjustment device is used to drive the wafer stage 201 to translate or rotate, thereby changing the position and angle of the wafer 400 to be detected on the wafer stage within the chamber 200. In other embodiments, the wafer stage may also be fixedly disposed within the chamber.

[0040] In this embodiment, the adjustment device 501 includes a rotation mechanism and a translation mechanism. Specifically, the output end of the rotation mechanism and the output end of the translation mechanism are connected to the plate support 201. The rotation mechanism is used to drive the plate support 201 to rotate, and the translation mechanism is used to drive the plate support 201 to translate.

[0041] In this embodiment, an alignment mark 700 is provided in the chamber 200, which is used to determine the reference polar coordinate system of the chamber 200. The image of the alignment mark in the image acquired by the image acquisition device defines a reference coordinate system.

[0042] In this embodiment, the alignment mark 700 is located on the side of the wafer stage 201, so that the wafer placed in the chamber 200 can expose the alignment mark 700, so that the image obtained by taking pictures of the wafer and the alignment mark 700 can simultaneously show the wafer and the alignment mark 700.

[0043] In this embodiment, the material of the alignment mark 700 fixing part is transparent. The alignment mark 700 can block the illumination light, while the alignment mark 700 fixing part transmits the illumination light, so that the alignment mark 700 and the alignment mark 700 fixing part have obvious contrast.

[0044] In this embodiment, there are three alignment marks 700, and the line connecting the centers of the three alignment marks 700 forms a right triangle, with the center point of the longest side serving as the reference point. In other embodiments, there are two alignment marks, with the center of the line connecting the two alignment marks serving as the reference point of the chamber.

[0045] In this embodiment, a rectangular coordinate system is established with the reference point as the origin. The extension directions of the two shorter sides of the triangle formed by the three alignment marks 700 are respectively used as the X-axis and Y-axis of the rectangular coordinate system.

[0046] As an example, the line connecting the centers of the three alignment marks 700 forms an isosceles right trapezoid.

[0047] In other embodiments, the alignment method further includes: after obtaining the reference point, establishing a polar coordinate system with the reference point as the pole. Subsequently, based on the polar coordinate system, determining the first position deviation of the wafer's center relative to the reference point.

[0048] In this embodiment, the alignment mark 700 is circular in shape. When the alignment mark 700 is circular, it facilitates obtaining the center of the alignment mark 700 using its image, and makes it easier to obtain the position of a reference point based on the line connecting the centers of multiple alignment marks 700. In other embodiments, the alignment mark is triangular or cross-shaped.

[0049] The semiconductor wafer position detection device includes: an alignment mark fixing part (not shown in the figure), located in the chamber 200, wherein the alignment mark is disposed on the alignment mark fixing part.

[0050] In this embodiment, the material of the alignment mark fixing part is transparent. The alignment mark can block the illumination light, while the alignment mark fixing part can transmit the illumination light, so that the alignment mark and the alignment mark fixing part have obvious contrast.

[0051] Figure 5 This is a cross-sectional schematic diagram of the light-emitting device in an embodiment of the present invention. Figure 6 This is an exploded view of the light-emitting device in an embodiment of the present invention.

[0052] In this embodiment, the light-emitting device 100 includes: an annular mounting portion 101; a first tapered hole 102 located at the bottom of the annular mounting portion 101, wherein the top of the first tapered hole 102 is a small diameter end and the bottom of the first tapered hole 102 is a large diameter end; and an annular light source 103 disposed circumferentially on the side wall of the first tapered hole 102.

[0053] The first tapered hole 102 at the bottom of the annular mounting part 101 provides a mounting position for the annular light source 103. The annular light source 103 is located on the side wall of the first tapered hole 102. Because the bottom of the first tapered hole 102 is the large-diameter end and the top of the first tapered hole 102 is the small-diameter end, the illumination light provided by the annular light source 103 on the first tapered hole 102 is emitted obliquely downward in an annular shape. After being reflected by the reflector 300, the annular illumination light can illuminate the edge area of ​​the wafer 400, that is, it can illuminate the notch 401 of the wafer 400, which is convenient for determining the position of the wafer 400 in the cavity 200, and for determining the corner of the wafer 400 based on the position of the notch 401 on the wafer 400.

[0054] In this embodiment, the ring light source 103 includes a plurality of light-emitting diodes (LEDs) spaced apart on the sidewall of the first tapered hole 102. The LEDs emit light by releasing energy through the recombination of electrons and holes.

[0055] Specifically, the light-emitting diodes are preferably arranged at uniform intervals.

[0056] In this embodiment, the first tapered aperture 102 is a circular tapered aperture. Since the wafer 400 is circular, the circular tapered aperture 102 facilitates the emission of illumination light in a ring shape, thereby easily forming a ring-shaped light pattern illuminating the edge of the wafer 400, allowing the outline of the wafer 400 and the notch 401 on the wafer 400 to be illuminated. In other embodiments, the first tapered aperture can also be a polygonal tapered aperture, such as a triangular tapered aperture, a quadrilateral tapered aperture, or a pentagonal tapered aperture.

[0057] It should be noted that the angle α between the generatrix of the first tapered hole 102 and the normal to the surface of the wafer 400 (e.g., ...) Figure 2The angle α (as shown) should not be too large or too small. If the included angle α is too large, in order for the illumination light provided by the ring light source 103 to be reflected by the reflector 300 to the edge of the wafer 400, the distance between the reflector 300 and the ring light source 103 needs to be correspondingly too large. Consequently, the distance between the light-emitting device 100 and the wafer 400 will be too large, and the corresponding cavity 200 will have an excessively large dimension in the normal direction of the wafer 400, which is detrimental to improving the compactness of the semiconductor wafer position detection device structure. Conversely, if the included angle α is too small, in order for the illumination light provided by the ring light source 103 to be reflected by the reflector 300, the distance between the reflector 300 and the ring light source 103 needs to be correspondingly too small, and the corresponding distance between the light-emitting device 100 and the wafer 400 will be too small. Consequently, the corresponding cavity 200 will have an excessively small dimension in the normal direction of the wafer 400. In this embodiment, the angle between the generatrix of the first tapered hole 102 and the normal of the surface of the wafer 400 is 0 to 90 degrees.

[0058] It should be noted that during actual wafer 400 inspection, the angle between the generatrix of the first tapered hole 102 and the normal of the wafer 400 surface can be adjusted as needed for different wafer 400 sizes, so that the illumination light can be irradiated on the edge of the wafer 400.

[0059] In this embodiment, the light-emitting device 100 further includes a light-diffusing plate 105, located on the inner wall of the first tapered hole 102, covering the annular light source 103. In other embodiments, the light-diffusing plate may also be located at the bottom of the annular mounting portion, blocking the large-diameter end of the first tapered hole.

[0060] The light-diffusing plate 105 contains uniformly dispersed micron-sized particles. The light-diffusing plate 105 utilizes the light scattering effect of the micron-sized particles to transform a line light source or a point light source into a surface light source.

[0061] The light-emitting device 100 further includes a light source controller (not shown in the figure), which is connected to the ring light source 103 and is used to adjust the brightness of the ring light source 103.

[0062] In this embodiment, the light source controller includes a local control panel or a remote control interface. The light source controller is located outside the chamber and provides power to the ring light source 103.

[0063] Specifically, the adjustment devices of the local control panel include, but are not limited to, a display screen, knobs, DIP switches, buttons, etc. The remote control interface allows for remote control of the ring light source 103 to be switched on and off, and its brightness adjusted.

[0064] In this embodiment, the remote interface includes: Bluetooth, mobile hotspot (WiFi), or ZigBee.

[0065] Figure 7 This is a schematic diagram of the reflective device 300 in an embodiment of the present invention. In this embodiment, the reflective device 300 includes: an annular reflector 301, the annular reflector 301 including a second tapered hole 302; the top opening of the second tapered hole 302 is smaller than the bottom opening.

[0066] In this embodiment, the top opening of the second tapered aperture 302 is smaller than the bottom opening. Therefore, the tapered reflective surface of the second tapered aperture 302 slopes downwards, allowing the illumination light reflected by the tapered reflective surface to illuminate the wafer 400 located at the bottom of the annular reflector 301.

[0067] In this embodiment, the bottom dimension of the second tapered aperture 302 is larger than the diameter of the wafer 400. That is, at least a portion of the projection of the second tapered aperture 302 onto the wafer 400 is located in the outer region of the wafer 400, so that the illumination light illuminating the second tapered aperture 302 can be reflected to the edge of the wafer 400 located in its projection area, so that the edge of the wafer 400 can be illuminated by the illumination light.

[0068] It should be noted that the angle β between the generatrix on the second tapered hole 302 and the normal to the surface of the wafer 400 (e.g., ...) Figure 2 The angle β (as shown) should not be too large or too small. If the included angle β is too large, the reflective surface of the second tapered hole 302 will not easily reflect the illumination light provided by the light-emitting device 100, resulting in the edge of the wafer 400 and the notch 401 at the edge of the wafer 400 not being illuminated by the illumination light. This is detrimental to the semiconductor wafer position detection device obtaining accurate positions and rotation angles of the wafer 400. If the included angle β is too small, the illumination light reflected by the tapered reflective surface is likely to illuminate the undesirable central region of the wafer 400, and the edge region of the wafer 400 and the notch 401 at the edge of the wafer 400 will not be covered by the illumination light. This is also detrimental to the semiconductor wafer position detection device obtaining accurate positions and rotation angles of the wafer 400. In this embodiment, the angle between the generatrix on the reflective surface and the normal to the surface of the wafer 400 is 0 degrees to 45 degrees.

[0069] It should be noted that during actual wafer 400 inspection, the angle between the generatrix on the reflective surface and the normal to the surface of the wafer 400 can be adjusted as needed for different wafer 400 sizes, so that the illumination light can shine on the edge of the wafer 400.

[0070] The image acquisition device 600 takes a picture from the front of the wafer and the alignment mark 700. Therefore, the image acquisition device 600 takes pictures facing the light. Since the illumination light provided by the light-emitting device 100 shines on the edge of the wafer, it helps to remove the influence of stray light on the wafer and alignment mark 700 in the picture, and can clearly display them facing the light.

[0071] In this embodiment, the image acquisition device 600 includes a camera. In other embodiments, the image acquisition device may also include a full-screen scanning probe or a detector; specifically, the detector includes an area array detector or a linear array detector.

[0072] It should be noted that the wafer stage 201 and the alignment mark 700 are located within the depth of field (DOF) of the image acquisition device 600, which facilitates the image acquisition device 600 in acquiring images of the wafer and the alignment mark 700 in a single shot (e.g., ...). Figure 4 (As shown).

[0073] In this embodiment, the light-emitting device 100 further includes a through hole 104, located at the top of the first tapered hole 102 and penetrating the annular mounting portion 101, for allowing the image acquisition device to acquire a wafer surface image through the through hole of the light-emitting device.

[0074] The illumination light provided by the light-emitting device 100 passes through the transparent seal 500 at the opening of the chamber 200 and is reflected by the reflector 300 to the edge of the wafer 400. The illumination light at the edge of the wafer 400 is reflected and propagates outside the chamber 200 through the through hole 104 and the transparent seal 500, facilitating the image acquisition device 600 to acquire images of the wafer 400 surface from outside the chamber 200. The through hole 104 penetrates the annular mounting portion 101 at the top of the first tapered hole 102, which helps to simplify the structure of the semiconductor wafer position detection device, reduce the loss of illumination light during propagation, reduce the influence of stray light, improve the quality of the wafer 400 surface image acquired by the image acquisition device 600, and improve the accuracy and detection precision of the semiconductor wafer position detection device.

[0075] The semiconductor wafer position detection device further includes a host computer (not shown in the figure), which is connected to the image acquisition device 600 and is used to control the image acquisition device 600 to capture images.

[0076] In this embodiment, the host computer and the image acquisition device 600 are connected via an I / O port.

[0077] In this embodiment, the host computer includes a computer, which is equipped with image processing software. The image processing software is used to acquire images captured by the image acquisition device 600 and to perform subsequent image sharpness processing to obtain a first image to be tested.

[0078] The semiconductor wafer position detection device further includes: an over-threshold adjustment device connected to a host computer, used to adjust the position of the wafer when the position deviation of the center position of the wafer relative to the reference point exceeds the maximum position deviation that the detection method can adjust, so that the position of the wafer can be within the threshold position deviation range, so that the detection method provided in this embodiment of the invention can perform wafer alignment operation.

[0079] Accordingly, embodiments of the present invention also provide a detection method for a semiconductor wafer position detection device, the semiconductor wafer position detection device including a chamber, wherein alignment marks are disposed in the chamber.

[0080] In this embodiment, the detection method is applied to the semiconductor wafer position detection device described in the foregoing embodiment. The specific description of the semiconductor wafer position detection device will not be repeated in this embodiment.

[0081] Combination Figures 1 to 7 ,refer to Figure 8 The flowchart illustrates the detection method of an embodiment of the present invention.

[0082] Step S1, as follows Figure 9 As shown, a wafer 400 is placed in the chamber 200, and alignment marks 700 are set outside the edge of the wafer 400.

[0083] The alignment mark 700 is positioned outside the edge of the wafer 400, so that the image obtained by taking pictures of the wafer 400 and the alignment mark can simultaneously show the wafer 400 and the alignment mark.

[0084] In the step of placing the wafer 400 in the chamber 200, the wafer 400 is placed on the wafer stage 201, that is, the wafer 400 is located below the light-emitting device 100. The illumination provided by the light-emitting device 100 illuminates the front side of the wafer 400 and the alignment marks.

[0085] The wafer 400 is fixedly mounted on the wafer support stage 201. When the wafer support stage 201 is subsequently moved horizontally within the chamber 200 using the adjustment device 501, the wafer 400 on the wafer support stage 201 can move horizontally with the wafer support stage 201; when the wafer support stage 201 is subsequently rotated using the adjustment device 500, the wafer 400 on the wafer support stage 201 can rotate with the wafer support stage 201.

[0086] It should be noted that in the step of placing the wafer 400 in the chamber 200, the edge of the wafer 400 has a notch. The notch is used to calibrate the rotation angle of the wafer 400 and improve the overlay accuracy of the patterns formed on the wafer 400 in different semiconductor process steps.

[0087] Step S2, as follows Figure 9 As shown, illumination light is emitted from the front of the wafer 400 and the alignment mark toward the edge of the wafer 400 and the alignment mark.

[0088] After the light-emitting device 100 emits illumination light onto the wafer 400 and the alignment mark, the subsequent image acquisition device 600 takes a picture of the wafer 400 and the alignment mark from the front, thereby obtaining a front image of the wafer 400 and the alignment mark.

[0089] The step of emitting illumination light to the wafer 400 and the alignment mark includes turning the light-emitting element 103 on or off using a light source controller. Specifically, the light source controller can be used by operating a local control panel or by controlling it via a remote interface using a remote control device.

[0090] It should be noted that, in the step of emitting illumination light to the edge of the wafer and the alignment mark, the edge of the wafer 400 is illuminated by the illumination light, forming a ring-shaped illuminated area.

[0091] Step S3: After emitting illumination light onto the wafer 400 and the alignment mark, a first image to be tested (e.g., ...) is obtained. Figure 11 As shown), the first image to be tested contains an image of the wafer 400 and an image of the alignment mark 700 (Mark).

[0092] The cavity 200 provided in this embodiment of the invention is provided with an alignment mark 700. A wafer 400 is placed in the cavity 200. The alignment mark 700 is located outside the edge of the wafer 400. Illumination light is emitted from the front of the wafer 400 and the alignment mark 700 toward the edge of the wafer 400 and the alignment mark 700. The alignment mark 700 is located on the propagation path of the illumination light, so that the image of the alignment mark 700 can be clearly displayed in the first image to be tested. This is beneficial for obtaining the reference point in the cavity 200 based on the image of the alignment mark 700. The reference point serves as a reference for judging the magnitude of the center position deviation of the wafer 400 and as a reference for subsequent adjustment of the position of the wafer 400.

[0093] In this embodiment of the invention, the wafer 400 exposes the alignment mark 700. The edge of the wafer 400 is illuminated from the front by the illumination light, so the central area of ​​the wafer image is dark and the edge area of ​​the wafer 400 is bright. Therefore, the edge clarity of the wafer image is high, which is beneficial for determining the outline of the wafer 400 based on the illumination light at the edge of the wafer image. Based on the outline of the wafer 400, the center position of the wafer 400 can be obtained more accurately. Furthermore, based on the center position of the wafer and the position of the reference point, the first position deviation of the center position of the wafer 400 relative to the reference point can be accurately obtained. Based on the accurate first position deviation, the position of the wafer 400 is adjusted so that the center position of the wafer 400 coincides with the reference point, thereby improving the detection accuracy of the wafer 400.

[0094] The steps for obtaining the first image to be tested include: using an image acquisition device 600 to take an image from the front of the wafer 400 and the alignment mark 700 (e.g., ...). Figure 10 (As shown); perform sharpness processing on the image to obtain the first image to be tested (e.g. Figure 11 (As shown).

[0095] In this embodiment, the step of taking images from the front of the wafer 400 and the alignment mark 700 using the image acquisition device 600 includes:

[0096] The host computer sends a trigger signal to the image acquisition device 600; the image acquisition device 600 takes pictures from the front of the wafer 400 and the alignment mark 700 according to the trigger signal.

[0097] The detection method further includes: image processing software in the host computer acquiring images from the image acquisition device 600 via a high-speed network port. The image acquisition by the image processing software prepares the images for subsequent image sharpness processing to obtain the first image to be tested.

[0098] In this embodiment, a camera can be used to capture images. In other embodiments, a full-screen scanning probe or detector can also be used for image capture.

[0099] It should be noted that when the image acquisition device 600 takes pictures from the front of the wafer 400 and the alignment mark 700, both the alignment mark 700 and the wafer 400 are placed within the depth of field of the image acquisition device 600, resulting in higher image clarity.

[0100] Clarity processing of the image makes the images of wafer 400 and alignment mark 700 in the first image to be tested clearer and easier to identify, thereby improving the accuracy of the reference point obtained based on the image of alignment mark 700 and the accuracy of the center position of wafer 400 obtained based on the image of wafer 400.

[0101] The step of performing sharpness processing on the image to obtain the first image to be tested includes: subdividing the image into grids; obtaining the average sharpness value of each grid; and converting the average sharpness value of each grid to obtain a sharpness distribution map of the image.

[0102] In this embodiment, the size of the grid is determined based on the amount of data in the image and the required clarity of the subsequently formed first image to be tested.

[0103] In this embodiment, the step of obtaining the average sharpness value of each grid includes: obtaining the average grayscale value of the grid based on the grayscale value of the image in the grid; and obtaining the average sharpness value of each grid based on the average grayscale value of each grid.

[0104] In this embodiment, the grayscale value of the image is obtained using the mean method.

[0105] In this embodiment, the step of converting the average sharpness value of each grid to obtain the sharpness distribution map of the image includes: mapping the average sharpness value of each grid to 0-255 to obtain the sharpness distribution map of the image.

[0106] In this embodiment of the invention, the image undergoes sharpness processing to obtain a first test image. Thus, the sharpness values ​​of the edge and center regions of the wafer 400 in the first test image are different, as are the sharpness values ​​inside and outside the alignment mark 700. Based on the range of the preset grid sharpness values ​​at the edge of the wafer 400 and the alignment mark 700, the regions of the wafer image and the alignment mark 700 image can be determined. This facilitates the subsequent acquisition of the reference coordinate system of the chamber 200 based on the image of the alignment mark 700, and the subsequent acquisition of the center position of the wafer 400 based on the image of the wafer 400.

[0107] Step S4: Based on the image of the alignment mark 700, obtain the reference coordinate system of the chamber 200 (e.g., ...). Figure 12 (As shown).

[0108] The reference coordinate system includes a reference point A and a coordinate direction. The reference coordinate system serves as a reference for subsequent adjustments to the position of the wafer 400 in the chamber 200.

[0109] The step of obtaining the reference coordinate system of the chamber based on the image of the alignment mark 700 includes: obtaining the outer contour of the image of each alignment mark 700; obtaining the center of the image of each alignment mark 700 based on the outer contour of the image of each alignment mark 700; and obtaining the reference coordinate system of the chamber based on the relative position of the centers of each alignment mark 700.

[0110] In this embodiment, the step of obtaining the reference coordinate system of the chamber first involves obtaining a reference point, and establishing a rectangular coordinate system with the reference point A as the origin (0, 0). As an example, the extension directions of the two shorter sides among the three sides are used as the X-axis and Y-axis, respectively.

[0111] In this embodiment, the step of obtaining reference point A based on the image of the alignment mark 700 includes: using the image of the alignment mark 700 to obtain the center of each alignment mark 700 image; and taking the center point of the longest side of the line connecting the centers of each alignment mark 700 image as the reference point A.

[0112] Specifically, there are three alignment marks 700, and the line connecting the centers of the three alignment marks 700 forms a right triangle, with the center of the longest side serving as the reference point A. The center of the image of the alignment marks 700 is taken as the actual position of the alignment marks 700, therefore the center point of the line connecting the longest sides is taken as the reference point A.

[0113] In this embodiment, the image contour of the alignment mark 700 is obtained using the first image to be tested; multiple points are selected from the image contour of the alignment mark 700, and the center point of the alignment mark 700 is fitted using the least squares method.

[0114] In this embodiment, the image of the alignment mark 700 is a circle, and correspondingly, the obtained image outline of the alignment mark 700 is a shape that is close to a circle.

[0115] In this embodiment, in the step of selecting multiple points in the image contour of the alignment mark 700, the number of points is greater than or equal to two. The more points selected, the more accurate the center of the fitted alignment mark 700 will be.

[0116] In this embodiment, in the step of fitting the center of the alignment mark 700 using the least squares method, the center point of the alignment mark 700 is fitted based on multiple points on the edge region of the image of the alignment mark 700. It can be considered that the center of the fitted image of the alignment mark 700 is infinitely close to the center of the actual alignment mark 700.

[0117] In other embodiments, the number of alignment marks is two; the step of obtaining a reference point based on the image of the alignment marks includes: obtaining the outer contour of the image of the alignment marks; obtaining the center of the two alignment mark images based on the outer contour of the image of the alignment marks; and taking the center of the line connecting the centers of the two alignment marks as the reference point. The method of obtaining the reference point based on two alignment marks is simple and easy to operate.

[0118] In other embodiments, the detection method further includes: after obtaining the reference point, establishing a polar coordinate system with the reference point as the pole. Subsequently, based on the polar coordinate system, determining the first position deviation of the wafer's center relative to the reference point.

[0119] It should be noted that the detection method also includes: defining a reference direction.

[0120] In the step of taking pictures of the wafer 400 and the alignment mark 700, the first image to be tested also has a notch image, and the reference direction is used as a reference for adjusting the rotation angle of the wafer 400.

[0121] In this embodiment, image processing software is used to obtain a notch image at the edge of the wafer image.

[0122] In this embodiment, in the step of defining the reference direction, the reference direction passes through the reference point A. In the detection method of the semiconductor wafer position detection device, when the wafer 400 position is calibrated first, and the wafer 400 corner is calibrated after the wafer 400 position calibration is completed, if the notch is located in the reference direction, the wafer 400 corner is calibrated, which is beneficial for calibration personnel to check whether the wafer 400 corner is calibrated correctly. In other embodiments, in the step of defining the reference direction, the reference direction may not pass through the reference point.

[0123] Step S5: Based on the image of the wafer 400, obtain the center position C of the wafer 400.

[0124] The center position C of wafer 400 is the center of wafer 400. The position of the center of wafer 400 is taken as the position of wafer 400, which is to prepare for determining the first position deviation based on the position of wafer 400 and the reference point A.

[0125] The step of obtaining the center position C of the wafer 400 based on the image of the wafer 400 includes: using the first image to be tested to obtain the image outline of the wafer 400; selecting multiple points on the wafer image outline and fitting the center position C of the wafer 400 using the least squares method.

[0126] In this embodiment of the invention, in the step of obtaining the image contour of the wafer 400 using the first image to be tested, the outer boundary of the wafer in the annular illuminated area is taken as the wafer image contour.

[0127] In this embodiment, in the step of selecting multiple points on the wafer image contour, the number of points is greater than or equal to two. The more points selected, the more accurate the center of the fitted wafer 400 will be.

[0128] In this embodiment, in the step of fitting the center position C of the wafer 400 using the least squares method, the center position C of the wafer 400 is fitted based on multiple points on the wafer image outline. It can be considered that the fitted center position C of the wafer 400 is infinitely close to the center of the actual wafer 400.

[0129] It should be noted that the size of the wafer 400 that the semiconductor wafer position detection device can detect is within a certain range. In the step of obtaining the center of the wafer 400 based on the image of the wafer 400, if the size of the fitted circle is greater than or less than the size range of the wafer 400 that the semiconductor wafer position detection device can detect, the semiconductor wafer position detection device will alarm and transmit the alarm information to the host computer.

[0130] Step S6: Based on the center position C of the wafer 400 and the reference point A of the reference coordinate system, obtain the first position deviation of the center position C of the wafer 400 relative to the reference point A.

[0131] The first positional deviation of the center position C of the wafer 400 relative to the reference point A is obtained to prepare for subsequent adjustment of the position of the wafer 400 so that the center position C of the wafer 400 can coincide with the reference point A.

[0132] In this embodiment, in the step of obtaining the first positional deviation of the center position C of the wafer 400 relative to the reference point A, the positional deviation of the center position C of the wafer 400 from the origin of the rectangular coordinate system is taken as the first positional deviation. Specifically, the first positional deviation is represented by (x, y), where x represents the dimension of the center of the wafer 400 relative to the reference point A in the X-axis direction, and y represents the dimension of the center of the wafer 400 relative to the reference point A in the Y-axis direction.

[0133] In other embodiments, in the step of obtaining the first positional deviation of the wafer's center position relative to the reference point, the positional deviation between the wafer's center position and the polar coordinate system pole is used as the first positional deviation. Specifically, the first positional deviation is represented by (r, ρ), where r represents the polar radius of the wafer's center, and ρ represents the polar angle of the wafer's center.

[0134] In this embodiment, the detection method further includes: after obtaining the first position deviation of the center position C of the wafer 400 relative to the reference point A, transmitting the first position deviation to the host computer as the basis for subsequent wafer adjustment.

[0135] In this embodiment, the first position deviation is transmitted to the host computer using an Application Programming Interface (API) function. In other embodiments, the first position deviation can also be transmitted to the host computer via an I / O interface.

[0136] It should be noted that the image of the alignment mark 700 and the image of the wafer 400 are both located in the first image to be tested. The first positional deviation of the wafer 400 relative to the reference point A refers to the positional deviation of the reference point A and the center position C of the wafer 400 in the horizontal direction.

[0137] It should also be noted that the detection method further includes: the semiconductor wafer position detection device is pre-set with a threshold position deviation (that is, the maximum position deviation that the detection method can adjust). In the step of obtaining the first position deviation of wafer 400 relative to the reference point A, if the first position deviation is greater than the threshold position deviation, the detection method will not be able to adjust the position of wafer 400, the semiconductor wafer position detection device will alarm, and the alarm information will be transmitted to the host computer. The host computer will adjust the position of wafer 400 through the over-threshold adjustment device in chamber 200, so that the position of wafer 400 is within the threshold position deviation range, which facilitates subsequent adjustment of the wafer position using the detection method.

[0138] The detection method further includes: adjusting the position of the wafer 400 according to the first position deviation of the wafer 400, so that the center position C of the wafer 400 coincides with the reference point A.

[0139] The center position C of the wafer 400 coincides with the reference point A, which helps to ensure that the position of the wafer 400 is the same in different semiconductor process steps, making it less likely for the patterns formed in different steps to have overlay errors, thereby improving the yield of the chip.

[0140] In this embodiment, during the step of adjusting the position of the wafer 400, the adjustment device 501 adjusts the position of the wafer stage 201 according to the first position deviation of the wafer 400. During the adjustment process, the adjustment device 501 causes the position of the wafer 400 on the wafer stage 201 to be adjusted.

[0141] In this embodiment, the step of adjusting the position of the wafer stage 201 according to the first position deviation of the wafer 400 includes: the host computer sets the adjustment distance (x) in the X-axis direction and the adjustment distance (y) in the Y-axis direction according to the first position deviation of the center position C of the wafer 400 relative to the reference point A; the host computer drives the adjustment device 501 to make adjustments according to the adjustment distance (x) in the X-axis direction and the adjustment distance (y) in the Y-axis direction, so that the center position C of the wafer 400 coincides with the reference point A.

[0142] In other embodiments, the step of adjusting the position of the wafer stage according to the first position deviation of the wafer includes: the host computer sets an adjustment distance (r0) and an adjustment angle (ρ0) according to the first position deviation of the center position of the wafer relative to the reference point A; the host computer drives the adjustment device to make adjustment according to the adjustment distance (r0) and the adjustment angle (ρ0) so that the center position of the wafer coincides with the reference point A.

[0143] In this embodiment, the semiconductor wafer position detection device further includes: a threshold value for the overlap position deviation between the center position C of the wafer 400 and the reference point A.

[0144] The detection method includes: adjusting the position of the wafer 400 and then emitting illumination light onto the wafer 400 again; after emitting illumination light onto the wafer 400 again, obtaining a second test image, the second test image containing an image of the adjusted wafer 400; obtaining the center position C of the adjusted wafer 400 based on the image of the adjusted wafer 400; obtaining a second position deviation of the adjusted wafer 400 relative to the reference point A based on the center position C of the adjusted wafer 400 and the reference point A; comparing the second position deviation of the wafer 400 with a coincidence position deviation threshold; if the second position deviation is less than the coincidence position deviation threshold, then the center position C of the wafer 400 is considered to coincide with the reference point A; if the second position deviation is greater than the coincidence position deviation threshold, then the center position C of the wafer 400 is considered to not coincide with the reference point A, and the position of the wafer 400 needs to be readjusted.

[0145] Step S7, the detection method further includes: obtaining the angle between the line connecting the location of the notch and the center location of the wafer and the reference direction.

[0146] The detection method further includes: obtaining the position B of the notch based on the notch image; and obtaining the line BC connecting the position of the notch and the center position C of the wafer 400 (e.g., ...) based on the position of the notch and the center position C of the wafer 400. Figure 13 (As shown); obtain the angle between the line connecting the position of the notch and the center position of wafer 400 and the reference direction.

[0147] In the detection method provided in this embodiment of the invention, during the step of placing the wafer 400 in the chamber 200, the edge of the wafer 400 is provided with a notch, and the edge of the wafer 400 is illuminated by illumination light. Therefore, the first image to be tested has a clear image of the notch. Based on the clear image of the notch, the position of the notch can be obtained, and then the line connecting the position of the notch and the center position of the wafer 400 can be obtained. Based on the line connecting the notch and the reference direction, the angle between the line connecting the position of the notch and the center position of the wafer 400 and the reference direction can be obtained.

[0148] It should be noted that the angle between the line connecting the notch position and the center position of wafer 400 that the semiconductor wafer position detection device can detect and the reference direction is within a certain range. If the angle is greater than the angle range that the semiconductor wafer position detection device can detect, the semiconductor wafer position detection device will alarm and transmit the alarm information to the host computer.

[0149] The steps for obtaining the location of the notch include: Figure 14 As shown, the centers of the two sides of the notch image are obtained (e.g., Figure 14 D1 in a and Figure 14 (D2 in b); obtain the center position of the line D1D2 connecting the centers of the two sides as the position of the gap image.

[0150] In this embodiment, the step of obtaining the center of both sides of the gap image includes: taking the boundary between the outer region of the gap image and the annular illuminated region in the image to be tested as the edge of the gap image; and obtaining the center of the side of the gap image based on the edge of the gap image.

[0151] In this embodiment, an edge-finding tool is used to locate the center of the side of the notched image.

[0152] In this embodiment, the step of obtaining the center position of the line connecting the centers on the two sides as the position of the gap image includes: obtaining the coordinates of the centers of the two sides of the gap image; and using the coordinates of the centers of the two sides of the gap image, solving for the center position of the line connecting the centers as the position of the gap image.

[0153] In this embodiment, the host computer uses image processing software to obtain the angle between the line connecting the position of the notch and the center position of wafer 400 and the reference direction.

[0154] In other embodiments, the detection method further includes: rotating the wafer according to the angle between the line connecting the position of the notch and the wafer center and the reference direction, so that the line connecting the wafer center and the notch is parallel to the reference direction. In the step of rotating the wafer, the adjustment device rotates the wafer support stage according to the angle between the line connecting the position of the notch and the wafer center and the reference direction. Specifically, the host computer drives the adjustment device to make adjustments according to the angle, so that the line connecting the wafer center and the notch is parallel to the reference direction (coinciding in this embodiment).

[0155] In this embodiment, the semiconductor wafer position detection device further includes: a threshold value for the angle deviation between the line connecting the position of the notch and the center position of the wafer 400 and the reference direction.

[0156] The detection method further includes: after adjusting the angle of the wafer 400, emitting illumination light again onto the wafer 400 and the notch; after emitting illumination light again onto the wafer 400 and the notch, obtaining a second test image, the second test image containing an image of the adjusted wafer 400 and an image of the notch; obtaining the center position of the adjusted wafer 400 based on the image of the adjusted wafer 400; obtaining the position of the adjusted notch based on the image of the adjusted notch; and determining the center position of the adjusted wafer 400 based on the position of the adjusted notch and the center position of the adjusted wafer 400. The system obtains the line connecting the adjusted position of the notch and the center position of wafer 400; it also obtains the angle between the line connecting the adjusted position of the notch and the center position of wafer 400 and the reference direction; the system compares the adjusted angle with the angle deviation threshold. If the angle is less than the angle deviation threshold, it is considered that the line connecting the position of the notch and the center position of wafer 400 is parallel to the reference direction; if the angle is greater than the angle deviation threshold, it is considered that the line connecting the position of the notch and the center position of wafer 400 is not parallel to the reference direction.

[0157] Accordingly, combined Figures 1 to 14 ,refer to Figure 15 The present invention also provides a detection system for a semiconductor wafer position detection device.

[0158] The semiconductor wafer position detection device includes a chamber 200, in which alignment marks are provided.

[0159] The detection system includes: a carrier module 10, located in the chamber 200, for placing a wafer 400 and positioning an alignment mark 700 outside the edge of the wafer 400; an optical path module 70, located outside the chamber 200, for emitting illumination light from the front of the wafer 400 and the alignment mark towards the edge of the wafer 400 and the alignment mark; a test image acquisition module 20, located on the front of the wafer 400 and the alignment mark, for acquiring a first test image, the first test image containing an image of the wafer 400 and an image of the alignment mark; and a wafer position deviation acquisition module 30, for acquiring a reference coordinate system of the chamber 200 based on the image of the alignment mark, for acquiring the center position of the wafer 400 based on the image of the wafer 400, and for acquiring the position deviation of the center of the wafer 400 relative to the reference point based on the center position of the wafer 400 and the reference point of the reference coordinate system.

[0160] The present invention provides a detection system for a semiconductor wafer position detection device, the semiconductor wafer position detection device including a chamber 200, an alignment mark disposed in the chamber 200, a carrier module 10 in the chamber 200 for placing a wafer 400 and positioning the alignment mark 700 outside the edge of the wafer 400, and an optical path module 70 located outside the chamber 200 for emitting illumination light from the front of the wafer 400 and the alignment mark toward the edge of the wafer 400 and the alignment mark, so that the image of the alignment mark can be clearly displayed in the light in a first test image, which is beneficial for obtaining a reference point in the chamber 200 based on the alignment mark image. The reference point serves as a reference for judging the magnitude of the center position deviation of the wafer 400 and as a reference for adjusting the position of the wafer 400. The wafer 400 exposes the alignment mark, and the edges of the wafer 400 are illuminated from the front. As a result, the central area of ​​the wafer 400 is dark, while the edge area is bright. Therefore, the image edge of the wafer 400 has high clarity, which is beneficial for determining the outline of the wafer 400 based on the illumination light at the edge of the wafer 400 image. Based on the outline of the wafer 400, the center position of the wafer 400 can be obtained more accurately. Furthermore, based on the center position of the wafer 400 and the position of the reference point, the first positional deviation of the center position of the wafer 400 relative to the reference point of the reference coordinate system can be accurately obtained, thereby improving the accuracy and detection precision of the semiconductor wafer position detection device.

[0161] The carrier module 10 includes a plate support stage 201.

[0162] The optical path module 70 includes a light-emitting module 100 and a reflector 300. The light-emitting module 100 is located outside the chamber 200 and is used to provide illumination light through the opening of the chamber; the reflector 300 is located in the chamber 200 and between the chamber opening and the wafer, and is used to reflect the illumination light to the edge of the wafer; the image acquisition device 600 is located on top of the light-emitting module.

[0163] When the semiconductor wafer position detection device provided in this embodiment of the invention is working, the illumination light provided by the light-emitting module 100 passes through the opening of the cavity 200 and is accurately reflected to the edge of the wafer 400 by the reflector 300, forming a ring light on the edge of the wafer 400, so that the edge of the wafer 400 can be illuminated, which makes it easier to determine the position of the wafer 400 in the cavity 200. The notch on the edge of the wafer is also illuminated by the illumination light, which makes it easier to determine the corner of the wafer 400 based on the position of the notch on the wafer 400, thereby improving the overlay accuracy of the patterns formed in different steps on the wafer.

[0164] In this embodiment, an alignment mark 700 is provided in the chamber 200, and the alignment mark 700 is used to determine the reference point of the chamber 200.

[0165] In this embodiment, the alignment mark 700 is located on the side of the wafer stage 201, so that the wafer placed in the chamber 200 can expose the alignment mark 700, so that the image obtained by taking pictures of the wafer and the alignment mark 700 can simultaneously show the wafer and the alignment mark 700.

[0166] In this embodiment, the number of alignment marks 700 is three, and the line connecting the centers of the three alignment marks 700 forms a right-angled triangle. In the detection system provided by this embodiment, the center of the longest side is used as the reference point. In other embodiments, the number of alignment marks is two or more. When the number of alignment marks is two, the alignment system provided by this embodiment uses the midpoint of the line connecting the centers of the two alignment marks as the reference point.

[0167] In this embodiment, the extension directions of the two short sides of the triangle formed by the three alignment marks 700 are respectively used as the X-axis and Y-axis.

[0168] As an example, the line connecting the centers of the three alignment marks 700 forms an isosceles right trapezoid.

[0169] In this embodiment, the alignment mark 700 is circular in shape. When the alignment mark 700 is circular, it facilitates obtaining the center of the alignment mark 700 using its image, and makes it easier to obtain the position of a reference point based on the line connecting the centers of multiple alignment marks 700. In other embodiments, the alignment mark is triangular or cross-shaped.

[0170] In this embodiment, the chamber 200 has an alignment mark 700 fixing part (not shown in the figure), and the alignment mark 700 is disposed on the alignment mark 700 fixing part.

[0171] In this embodiment, the material of the alignment mark 700 fixing part is transparent. The alignment mark 700 can block the illumination light, while the alignment mark 700 fixing part transmits the illumination light, so that the alignment mark 700 and the alignment mark 700 fixing part have obvious contrast.

[0172] The image acquisition module 20 is located on the front side of the wafer 400 and the alignment mark 700, and is used to acquire a first image to be tested, which contains an image of the wafer and an image of the alignment mark 700.

[0173] The image acquisition module 20 includes an image acquisition device 600.

[0174] The image acquisition device 600 takes a picture from the front of the wafer and the alignment mark 700. Therefore, the image acquisition device 600 takes pictures facing the light. Since the illumination light provided by the light-emitting module 100 shines on the edge of the wafer, it helps to remove the influence of stray light on the wafer and alignment mark 700 in the picture, and can clearly display them facing the light.

[0175] In this embodiment, the image acquisition device 600 includes a camera. In other embodiments, the image acquisition device may also include a full-screen scanning probe or a detector; specifically, the detector includes an area array detector or a linear array detector.

[0176] It should be noted that the wafer stage 201 and the alignment mark 700 are located within the depth of field (DOF) of the image acquisition device 600, which helps the image acquisition device 600 to acquire clear images of the wafer and the alignment mark 700 in a single shot.

[0177] Image acquisition device 600 captures images (e.g., from the front of the wafer 400 and alignment mark 700) Figure 10 (As shown); the image is processed for clarity to obtain the first image to be tested.

[0178] The semiconductor wafer position detection device further includes a host computer (not shown in the figure), which is connected to the image acquisition device 600 and is used to control the image acquisition device 600 to capture images.

[0179] In this embodiment, the host computer and the image acquisition device 600 are connected via an I / O port.

[0180] In this embodiment, the host computer includes a computer, which is equipped with image processing software. The image processing software is used to acquire images captured by the image acquisition device 600 and to perform subsequent image sharpness processing to obtain a first image to be tested.

[0181] The image acquisition module 20 is used to send a trigger signal to the image acquisition device 600 via a host computer; the image acquisition device 600 takes pictures from the front of the wafer 400 and the alignment mark 700 according to the trigger signal.

[0182] The detection system also utilizes image processing software in the host computer to acquire images from the image acquisition device 600 via a high-speed network port. The image processing software acquires the images to prepare for image sharpness processing and to obtain the first image to be tested.

[0183] It should be noted that when the image acquisition device 600 takes pictures from the front of the wafer 400 and the alignment mark 700, both the alignment mark 700 and the wafer 400 are placed within the depth of field of the image acquisition device 600, resulting in higher image clarity.

[0184] The image acquisition module 20 performs clarity processing on the image, which helps to make the image of wafer 400 and alignment mark 700 in the first image to be tested clearer and easier to identify, thereby improving the accuracy of the reference point obtained based on the image of alignment mark 700 and the accuracy of the center position of wafer 400 obtained based on the image of wafer 400.

[0185] The image acquisition module 20 is used to subdivide the image into grids; obtain the average sharpness value of each grid; and convert the average sharpness value of each grid to obtain the sharpness distribution map of the image.

[0186] In this embodiment, the size of the grid is determined based on the amount of image data and the required sharpness of the first image to be tested.

[0187] In this embodiment, the image acquisition module 20 is used to obtain the average gray value of the grid based on the gray value of the image in the grid; and to obtain the average sharpness value of each grid based on the average gray value of each grid.

[0188] In this embodiment, the grayscale value of the image is obtained using the mean method.

[0189] In this embodiment, the image acquisition module 20 is used to map the average sharpness value of each grid to 0-255 to obtain the sharpness distribution map of the image.

[0190] In this embodiment of the invention, the image undergoes sharpness processing to obtain a first test image. Thus, the sharpness values ​​of the edge and center regions of the wafer 400 in the first test image are different, as are the sharpness values ​​inside and outside the alignment mark. Based on the range of preset grid sharpness values ​​at the edge of the wafer 400 and the alignment mark, the regions of the wafer image and the alignment mark image can be determined. This facilitates obtaining the reference point of the chamber 200 based on the alignment mark image, and facilitates obtaining the center position of the wafer 400 based on the wafer 400 image.

[0191] It should be noted that in the first image to be tested, the wafer is surrounded by a ring-shaped illuminated area.

[0192] The wafer position deviation acquisition module 30 is used to acquire the reference coordinate system of the chamber 200 based on the image of the alignment mark.

[0193] The reference coordinate system includes a reference point A and a coordinate direction. The reference coordinate system serves as a reference for subsequent adjustments to the position of the wafer 400 in the chamber 200.

[0194] The wafer position deviation acquisition module 30 is used to acquire the outer contour of the image of each of the alignment marks 700; acquire the center of the image of each alignment mark 700 based on the outer contour of the image of each alignment mark 700; and acquire the reference coordinate system of the chamber based on the relative position of the centers of each alignment mark 700.

[0195] In this embodiment, the step of obtaining the reference coordinate system of the chamber first involves obtaining a reference point, and establishing a rectangular coordinate system with the reference point A as the origin (0, 0). As an example, the extension directions of the two shorter sides among the three sides are used as the X-axis and Y-axis, respectively.

[0196] The wafer position deviation acquisition module 30 is used to acquire the center of each alignment mark image using the image of the alignment mark; and to take the center point of the longest side of the line connecting the centers of each alignment mark image as the reference point A.

[0197] Specifically, there are three alignment marks, and the line connecting the centers of the three alignment marks forms a right triangle. The center of the longest side is taken as the reference point A. The center of the image of the alignment marks is taken as the actual position of the alignment marks, therefore the center point of the line connecting the longest sides is taken as the reference point A.

[0198] The wafer position deviation acquisition module 30 is used to acquire the image contour of the alignment mark using the first image to be tested; and to select multiple points on the image contour of the alignment mark and fit the center point of the alignment mark using the least squares method.

[0199] In this embodiment, the image of the alignment mark is a circle, and correspondingly, the obtained image outline of the alignment mark is a shape that is close to a circle.

[0200] In this embodiment, the number of points selected from the image contour of the alignment mark is greater than or equal to two. The more points selected, the more accurate the center of the fitted alignment mark will be.

[0201] In this embodiment, the center of the alignment mark is fitted using the least squares method. The center point of the alignment mark is fitted based on multiple points on the edge region of the alignment mark image, and it can be considered that the center of the fitted alignment mark image is infinitely close to the center of the actual alignment mark.

[0202] In other embodiments, the number of alignment marks is two; the step of obtaining a reference point based on the image of the alignment marks includes: obtaining the outer contour of the image of the alignment marks; obtaining the center of the two alignment mark images based on the outer contour of the image of the alignment marks; and taking the center of the line connecting the centers of the two alignment marks as the reference point. The method of obtaining the reference point based on two alignment marks is simple and easy to operate.

[0203] In other embodiments, the wafer position deviation acquisition module is used to acquire the reference point and then establish a polar coordinate system with the reference point as the pole. Based on the polar coordinate system, the first position deviation of the wafer's center relative to the reference point is determined.

[0204] The wafer position deviation acquisition module 30 is used to define the reference direction.

[0205] In this embodiment, the first image to be tested also includes a notch image, and the reference direction is used as a reference for adjusting the 400-degree rotation angle of the wafer.

[0206] In this embodiment, image processing software is used to obtain a notch image at the edge of the wafer image.

[0207] In this embodiment, the reference direction passes through the reference point A. In the detection system of the semiconductor wafer position detection device, when the position of wafer 400 is calibrated first, and then the corner of wafer 400 is calibrated after the position calibration is completed, the notch is located in the reference direction, indicating that the corner of wafer 400 is calibrated. This facilitates the calibration personnel in checking whether the corner of wafer 400 is calibrated correctly. In other embodiments, the reference direction may not pass through the reference point.

[0208] The wafer position deviation acquisition module 30 is used to acquire the center position of the wafer 400 based on the image of the wafer 400.

[0209] The center of wafer 400 is the center of the circle of wafer 400. The position of the center of wafer 400 is the position of wafer 400, which is used to prepare for determining the first position deviation of reference point A based on the position of wafer 400.

[0210] The wafer position deviation acquisition module 30 is used to acquire the image contour of the wafer 400 using the first image to be tested; and to select multiple points on the wafer image contour and fit the center position of the wafer 400 using the least squares method.

[0211] The wafer position deviation acquisition module 30 is used to take the outer boundary of the annular illuminated area in the first image to be tested as the wafer image outline.

[0212] In this embodiment, the number of points selected in the wafer image contour is greater than or equal to two. The more points selected, the more accurate the center of the fitted wafer 400 will be.

[0213] In this embodiment, the center position of the wafer 400 is fitted based on multiple points on the wafer image outline. It can be considered that the fitted center position of the wafer 400 is infinitely close to the center of the actual wafer 400.

[0214] It should be noted that the size of the wafer 400 that the semiconductor wafer position detection device can detect is within a certain range. If the size of the fitted circle is greater than or less than the size range of the wafer 400 that the semiconductor wafer position detection device can detect, the semiconductor wafer position detection device will alarm and transmit the alarm information to the host computer.

[0215] The wafer position deviation acquisition module 30 is used to acquire a first position deviation of the center position of the wafer 400 relative to the reference point A based on the center position of the wafer 400 and the reference point A of the reference coordinate system.

[0216] The first position deviation of the center position of the wafer 400 relative to the reference point A is obtained in preparation for adjusting the position of the wafer 400 so that the center position of the wafer 400 can coincide with the reference point A.

[0217] Specifically, the first position deviation is represented by (x, y), where x represents the size of the center of wafer 400 relative to reference point A in the X-axis direction, and y represents the size of the center of wafer 400 relative to reference point A in the Y-axis direction.

[0218] In other embodiments, the wafer position deviation acquisition module 30 is used to take the position deviation between the center position of the wafer and the pole of the polar coordinate system as the first position deviation. Specifically, the first position deviation is represented by (r, ρ), where r represents the polar radius of the wafer center and ρ represents the polar angle of the wafer center.

[0219] In this embodiment, the wafer position deviation acquisition module 30 is also used to transmit the first position deviation to the host computer as a basis for adjusting the wafer.

[0220] In this embodiment, the first position deviation is transmitted to the host computer using an Application Programming Interface (API) function. In other embodiments, the first position deviation can also be transmitted to the host computer via an I / O interface.

[0221] It should be noted that the image of the alignment mark and the image of the wafer 400 are both located in the first image to be tested. The first positional deviation of the wafer 400 relative to the reference point A refers to the positional deviation of the reference point A and the center position of the wafer 400 in the horizontal direction.

[0222] It should be noted that the semiconductor wafer position detection device further includes an over-threshold adjustment device, which is connected to the host computer and is used to adjust the position of the wafer when the position deviation of the center position of the wafer relative to the reference point exceeds the maximum position deviation that the detection system can adjust, so that the position of the wafer can be within the threshold position deviation range.

[0223] In this embodiment, the semiconductor wafer position detection device is pre-set with a threshold position deviation (that is, the maximum position deviation that the detection system can adjust). If the first position deviation is greater than the threshold position deviation, the detection system will not be able to adjust the position of the wafer 400, the semiconductor wafer position detection device will sound an alarm, and the alarm information will be transmitted to the host computer. The host computer adjusts the position of the wafer 400 through the over-threshold adjustment device in the chamber 200, so that the position of the wafer 400 is within the threshold position deviation range, which facilitates the adjustment of the wafer position using the detection system.

[0224] The position adjustment module 40 is used to adjust the position of the wafer 400 according to the first position deviation of the wafer 400, so that the center position of the wafer 400 coincides with the reference point A, thereby improving the detection accuracy of the wafer 400.

[0225] The center position of the wafer 400 coincides with the reference point A, which helps to ensure that the position of the wafer 400 is the same in different semiconductor process steps, making it less likely for the patterns formed on the chip in different steps to have overlay errors, thereby improving the yield of the formed chip.

[0226] The position adjustment module 40 includes an adjustment device 501 located at the bottom of the wafer stage 201. The adjustment device 501 is connected to the wafer stage 201 and is used to drive the wafer stage 201 to translate or rotate, thereby changing the position and angle of the wafer 400 to be tested on the wafer stage in the chamber 200.

[0227] In this embodiment, the adjustment device 501 includes a rotation mechanism and a translation mechanism. Specifically, the output end of the rotation mechanism and the output end of the translation mechanism are connected to the plate support 201. The rotation mechanism is used to drive the plate support 201 to rotate, and the translation mechanism is used to drive the plate support 201 to translate.

[0228] In this embodiment, the adjustment device 501 adjusts the position of the wafer stage 201 according to the first position deviation of the wafer 400. The adjustment device 501 causes the position of the wafer 400 on the wafer stage 201 to be adjusted.

[0229] Specifically, the host computer sets the adjustment distance (x) in the X-axis direction and the adjustment distance (y) in the Y-axis direction based on the first position deviation of the center position of the wafer 400 relative to the reference point A; the host computer drives the adjustment device 501 to make adjustments based on the adjustment distance (x) in the X-axis direction and the adjustment distance (y) in the Y-axis direction, so that the center position of the wafer 400 coincides with the reference point A.

[0230] In other embodiments, the host computer sets an adjustment distance (r0) and an adjustment angle (ρ0) based on the first position deviation of the wafer's center position relative to the reference point A; the host computer drives the adjustment device to make adjustments based on the adjustment distance (r0) and the adjustment angle (ρ0) so that the wafer's center position coincides with the reference point A.

[0231] In this embodiment, the semiconductor wafer position detection device further includes: a threshold value for the overlap position deviation between the center position of the wafer 400 and the reference point A.

[0232] The detection system further includes: a position verification module, configured to: after adjusting the position of the wafer 400, emit illumination light to the wafer 400 again; after emitting illumination light to the wafer 400 again, obtain a second test image, the second test image containing an image of the adjusted wafer 400; obtain the center position of the adjusted wafer 400 based on the image of the adjusted wafer 400; obtain a second position deviation of the adjusted wafer 400 relative to the reference point A based on the center position of the adjusted wafer 400 and the reference point A; and compare the second position deviation of the wafer 400 with a coincidence position deviation threshold. If the second position deviation is less than the coincidence position deviation threshold, the center position of the wafer 400 is considered to coincide with the reference point A; if the second position deviation is greater than the coincidence position deviation threshold, the center position of the wafer 400 is considered not to coincide with the reference point A, and the position of the wafer 400 needs to be readjusted.

[0233] The detection system further includes: an angle deviation acquisition module 50, used to acquire the position of the notch based on the notch image; used to acquire the line connecting the position of the notch and the center position of the wafer 400 based on the position of the notch and the center position of the wafer 400; and used to acquire the angle between the line connecting the position of the notch and the center position of the wafer 400 and the reference direction.

[0234] In the detection system provided in this embodiment of the invention, a wafer 400 is placed in the chamber 200. The edge of the wafer 400 has a notch, and the edge of the wafer 400 is illuminated by light. Therefore, the first image to be tested has a clear image of the notch. Based on the clear image of the notch, the position of the notch can be obtained, and then the line connecting the position of the notch and the center position of the wafer 400 can be obtained. Based on the line connecting the notch and the reference direction, the angle between the line connecting the position of the notch and the center position of the wafer 400 and the reference direction can be obtained.

[0235] It should be noted that the angle between the line connecting the notch position and the center position of wafer 400 that the semiconductor wafer position detection device can detect and the reference direction is within a certain range. If the angle is greater than the angle range that the semiconductor wafer position detection device can detect, the semiconductor wafer position detection device will alarm and transmit the alarm information to the host computer.

[0236] Angle deviation acquisition module 50 is used to acquire the center of both sides of the notch image (e.g., Figure 14 D1 in a and Figure 14 (D2 in b); is used to obtain the center position of the line connecting the centers of the two sides as the position of the gap image.

[0237] The angle deviation acquisition module 50 is used to take the boundary between the outer region of the gap image and the ring-shaped illuminated region in the image to be tested as the edge of the gap image; and to obtain the center of the side of the gap image based on the edge of the gap image.

[0238] In this embodiment, the angle deviation acquisition module 50 uses an edge finding tool to find the center of the side of the notch image.

[0239] In this embodiment, the angle deviation acquisition module 50 is used to acquire the coordinates of the centers of the two sides of the gap image; using the coordinates of the centers of the two sides of the gap image, the center position of the line connecting the centers is calculated as the position of the gap image.

[0240] In this embodiment, the host computer uses image processing software to obtain the angle between the line connecting the position of the notch and the center position of wafer 400 and the reference direction.

[0241] The detection system further includes an angle adjustment module 60, which is used to rotate the wafer 400 according to the angle between the line connecting the position of the notch and the center position of the wafer 400 and the reference direction, so that the line connecting the center position of the wafer 400 and the reference direction is parallel to the reference direction, thereby improving the detection accuracy of the wafer 400.

[0242] In this embodiment, the angle adjustment module rotates the wafer support stage 201 according to the angle between the line connecting the position of the notch and the center position of the wafer 400 and the reference direction. Specifically, the host computer drives the angle adjustment module to adjust the direction according to the angle, so that the line connecting the center position of the wafer 400 and the position of the notch is parallel to the reference direction (coinciding in this embodiment).

[0243] In this embodiment, the semiconductor wafer position detection device further includes: a threshold value for the angle deviation between the line connecting the position of the notch and the center position of the wafer 400 and the reference direction.

[0244] The detection system further includes: an angle verification module, used to adjust the rotation angle of the wafer 400 and then emit illumination light again onto the wafer 400 and the notch; used to obtain a second test image after emitting illumination light again onto the wafer 400 and the notch, the second test image containing an image of the adjusted wafer 400 and an image of the notch; used to obtain the center position of the adjusted wafer 400 based on the image of the adjusted wafer 400; used to obtain the position of the adjusted notch based on the image of the adjusted notch; used to determine the center position of the adjusted wafer 400 based on the position of the adjusted notch and the adjusted wafer 400… The center position of circle 400 is used to obtain the line connecting the adjusted position of the notch and the center position of wafer 400; the angle between the line connecting the adjusted position of the notch and the center position of wafer 400 and the reference direction is obtained; the adjusted angle is compared with the angle deviation threshold. If the angle is less than the angle deviation threshold, it is considered that the line connecting the position of the notch and the center position of wafer 400 is parallel to the reference direction. If the angle is greater than the angle deviation threshold, it is considered that the line connecting the position of the notch and the center position of wafer 400 is not parallel to the reference direction.

[0245] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is accorded the widest scope consistent with the principles and novel features disclosed herein.

[0246] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A semiconductor wafer position detection device, characterized in that, include: A vacuum chamber in which the wafer to be tested is placed, the top of the chamber having an opening; A transparent window is provided at the opening of the chamber, forming a sealed connection with the opening of the chamber; A wafer stage, located within the vacuum chamber, is used to hold the wafer; A wafer is placed on the wafer support stage; the wafer has notches along its edges. A light-emitting device, located outside the chamber and above the transparent window, is used to provide illumination light that passes through the transparent window; The light-emitting device includes: an annular mounting portion; a first tapered hole located at the bottom of the annular mounting portion, wherein the top of the first tapered hole is the small-diameter end and the bottom of the first tapered hole is the large-diameter end; and an annular light source disposed circumferentially on the side wall of the first tapered hole. A reflective device, located in the chamber and between the chamber opening and the wafer, is used to reflect the illumination light to the edge of the wafer; the reflective device includes: an annular reflector, the annular reflector including a second tapered aperture, the top opening of the second tapered aperture being smaller than the bottom opening; Alignment marks are located in the chamber; the alignment marks are located on the side of the wafer stage and are positioned outside the wafer edge; An alignment mark fixing part is located in the chamber. The alignment mark is disposed on the alignment mark fixing part. The material of the alignment mark fixing part is transparent. The alignment mark blocks the illumination light, while the alignment mark fixing part transmits the illumination light, so that the alignment mark and the alignment mark fixing part have obvious contrast. An image acquisition device, located above the light-emitting device, is used to acquire images of the wafer and alignment marks.

2. The semiconductor wafer position detection device as described in claim 1, characterized in that, The light-emitting device further includes a light-diffusing plate located on the inner wall of the first tapered hole, covering the annular light source.

3. The semiconductor wafer position detection device as described in claim 1, characterized in that, The ring light source includes multiple light-emitting diodes arranged at intervals on the sidewall of the first tapered hole.

4. The semiconductor wafer position detection device as described in claim 1, characterized in that, The first tapered hole is a circular tapered hole or a polygonal tapered hole.

5. The semiconductor wafer position detection device as described in claim 1, characterized in that, The light-emitting device further includes a through hole located at the top of the first tapered hole and penetrating the annular mounting portion, for allowing the image acquisition device to acquire a wafer surface image through the through hole of the light-emitting device.

6. The semiconductor wafer position detection device as described in claim 1, characterized in that, Define a reference coordinate system using the image of the alignment mark in the picture.

7. The semiconductor wafer position detection device as described in claim 1, characterized in that, The plate support is either fixedly or movably disposed within the chamber.

8. A detection method for a semiconductor wafer position detection device, characterized in that, Applied to the semiconductor wafer position detection apparatus as described in claim 1, the semiconductor wafer position detection apparatus includes a chamber, and an alignment mark is disposed in the chamber; the detection method includes: A wafer is placed in the chamber, and alignment marks are set outside the edge of the wafer. Illumination light is emitted from the front side of the wafer and the alignment mark toward the edge of the wafer and the alignment mark; After illuminating the edge of the wafer and the alignment mark, a first image to be tested is obtained, which contains an image of the wafer and an image of the alignment mark. Based on the image of the alignment marks, obtain the reference coordinate system of the chamber; Based on the image of the wafer, the center position of the wafer is obtained; Based on the center position of the wafer and the reference point of the reference coordinate system, obtain the first position deviation of the center position of the wafer relative to the reference point.

9. The detection method as described in claim 8, characterized in that, In the step of placing the wafer in the chamber, the edge of the wafer has a notch; In the step of obtaining the first image to be tested, the first image to be tested also has a notch image; The detection method further includes: defining a reference direction; Based on the image of the gap, the location of the gap is obtained; Based on the location of the notch and the center location of the wafer, obtain the line connecting the location of the notch and the center location of the wafer; Obtain the angle between the line connecting the location of the notch and the center of the wafer and the reference direction.

10. The detection method as described in claim 9, characterized in that, In the step of defining the reference direction, the reference direction passes through the reference point.

11. The detection method as described in claim 8, characterized in that, The step of obtaining the reference coordinate system of the chamber based on the image of the alignment marks includes: Obtain the outer contour of the image of each of the alignment marks; Based on the outer contour of each alignment mark's image, obtain the center of the alignment mark's image; The reference coordinate system of the chamber is obtained based on the relative positions of the centers of the images of each alignment mark.

12. The detection method as described in claim 11, characterized in that, The step of obtaining the center of the image of the alignment mark based on the outer contour of the image of the alignment mark includes: Using the first image to be tested, obtain the outline of the image of the alignment mark; Multiple points are selected from the image contour of the alignment mark, and the center point of the alignment mark is fitted using the least squares method.

13. The detection method as described in claim 8, characterized in that, The detection method further includes: after obtaining the reference point, establishing a rectangular coordinate system with the reference point as the origin; In the step of obtaining the first positional deviation of the center position of the wafer relative to the reference point, the positional deviation of the center position of the wafer from the origin of the rectangular coordinate system is taken as the first positional deviation. or, The detection method further includes: after obtaining the reference point, establishing a polar coordinate system with the reference point as the pole; In the step of obtaining the first positional deviation of the center position of the wafer relative to the reference point, the positional deviation between the center position of the wafer and the pole of the polar coordinate system is taken as the first positional deviation.

14. The detection method as described in claim 9, characterized in that, The steps for obtaining the location of the gap include: obtaining the center of both sides of the gap image; and obtaining the center position of the line connecting the centers of the two sides as the location of the gap.

15. The detection method as described in claim 8 or 9, characterized in that, The step of obtaining the center position of the wafer based on the image of the wafer includes: Using the first image to be tested, obtain the image outline of the wafer; Multiple points are selected in the edge region of the image of the wafer, and the center position of the wafer is fitted using the least squares method.

16. The detection method as described in claim 15, characterized in that, In the step of emitting illumination light toward the edge of the wafer and the alignment mark, the edge of the wafer is illuminated by the illumination light, forming a ring-shaped illuminated area; In the step of obtaining the image contour of the wafer using the first image to be tested, the outer boundary of the wafer in the annular illuminated area is taken as the wafer image contour.

17. The detection method as described in claim 8, characterized in that, The steps to obtain the first image to be tested include: Images taken from the front of the wafer and alignment marks; The image is processed to improve its clarity, thereby obtaining the first image to be tested.

18. The detection method as described in claim 8, characterized in that, The semiconductor wafer position detection device further includes: a threshold value for the overlap position deviation between the center position of the wafer and the reference point; The detection method includes: After adjusting the position of the wafer and emitting illumination light onto the wafer again, a second image to be tested is obtained, which contains an image of the adjusted wafer. Based on the image of the adjusted wafer, the center position of the adjusted wafer is obtained; Based on the center position of the adjusted wafer and the reference point, obtain the second position deviation of the adjusted wafer relative to the reference point; The second position deviation of the wafer is compared with the coincidence position deviation threshold. If the second position deviation is less than the coincidence position deviation threshold, the center position of the wafer is considered to coincide with the reference point. If the second position deviation is greater than the coincidence position deviation threshold, the center position of the wafer is considered to not coincide with the reference point, and the position of the wafer needs to be readjusted.

19. The detection method as described in claim 9, characterized in that, The semiconductor wafer position detection device further includes: a threshold value for the angle deviation between the line connecting the position of the notch and the position of the wafer center and the reference direction; The detection method further includes: after adjusting the rotation angle of the wafer, emitting illumination light again onto the wafer and the notch; after emitting illumination light again onto the wafer and the notch, obtaining a second image to be tested, wherein the second image to be tested contains an image of the adjusted wafer and an image of the notch; Based on the image of the adjusted wafer, the center position of the adjusted wafer is obtained; Based on the image of the adjusted gap, the position of the adjusted gap is obtained; Based on the adjusted position of the notch and the adjusted center position of the wafer, obtain the line connecting the adjusted position of the notch and the center position of the wafer; Obtain the angle between the line connecting the adjusted position of the notch and the wafer center position and the reference direction; The adjusted included angle is compared with the included angle deviation threshold. If the included angle is less than the included angle deviation threshold, it is considered that the line connecting the position of the notch and the position of the wafer center is parallel to the reference direction. If the included angle is greater than the included angle deviation threshold, it is considered that the line connecting the position of the notch and the position of the wafer center is not parallel to the reference direction.

20. A detection system for a semiconductor wafer position detection device, characterized in that, Applied to the semiconductor wafer position detection apparatus as described in claim 1, the semiconductor wafer position detection apparatus includes a chamber, the chamber being provided with alignment marks, and the detection system includes: A carrier module, located within the chamber, is used to place the wafer, and alignment marks are positioned outside the wafer edge; An optical path module, located outside the chamber, is used to emit illumination light from the front side of the wafer and the alignment mark toward the edge of the wafer and the alignment mark; The image acquisition module is located on the front side of the wafer and the alignment mark, and is used to acquire a first image to be tested, which contains an image of the wafer and an image of the alignment mark. The wafer position deviation acquisition module is used to acquire the reference coordinate system of the chamber based on the image of the alignment mark, to acquire the center position of the wafer based on the image of the wafer, and to acquire the position deviation of the center of the wafer relative to the reference point based on the center position of the wafer and the reference point of the reference coordinate system.

21. The detection system as described in claim 20, characterized in that, The wafer has notches at its edges. The first image to be tested also has a notch image; The detection system also includes: a reference direction; An angle deviation acquisition module is used to acquire the position of the notch based on the notch image; to acquire the line connecting the position of the notch and the center position of the wafer based on the position of the notch and the center position of the wafer; and to acquire the angle between the line connecting the position of the notch and the center position of the wafer and the reference direction.

Images