A mixer device four-level converter containing a T-shaped high-frequency structure and an SPWM mixing modulation control method

Abstract

The application discloses a mixer device four-level converter containing a T-shaped high-frequency structure and an SPWM mixed frequency modulation control method. The converter topology focuses on a traditional active midpoint clamping four-level topology, and a single-phase bridge arm switching network is divided into a low-frequency gating part and a high-frequency commutation part. The low-frequency gating part is composed of six silicon-based insulated gate bipolar transistors, and three half-bridges are formed and clamped at both ends of three bus capacitors; the high-frequency commutation part is designed as a T-shaped three-level structure and is composed of four silicon carbide-based metal oxide semiconductor field effect transistors. The proposed SPWM mixed frequency modulation control method focuses on defining specific switching states and switching sequences, ensuring that only the silicon carbide-based metal oxide semiconductor field effect transistors act in a switching period, and the silicon-based insulated gate bipolar transistors only switch when the reference voltage is zero. Therefore, the high frequency of the whole system is realized, the cost of the converter is reduced, and the converter has a great engineering promotion prospect.

Description

Technical Field

[0001] This invention belongs to the field of power electronics technology, and relates to hybrid multilevel converters, and more particularly to a hybrid device four-level converter with a T-type high-frequency structure and an SPWM mixing modulation control method. Background Technology

[0002] In the field of medium-voltage, high-power AC / DC power conversion, multilevel circuit topologies not only reduce voltage stress and switching losses in switching devices, but also significantly improve the harmonic performance of the AC side current, reduce filter size, and increase system power density by increasing the number of converter levels. Therefore, they are considered an ideal technology and have been widely used in industry. On the other hand, wide-bandgap devices, represented by silicon carbide (SiC), have advantages such as lower switching losses and higher operating frequencies compared to traditional silicon-based semiconductor devices. They can break through the performance limits of traditional silicon-based converters and adapt to the development direction of high efficiency and high power density in power electronic converters, becoming a research hotspot in academia and industry in recent years. However, high cost remains a major factor limiting the large-scale application of silicon carbide devices. Generally, the price of silicon carbide MOSFETs is roughly 3 to 8 times that of silicon-based devices of the same specifications, and devices with high voltage and high current ratings are relatively more expensive, with a significant price difference in high-power applications. Based on this, many multilevel schemes for the hybrid application of wide-bandgap devices and silicon devices have been researched, pursuing a dual optimization design of performance and cost. These hybrid multilevel converters partially utilize silicon carbide (SiC) devices in the circuit while concentrating all high-speed switching operations on SiC devices for mixing and modulation. This achieves performance similar to all-SiC designs at a significantly lower cost, making them highly valuable for engineering applications. However, current hybrid multilevel converters are primarily based on three-level topologies, resulting in a limited number of voltage levels. Furthermore, the unoptimized performance of high-voltage SiC MOSFETs restricts their application in medium-voltage applications. Therefore, researching hybrid four-level converters, which can adapt to higher voltage levels while achieving higher efficiency and power density at a lower cost, is of great significance for promoting the application of SiC devices in medium-voltage fields and improving the performance of power conversion systems.

[0003] This invention proposes a hybrid device four-level converter with a T-type high-frequency structure and a corresponding SPWM mixing modulation control method. The proposed hybrid device four-level converter topology balances high performance and low cost, combining the advantages of both hybrid and four-level converters. The proposed SPWM mixing control method employs specific switching states and sequences, enabling silicon carbide devices to perform high-frequency switching actions while silicon-based power devices operate at low frequencies, thus achieving mixing modulation. Simultaneously, the proposed control method is also compatible with DC-side bus capacitor voltage balance control, resolving the capacitor voltage imbalance problem in the four-level circuit through modulation. Summary of the Invention

[0004] This invention creatively proposes a hybrid device four-level converter with a T-type high-frequency structure and a corresponding SPWM mixing modulation control method. The proposed T-type four-level hybrid converter topology focuses on the fact that the low-frequency gating section in each single-phase bridge arm consists of six silicon-based insulated-gate bipolar transistors (SMTs), forming three half-bridges, clamped to the two ends of three bus capacitors. The high-frequency commutation section is designed as a T-type three-level structure, composed of four silicon carbide (SiM) metal-oxide-semiconductor (MOSFETs), with the three input terminals connected to the output terminals of the three silicon-based half-bridges. The proposed SPWM mixing modulation control method focuses on defining specific switching states and switching sequences for reference voltages of different polarities. The low-frequency state of the switching network is determined by the reference voltage, while the high-frequency modulation method is traditional PWM modulation. This ensures that the SiM handles the high-frequency switching action, while the SiM switches at low frequencies, thereby reducing costs while achieving performance similar to all-SiM power devices, making it highly promising for engineering applications.

[0005] The technical solution of the present invention is as follows:

[0006] A hybrid device four-level converter with a T-type high-frequency structure is disclosed. The converter comprises a DC bus, a first capacitor, a second capacitor, a third capacitor, three T-type four-level single-phase bridge arms, and a three-phase AC circuit. Each single-phase bridge arm includes a first switch (Q1), a second switch (Q2), a third switch (Q3), a fourth switch (Q4), a fifth switch (Q5), a sixth switch (Q6), a seventh switch (Q7), an eighth switch (Q8), a ninth switch (Q9), and a tenth switch (Q1). 10 The first switch (Q1), second switch (Q2), third switch (Q3), fourth switch (Q4), fifth switch (Q5), and sixth switch (Q6) are silicon-based insulated-gate bipolar transistors (SMTs). The seventh switch (Q7), eighth switch (Q8), ninth switch (Q9), and tenth switch (Q6) are silicon-based insulated-gate bipolar transistors (SMTs). 10( ) is a silicon carbide-based metal-oxide-semiconductor field-effect transistor, and its single-phase circuit topology is as follows: Figure 1 As shown, the three-phase circuit topology is as follows: Figure 2 As shown;

[0007] The SPWM mixing modulation control method is as follows: Figure 3 As shown, it includes the following:

[0008] (1) The four output levels of each single-phase circuit of the converter are defined as 1L, 2L, 3L and 4L respectively; for the four output levels of the single-phase bridge arm, six switching states are selected and defined as S. 4_P S 3_P S 2_P S 3_N S 2_N S 1_N According to the switching function shown in Equation 1, the six switching states can be represented as shown in Table 1, and the corresponding circuit states are as follows: Figure 4 As shown;

[0009]

[0010] Table 1. Six Switch States and Corresponding Output Levels

[0011]

[0012]

[0013] (2) Determine the switching state and duration of a single-phase bridge arm within a switching cycle. The specific method is as follows: During the positive half-cycle of the single-phase bridge arm reference voltage, select three levels, 2L, 3L, and 4L, to synthesize a reference voltage, and use S accordingly. 2_P S 3_P S 4_P Three switching states; during the negative half-cycle of the single-phase bridge arm reference voltage, the three output levels 1L, 2L, and 3L are selected to synthesize the reference voltage, corresponding to the S... 1_N S 2_N S 3_N Three switching states; the switching method is as follows: during the positive half-cycle of the single-phase bridge arm reference voltage, the switching sequence is S... 2_P →S 3_P →S 4_P →S 3_P →S 2_P There are a total of four switching actions; during the negative half-cycle of the single-phase bridge arm reference voltage, the switching sequence is S. 1_N →S 2_N →S 3_N →S 2_N →S 1_N Thus, when the polarity of the reference voltage of a single-phase bridge arm changes, the resulting switching action is as follows: To ensure symmetry, the duration of each of the two identical switching states is half the total duration of that switching state; the switching action of a single-phase circuit is as follows: Figure 5 As shown;

[0014] (3) The duration of each output level and switching state can be obtained by comparing the two modulated waves and the two superimposed carrier waves, such as... Figure 6 As shown; where the two stacked carrier waves correspond to the modulation when the reference voltage is positive and negative, respectively, as shown in Equation 2; the two modulation waves v 1,x and v 2,x The expression is shown in Equation 3. The two main modulating waves intersect with the carrier at four points, and these four intersection points are the time nodes for the switching state; V dc The DC bus voltage, u refx For single-phase reference voltage, T s For switching cycles;

[0015]

[0016]

[0017] (4) Three-phase reference voltage u refx The calculation method for x = a, b, c is as follows: As shown in Equation 4, the sine wave u of the three-phase fundamental frequency ori,x The zero-sequence component u, x = a, b, c, is superimposed to achieve the balance control of the first and third capacitors. z After that, we get u refx x = a, b, c are used as three-phase reference voltages;

[0018] u refx =u ori,x +u z x = a, b, c (4)

[0019] The injection of zero-order components should meet the following principles:

[0020] a. Reference voltage u of each phase refx x = a, b, c should be within the maximum allowable injection range, as shown in Equation 5. Figure 7 As shown;

[0021]

[0022] b. Based on the three-phase output current i of the converter ox x = a, b, c, the average midpoint current under this injection is calculated using Equation 6. Assume the capacitance values ​​of the three bus capacitors are C1 = C2 = C3 = C d According to the voltage u across the first capacitor on the DC side c1The voltage u across the first capacitor c3 Capacitance value C d and switching period T s The reference midpoint current is calculated using Equation 7. Within the maximum permissible injection range, the average midpoint current should be taken. closest to the reference midpoint current Zero-order injection;

[0023]

[0024]

[0025] (5) Control the voltage of the second capacitor on the DC side to maintain V dc / 3, the method is to fine-tune the magnitude of the two main modulation waves in each phase, as shown in Equation 8; where Δv is the adjustment amplitude, which generally does not exceed the DC bus voltage V. dc 2%;

[0026]

[0027] (6) Based on the above SPWM control method, starting from the three-phase sinusoidal reference voltage at the fundamental frequency, the control of the three DC-side capacitor voltages is added to calculate the switching state and action time of each of the three-phase bridge arms. According to the prescribed switching state switching method, the control signal is synthesized and a dead time T is added. D It is then converted into 30 corresponding PWM signals.

[0028] The beneficial effects of this invention are:

[0029] The hybrid device-type four-level converter topology proposed in this invention combines a low-frequency gating section and a high-frequency commutation section, achieving both high performance and low cost, and possessing the advantages of both hybrid and four-level converters. The proposed SPWM mixing control method employs specific switching states and sequences for reference voltages of different polarities, enabling silicon carbide devices to perform high-frequency switching actions while silicon-based power devices operate at low frequencies, thus achieving mixing modulation. Simultaneously, this method is also compatible with DC-side bus capacitor voltage balance control, solving the capacitor voltage imbalance problem in four-level circuits through modulation, and has significant potential for widespread application. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of the single-phase circuit topology of a hybrid device four-level converter containing a T-type high-frequency structure.

[0031] Figure 2 This is a schematic diagram of the three-phase circuit topology of a hybrid device four-level converter containing a T-type high-frequency structure.

[0032] Figure 3The flowchart shows the SPWM mixing modulation control method applied to the proposed converter.

[0033] Figure 4 The schematic diagram shows the six switching states used in the SPWM mixing modulation control method.

[0034] Figure 5 This is a schematic diagram of the switching action used in the SPWM mixing modulation control method.

[0035] Figure 6 This is a schematic diagram of the modulation scheme of the SPWM mixing modulation control method.

[0036] Figure 7 This is a schematic diagram of the zero-sequence component injection range of the SPWM mixing modulation control method.

[0037] Figure 8 The waveforms of three-phase current, DC bus capacitor voltage, phase voltage, and line voltage are shown in one embodiment.

[0038] Figure 9 The waveforms of current and voltage on a representative switch in one embodiment are shown. Detailed Implementation

[0039] The embodiments of the present invention are described in detail below. These embodiments are implemented based on the technical solution of the present invention, and provide detailed implementation methods and specific operation processes. However, the scope of protection of the present invention is not limited to the following embodiments.

[0040] In the medium-voltage, high-power field, four-level converters offer lower device voltage stress, lower switching losses, and better harmonic performance compared to three-level and traditional two-level converters, demonstrating broad application prospects. Meanwhile, as power electronic converters continue to evolve towards higher efficiency and higher power density, wide-bandgap devices, represented by silicon carbide (SiC), offer lower switching losses and higher operating frequencies compared to traditional silicon power devices, achieving higher efficiency and power density, but at the cost of higher cost. In our four-level circuit topology with a T-type structure, we partially utilize SiC-based metal-oxide-semiconductor (MOSFETs). While ensuring balanced voltage control of the three DC-side capacitors, we concentrate all high-frequency switching operations on the SiC-based MOSFETs. Simultaneously, the silicon-based insulated-gate bipolar transistor operates at low frequencies, without limiting the switching frequency. This hybrid device four-level converter with a T-type high-frequency structure achieves performance similar to an all-SiC converter with the same topology, while also maintaining low cost.

[0041] The following is an example:

[0042] A hybrid device four-level converter with a T-type high-frequency structure is a T-type hybrid three-phase four-level active neutral-point clamped converter, such as... Figure 2 As shown, it includes a DC bus, a first capacitor, a second capacitor, a third capacitor, three T-type four-level single-phase bridge arms, and a three-phase AC side:

[0043] (1) The anode of the DC bus is connected to the positive terminal of the first capacitor and leads out the first DC bus power terminal; the positive terminal of the second capacitor is connected to the negative terminal of the first capacitor and leads out the second DC bus power terminal; the positive terminal of the third capacitor is connected to the negative terminal of the second capacitor and leads out the third DC bus power terminal; and the cathode of the DC bus is connected to the negative terminal of the third capacitor and leads out the fourth DC bus power terminal.

[0044] (2) Each of the four-level single-phase bridge arms includes ten switching devices Q1Q2Q3Q4Q5Q6Q7Q8Q9Q 10 Among them, the first to sixth switching devices Q1Q2Q3Q4Q5Q6 are silicon-based insulated-gate bipolar transistors, and the seventh to tenth switching devices Q7Q8Q9Q6 are silicon-based insulated-gate bipolar transistors. 10 This is a silicon carbide-based metal-oxide-semiconductor field-effect transistor (MOSFET). The collector of the second switching device Q2 is connected to the emitter of the first switching device Q1; the collector of the third switching device Q3 is connected to the emitter of the second switching device Q2; the collector of the fourth switching device Q4 is connected to the emitter of the third switching device Q3; the collector of the fifth switching device Q5 is connected to the emitter of the fourth switching device Q4; the collector of the sixth switching device Q6 is connected to the emitter of the fifth switching device Q5; the source of the ninth switching device Q9 is connected to the source of the eighth switching device Q8; and the tenth switching device Q... 10 The drain of the seventh switching device Q7 is connected to the source of the seventh switching device Q7. The drain of the seventh switching device Q7 is connected to the common terminal of the first switching device Q1 and the second switching device Q2. The drain of the eighth switching device Q8 is connected to the seventh switching device Q7 and the tenth switching device Q1. 10 The common terminal of the ninth switching device Q9 is connected to the common terminal of the third switching device Q3 and the fourth switching device Q4, and the tenth switching device Q... 10 The source of the device is connected to the common terminal of the fifth switching device Q5 and the sixth switching device Q6; the first single-phase bridge arm power terminal is led out from the collector of the first switching device Q1, the second single-phase bridge arm power terminal is led out from the common terminal of the second switching device Q2 and the third switching device Q3, the third single-phase bridge arm power terminal is led out from the common terminal of the fourth switching device Q4 and the fifth switching device Q5, and the fourth single-phase bridge arm power terminal is led out from the emitter of the sixth switching device Q6; the source of the device is connected to the common terminal of the fifth switching device Q4 and the sixth switching device Q6; the source of the device is connected to the common terminal of the fifth switching device Q5 ... 10 The common terminal leads out the output terminal;

[0045] (3) For each phase, the first single-phase bridge arm power terminal is connected to the first DC bus power terminal, the second single-phase bridge arm power terminal is connected to the second DC bus power terminal, the third single-phase bridge arm power terminal is connected to the third DC bus power terminal, and the fourth single-phase bridge arm power terminal is connected to the fourth DC bus power terminal; the three single-phase four-level bridge arm output terminals are connected to the three-phase AC side.

[0046] The SPWM mixing modulation method described above can also achieve DC-side bus capacitor voltage balance control, such as... Figure 3 As shown, it includes the following:

[0047] (1) Define the output level of the single-phase circuit as 4L when the AC side of the converter is connected to the first DC bus power terminal, 3L when the AC side of the converter is connected to the second DC bus power terminal, 2L when the AC side of the converter is connected to the third DC bus power terminal, and 1L when the AC side of the converter is connected to the fourth DC bus power terminal; for the four output levels of the single-phase bridge arm, select six switching states and define them as S. 4_P S 3_P S 2_P S 3_N S 2_N S 1_N According to the switching function shown in Equation 1, the six switching states can be expressed as follows:

[0048] As shown in Table 1;

[0049]

[0050] Table 1. Six Switch States and Corresponding Output Levels

[0051]

[0052] (2) Determine the switching sequence of a single-phase bridge arm within one switching cycle. The specific method is as follows: During the positive half-cycle of the single-phase bridge arm reference voltage, select three levels, 2L, 3L, and 4L, to synthesize a reference voltage, and use S accordingly. 2_P S 3_P S 4_P Three switching states; during the negative half-cycle of the single-phase bridge arm reference voltage, the three output levels 1L, 2L, and 3L are selected to synthesize the reference voltage, corresponding to the S... 1_N S 2_N S 3_N Three switching states; the switching method is as follows: during the positive half-cycle of the single-phase bridge arm reference voltage, the switching sequence is S... 2_P →S3_P →S 4_P →S 3_P →S 2_P There are a total of four switching actions; during the negative half-cycle of the single-phase bridge arm reference voltage, the switching sequence is S. 1_N →S 2_N →S 3_N →S 2_N →S 1_N Thus, when the polarity of the reference voltage of a single-phase bridge arm changes, the resulting switching action is as follows: To ensure symmetry, the duration of each of the two identical switch states is half the total duration of that switch state.

[0053] (3) The duration of the single-phase bridge arm switching state within one switching cycle is determined by comparing two modulating waves and two stacked carrier waves, which is called carrier-stacked multi-modulation wave PWM modulation; the two stacked carrier waves correspond to the modulation when the reference voltage is positive and negative, respectively, as shown in Equation 2; the two modulating waves v 1,x and v 2,x The expression is shown in Equation 3. The two main modulating waves intersect with the carrier at four points, and these four intersection points are the time nodes for the switching state; V dc The DC bus voltage, u refx For single-phase reference voltage, T s For switching cycles;

[0054]

[0055]

[0056] (4) Three-phase reference voltage u refx The calculation method for x = a, b, c is as follows: As shown in Equation 4, the sine wave u of the three-phase fundamental frequency ori,x The zero-sequence component u, x = a, b, c, is superimposed to achieve the balance control of the first and third capacitors. z After that, we get u refx x = a, b, c are used as three-phase reference voltages;

[0057] u refx =u ori,x +u z x = a, b, c (4)

[0058] The injection of zero-order components should meet the following principles:

[0059] c. Reference voltage u of each phase refx x = a, b, c, should be within the maximum allowable injection range, as shown in Equation 5;

[0060]

[0061] d. Based on the three-phase output current i of the converter ox x = a, b, c, the average midpoint current under this injection is calculated using Equation 6. Assume the capacitance values ​​of the three bus capacitors are C1 = C2 = C3 = C d According to the voltage u across the first capacitor on the DC side c1 The voltage u across the third capacitor c3 Capacitance value C d and switching period T s The reference midpoint current is calculated using Equation 7.

[0062] The average midpoint current should be taken. closest to the reference midpoint current Zero-order injection;

[0063]

[0064]

[0065] (5) Control the voltage u of the second capacitor on the DC side c2 Keep V dc / 3, the method is to fine-tune the magnitude of the two main modulation waves in each phase, such as

[0066] Equation 8 shows the adjustment range, which generally does not exceed the DC bus voltage V. dc 2%;

[0067]

[0068] Based on the above SPWM control method, starting from the three-phase sinusoidal reference voltage at the fundamental frequency, the control of the three DC-side capacitor voltages is added to calculate the switching state and action time of each of the three-phase bridge arms. According to the prescribed switching state switching method, a control signal is synthesized, and a dead time T is added. D It is then converted into 30 corresponding PWM signals.

[0069] In one specific embodiment, the given parameters are shown in Table 2:

[0070] Table 2. System parameters of a specific embodiment

[0071]

[0072] At the same time, the waveforms of the system's three-phase current, DC bus capacitor voltage, phase voltage, and line voltage are as follows: Figure 8As shown. The three-phase output current is a three-phase sine wave with the fundamental frequency; the voltage of the three DC bus capacitors is controlled at 800V, and the DC side midpoint voltage is well balanced; when the phase voltage polarity is positive, its waveform shows three output levels of ±400V and 1200V (2L, 3L, 4L) within one switching cycle, which is consistent with the scheme design.

[0073] At the same time, several representative current and voltage waveforms of the switching transistors in the system were selected, such as... Figure 9 As shown in the waveform diagram, the voltage waveforms of Si IGBT Q1 and Q2 are complementary, with no switching action during the switching cycle, except for a power frequency (50Hz) switching action when the reference voltage crosses zero. All high-frequency switching actions are handled by the silicon carbide-based MOSFET. This achieves high-frequency operation of the entire system while reducing overall switching losses.

[0074] The above embodiments do not limit the invention in any way. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall still fall within the protection scope of the technical solution of the present invention.

Claims

1. A hybrid device four-level converter with a T-type high-frequency structure, characterized in that... It includes a DC bus, a first capacitor, a second capacitor, a third capacitor, three T-type four-level single-phase bridge arms, and a three-phase AC side: (1) The anode of the DC bus is connected to the positive terminal of the first capacitor and leads out the first DC bus power terminal; the positive terminal of the second capacitor is connected to the negative terminal of the first capacitor and leads out the second DC bus power terminal; the positive terminal of the third capacitor is connected to the negative terminal of the second capacitor and leads out the third DC bus power terminal; and the cathode of the DC bus is connected to the negative terminal of the third capacitor and leads out the fourth DC bus power terminal. (2) Each of the four-level single-phase bridge arms includes ten switching devices, wherein the first to sixth switching devices are silicon-based insulated-gate bipolar transistors, the seventh to tenth switching devices are silicon carbide-based metal-oxide-semiconductor field-effect transistors, the collector of the second switching device Q2 is connected to the emitter of the first switching device Q1, the collector of the third switching device Q3 is connected to the emitter of the second switching device Q2, the collector of the fourth switching device Q4 is connected to the emitter of the third switching device Q3, the collector of the fifth switching device Q5 is connected to the emitter of the fourth switching device Q4, the collector of the sixth switching device Q6 is connected to the emitter of the fifth switching device Q5, the source of the ninth switching device Q9 is connected to the source of the eighth switching device Q8, and the tenth switching device Q... 10 The drain of the seventh switching device Q7 is connected to the source of the seventh switching device Q7. The drain of the seventh switching device Q7 is connected to the common terminal of the first switching device Q1 and the second switching device Q2. The drain of the eighth switching device Q8 is connected to the seventh switching device Q7 and the tenth switching device Q1. 10 The common terminal of the ninth switching device Q9 is connected to the common terminal of the third switching device Q3 and the fourth switching device Q4, and the tenth switching device Q... 10 The source of the device is connected to the common terminal of the fifth switching device Q5 and the sixth switching device Q6; the first single-phase bridge arm power terminal is led out from the collector of the first switching device Q1, the second single-phase bridge arm power terminal is led out from the common terminal of the second switching device Q2 and the third switching device Q3, the third single-phase bridge arm power terminal is led out from the common terminal of the fourth switching device Q4 and the fifth switching device Q5, and the fourth single-phase bridge arm power terminal is led out from the emitter of the sixth switching device Q6; the source of the device is connected to the common terminal of the fifth switching device Q4 and the sixth switching device Q6; the source of the device is connected to the common terminal of the fifth switching device Q5 ... 10 The common terminal leads out the output terminal; (3) For each phase, the first single-phase bridge arm power terminal is connected to the first DC bus power terminal, the second single-phase bridge arm power terminal is connected to the second DC bus power terminal, the third single-phase bridge arm power terminal is connected to the third DC bus power terminal, and the fourth single-phase bridge arm power terminal is connected to the fourth DC bus power terminal; the output terminals of the three T-type four-level single-phase bridge arms are connected to the three-phase AC side.

2. The SPWM mixing modulation control method for a four-level converter with a T-type high-frequency structure as described in claim 1, characterized in that, The control method includes the following: (1) Define the output level of the single-phase circuit as 4L when the AC side of the converter is connected to the first DC bus power terminal, 3L when the AC side of the converter is connected to the second DC bus power terminal, 2L when the AC side of the converter is connected to the third DC bus power terminal, and 1L when the AC side of the converter is connected to the fourth DC bus power terminal; for the four output levels of the single-phase bridge arm, select six switching states and define them as S. 4_P S 3_P S 2_P S 3_N S 2_N S 1_N According to the switching function shown in Equation 1, the six switching states are represented as shown in Table 1. Table 1. Six Switch States and Corresponding Output Levels (2) Determine the switching sequence of a single-phase bridge arm within one switching cycle. The specific method is as follows: During the positive half-cycle of the single-phase bridge arm reference voltage, select three levels, 2L, 3L, and 4L, to synthesize a reference voltage, and use S accordingly. 2_P S 3_P S 4_P Three switching states; during the negative half-cycle of the single-phase bridge arm reference voltage, the three output levels 1L, 2L, and 3L are selected to synthesize the reference voltage, corresponding to the S... 1_N S 2_N S 3_N Three switching states; the switching method is as follows: during the positive half-cycle of the single-phase bridge arm reference voltage, the switching sequence is S... 2_P →S 3_P →S 4_P →S 3_P →S 2_P There are a total of four switching actions; during the negative half-cycle of the single-phase bridge arm reference voltage, the switching sequence is S. 1_N →S 2_N →S 3_N →S 2_N →S 1_N Thus, when the polarity of the reference voltage of a single-phase bridge arm changes, the resulting switching action is as follows: To ensure symmetry, the duration of each of the two identical switch states is half the total duration of that switch state. (3) The duration of the single-phase bridge arm switching state within a switching cycle is determined by comparing two modulating waves and two stacked carrier waves, which is called carrier-stacked multi-modulation wave PWM modulation; the two stacked carrier waves correspond to the modulation when the reference voltage is positive and negative, respectively, as shown in equation (2); the two modulating waves v 1,x and v 2,x The expression is shown in equation (3). The two main modulating waves intersect with the carrier at four points, and these four intersection points are the time nodes for switching states; V dc The DC bus voltage, u refx For single-phase reference voltage, T s For switching cycles; (4) Three-phase reference voltage u refx The calculation method for x = a, b, c is as follows: As shown in equation (4), the sine wave u of the three-phase fundamental frequency ori,x The zero-sequence component u, x = a, b, c, is superimposed to achieve the balance control of the first and third capacitors. z After that, we get u refx x = a, b, c are used as three-phase reference voltages; u refx =u ori,x +u z , x=a,b,c (4) The injection of zero-order components should meet the following principles: a. Reference voltage u of each phase refx x = a, b, c, should be within the maximum allowable injection range, as shown in equation (5); b. Based on the three-phase output current i of the converter ox x = a, b, c, the average midpoint current under this injection is calculated using equation (6). Assume the capacitance values ​​of the three bus capacitors are C1 = C2 = C3 = C d According to the voltage u across the first capacitor on the DC side c1 , The voltage u across the third capacitor c3 Capacitance value C d and switching period T s The reference midpoint current is calculated using equation (7). The average midpoint current should be taken. closest to the reference midpoint current Zero-order injection; (5) Control the voltage u of the second capacitor on the DC side c2 Keep V dc / 3, the method is to fine-tune the magnitude of the two main modulation waves in each phase, as shown in equation (8); where Δv is the adjustment amplitude, which does not exceed the DC bus voltage V dc 2%; (6) Based on the above control method, starting from the three-phase sinusoidal reference voltage at the fundamental frequency, control of the three capacitor voltages on the DC side is added. The switching state and action time of each of the three-phase bridge arms are calculated. According to the prescribed switching state switching method, the control signal is synthesized, and a dead time T is added. D It is then converted into 30 corresponding PWM signals.

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