A method and apparatus for enhancing the stability of a digital predistortion loop gain

Abstract

The application provides a method and device for enhancing the stability of a digital pre-distortion loop gain, which can introduce a variable step length concept into a communication system at a minimum cost, introduce a dynamic convergence step length factor, solve the stability of a loop signal gain under different power fluctuations of a signal, and improve the stability of gain calculation and the stability of pre-distortion algorithm correction. The quality of a communication system channel is effectively improved. A limited depth variable step length convergence factor mu gear table is refined through early simulation analysis, a real-time changing signal is used as a gear look-up table address, the optimal mu value in theory is tracked and called when the signal changes, and the stability of an LMS algorithm is assisted. By applying the scheme, the minimum cost is realized, a register configuration form is realized, optimal flexibility is realized, and the stability of an iterative LMS algorithm can be quickly tracked in different complex communication systems.

Description

Technical Field

[0001] The present invention relates to the field of wireless communication technology, and in particular to a method and device for enhancing the stability of a digital predistortion loop gain. Background Art

[0002] Adaptive filtering has a wide range of applications in signal processing, including equalization in filtering algorithms, acoustic echo cancellation, network echo cancellation, active noise control, and biomedical engineering. Nonlinearities introduced by active components are common in wireless communication systems. Digital predistortion (DPD) is a very effective solution, enabling predistortion before the input to nonlinear components. The least mean square (LMS) adaptive filter is the most popular due to its simplicity and robustness. The step size parameter is crucial to LMS performance and determines the speed at which the algorithm converges along the error performance surface. To address the issue of rapid convergence, many variable step size methods have emerged in the engineering community. According to the LMS mathematical formula, the theoretical derivation of the convergence step size factor μ is fixed when the signal average power is relatively stable, resulting in stable performance output. However, in real communication systems, signal traffic fluctuates in real time and is not continuous, resulting in periods of high and low average power, with rapid fluctuations. Directly applying a static μ value to control the convergence stability of the LMS algorithm is undoubtedly unreasonable.

[0003] In engineering implementations, many measures have been taken to address the stability issues of the LMS algorithm. These include applying a leaking method to the coefficients to improve stability under high coefficient precision requirements; and adjusting the iteration step size to improve LMS convergence stability. Using the square of the instantaneous error to derive a variable-step-size LMS filter can improve the convergence limit of the LMS algorithm. Generally, when the estimation error is large, this LMS uses a larger step size, and vice versa. To mitigate the impact of uncorrelated disturbances, researchers subsequently developed a scheme using the squared autocorrelation of adjacent interval errors. Others believe that using a gradient vector weighted average to control the step size improves convergence speed and achieves lower steady-state offset errors. In summary, from academia to engineering, optimizing the convergence step size factor μ can address the stability issues of LMS algorithm applications in engineering. However, the implementation of these studies requires consideration of costs. Many representative academic studies have not been adopted by the engineering community, primarily due to concerns about the cost of engineering implementation and the difficulty of design and implementation.

[0004] Therefore, how to provide a method for calculating the convergence step factor μ that can be implemented at low cost in actual engineering is an urgent problem to be solved. Summary of the Invention

[0005] In order to improve the above problems, the present invention provides a method and apparatus for enhancing the stability of a digital predistortion loop gain.

[0006] According to a first aspect of an embodiment of the present invention, a method for enhancing the stability of a digital predistortion loop gain is provided, the method comprising:

[0007] Use LMS algorithm to realize the gain calculation model of digital predistortion structure;

[0008] Inputting simulation signal streams of different static powers into the model, and calculating the convergence step factors μ corresponding to the different powers respectively;

[0009] Construct a convergence step factor table based on the power of the simulation signal and the corresponding calculated convergence step factor μ;

[0010] Inputting a dynamic power simulation signal into the model, looking up a corresponding convergence step factor μ value from the convergence step factor table according to the power of the dynamic power simulation signal, and substituting the obtained convergence step factor μ value into the gain iterative calculation formula;

[0011] After observing the fluctuation of the gain convergence curve, the convergence step factor μ value in the convergence step factor table is adjusted according to the difference between the gain convergence curve fluctuation and the ideal state.

[0012] Optionally, the gain calculation model implemented using the LMS algorithm is:

[0013]

[0014] Where x(n) is the ideal baseband modeling signal, fb(n) is the signal of the external feedback loop in the digital predistortion structure, y(n) is the predistortion output signal, the error signal e(n) is the difference between the transmitted signal x(n) and the feedback signal fb(n), and Gain(n) is the gain compensation value.

[0015] Optionally, the step of inputting the simulated signal streams of different static powers into the model and respectively calculating the convergence step factors μ corresponding to the different powers specifically includes:

[0016] Dividing the simulation signal flow into multiple gears according to the size of static power and inputting them into the model respectively;

[0017] For each gear, observe the convergence of the iterative gain Gain(n) over time under different convergence step factors μ;

[0018] The convergence step factor μ corresponding to each gear gain fluctuation is obtained.

[0019] Optionally, the step of looking up a table in the convergence step factor μ table to obtain a corresponding convergence step factor μ value according to the power of the dynamic power simulation signal specifically includes:

[0020] Obtaining the instantaneous power or instantaneous average power of the dynamic power simulation signal;

[0021] According to the magnitude of the instantaneous power or the instantaneous average power, the corresponding convergence step factor μ value is obtained from the convergence step factor table.

[0022] According to a second aspect of the embodiments of the present invention, there is provided a device for enhancing the stability of a digital predistortion loop gain, the device comprising:

[0023] A model building unit, used to implement a gain calculation model of a digital predistortion structure using an LMS algorithm;

[0024] A static simulation unit, used for inputting simulation signal streams of different static powers into the model and respectively calculating convergence step factors μ corresponding to different powers;

[0025] A table building unit is used to build a convergence step factor table according to the power of the simulation signal and the corresponding calculated convergence step factor μ;

[0026] a dynamic simulation unit, configured to input a dynamic power simulation signal into the model, obtain a corresponding convergence step factor μ value from the convergence step factor table according to the power of the dynamic power simulation signal, and substitute the obtained convergence step factor μ value into a gain iterative calculation formula;

[0027] The table creation unit is further configured to adjust the convergence step factor μ value in the convergence step factor table according to the difference between the gain convergence curve fluctuation and the ideal state after observing the gain convergence curve fluctuation.

[0028] Optionally, the gain calculation model implemented by the model building unit using the LMS algorithm fixed point is:

[0029]

[0030] Where x(n) is the ideal baseband modeling signal, fb(n) is the signal of the external feedback loop in the digital predistortion structure, y(n) is the predistortion output signal, the error signal e(n) is the difference between the transmitted signal x(n) and the feedback signal fb(n), and Gain(n) is the gain compensation value.

[0031] Optionally, the static simulation unit is specifically used to:

[0032] Dividing the simulation signal flow into multiple gears according to the size of static power and inputting them into the model respectively;

[0033] For each gear, observe the convergence of the iterative gain Gain(n) over time under different convergence step factors μ;

[0034] The convergence step factor μ corresponding to each gear gain fluctuation is obtained.

[0035] Optionally, the dynamic simulation unit is specifically used to:

[0036] Obtaining the instantaneous power or instantaneous average power of the dynamic power simulation signal;

[0037] According to the magnitude of the instantaneous power or the instantaneous average power, the corresponding convergence step factor μ value is obtained from the convergence step factor table.

[0038] According to a third aspect of an embodiment of the present invention, there is provided an electronic device, characterized in that it includes:

[0039] One or more processors; a memory; one or more applications, wherein the one or more applications are stored in the memory and configured to be executed by the one or more processors, and the one or more applications are configured to execute the method as described in the first aspect.

[0040] According to a fourth aspect of an embodiment of the present invention, a computer-readable storage medium is provided, wherein program code is stored in the computer-readable storage medium, and the program code can be called by a processor to execute the method described in the first aspect.

[0041] In summary, the present invention provides a method, device, electronic device and storage medium for enhancing the stability of the digital predistortion loop gain, which can introduce the concept of variable step size into the communication system at the lowest and simplest cost, and effectively improve the quality of the communication system channel. Through preliminary simulation analysis, the gear table of the finite depth variable step size convergence factor μ is refined, and the real-time changing signal is used as the gear lookup table address. When the signal changes, the theoretically optimal μ value is tracked and called to help the stability of the LMS algorithm. Applying this solution, the cost is extremely low, and it is achieved with optimal flexibility in the form of register configuration. It can quickly track the stability of the iterative LMS algorithm in different complex communication systems. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0043] Figure 1Flowchart of a method for enhancing digital predistortion loop gain stability according to an embodiment of the present invention;

[0044] Figure 2 Schematic diagram of a gain calculation model of a digital predistortion structure according to an embodiment of the present invention;

[0045] Figure 3 Schematic diagram showing the comparison between the calculated gain and the ideal gain under the static convergence factor μ under the dynamic power variation signal according to an embodiment of the present invention;

[0046] Figure 4 Schematic diagram showing a comparison between a static convergence factor μ under a dynamic power variation signal and a gain calculated using a dynamic convergence factor μ table and an ideal gain according to an embodiment of the present invention;

[0047] Figure 5 This is a functional module block diagram of a device for enhancing digital predistortion loop gain stability according to an embodiment of the present invention;

[0048] Figure 6 1 is a structural block diagram of an electronic device for executing the method for enhancing the stability of the digital predistortion loop gain according to an embodiment of the present application;

[0049] Figure 7 This is a structural block diagram of a computer-readable storage medium for storing or carrying program code for implementing a method for enhancing digital predistortion loop gain stability according to an embodiment of the present application.

[0050] Reference numerals:

[0051] Model building unit 110 ; static simulation unit 120 ; table building unit 130 ; dynamic simulation unit 140 ; ​​electronic device 300 ; processor 310 ; memory 320 ; computer-readable storage medium 400 ; program code 410 . DETAILED DESCRIPTION

[0052] Adaptive applications in signal processing are very wide, such as equalization of filter algorithm, acoustic echo cancellation, network echo cancellation, active noise control and biomedical engineering. Nonlinearity introduced by active devices is very common in wireless communication systems. Digital pre-distortion is a very effective solution, which can realize pre-distortion function before inputting to the nonlinear device. The least mean square (LMS) adaptive filter is the most popular due to its simplicity and robustness. The step size parameter is crucial to the performance of LMS, and determines the speed of the algorithm converging along the error performance surface. In order to solve the problem of fast convergence, many variable step size methods have appeared in the engineering field. According to the mathematical formula of LMS, the convergence step size factor μ value is fixed under the condition that the average power of the signal is relatively stable, and a stable performance output can be formed, but in actual communication systems, signal services are real-time changes, and services are not continuous, resulting in that the average power of the service signal is relatively high in a period of time, and relatively low in a period of time, and changes rapidly. It is definitely unreasonable to directly apply a static μ value to control the stability of the LMS algorithm convergence.

[0053] In engineering implementation, in order to solve the stability problem of LMS algorithm, many measures have been taken, such as applying leakge mode to the coefficient to improve the stability under the high precision requirement of the coefficient; such as adjusting the iteration step size to improve the stability of LMS convergence. The variable step size LMS filter is derived by using the square of the instantaneous error, which can improve the convergence limit performance of the LMS algorithm. Generally, when the estimation error is large, the LMS adopts a larger step size, and vice versa. In order to reduce the influence of unrelated disturbance, scholars have developed a scheme using the square autocorrelation of adjacent interval error. Some scholars think that the step size adopts gradient vector weighted average control, which improves the convergence speed and obtains a lower steady-state misadjustment error. In summary, from the academic field to the engineering field, reasonable optimization of the convergence step size factor μ can solve the stability problem of the LMS algorithm in engineering application. However, many researches need to be put into actual engineering, and the cost needs to be considered. Many typical academic researches have not been adopted by the engineering field, and the value and cost of engineering implementation are still considered.

[0054] Therefore, how to provide a method for calculating the convergence step size factor μ which can be realized at low cost in actual engineering is a problem to be solved at present.

[0055] In view of this, in order to solve the problem, the present application uses the real-time signal power change characteristics to look up the table to obtain the corresponding suitable μ value to ensure the stability of the LMS algorithm, and the implementation cost of the present application is very low and the flexibility is very high.

[0056] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0057] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention as claimed, but rather merely represents selected embodiments of the present invention. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without creative effort shall fall within the scope of protection of the present invention.

[0058] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0059] In the description of the present invention, it should be noted that the terms "top," "bottom," "inner," and "outer," etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, or are the orientations or positional relationships in which the inventive product is typically placed when in use. These terms are intended solely to facilitate the description of the present invention and simplify the description, and are not intended to indicate or imply that the devices or components referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on the present invention. Furthermore, the terms "first," "second," etc., etc., are used solely for distinction and should not be construed as indicating or implying relative importance.

[0060] In the description of the present invention, it should also be noted that, unless otherwise expressly specified or limited, the terms "disposed," "installed," "connected," and "connected" should be understood in a broad sense. For example, they may refer to fixed connections, detachable connections, or integral connections; they may refer to mechanical connections or electrical connections; they may refer to direct connections or indirect connections through an intermediate medium; and they may refer to internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on the specific circumstances.

[0061] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other.

[0062] See also Figure 1 The present invention provides a method for enhancing the stability of digital predistortion loop gain, which is mainly used in products that use digital predistortion correction. The correction algorithm used in such products requires signal loopback to align delay and gain with a reference signal. The method includes:

[0063] Step S101: Use the LMS algorithm to implement the gain calculation model of the digital predistortion structure.

[0064] Simulation software can be used to build a fixed-point LMS data flow environment. For example, using Simu Link to simulate logical behavior can provide more accurate results. Simu Link can be used to simulate the LMS algorithm for gain alignment calculations through power scaling and fixed-point signal data flow. A typical dynamic power variation signal with a 16-bit signed fixed-point average power of -23dBFs is prepared, and a Simu Link LMS algorithm simulation platform is built. This step considers the signal's peak-to-average ratio and signal-to-noise ratio to define the signal's fixed point and power to ensure that the signal does not saturate.

[0065] As other implementations of the embodiments of the present invention, MATLAB and Python can both be used to build the simulation environment.

[0066] Specifically, the gain calculation model implemented using the LMS algorithm is:

[0067]

[0068] Where x(n) is the ideal baseband modeling signal, fb(n) is the signal of the external feedback loop in the digital predistortion structure, y(n) is the predistortion output signal, the error signal e(n) is the difference between the transmitted signal x(n) and the feedback signal fb(n), and Gain(n) is the gain compensation value. The acquisition of e(n) requires the alignment of the integer and fractional delays of x(n) and fb(n). The gain calculation model structure is as follows: Figure 2 shown.

[0069] Step S102 : Inputting simulation signal flows of different static powers into the model, and respectively calculating convergence step factors μ corresponding to different powers.

[0070] The specific operation method is:

[0071] Dividing the static power simulation signal flow into multiple gears according to the power size and inputting them into the model respectively;

[0072] For each gear, observe the convergence of the iterative gain Gain(n) over time under different convergence step factors μ;

[0073] The convergence step factor μ corresponding to each gear gain fluctuation is obtained.

[0074] It's important to note that the power range can be determined based on the input signal characteristics. For example, in the Simulink simulation model, considering a 15-bit fixed-point signal modulus, the power range can be divided by bit, with each bit corresponding to a power range. For each power range, a corresponding convergence step size factor μ can be obtained.

[0075] Step S103 : constructing a convergence step factor table according to the power of the simulation signal and the corresponding calculated convergence step factor μ.

[0076] The distribution of μ values ​​in the convergence factor table follows the rule that the step size is small for large powers and large for small powers.

[0077] Step S104: input the dynamic power simulation signal into the model, obtain the corresponding convergence step factor μ value from the convergence step factor table according to the power size of the dynamic power simulation signal, and substitute the obtained convergence step factor μ value into the gain iterative calculation formula.

[0078] When performing a table lookup, the power level of the dynamic power simulation signal can be determined by obtaining the instantaneous power of the dynamic power simulation signal for comparison, or by obtaining the instantaneous average power of the dynamic power simulation signal.

[0079] Then, according to the magnitude of the instantaneous power or the instantaneous average power, the corresponding convergence step factor μ value is obtained by looking up the convergence step factor μ table.

[0080] After obtaining the corresponding convergence step factor μ value by looking up the table, it is brought into the gain iterative calculation formula of the gain calculation model for iterative calculation.

[0081] It should be noted that since the power of the dynamic power simulation signal is in a state of constant and dynamic change, the corresponding table lookup for the convergence step factor μ is also performed in real time, usually with each beat in the system as the cycle.

[0082] Step S105 , after observing the fluctuation of the gain convergence curve, adjust the convergence step factor μ value in the convergence step factor table according to the difference between the gain convergence curve fluctuation and the ideal state.

[0083] For the fluctuation of the gain convergence curve obtained by iterative calculation using the convergence step factor μ value obtained by table lookup, it is necessary to continuously observe and compare it with the ideal state. As a preferred embodiment, the gain value calculated in real time under the static power of the corresponding gear power and its stability can be used as the reference convergence curve and convergence value of the ideal state for comparison, such as Figure 3Based on the difference between the two, the convergence step factor μ value in the convergence step factor table is adjusted to ensure that the gain convergence curve fluctuation is similar to that in the static power scenario.

[0084] It should be noted that the above process can be repeated through multiple simulation experiments to determine the optimal convergence step factor table for subsequent practical engineering applications.

[0085] On the basis of the above scheme, in order to verify the effectiveness of the scheme proposed by the present invention, when the dynamic power simulation signal is input into the model, the static convergence step factor μ can be substituted into the gain iteration calculation formula for calculation. Under this method, regardless of the signal power, the convergence step and convergence speed remain unchanged. In theory, there will be large fluctuations in performance, such as Figure 4 The corresponding gain convergence curve fluctuation is compared with the gain convergence curve fluctuation using a table lookup method to verify the effectiveness of the present invention.

[0086] The following is a specific example to illustrate:

[0087] In this embodiment, the test signal is NR100M, the transmission mode is TM2.0a, the test downlink frequency is 2.6G, the carrier frequency is 2.6GHz, the Transce iver chip is Bai Ze 20, and it is looped back to the Bai Ze 20 chip through an external power amplifier. A large amount of transmission test signals and feedback signals are collected in the Bai Ze chip, and the average power of the digital signal is calibrated to -23dBFs, and the fixed point is signed 16 bits.

[0088] The method for implementing the present invention includes S1: building a fixed-point LMS algorithm to implement a link to implement a loop gain calculation project, and building an external loopback simulation link; S2: transmitting 10ms of cell service data, performing effective testing, and collecting about 6.7ms of data; S3: first calculating the loop gain using a static convergence factor μ, and recording a real-time output value; S4: then using a 4-level dynamic convergence factor table, actually calling [15, 13, 11, 9] bits, wherein a lookup table address is confirmed by a real-time signal power level, and in actual measurement, after taking a modulus value of an input signal, saturating the high bit by 2 bits, truncating the low bit by 11 bits, and retaining only a 2-bit effective lookup table address.

[0089] In conclusion, the application provides a method for enhancing the stability of the gain of a digital pre-distortion loop, which can introduce a variable step size concept into a communication system at a minimum cost, introduce a dynamic convergence step size factor, solve the stability of the gain of a loop signal under different power fluctuations of a signal, and improve the stability of gain calculation and the stability of pre-distortion algorithm correction.

[0090] As shown in Figure 5 The device for enhancing the stability of the gain of a digital pre-distortion loop provided by the application comprises:

[0091] A model establishing unit 110 is configured to implement a gain calculation model of a digital pre-distortion structure by using an LMS algorithm.

[0092] A static simulation unit 120 is configured to input simulation signals of different static powers into the model and calculate convergence step size factors mu corresponding to the different powers, respectively.

[0093] A table establishing unit 130 is configured to construct a convergence step size factor table mu according to the powers of the simulation signals and the calculated convergence step size factors mu.

[0094] A dynamic simulation unit 140 is configured to input a dynamic power simulation signal into the model, acquire a convergence step size factor mu value corresponding to the dynamic power simulation signal from the convergence step size factor table mu according to the power of the dynamic power simulation signal, and calculate a gain compensation value of the digital pre-distortion structure according to the acquired convergence step size factor mu value.

[0095] As a preferred embodiment of the present application, the gain calculation model implemented by the model establishing unit 110 by using the LMS algorithm is as follows:

[0096]

[0097] wherein x(n) is a baseband ideal modeling signal, fb(n) is a signal of an outer feedback loop in the digital pre-distortion structure, y(n) is a pre-distortion output signal, an error signal e(n) is the difference between a transmission signal x(n) and a feedback signal fb(n), and Gain(n) is a gain compensation value.

[0098] As a preferred embodiment of the present application, the static simulation unit 120 is specifically configured to:

[0099] Dividing the simulation signal flow into multiple gears according to the size of static power and inputting them into the model respectively;

[0100] For each gear, observe the convergence of the iterative gain Gain(n) over time under different convergence step factors μ;

[0101] The convergence step factor μ corresponding to each gear gain fluctuation is obtained.

[0102] As a preferred implementation of this embodiment, the dynamic simulation unit 140 is specifically used to:

[0103] Obtaining the instantaneous power or instantaneous average power of the dynamic power simulation signal;

[0104] According to the magnitude of the instantaneous power or the instantaneous average power, the corresponding convergence step factor μ value is obtained from the convergence step factor μ table.

[0105] The device for enhancing the stability of digital predistortion loop gain provided by the embodiment of the present invention is used to implement the above method for enhancing the stability of digital predistortion loop gain. Therefore, the specific implementation is the same as the above method and will not be repeated here.

[0106] like Figure 6 , a block diagram of an electronic device 300 provided in an embodiment of the present invention is shown. The electronic device 300 may be an electronic device 300 capable of running applications, such as a smartphone, a tablet computer, or an e-book. The electronic device 300 in this application may include one or more of the following components: a processor 310, a memory 320, and one or more applications, wherein the one or more applications may be stored in the memory 320 and configured to be executed by the one or more processors 310, and the one or more applications are configured to execute the method described in the aforementioned method embodiment.

[0107] The processor 310 may include one or more processing cores. The processor 310 utilizes various interfaces and circuits to connect various components within the electronic device 300. It executes instructions, programs, code sets, or instruction sets stored in the memory 320, and accesses data stored in the memory 320 to perform various functions and process data within the electronic device 300. Optionally, the processor 310 may be implemented using at least one of the following hardware forms: a digital signal processing (DSP), a field-programmable gate array (FPGA), or a programmable logic array (PLA). The processor 310 may integrate one or a combination of a central processing unit (CPU), a graphics processing unit (GPU), and a modem. The CPU primarily processes the operating system, user interface, and application programs; the GPU is responsible for rendering and drawing display content; and the modem handles wireless communications. It is understood that the modem may not be integrated into the processor 310 and may be implemented separately via a communications chip.

[0108] The memory 320 may include a random access memory (RAM) or a read-only memory (ROM). The memory 320 may be used to store instructions, programs, codes, code sets, or instruction sets. The memory 320 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for implementing at least one function (such as a touch function, a sound playback function, an image playback function, etc.), instructions for implementing the following various method embodiments, etc. The data storage area may also store data created by the terminal during use (such as a phone book, audio and video data, chat history data), etc.

[0109] like Figure 7 FIG2 is a block diagram of a computer-readable storage medium 400 provided by an embodiment of the present invention. The computer-readable storage medium stores program code 410, which can be called by a processor to execute the method described in the above method embodiment.

[0110] The computer-readable storage medium 400 can be an electronic memory such as a flash memory, an EEPROM (Electrically Erasable Programmable Read-Only Memory), an EPROM, a hard disk, or a ROM. Alternatively, the computer-readable storage medium 400 includes a non-transitory computer-readable storage medium. The computer-readable storage medium 400 has storage space for program code 410 for executing any of the method steps in the above method. These program codes 410 can be read from or written to one or more computer program products. The program code 410 can be compressed, for example, in a suitable form.

[0111] In summary, the present invention provides a method, device, electronic device and storage medium for enhancing the stability of the digital predistortion loop gain, which can introduce the concept of variable step size into the communication system at the lowest and simplest cost, introduce a dynamic convergence step size factor, solve the stability of the loopback signal gain under different signal power fluctuations, so as to improve the stability of the gain calculation and the stability of the predistortion algorithm correction. And effectively improve the quality of the communication system channel. Through preliminary simulation analysis, a finite depth variable step size convergence factor μ gear table is refined, and the real-time changing signal is used as the gear lookup table address. When the signal changes, the theoretically optimal μ value is tracked and called to help the stability of the LMS algorithm. Applying this solution, the cost is extremely low, and it is achieved with optimal flexibility in the form of register configuration. It can quickly track the stability of the iterative LMS algorithm in different complex communication systems.

[0112] In the several embodiments disclosed in this application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely illustrative. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architectures, functions and operations of the devices, methods and computer program products according to multiple embodiments of the present application. In this regard, each box in the flowchart or block diagram can represent a module, program segment or part of the code, and the module, program segment or part of the code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in an order different from that marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart, can be implemented using a dedicated hardware-based system that performs the specified function or action, or can be implemented using a combination of dedicated hardware and computer instructions.

[0113] In addition, the functional modules in each embodiment of the present application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0114] If the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

Claims

1. A method for enhancing the stability of a digital predistortion loop gain, characterized in that: The method comprises: Use LMS algorithm to realize the gain calculation model of digital predistortion structure; Inputting simulation signal streams of different static powers into the model, and calculating the convergence step factors μ corresponding to the different powers respectively; Construct a convergence step factor table based on the power of the simulation signal and the corresponding calculated convergence step factor μ; Inputting a dynamic power simulation signal into the model, looking up a corresponding convergence step factor μ value from the convergence step factor table according to the power of the dynamic power simulation signal, and substituting the obtained convergence step factor μ value into the gain iterative calculation formula; After observing the fluctuation of the gain convergence curve, the convergence step factor μ value in the convergence step factor table is adjusted according to the difference between the gain convergence curve fluctuation and the ideal state.

2. The method for enhancing the stability of digital predistortion loop gain according to claim 1, wherein: The gain calculation model implemented by LMS algorithm is: ； Where x(n) is the ideal baseband modeling signal, fb(n) is the signal of the external feedback loop in the digital predistortion structure, y(n) is the predistortion output signal, the error signal e(n) is the difference between the transmitted signal x(n) and the feedback signal fb(n), and Gain(n) is the gain compensation value.

3. The method for enhancing the stability of digital predistortion loop gain according to claim 2, wherein: The step of inputting the simulation signal streams of different static powers into the model and respectively calculating the convergence step factors μ corresponding to the different powers specifically includes: Dividing the simulation signal flow into multiple gears according to the size of static power and inputting them into the model respectively; For each gear, observe the convergence of the iterative gain Gain(n) over time under different convergence step factors μ; The convergence step factor μ corresponding to each gear gain fluctuation is obtained.

4. The method for enhancing the stability of digital predistortion loop gain according to claim 3, wherein: The step of looking up the convergence step factor table to obtain the corresponding convergence step factor μ value according to the power of the dynamic power simulation signal specifically includes: Obtaining the instantaneous power or instantaneous average power of the dynamic power simulation signal; According to the magnitude of the instantaneous power or the instantaneous average power, the corresponding convergence step factor μ value is obtained from the convergence step factor table.

5. A device for enhancing the stability of a digital predistortion loop gain, characterized in that: The device comprises: A model building unit, used to implement a gain calculation model of a digital predistortion structure using an LMS algorithm; A static simulation unit, used for inputting simulation signal streams of different static powers into the model and respectively calculating convergence step factors μ corresponding to different powers; A table building unit is used to build a convergence step factor table according to the power of the simulation signal and the corresponding calculated convergence step factor μ; a dynamic simulation unit, configured to input a dynamic power simulation signal into the model, obtain a corresponding convergence step factor μ value from the convergence step factor table according to the power of the dynamic power simulation signal, and substitute the obtained convergence step factor μ value into a gain iterative calculation formula; The table establishment unit is further configured to adjust the convergence step factor μ value in the convergence step factor μ table according to the difference between the gain convergence curve fluctuation and the ideal state after observing the gain convergence curve fluctuation.

6. The device for enhancing the stability of digital predistortion loop gain according to claim 5, characterized in that: The gain calculation model implemented by the model building unit using the LMS algorithm is: ； Where x(n) is the ideal baseband modeling signal, fb(n) is the signal of the external feedback loop in the digital predistortion structure, y(n) is the predistortion output signal, the error signal e(n) is the difference between the transmitted signal x(n) and the feedback signal fb(n), and Gain(n) is the gain compensation value.

7. The device for enhancing the stability of digital predistortion loop gain according to claim 6, characterized in that: The static simulation unit is specifically used for: Dividing the simulation signal flow into multiple gears according to the size of static power and inputting them into the model respectively; For each gear, observe the convergence of the iterative gain Gain(n) over time under different convergence step factors μ; The convergence step factor μ corresponding to each gear gain fluctuation is obtained.

8. The device for enhancing the stability of digital predistortion loop gain according to claim 7, characterized in that: The dynamic simulation unit is specifically used for: Obtaining the instantaneous power or instantaneous average power of the dynamic power simulation signal; According to the magnitude of the instantaneous power or the instantaneous average power, the corresponding convergence step factor μ value is obtained from the convergence step factor table.

9. An electronic device, characterized in that: include: one or more processors; Memory; One or more applications, wherein the one or more applications are stored in the memory and configured to be executed by the one or more processors, and the one or more applications are configured to execute the method according to any one of claims 1 to 4.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores program code, which can be called by a processor to execute the method according to any one of claims 1 to 4.

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