Anti-interference circuitry, PA-MID architecture, and RF transceiver system

Abstract

This application relates to an anti-interference circuit, a PA-MID architecture, and a radio frequency transceiver system. The anti-interference circuit is applied in a PA-MID architecture containing a power amplifier-multiplexer, which includes an intermediate frequency (IF) transmitting circuit and a high-frequency (HF) transmitting circuit. The anti-interference circuit includes a switching circuit, a first filter circuit, and a second filter circuit. The first filter circuit filters the high-frequency signal in the signal output from the IF transmitting circuit via the switching circuit; the second filter circuit filters the IF signal in the signal output from the HF transmitting circuit via the switching circuit. In this solution, the first filter circuit filters the high-frequency signal in the signal output from the IF transmitting circuit via the switching circuit, and the second filter circuit filters the IF signal in the signal output from the HF transmitting circuit via the switching circuit, thereby improving the isolation between the IF transmitting circuit and the HF transmitting circuit and improving signal quality.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to an anti-interference circuit, a PA-MID architecture, and a radio frequency transceiver system. Background Technology

[0002] 5G network architecture is divided into Standalone (SA) and Non-Standalone (NSA) architectures. A key feature of NSA is its dual connectivity capability, meaning the UE can communicate simultaneously with both 4G core network equipment and 5G base stations. The Phase 7LE architecture, as the latest generation of RF solutions for UE devices, enables the transmission and reception of UE RF signals in dual connectivity scenarios. Specifically, the Phase 7LE architecture uses a built-in power amplifier modules including duplexers (PA-MID) architecture to achieve EUTRA NRDual-Connectivity (ENDC) functionality.

[0003] When using a PA-MID architecture to implement ENDC dual transmission functionality, there is significant interference between different signals, affecting the signal transmission quality in different paths. Summary of the Invention

[0004] This application provides an anti-interference circuit, a PA-MID architecture, and a radio frequency transceiver system, which can improve the isolation of transmitted signals of different frequency bands in the radio frequency transceiver. In a dual-connection scenario, interference between signals of different frequency bands transmitted through different paths is avoided, thereby improving the quality of signal transmission.

[0005] In a first aspect, an anti-interference circuit is provided, which is applied to a PA-MID architecture containing a power amplifier-multiplexer. The PA-MID architecture includes an intermediate frequency transmitting circuit and a high frequency transmitting circuit. The anti-interference circuit includes a switching circuit, a first filter circuit, and a second filter circuit.

[0006] A switching circuit is used to open the path between the intermediate frequency transmitting circuit and the first filter circuit, and to open the path between the high frequency transmitting circuit and the second filter circuit, according to a control signal.

[0007] The first filtering circuit is used to filter the high-frequency signal in the signal output by the intermediate frequency transmitting circuit through the switching circuit;

[0008] The second filtering circuit is used to filter the intermediate frequency signal in the signal output by the high-frequency transmitting circuit through the switching circuit.

[0009] In a second aspect, a PA-MID architecture is provided, including an anti-interference circuit, an intermediate frequency transmission circuit, and a high frequency transmission circuit as described in any one of the first aspects.

[0010] Thirdly, a radio frequency transceiver system is provided, including the PA-MID architecture described in the second aspect, antennas corresponding to each antenna port in the PA-MID architecture, and a radio frequency transceiver.

[0011] The aforementioned anti-interference circuit, PA-MID architecture, and RF transceiver system are described. The anti-interference circuit is applied in a PA-MID architecture containing a power amplifier-multiplexer, where the PA-MID architecture includes an intermediate frequency (IF) transmitting circuit and a high-frequency (HF) transmitting circuit. The anti-interference circuit includes a switching circuit, a first filter circuit, and a second filter circuit. The switching circuit, based on a control signal, opens the path between the IF transmitting circuit and the first filter circuit, and also opens the path between the HF transmitting circuit and the second filter circuit. The first filter circuit filters the high-frequency signal in the signal output from the IF transmitting circuit via the switching circuit; the second filter circuit filters the IF signal in the signal output from the HF transmitting circuit via the switching circuit. In existing technologies, the intermediate frequency (IF) and high-frequency (HF) transmitting circuits in the PA-MID architecture both output to their respective antenna transmitters via the same switching circuit. If the switching circuit is simultaneously open in multiple states, the IF signal from the IF transmitting circuit and the HF signal from the HF transmitting circuit will interfere with each other due to insufficient isolation, affecting their signal quality. In this method, an anti-interference circuit is incorporated into the PA-MID architecture. This anti-interference circuit includes a first filter circuit corresponding to the IF transmitting circuit and a second filter circuit corresponding to the HF transmitting circuit. The first and second filter circuits are respectively located at the output of the switching circuit. Thus, the switching circuit, according to a control signal, opens the path between the IF transmitting circuit and the first filter circuit. The first filter circuit filters the HF signal output from the IF transmitting circuit via the switching circuit. Similarly, the switching circuit, according to a control signal, opens the path between the HF transmitting circuit and the second filter circuit. The second filter circuit filters the IF signal output from the HF transmitting circuit via the switching circuit. This reduces interference between the final output IF and HF signals, improves the isolation between the IF and HF transmitting circuits, and further enhances the signal quality of both IF and HF signals. Attached Figure Description

[0012] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0013] Figure 1 This is a schematic diagram illustrating the interaction between the UE, 4G core network, 4G base station, and 5G base station in an NSA scenario in one embodiment.

[0014] Figure 2 This is a schematic diagram of the PA-MID architecture in the prior art in one embodiment;

[0015] Figure 3 This is a schematic diagram of a PA-MID architecture including anti-interference circuitry in one embodiment.

[0016] Figure 4 This is a schematic diagram of a PA-MID architecture including anti-interference circuitry in another embodiment;

[0017] Figure 5 This is a schematic diagram of the ENDC intermediate frequency signal transmission path in a PA-MID architecture including anti-interference circuitry in one embodiment.

[0018] Figure 6 This is a schematic diagram of a PA-MID architecture in one embodiment, where the anti-interference circuit includes an output circuit.

[0019] Figure 7 This is a schematic diagram of the SA intermediate frequency signal transmission path in a PA-MID architecture including anti-interference circuitry in one embodiment;

[0020] Figure 8 This is a schematic diagram of the SA high-frequency signal transmission path in a PA-MID architecture including anti-interference circuitry in one embodiment.

[0021] Figure 9 This is a schematic diagram of the ENDC high-frequency signal transmission path in a PA-MID architecture including anti-interference circuitry in one embodiment;

[0022] Figure 10 This is a schematic diagram of a PA-MID architecture including anti-interference circuitry in another embodiment;

[0023] Figure 11 This is a schematic diagram of a structure in another embodiment where the anti-interference circuit is located outside the PA-MID architecture;

[0024] Figure 12 This is a schematic diagram of the PA-MID architecture in one embodiment;

[0025] Figure 13 This is a schematic diagram of the structure of a radio frequency transceiver system in one embodiment. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0027] 5G network architecture options include two modes: Standalone (SA) and Non-Standalone (NSA). In SA, both the core network's control plane and user plane connect to the UE via 5G base stations. The control plane is used to send signaling for management and resource scheduling; the user plane is used to send user-specific data. In SA, the user plane and control plane can be completely separated. In NSA, the UE connects to the 4G core network, and the control plane anchor points are all at the 4G base stations. The data offloading control points are also at the 4G base stations. Besides control and management, the 4G base stations are responsible for splitting the data from the 4G core network into two paths: one to the UE and the other to the 5G base station, so that the 5G base station can send the data to the UE. A key feature of NSA is its ability to achieve dual connectivity (EUTRA NR Dual-Connectivity, ENDC), allowing the UE to communicate with both 4G and 5G simultaneously. Typically, there is a primary connection and a secondary connection. Figure 1 As shown, Figure 1 A schematic diagram illustrating the interaction between the UE, 4G core network, 4G base station, and 5G base station in an NSA scenario is provided.

[0028] In dual-connectivity scenarios for UEs, ENDC dual-transmission functionality is implemented based on the Phase 7LE architecture. Phase 7LE represents the latest generation of RF solutions in the mobile phone industry. Its key features include the evolution of UHB from 1T1RL-PAMiF and 1R L-FEM solutions to 1T2R / 2R product solutions, further enhancing integration; and optimizing functions such as in-module switches, EN-DC support, and duplexers, further reducing the need for external components and achieving high performance and simplicity in the overall solution.

[0029] Optionally, the Phase 7LE architecture implements ENDC dual-launch functionality through the PA-MID architecture. A schematic diagram of the PA-MID architecture is shown below. Figure 2As shown, the system includes an intermediate frequency amplifier (MB PA) connected to the intermediate frequency (IF) RF input and a high-frequency amplifier (HB PA) connected to the high-frequency (HF) RF input. Optionally, the MB PA and HB PA can operate simultaneously. Optionally, the PA-MID architecture also includes multiple filters corresponding to different frequency bands. The input of each filter is connected to the output of the amplifier corresponding to that band. Antenna switches and switching switches are connected to the outputs of each filter. Thus, the IF signal is input from the IF RF input to the MB PA, passes through the filter, antenna switch (ASW), and switching switch, and is output to the corresponding RF antenna transmitter. The HF signal is input from the HF RF input to the HB PA, passes through the filter, ASW, and switching switch, and is output to the corresponding RF antenna transmitter. When the ASW and switching switch are simultaneously active, the ENDC dual-transmission function is achieved.

[0030] Optionally, the RF path corresponding to different frequency band signals can be determined by the processor controlling the closing or opening of the ASW and the switching switch to determine the currently active signal path. Each standard has an independent RF path. For example, taking B3-N41 ENDC as an example, the RF signal path inside the device is as follows: Figure 2 As shown, Figure 2 The PA-MID architecture shown includes the intermediate frequency (IF) RF input terminals MB RFIN and MB PA, the IF switch MB SW, filters B1, B3, and B7, the high frequency (HF) RF input terminals HB RFIN and HB PA, the high frequency switch HB SW, filters B40 and B41, ASW, the switching switch DP5T, the output port of ENDC N41, the output terminal ANT1, and the receiver terminal ANT2.

[0031] The path of the ENDC high-frequency signal (ENDC N41) includes the following: the RF signal ENDC N41 is input from HB RFIN, amplified by HB PA, then flows through HB SW to the N41 (B41) bandpass filter (BPF), and then flows out from the ENDC N41 PORT through ASW and DP5T switches.

[0032] The path of the ENDC intermediate frequency signal (ENDC B3) includes: the radio frequency signal is input from MB RFIN, amplified by MB PA, then flows through MB SW switch to B3 bandpass filter (BPF), and then flows out from ANT1 port through ASW and DP5T switches.

[0033] The path of SA MB (such as SA B3) is the same as that of ENDC B3. The RF signal is input from MB RFIN, amplified by MBPA, then flows through MB SW switch to B3 bandpass filter (BPF), and then flows out from ANT1 port through ASW and DP5T switches.

[0034] The path of SA HB (such as SA N41) includes: the RF signal is input from HB RFIN, amplified by HB PA, then flows through HB SW to the N41 bandpass filter (BPF), and then flows out from the ANT1 port through ASW and DP5T switches.

[0035] The aforementioned signal paths can be represented by a signal path configuration table, enabling the processor to control the relevant antenna switches and toggle switches in the PA-MID architecture to perform corresponding operations based on the signal path configuration table, thereby activating the path corresponding to the input RF signal. The signal path configuration table is shown in Table 1 below.

[0036] Table 1

[0037] ENDC-N41 ENDC-B3&SA-MB SA-HB Step 0 HB RFIN->HB PA MB RFIN->MB PA HB RFIN->HB PA Step 1 HB PA->HB SW MB PA->MB SW HB PA->HB SW Step 2 HB SW->N41 Filter MB SW->B3 Filter HB SW->N41 Filter Step 3 N41 Filter->ASW B3 Filter->ASW N41 Filter->ASW Step 4 ASW->DP5T ASW->DP5T ASW->DP5T

[0038] As can be seen, when ENDC is being transmitted in dual mode, both ENDC B3 and ENDC N41 signals will exist simultaneously on ASW and DP5T. Except for ENDC N41, all other RF signals (including SA N41) will flow out from the ANT1 port.

[0039] Based on this architecture, since both ENDC B3 and ENDC N41 traverse the same ASW and DP5T within the PA-MID architecture, insufficient isolation between the two paths can lead to isolation issues when ASW and DP5T are in a multi-on state.

[0040] For example, in the measured results, the isolation between the two paths was 26dB, and an isolation of 40dB or higher is recommended. However, when ENDC N41 is in a high-power state (e.g., 26dBm) and ENDC B3 is in a low-power state (e.g., -20dBm), the impact of isolation will be amplified. Specifically, the power leaked from ENDC N41 to ENDC B3 is 0dBm. At this point, the signal power of ENDC B3 is much less than the leaked interference signal power, and its signal quality will be severely affected. The error vector amplitude will fluctuate drastically, for example, by 2% to 70%.

[0041] In other words, in dual-signal scenarios, the existing PA-MID architecture suffers from insufficient isolation between high-frequency and mid-frequency signals, leading to mutual interference and severely impacting signal quality.

[0042] It should be noted that currently, the industry generally refers to dual-transmission in frequency bands such as B3 and N41, B1 and N41, or B39 and N41. This embodiment primarily uses B3 and N41 as an example, but this solution is equivalent to B1 and B39 frequency bands, and also equally applicable to scenarios where B3 (or B1, B39) is used in conjunction with other frequency bands. The correspondence between the TX signal frequency and the frequency band can be found in the table below:

[0043] Table 2

[0044] Band TX frequency / MHz B1 1920-1980 B3 1710-1785 B39 1880-1919 N41 2496-2690

[0045] The anti-interference circuit provided in this application embodiment can be applied to a PA-MID architecture containing a power amplifier-multiplexer. For example... Figure 3 As shown, the PA-MID architecture includes an intermediate frequency (IF) transmitting circuit and a high frequency (HF) transmitting circuit. The anti-interference circuit includes a switching circuit, a first filter circuit, and a second filter circuit.

[0046] The switching circuit is used to connect the intermediate frequency transmitting circuit and the first filter circuit, and to connect the high frequency transmitting circuit and the second filter circuit according to the control signal; the first filter circuit is used to filter the high frequency signal in the signal output by the intermediate frequency transmitting circuit through the switching circuit; the second filter circuit is used to filter the intermediate frequency signal in the signal output by the high frequency transmitting circuit through the switching circuit.

[0047] In this embodiment, optionally, the anti-interference circuit can be integrated within the PA-MID architecture. For example, the switching circuit, the first filter circuit, and the second filter circuit in the anti-interference circuit are all integrated within the PA-MID architecture. A schematic diagram of the PA-MID architecture can be found here. Figure 3 As shown, exemplarily, Figure 3 The PA-MID architecture shown includes an intermediate frequency transmitting circuit, a high frequency transmitting circuit, and an anti-interference circuit including a switching circuit, a first filter circuit, and a second filter circuit.

[0048] The intermediate frequency (IF) transmitting circuit is used to receive signals from the IF radio frequency signal input terminal of the PA-MID architecture and transmit the signals to the corresponding IF signal output terminal through the anti-interference circuit. The anti-interference circuit is used to filter the received signals, filtering out and retaining the valid IF signals or filtering out interfering non-IF signals, so that the filtered signals are output to the antenna through the IF signal output terminal for signal transmission.

[0049] The high-frequency transmitting circuit is used to receive signals from the high-frequency radio frequency signal input terminal of the PA-MID architecture and transmit the signals to the corresponding high-frequency signal output terminal through the anti-interference circuit. The anti-interference circuit is used to filter the received signals, filtering out and retaining the effective high-frequency signals or filtering out interfering non-high-frequency signals, and outputting the signals to the antenna through the high-frequency signal output terminal for signal transmission.

[0050] The first filtering circuit corresponds to the intermediate frequency (IF) transmitting circuit and is used to filter the high-frequency signals in the signal output from the IF transmitting circuit. For example, the high-frequency signals here refer to high-frequency signals that interfere with the normal IF signal in the IF transmitting circuit. Optionally, the first filtering circuit can filter out the high-frequency signals in the signal output from the IF transmitting circuit. In this case, the first filtering circuit may include a band-stop filter; for example, the band-stop filter may be a high-frequency band-stop filter. Alternatively, based on the same effect as filtering out high-frequency signals, the first filtering circuit can also filter and retain the effective IF signals in the signal output from the IF transmitting circuit. In this case, the first filtering circuit may include an IF band-pass filter. Based on these various options, the first filtering circuit can achieve the purpose of improving the signal quality of the output signal from the IF transmitting circuit.

[0051] The second filtering circuit corresponds to the high-frequency transmitting circuit and is used to filter the intermediate frequency (IF) signal in the signal output from the high-frequency transmitting circuit. For example, the IF signal here refers to the IF signal that interferes with the normal high-frequency signal in the high-frequency transmitting circuit. Optionally, the second filtering circuit can filter out the IF signal in the signal output from the high-frequency transmitting circuit. In this case, the second filtering circuit may include a band-stop filter; for example, the band-stop filter may be an intermediate frequency band-stop filter. Alternatively, based on the same effect as filtering out the IF signal, the second filtering circuit can also filter and retain the high-frequency effective signal in the signal output from the high-frequency transmitting circuit. In this case, the second filtering circuit may include a high-frequency bandpass filter. Based on these various options, the second filtering circuit can achieve the purpose of improving the signal quality of the output signal from the high-frequency transmitting circuit.

[0052] Optionally, the intermediate frequency (IF) and high-frequency (HF) transmitting circuits in the PA-MID architecture can be circuits from the prior art. For example, the IF transmitting circuit may include... Figure 2 The intermediate frequency (IF) RF input (MB RFIN), IF amplifier (MBPA), IF switch (MB SW), and at least one conventional IF filter are shown; the high-frequency transmission circuit may include... Figure 2The diagram shows a high-frequency RF input terminal HB RFIN, a high-frequency amplifier HB PA, a high-frequency switch HB SW, and at least one conventional high-frequency filter. Both the intermediate frequency (IF) and high-frequency (HF) transmitting circuits are connected to the first terminal of the switching circuit in the anti-interference circuit. The second terminal of the switching circuit is connected to the first and second filter circuits, respectively.

[0053] Taking ENDC B3-N41 as an example, the PA-MID structure, including the anti-interference circuit, can be referenced. Figure 4 As shown, Figure 4 The system includes an intermediate frequency (IF) transmission circuit composed of MB RFIN, MB PA, MB SW, B1 filter, B3 filter, and B7 filter; a high frequency (HF) transmission circuit composed of HBRFIN, HB PA, HB SW, B40 filter, and B41 filter; a switching circuit composed of ASW and a switching switch; and a first filtering circuit composed of a first filter B3 BPF and a second filtering circuit composed of a second filter N41 BPF. In other dual-connectivity scenarios, such as ENDC B1 and N41 dual-connectivity scenarios, the first filtering circuit may include a first filter B1 BPF and the second filtering circuit may include a second filter N41 BPF; or, the first filtering circuit may include a first filter N41 BSF and the second filtering circuit may include a second filter B3 BSF. The configuration of the first and second filtering circuits in this application is determined according to the dual-connectivity scenario designed for the UE. Optionally, the switching switch can be... Figure 4 The 3P5T shown can also be a 2P5T or other multi-pole multi-throw switch with multiple simultaneous on / off function. This switching switch is mainly used to provide branch circuits. In other words, the switching switch in this embodiment can also be a multiplexer, such as a duplexer, triplexer, or other multiplexers.

[0054] like Figure 4 As shown, the first filter circuit is used to filter the signal output by the intermediate frequency transmitting circuit through the switching circuit, and output the filtered signal to the output terminal ANT1; the second filter circuit is used to filter the signal output by the high frequency transmitting circuit through the switching circuit, and output the filtered signal to the output terminal of ENDC N41.

[0055] For example, for an intermediate frequency signal similar to ENDC B3, the ENDC B3 signal is input from MB RFIN, passes through MBPA and MB SW, and is output to the corresponding B3 filter. After preliminary filtering of the ENDC B3 signal, the pre-filtered ENDC B3 signal is output to ASW and 3P5T, and input to the first filter B3 BPF. The first filter B3 BPF is used to filter out signals other than B3 and B3-related signals. That is, after the first filter filters out the ENDC B3 signal, the ENDC B3 signal after being filtered by the first filter is output to the antenna through the output terminal ANT1 for signal transmission.

[0056] For example, for a high-frequency signal similar to ENDC N41, the ENDC N41 signal is input from HB RFIN, passes through HB PA and HB SW, and is output to the corresponding N41 filter. After preliminary filtering of the ENDC N41 signal, the pre-filtered ENDC N41 signal is output to ASW and 3P5T, and input to the second filter N41 BPF. The second filter N41 BPF is used to filter out signals other than N41 and N41-related signals. That is, the second filter selects out the N41 signal, and then outputs the ENDC N41 signal after being filtered by the second filter to the antenna for signal transmission through the output terminal ENDC N41.

[0057] In this way, even though both ENDC B3 and ENDC N41 pass through the switching circuit, the first filter B3 BPF in the signal transmission path of ENDC B3 filters out signals other than ENDC B3 and ENDC B3-related signals, thereby reducing the impact of ENDC N41 or other interference signals on ENDC B3. The second filter N41 BPF in the signal transmission path of ENDC N41 filters out signals other than ENDC N41 and ENDC N41-related signals, thereby reducing the impact of ENDCB3 or other interference signals on ENDC N41. This ensures that the ENDC B3 signal output from the output terminal ANT1 and the ENDC N41 signal output from the ENDCN41 terminal can be output with high signal quality, ensuring the isolation and signal transmission quality between the intermediate frequency signal transmission path and the high frequency signal transmission path.

[0058] also, Figure 4 The circuit also includes a signal receiver ANT2 and a low-noise amplifier LNA as a signal receiving circuit. In this embodiment, the isolation of the signal transmitting circuits in different frequency bands is mainly improved. Therefore, the signal receiving circuit will not be described in detail.

[0059] The aforementioned anti-interference circuit is applied in a PA-MID architecture containing a power amplifier-multiplexer. The PA-MID architecture includes an intermediate frequency (IF) transmitting circuit and a high frequency (HF) transmitting circuit. The anti-interference circuit includes a switching circuit, a first filter circuit, and a second filter circuit. The first filter circuit filters the high-frequency signal in the signal output by the IF transmitting circuit through the switching circuit. The second filter circuit filters the IF signal in the signal output by the HF transmitting circuit through the switching circuit. In existing technologies, the intermediate frequency (IF) and high-frequency (HF) transmitting circuits in the PA-MID architecture both output to their respective antenna transmitters via the same switching circuit. If the switching circuit is simultaneously open in multiple states, the IF signal in the IF transmitting circuit and the HF signal in the HF transmitting circuit will interfere with each other due to insufficient isolation, affecting their signal quality. In this method, an anti-interference circuit is set in the PA-MID architecture. The anti-interference circuit includes a first filter circuit corresponding to the IF transmitting circuit and a second filter circuit corresponding to the HF transmitting circuit. The first and second filter circuits are respectively set at the output of the switching circuit. In this way, the HF signal in the signal output by the IF transmitting circuit through the switching circuit is filtered by the first filter circuit, and the IF signal in the signal output by the HF transmitting circuit through the switching circuit is filtered by the second filter circuit. This reduces the interference between the final output IF signal and the HF signal, improves the isolation between the IF transmitting circuit and the HF transmitting circuit, and further improves the signal quality of the IF and HF signals.

[0060] Since both the intermediate frequency (IF) and high frequency (HF) transmitting circuits are connected to the switching circuit, the switching circuit needs to connect the IF and HF transmitting circuits to their respective filter circuits. The switching circuit is used to connect the IF transmitting circuit to the first filter circuit and the HF transmitting circuit to the second filter circuit according to the control signal.

[0061] The control signal can be a signal determined by the control circuit of the communication device where the interference circuit is located to control the switching circuit to turn on based on the signal to be transmitted. For example, if the signal to be transmitted is an intermediate frequency signal, the control information is used to control the switching circuit to turn on the path between the intermediate frequency transmitting circuit and the first filter circuit. If the signal to be transmitted is a high frequency signal, the control information is used to control the switching circuit to turn on the path between the high frequency transmitting circuit and the second filter circuit.

[0062] Optionally, the radio frequency transceiver system may further include a radio frequency transceiver for sending control signals to the intermediate frequency (IF) transmitting circuit, high frequency (HF) transmitting circuit, and anti-interference circuit in the PA-MID architecture. For example, the radio frequency transceiver sends control signals to the IF transmitting circuit, HF transmitting circuit, and anti-interference circuit to control the IF transmitting circuit, HF transmitting circuit, and anti-interference circuit to conduct the target path. The IF transmitting circuit, HF transmitting circuit, and anti-interference circuit control each component to open or close according to the control signals, thereby opening the path between the IF transmitting circuit and the first filter circuit of the anti-interference circuit to realize the transmission of the IF signal, or opening the path between the HF transmitting circuit and the second filter circuit of the anti-interference circuit to realize the transmission of the HF signal.

[0063] Exemplarily, the switching circuit can be formed by switching components, such as antenna switches, multi-pole multi-throw switches, etc. The antenna switch is used to conduct the path of the frequency band corresponding to the input signal according to the signal frequency band, and the multi-pole multi-throw switch is used to form a corresponding path and output to the first filter circuit or the second filter circuit according to the input signal. Optionally, the switching circuit may also include other controllable components that can form a path. For example, the switching circuit may also include switching transistors, such as diodes, transistors, etc. The switching transistors are used to conduct the path of the frequency band corresponding to the input signal according to the signal frequency band. For example, the switching circuit may have two switching transistors. By controlling one of the switching transistors, the path between the intermediate frequency transmitting circuit and the first filter circuit is conducted; by controlling the other switching transistor, the path between the high frequency transmitting circuit and the second filter circuit is conducted. This embodiment is not limited. The embodiments in this solution are all illustrated using switching components including antenna switches and multi-pole multi-throw switches as examples, but the specific form of the switching circuit is not limited.

[0064] by Figure 4Taking an example, the switching circuit includes an ASW and a 3P5T switch. If the control signal is used to indicate the connection between the intermediate frequency (IF) transmitting circuit and the first filter circuit, and the IF transmitting circuit outputs the ENDC B3 signal, then the switching circuit can control a certain line of the ASW to close, thereby connecting the 3P5T switch to the conventional filter B3. The switching circuit can also control a certain line of the 3P5T to close, thereby connecting the 3P5T switch to the first filter B3 BPF, thus connecting the IF transmitting circuit and the first filter circuit. Similarly, if the control signal is used to indicate the connection between the high-frequency (HF) transmitting circuit and the second filter circuit, and the HF transmitting circuit outputs the ENDC N41 signal, then the switching circuit can control a certain line of the ASW to close, thereby connecting the 3P5T switch to the conventional filter B41. The switching circuit can also control a certain line of the 3P5T to close, thereby connecting the 3P5T switch to the second filter N41 BPF, thus connecting the HF transmitting circuit and the second filter circuit.

[0065] In this embodiment, the switching circuit can turn on the transmission path of the corresponding frequency band signal according to the control signal. The transmission paths of different frequency band signals have a certain degree of isolation, so that in the dual-connection scenario, the signal can still be transmitted with high signal quality.

[0066] Alternatively, in one embodiment, such as Figure 5 As shown, the switching circuit includes a first transmitting port, used to connect the intermediate frequency transmitting circuit and the first filtering circuit through the first transmitting port according to a first control signal; the first control signal indicates that the output of the intermediate frequency transmitting circuit is an ENDC intermediate frequency signal; the first filtering circuit is used to filter out the high-frequency signal in the signal output from the first transmitting port and then transmit it to the first antenna port.

[0067] For example, such as Figure 5As shown, the switching circuit includes an ASW and a 3P5T switch. Taking the first transmit port port1 as any output terminal of the 3P5T switch as an example, if the control signal is a first control signal used to indicate the path between the intermediate frequency transmit circuit and the first filter circuit, in this case, the switching circuit can control a certain line of the ASW to close, so as to open the path between the 3P5T switch and the conventional filter B3. The switching circuit controls the first transmit port of the 3P5T to close, so as to open the path between the first transmit port of the 3P5T switch and the first filter B3 BPF, thereby opening the signal transmission path of ENDC B3, and outputting the ENDC B3 signal after filtering by the first filter B3 BPF to the first antenna port ANT1. For intermediate frequency signals similar to ENDC B3, the ENDC B3 signal is input from MB RFIN, passes through MB PA and MB SW, and is output to the corresponding B3 filter. After preliminary filtering of the ENDC B3 signal, the pre-filtered ENDC B3 signal is output to ASW and 3P5T, and is input to the first filter B3 BPF through the first transmit port of 3P5T. The first filter B3 BPF is used to filter out signals other than B3 and B3-related signals. That is, after the first filter selects the ENDC B3 signal, the ENDC B3 signal after being filtered by the first filter is output to the antenna through the output terminal ANT1 for signal transmission.

[0068] In this embodiment, the ENDC intermediate frequency signal is filtered by the first filter B3BPF after passing through the switching circuit to remove high-frequency signals or interference signals other than B3 and B3-related signals, so that the ENDC intermediate frequency signal (ENDC B3) output to the first antenna terminal ANT1 has high signal quality.

[0069] In addition to enabling dual transmission of signals in different frequency bands in dual-connectivity scenarios, the PA-MID architecture also needs to process and transmit / receive radio frequency signals in different frequency bands in single-connectivity scenarios. These radio frequency signals in standalone networking mode include SA intermediate frequency signal SA MB and SA high frequency signal SAHB.

[0070] In one alternative embodiment, the switching circuit includes a second transmitting port and is further configured to connect the intermediate frequency transmitting circuit and the first antenna port through the second transmitting port according to a second control signal, wherein the second control signal indicates that the output of the intermediate frequency transmitting circuit is an SA intermediate frequency signal.

[0071] In another alternative embodiment, the switching circuit is further configured to connect the high-frequency transmitting circuit and the first antenna port through the second transmitting port according to a third control signal, wherein the third control signal indicates that the high-frequency transmitting circuit outputs an SA high-frequency signal.

[0072] In this embodiment, considering that SA MB includes intermediate frequency signals such as B1, B2, and B3, and SA HB includes high frequency signals such as B40 and B41, if SA MB and SA HB are both transmitted through the first antenna, and if both SA MB and SA HB pass through the first filter circuit connected to the first antenna port, it will cause signal loss in SA MB and SA HB, thereby affecting the signal quality of SA MB and SA HB.

[0073] Optionally, a combiner can be added to the anti-interference circuit so that SA MB and SA HB are directly output to the combiner after passing through the second transmit port of the first switching circuit, without passing through the first filter circuit, thereby avoiding the signal influence of the first filter circuit on SA MB and SA HB.

[0074] In one optional embodiment, the anti-interference circuit further includes a combiner, the input of which is connected to the output of the first filter circuit and the second transmission port, respectively, and the output of which is connected to the first antenna port.

[0075] Taking the ENDC B3-N41 dual-connection scenario as an example, the first filter circuit includes a first filter B3 BPF, the first switching circuit includes a 3P5T, and the combiner includes an SPDT, such as... Figure 6 As shown, the input terminals of the combiner are connected to the second transmit port (port2) of B3 BPF and 3P5T respectively, and the output terminal of the combiner is connected to the first antenna port (ANT1). Optionally, the second transmit port can be different from the first transmit port mentioned above.

[0076] Based on Figure 6The given anti-interference circuit includes an output circuit structure. If the control signal is a signal indicating the connection between the intermediate frequency (IF) transmitting circuit and the first antenna port, and the control signal is used to indicate the transmission of the SA MB signal, the switching circuit can control the closure of a certain line of the ASW to connect the 3P5T switch and a conventional IF filter (e.g., any one of the B1, B3, or B7 filters). The switching circuit also controls the closure of the second transmit port 2 of the 3P5T to connect the second transmit port of the 3P5T switch and the input of the combiner, thereby transmitting the SA MB signal. The SA MB transmission path includes: the SA MB signal is input from the MB RFIN, passes through the MB PA and MB SW, and is output to the corresponding conventional IF filter. After preliminary filtering, the pre-filtered SA MB signal is output to the ASW and 3P5T, and then input to the combiner through the second transmit port 2 of the 3P5T. The combiner outputs the signal to the output terminal ANT1, and then outputs it to the antenna for signal transmission. The SA MB transmission path can be referenced... Figure 7 As shown.

[0077] In this embodiment, after passing through the intermediate frequency transmission circuit and the switching circuit, the SA MB is output to the combiner through the second transmission port port2, and then output to the first antenna terminal ANT1 through the combiner. It does not pass through the first filtering circuit, so the first filtering circuit will not affect the signal of the SA MB, thus the output SA MB has a high signal quality.

[0078] Based on Figure 6 In the given anti-interference circuit including the output circuit structure, if the control signal is a control signal that indicates the path between the high-frequency transmitting circuit and the first antenna port, and the control signal is used to indicate the transmission of SA HB signal, the switching circuit can control a certain line of ASW to close, so as to open the path between the 3P5T switch and the conventional high-frequency filter (e.g., any one of the B40 filter and B41 filter). The switching circuit controls the second transmitting port 2 of 3P5T to close, so as to open the path between the second transmitting port of 3P5T switch and the combiner. The SA HB signal is output to the first antenna port ANT1 through the combiner, thereby transmitting the SA high-frequency signal SA HB. The SA HB transmission path includes the SA HB signal input from HB RFIN, passing through HBPA and HB SW, and outputting to the corresponding conventional high-frequency filter. After preliminary filtering, the SA HB signal is output to ASW and 3P5T. Through the second transmit port 2 of 3P5T, it is input to various output circuits, and then output through a combiner to output terminal ANT1. From ANT1, the signal is transmitted to the antenna. The SA HB transmission path can be found by referring to [reference needed]. Figure 8 As shown.

[0079] In this embodiment, after passing through the high-frequency transmitting circuit and the first switching circuit, SA HB is output to the combiner through the second transmitting port port2, and then output to the first antenna terminal ANT1 through the combiner. It does not pass through the first filtering circuit, so the first filtering circuit will not affect the signal of SA HB, thus the output SA HB has high signal quality.

[0080] In combination with the above Figures 5-8 In the provided embodiments, for example, the signal path configuration table for the ENDC B3 signal, SA MB signal, and SA HB signal can be referred to Table 3.

[0081] Table 3

[0082]

[0083]

[0084] In this embodiment, by setting up various circuit breakers in the anti-interference circuit, physical isolation is achieved between the ENDC B3 signal transmission path and the SAMB and SA HB signal transmission paths. Setting a first filter, such as the B3 filter, in the ENDC B3 signal transmission path will not interfere with or cause signal misprocessing to the SAMB and SA HB signals, thus ensuring the signal transmission of signals in different frequency bands to a certain extent.

[0085] In one alternative embodiment, such as Figure 9 As shown, the switching circuit is used to connect the high-frequency transmitting circuit and the second filtering circuit according to the fourth control signal; the fourth control signal indicates that the output of the high-frequency transmitting circuit is the ENDC high-frequency signal; the output signal of the second filtering circuit is output through the second antenna port.

[0086] For example, such as Figure 9As shown, the switching circuit includes an ASW and a 3P5T switch. If the control signal is a fourth control signal used to indicate the path between the high-frequency transmitting circuit and the second filter circuit, the switching circuit can control a certain line of the ASW to close, thereby opening the path between the 3P5T switch and the conventional filter B41. Optionally, the switching circuit can also control the third transmitting port (port3) of the 3P5T to close, thereby opening the path between the fourth transmitting port of the 3P5T switch and the second filter N41 BPF, thus opening the signal transmission path of ENDC N41 and outputting the ENDC N41 signal after filtering by the first filter N41 BPF to the second antenna port ENDC N41. The transmission path of the ENDC N41 signal includes the following steps: the ENDC N41 signal is input from HB RFIN, passes through HB PA and HB SW, and is output to the corresponding N41 filter. After preliminary filtering, the ENDC N41 signal is output to ASW and 3P5T, and then input to the second filter N41 BPF through the third transmit port of 3P5T. Finally, the ENDC N41 signal, after being filtered by the second filter, is output to the antenna for signal transmission. For example, the signal path configuration table for the ENDC N41 signal can be found in Table 4.

[0087] Table 4

[0088] ENDC-N41 Step 0 HB RFIN->HB PA Step 1 HB PA->HB SW Step 2 HB SW->N41 Filter Step 3 N41 Filter->ASW Step 4 ASW->3P5T(port3) Step 5 3P5T(port3)->ENDC N41 PORT

[0089] In this embodiment, the ENDC high-frequency signal is filtered by the second filter N41BPF after passing through the switching circuit. This filters out high-frequency signals or interference signals other than N41 and N41-related signals, so that the ENDC high-frequency signal (ENDC N41) output to the second antenna port ENDC N41 has high signal quality.

[0090] In one alternative embodiment, the first filter includes a first bandpass filter or a first bandstop filter. Alternatively, the second filter includes a second bandpass filter or a second bandstop filter.

[0091] In one scenario, both the first filter and the second filter can be bandpass filters. For example, the above... Figures 3-9 In the embodiments given, the first filter is an intermediate frequency bandpass filter (B3 BPF) and the second filter is a high frequency bandpass filter (N41 BPF) as examples, which will not be elaborated here.

[0092] In another scenario, both the first and second filters can be band-stop filters, for example, such as... Figure 10As shown, the first filter can be a high-frequency band-stop filter, such as N41 BSF, and the second filter can be an intermediate-frequency band-stop filter, such as B3 BSF. Here, the high-frequency band-stop filter filters high-frequency signals to allow intermediate-frequency signals to pass; for example, the N41 BSF filters the ENDC N41 signal to allow the ENDC B3 signal to pass. Similarly, the intermediate-frequency band-stop filter filters intermediate-frequency signals to allow high-frequency signals to pass; for example, the B3 BSF filters the ENDC B3 signal to allow the ENDC N41 signal to pass.

[0093] Alternatively, the first filter may be a bandpass filter, for example, an intermediate frequency (IF) bandpass filter and the second filter may be an IF bandstop filter; alternatively, the first filter may also be a high-frequency bandstop filter and the second filter may be a high-frequency bandpass filter. In this embodiment, as long as it can filter interference signals in the relevant frequency band and retain normal signals in the relevant frequency band, the type combination of the first filter and the second filter is not limited.

[0094] In this embodiment, a first filter circuit and a second filter circuit are respectively set in the intermediate frequency signal transmission circuit and the high frequency signal transmission circuit. This can achieve filtering processing of signals in the corresponding frequency bands, so that the transmitted signals in the signal circuits of the corresponding frequency bands are not interfered with by other signals, thereby enhancing the isolation between transmission circuits of different frequency bands and improving the transmission quality of transmitted signals.

[0095] In one alternative embodiment, the first and second filter circuits are integrated within the PA-MID architecture; or, the first and second filter circuits are located outside the PA-MID architecture.

[0096] As mentioned above Figures 3-10 As shown in the given embodiment, both the first and second filter circuits are integrated within the PA-MID architecture. Integrating both the first and second filter circuits within the PA-MID architecture can reduce the cable design cost of the PA-MID architecture and achieve a higher degree of integration.

[0097] Alternatively, the first and second filter circuits can be placed outside the PA-MID architecture; the configuration can be found in the following reference. Figure 11 As shown, by placing the first and second filter circuits outside the PA-MID architecture, the first and second filter circuits can be adapted and modified according to the actual situation, reducing the maintenance cost of the PA-MID architecture and making the design more flexible.

[0098] In scenarios where the first and second filter circuits are located outside the PA-MID architecture, the signal path configuration table for the ENDC B3 signal, ENDC N41 signal, SA MB signal, and SA HB signal can be found in Table 5.

[0099] Table 5

[0100]

[0101] In one alternative embodiment, such as Figure 12 As shown, a PA-MID architecture is provided, including an intermediate frequency transmitting circuit, a high frequency transmitting circuit, and the aforementioned... Figures 3-11 The anti-interference circuit provided in any embodiment.

[0102] Optionally, in one embodiment, a radio frequency transceiver system is provided, such as Figure 13 As shown, including the above Figure 12 The diagram shows the PA-MID architecture, the antennas corresponding to each antenna port in the PA-MID architecture, and the RF transceivers.

[0103] For example, the antenna includes at least one of the following: an ENDC antenna disposed at the ENDC high-frequency output terminal in the PA-MID architecture, an ENDC antenna disposed at the ENDC intermediate frequency output terminal (ANT1 terminal), and an SA antenna disposed at the SA signal output terminal (ANT1 terminal). This embodiment does not limit the specific antenna.

[0104] Optionally, the radio frequency transceiver in the radio frequency transceiver system is used to send control signals to the anti-interference circuit, the intermediate frequency transmitting circuit and the high frequency transmitting circuit in the PA-MID architecture, so that the anti-interference circuit, the intermediate frequency transmitting circuit and the high frequency transmitting circuit can conduct the signal path of the corresponding frequency band in the anti-interference circuit, the intermediate frequency transmitting circuit and the high frequency transmitting circuit according to the control signals.

[0105] In this embodiment, optionally, the contents of Tables 3-5 can be stored in the RF transceiver. The RF transceiver obtains the signal type of the current signal from the base station or core network equipment, and determines the various circuit components in the PA-MID architecture involved in the signal path from the stored signal path configuration table based on the signal type. It then sends control signals to the anti-interference circuit, the intermediate frequency (IF) transmitting circuit, and the high-frequency (HF) transmitting circuit in the PA-MID architecture. The anti-interference circuit, IF transmitting circuit, and HF transmitting circuit activate the signal paths of the corresponding frequency bands in the anti-interference circuit, IF transmitting circuit, and HF transmitting circuit according to the control signals. For example, if the RF transceiver stores the signal path configuration table shown in Tables 3-4, and the RF transceiver determines that the current signal is an ENDC B3 signal, then according to the ENDC B3 signal path Step0-Step6 in the signal path configuration table, it controls the corresponding switching circuits involved to close, thereby activating the ENDC B3 transmitting circuit.

[0106] Each module in the aforementioned anti-interference circuit can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in the processor of a computer device in hardware form or independent of it, or stored in the memory of the computer device in software form, so that the processor can call and execute the operations corresponding to each module.

[0107] Those skilled in the art will understand that Figure 3-13 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0108] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.

[0109] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0110] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. An anti-interference circuit, characterized in that, This is applied to a PA-MID architecture containing a power amplifier-multiplexer, wherein the PA-MID architecture includes an intermediate frequency transmitting circuit and a high frequency transmitting circuit; the anti-interference circuit includes a switching circuit, a first filter circuit and a second filter circuit, and the switching circuit includes a second transmitting port. In the case of dual connection, the switching circuit is used to open the path between the intermediate frequency transmitting circuit and the first filter circuit, and to open the path between the high frequency transmitting circuit and the second filter circuit according to the control signal. The first filtering circuit is used to filter the high-frequency signal in the signal output by the intermediate frequency transmitting circuit through the switching circuit; the second filtering circuit is used to filter the intermediate frequency signal in the signal output by the high-frequency transmitting circuit through the switching circuit. In the case of a single connection, the switching circuit is further configured to connect the intermediate frequency transmitting circuit and the first antenna port through the second transmitting port according to the second control signal; the switching circuit is further configured to connect the high frequency transmitting circuit and the first antenna port through the second transmitting port according to the third control signal.

2. The anti-interference circuit according to claim 1, characterized in that, The switching circuit includes a first transmitting port, used to connect the intermediate frequency transmitting circuit and the first filtering circuit through the first transmitting port according to a first control signal; the first control signal indicates that the output of the intermediate frequency transmitting circuit is an ENDC intermediate frequency signal; The first filtering circuit is used to filter out high-frequency signals in the signal output from the first transmitting port before transmitting it to the first antenna port.

3. The anti-interference circuit according to claim 2, characterized in that, The second control signal indicates that the output of the intermediate frequency transmitting circuit is an SA intermediate frequency signal.

4. The anti-interference circuit according to claim 3, characterized in that, The third control signal indicates that the high-frequency transmitting circuit outputs an SA high-frequency signal.

5. The anti-interference circuit according to claim 3 or 4, characterized in that, The anti-interference circuit also includes a combiner, the input of which is connected to the output of the first filter circuit and the second transmit port, respectively, and the output of which is connected to the first antenna port.

6. The anti-interference circuit according to claim 1, characterized in that, The switching circuit is used to connect the high-frequency transmitting circuit and the second filtering circuit according to the fourth control signal; the fourth control signal indicates that the output of the high-frequency transmitting circuit is an ENDC high-frequency signal. The output signal of the second filter circuit is output through the second antenna port.

7. The anti-interference circuit according to any one of claims 1-4, characterized in that, The first filtering circuit includes a first bandpass filter or a first bandstop filter; the second filtering circuit includes a second bandpass filter or a second bandstop filter.

8. The anti-interference circuit according to any one of claims 1-4, characterized in that, The switching circuit is integrated within the PA-MID architecture.

9. A PA-MID architecture, comprising an intermediate frequency transmitting circuit, a high frequency transmitting circuit, and an anti-interference circuit as described in any one of claims 1-8.

10. A radio frequency transceiver system, comprising a radio frequency transceiver, a PA-MID architecture as described in claim 9, and antennas corresponding to each antenna port in the PA-MID architecture.

Images