A large dynamic range limiting circuit and receiver

By using an active limiting circuit and a multi-stage PIN diode structure, the problem of insufficient limiting capability of the receiver is solved, achieving a limiting effect with high power capacity and low leakage power, ensuring distortion-free signal transmission under high power conditions.

CN116582141BActive Publication Date: 2026-03-06GUANGDONG SHENGDA COMM CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-04-26
Publication Date
2026-03-06

AI Technical Summary

Technical Problem

Existing receiver limiting circuits have insufficient limiting capability when facing high-power interference. Furthermore, passive limiters have high leakage power, low power capacity of individual diodes, and are easily damaged. Traditional multi-stage PIN diodes have limited limiting effect.

Method used

An active limiting circuit is adopted, which utilizes a stepped buck network and a multi-stage limiting circuit, combined with a directional coupler and a bias control circuit. High power is dissipated in stages through multiple sets of PIN diodes, and the detector converts the radio frequency power to provide bias for the DC voltage, thereby achieving multi-stage limiting.

Benefits of technology

The power capacity of the limiting circuit has been increased, leakage power has been reduced, diode damage has been prevented, a more complex limiting curve has been formed, and signal transmission without distortion under high power conditions has been ensured.

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Abstract

This invention relates to a large dynamic range limiting circuit and receiver. The large dynamic range limiting circuit, based on an active limiter structure, is incorporated in the receiver to perform large dynamic range limiting on the received input signal. It includes a stepped-down voltage regulator network and a multi-stage limiting circuit. The stepped-down voltage regulator network comprises at least one forward-conducting stepped-down diode connected in series on the signal input transmission line, a number of isolation capacitors connected in series on the input balance line, an RF isolation inductor connected between the stepped-down diode and the isolation capacitors, and a DC-connected diode to ground at both ends of the stepped-down diode. The multi-stage limiting circuit includes a limiting diode between the isolation capacitor and ground. The P-terminal of the stepped-down diode is connected to the signal input direction, the N-terminal of the DC-connected diode is grounded, and the N-terminal of the limiting diode is grounded. This invention utilizes multiple sets of limiting diodes for multi-stage limiting, which can significantly improve the power capacity of the limiting circuit.
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Description

Technical Field

[0001] This invention relates to the field of radio frequency instruments, radio stations and radar receivers, and in particular to a receiver having a large dynamic range limiting circuit. Background Technology

[0002] With the rapid development and widespread use of wireless equipment, the communication spectrum environment has become increasingly complex, with various intentional and unintentional electromagnetic emissions emerging one after another. In electronic warfare applications, radio frequency (RF) receivers often face targeted suppression jamming and high-power burn-out jamming from the enemy. Strong electromagnetic signal intrusion can cause signal interference to RF receivers, ranging from increased bit error rate and communication interruption to permanent degradation of receiver hardware functionality or even direct damage. Improving the anti-interference and electromagnetic protection capabilities of wireless equipment, enhancing the receiver's ability to communicate normally under suppression jamming, and improving the receiver's survivability under burn-out jamming are of great significance for modern military communications, radar detection, and electronic warfare applications.

[0003] A series of studies have been carried out at home and abroad on electromagnetic protection and anti-interference design for communication equipment, and surge protection, diode clamping circuit, PIN limiting circuit and field effect transistor limiting circuit and other protection measures have been proposed. Reference [1] uses biased field effect transistors to improve the conduction speed of surge protection devices. The disadvantage is that the long RF extension line leads to a large insertion loss. PIN diodes are the most commonly used level limiting devices and are more often used in the electromagnetic protection of receivers. Reference [2] proposes a three-stage PIN diode parallel structure to form a passive limiting protection module. Its insertion loss is about 0.8dB and the limiting level is about 20dBm. References [3-4] improve the power capacity and improve the performance of passive limiting protection modules by increasing the number of PIN diode stages.

[0004] Reference [5] proposes a monolithic microwave integrated circuit for a diode-limited low-noise amplifier, which combines the limiter with the low-noise amplifier to improve the power tolerance and small-signal characteristics of the limiter low-noise amplifier. The chip can withstand 9W continuous wave in the 32-40GHz range, while having good small-signal gain and noise figure. Reference [6] introduces a high-linearity limiter with a lateral structure GaN Schottky diode. The GaN Schottky diode has a low turn-on voltage and a high breakdown voltage, making it particularly suitable for high-frequency high-power limiting circuits. In the 0.03-1GHz frequency band, the small-signal insertion loss of this limiting circuit is less than 1dB, the turn-on level is greater than 17dBm, it can withstand 100W continuous wave power, and the leakage power is less than 23dBm. This limiter can be applied to large dynamic range receivers, improving its reliability while ensuring high linearity. Reference [7] introduces a microwave limiter design method based on a coaxial structure. This limiting circuit uses a PIN diode and a semi-active circuit structure to achieve high-power limiting characteristics. Test results show that in the 300MHz~2000MHz frequency band, the insertion loss of the limiter is less than 1dB, it can withstand pulse power with a peak value of more than 1000W, and the leakage power is less than 16dBm. Reference [8] proposes an active protection module that combines a directional coupler with a rectifier circuit to provide DC bias for the passive limiter, thereby improving the limiting capability of the circuit. The insertion loss of this limiting circuit in the 118~136MHz frequency band is less than 1.5dB, the starting limit level is less than 6dBm, the limiting level is less than 8dBm, and the power capacity is not less than 25dBm.

[0005] Currently, passive limiters suffer from high leakage power and limited protection for downstream applications. Furthermore, individual diodes have low power capacity and generate significant heat under high-power conditions, making them prone to damage. While multi-stage PIN diodes can improve power capacity through multiple limiting operations, they still suffer from insufficient limiting capability and inadequate threshold and limiting levels. Additionally, in multi-stage PIN diodes, only the front-stage diodes provide the primary limiting effect, with the rear-stage diodes playing a negligible role. In traditional coupled detectors, as input power increases, the coupling voltage also increases. Because the conduction curve of PIN diodes is exponential, the diode current increases rapidly, easily burning out the detector diode.

[0006] References

[0007] [1]LU ZH,ZHOU DM,DING L,et al.A Novel High Electromagnetic PulsePartition Method for RF Front-End Based on Delay Circuit[C]∥InternationalConference on Electromagnetics in Advanced Applications.Verona:IEEE,2017:381-384.

[0008] [2]SANTHAKUMAR R,ALLEN D.High Performance Kaband VPIN Limiters[C]∥IEEE Compound Semiconductor Integrated Circuit Symposium.Jolla:IEEE,2012:1-4.

[0009] [3]LI Y N.Simulation and Design of RF Front-End ElectromagneticProtection Module Based on VHF Communication[C]∥International Conference onElectronics Technology.Chengdu:IEEE,2018:142-146.

[0010] [4] Li Yanan, Tan Zhiliang, Song Peijiao. Design of high electromagnetic pulse protection module for radio frequency front end [J]. High Power Laser and Particle Beam, 2018, 30(1):75-80.

[0011] [5] Di Yuehong, Yang Xu, Yang Lin, et al. 32-40GHz high power PIN diode limiting low noise amplifier MMIC.

[0012] [6] Deng Shixiong, Liu Jibin, Liu Peiguo, Wang Shengming, Zhou Hong. Research on high-power high-linearity limiter based on GaN diode coupling detection. Journal of Microwave.

[0013] [7] Li Feng, Deng Shixiong, Bai Rui, et al. A design method for microwave limiter based on coaxial structure [J]. Modern Information Technology, 2022(007):006.

[0014] [8] Ma Zhenyang, Li Yicheng, Shi Chunlei, et al. Electromagnetic protection module circuit design for aviation VHF communication equipment [J]. Radio Engineering, 2022, 52(11): 2046-2053. Summary of the Invention

[0015] This invention addresses the aforementioned shortcomings of current receiver limiting circuits by providing a large dynamic range receiver limiting circuit.

[0016] The technical solution adopted by this invention to achieve its technical objective is as follows: a large dynamic limiting circuit, based on an active limiter structure, is installed in a receiver to perform large dynamic limiting on the input signal received by the receiver; it includes a stepped buck network and a multi-stage limiting circuit; the stepped buck network includes at least one stepped buck diode connected in series on the signal input transmission line in a forward direction, a number of isolation capacitors connected in series on the input balance line, an RF isolation inductor connected between the two ends of the stepped buck diode and the two ends of the isolation capacitor, and a DC-connected diode to ground at the two ends of the stepped buck diode; the multi-stage limiting circuit includes a limiting diode between the two ends of the isolation capacitor and ground; the P-terminal of the stepped buck diode is connected to the signal input direction, the N-terminal of the DC-connected diode is grounded, and the N-terminal of the limiting diode is grounded.

[0017] Furthermore, in the aforementioned large dynamic limiting circuit: a first-stage step-down diode and a second-stage step-down diode are connected in series in forward conduction on the input transmission line; the DC-connecting diodes include a first DC-connecting diode, a second DC-connecting diode, and a third DC-connecting diode; the limiting diodes include a front-stage limiting diode, a middle-stage limiting diode, and a rear-stage limiting diode, which are respectively connected to the first DC-connecting diode, the second DC-connecting diode, and the third DC-connecting diode via an RF isolation inductor.

[0018] Furthermore, in the aforementioned large dynamic limiting circuit, PIN diodes are used for the front-stage limiting diode, the middle-stage limiting diode, and the rear-stage limiting diode.

[0019] Furthermore, the aforementioned large dynamic limiting circuit also includes a bias control circuit for finely controlling the bias voltage of the PIN diode.

[0020] Furthermore, in the aforementioned large dynamic limiting circuit: the bias control circuit includes a detector circuit, a microprocessor, and an amplifier; the amplifier amplifies the input signal, and the detector circuit sends the detected voltage to the microprocessor for processing, whereby the microprocessor generates a control voltage to control the amplifier's amplification factor.

[0021] Furthermore, in the aforementioned large dynamic limiting circuit: the detection circuit includes a diode detector, wherein the N-pole of the diode detector is connected to the input transmission line, and the P-pole is grounded.

[0022] Furthermore, in the aforementioned large dynamic limiting circuit: the amplifier includes an operational amplifier; the input signal is input from the non-inverting input terminal of the operational amplifier and output from the output terminal; the microprocessor generates a control voltage input from the non-inverting input terminal of the operational amplifier; the microprocessor generates a control voltage and then connects it to the output terminal of the operational amplifier after voltage division.

[0023] The present invention also provides a receiver, including a receiving antenna, a directional coupler, and a limiting circuit, wherein the directional coupler couples the signal received by the antenna to the limiting circuit described herein, and the limiting circuit is any of the above-mentioned large dynamic limiting circuits.

[0024] Furthermore, in the aforementioned receiver: the directional coupler includes four inductors connected end to end, with the inductor connections grounded via capacitors; the antenna input signal is input from both ends of one inductor, and a directional output signal is formed from the opposite ends of this inductor.

[0025] Furthermore, in the aforementioned receiver, the directional coupler is implemented using a transmission line transformer or a parallel-line coupler.

[0026] This invention utilizes multiple sets of PIN diodes for multi-level limiting, which can greatly improve the power capacity of the limiting circuit.

[0027] In addition, the present invention divides the limiting diodes into three groups: front stage, intermediate stage and back stage, so as to consume high power input in a hierarchical manner.

[0028] This invention employs an active limiter, which uses a directional coupler to extract a portion of the radio frequency power and uses a diode detector or a logarithmic detector to convert the radio frequency power into a DC voltage. This DC voltage provides bias to the PIN diode, thereby enabling the limiting circuit to control the start-up limit level and the limiting level in real time according to the magnitude of the input power.

[0029] This invention generates a bias voltage proportional to the input power using a detector diode and a voltage calculation circuit. Then, a multi-stage diode network is used to form a stepped voltage drop, creating a multi-stage bias voltage to provide bias to multiple sets of PIN diodes.

[0030] When the input signal is small, the bias voltage is also small, insufficient to turn on the DC diode. At this time, the limiting diode does not function, the limiting circuit is in the linear region, and the signal can pass through with minimal loss. When the input signal is large, the bias voltage increases, turning on the first DC diode and driving the preceding limiting diode, thus forming the first limiting inflection point of the limiting circuit. When the input signal is even larger, the bias voltage can turn on the first two DC diodes. At this time, the preceding and intermediate limiting diodes function, and the limiting circuit forms the second limiting inflection point. When the input signal increases again, the bias voltage can turn on all three DC diodes. At this time, all three limiting diodes function, and the limiting circuit forms the third limiting inflection point.

[0031] In high-power operation, most of the power is consumed by the front-stage limiting diodes. In order to prevent the diodes from overcurrent and overheating, this invention uses a parallel connection of multiple limiting diodes, which helps to distribute the power consumption. The intermediate and subsequent stages use a smaller number of limiting diodes.

[0032] Finally, the present invention can also send the detection voltage to a microprocessor for processing, and the microprocessor generates a control voltage to achieve bias control of the PIN diode, thereby forming a more complex limiting curve.

[0033] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments. Attached Figure Description

[0034] Appendix Figure 1 This is a schematic diagram of the receiver in Embodiment 1 of the present invention;

[0035] Appendix Figure 2 For different input power Figure 1 Voltage curves at points A, B, and C;

[0036] Appendix Figure 3 The circuits shown are a conventional limiting circuit and the limiting curve of Embodiment 1 of the present invention. Detailed Implementation

[0037] This embodiment is a receiver with a large dynamic range limiting circuit, such as... Figure 1 As shown, in the receiver of this embodiment, the downlink signal received by the antenna passes through the directional coupler 1 and is then protected by a limiting circuit. In this embodiment, the directional coupler consists of an integrated inductor and capacitor, suitable for low to medium frequencies (below 100MHz). For higher frequencies, the directional coupler 1 can be implemented using a transmission line transformer or a parallel-line coupler. Figure 1As shown, the directional coupler composed of integrated inductors and capacitors includes four inductors and four capacitors. The four inductors are connected end to end to form a quadrilateral. The four capacitors are grounded at the four corners (inductor connection points) of the quadrilateral. The two ends of one inductor are upstream receivers, connected to the received signal and the coupling ground point Z respectively. The two sides of the inductor opposite it form the signal input transmission line and the input balance line.

[0038] The directional coupler couples the signal received by the antenna to a large dynamic range limiting circuit. In this embodiment, the large dynamic range limiting circuit is based on an active limiter structure to perform large dynamic range limiting on the input signal received by the receiver; it includes a stepped buck network and a multi-stage limiting circuit.

[0039] A stepped-down voltage converter network is set on the signal input transmission line and the input balance line, including at least one stepped-down diode connected in series on the signal input transmission line in forward conduction, a number of isolation capacitors connected in series on the input balance line, an RF isolation inductor connected across the stepped-down diode and across the isolation capacitors, and a DC-connected diode to ground across the stepped-down diode; a multi-stage limiting circuit includes a limiting diode between the isolation capacitors and ground; the P-terminal of the stepped-down diode is connected to the signal input direction, the N-terminal of the DC-connected diode is grounded, and the N-terminal of the limiting diode is grounded.

[0040] like Figure 1 As shown, a first-step step-down diode 7 and a second-step step-down diode 8 are connected in series in forward conduction on the input transmission line; the DC-connecting diodes include a first DC-connecting diode 4, a second DC-connecting diode 5, and a third DC-connecting diode 6; the limiting diodes include a front-stage limiting diode 10, a middle-stage limiting diode 11, and a rear-stage limiting diode 12, which are respectively connected to the first DC-connecting diode 4, the second DC-connecting diode 5, and the third DC-connecting diode 6 via an RF isolation inductor 9.

[0041] like Figure 1 As shown, directional coupler 1 extracts a portion of the RF power and sends it to diode detector 2 (or logarithmic detector), converting the RF power into DC voltage. The magnitude of this voltage reflects the input power of the circuit. Operational amplifier 3 then filters and amplifies the detected voltage to increase its amplitude. Traditional active limiters use only a single-stage PIN diode, resulting in a high limiting level and a limiting curve with only one inflection point, such as... Figure 3As shown, above the limiting inflection point, the power output of the limiter continues to increase, only the rate of power increase decreases. In this case, the limiting effect of the limiter on high power is limited. To further improve the limiting effect of the limiter at high power input, this embodiment discloses a three-stage limiting structure for the large dynamic limiting circuit, and utilizes a stepped buck network to provide bias voltages for each stage of the limiting diodes. The stepped buck network consists of a series of diodes, with the voltage decreasing stepwise by the diodes' own forward voltage. The voltages at each node of the stepped buck network are as follows: Figure 2 As shown. When the input RF power is high, both stepped-drop diodes are conducting, so the voltages at points A, B, and C decrease sequentially. The DC-connected diode is conducting under the voltage at points A, B, and C, providing a DC path for the PIN diodes. Therefore, all three sets of PIN diodes provide limiting, thus putting the limiting circuit in its maximum attenuation state. When the circuit input power decreases, only the first stepped-drop diode is conducting, and only the voltages at points A and B can drive the connected diode. At this time, only the first two stages of PIN diodes provide limiting. When the circuit input power decreases further, neither of the two stepped-drop diodes is conducting, and only the voltage at point A can drive the connected diode. At this time, only the first stage of PIN diodes provides limiting, and the limiting circuit is at a lower limiting level. When the circuit input power decreases again, the voltages at points A, B, and C are all very low, preventing the stepped-drop diodes and the connected diode from conducting. At this time, the limiting diodes are ineffective, and the limiting circuit operates linearly, exhibiting minimal insertion loss, allowing small-amplitude signals to pass without distortion.

[0042] The limiting curve of the large dynamic limiting circuit in this embodiment is as follows: Figure 3 As shown, the limiting curve has three limiting inflection points, and its limiting curve is lower than that of the traditional limiting circuit.

[0043] The PIN diodes in the front stage of a multi-stage limiter need to withstand higher power, so high-power or large-size PIN diodes should be selected, and multiple diodes should be connected in parallel to distribute the power consumption and prevent damage caused by excessive power concentration. The PIN diodes in the middle and later stages consume a smaller proportion of power, so the number of diodes connected in parallel can be reduced.

[0044] In this embodiment, the detector voltage can also be sent to a microprocessor for processing. The microprocessor generates a control voltage to achieve precise bias control of the PIN diode, preventing excessive conduction current due to the diode's exponential characteristics. Therefore, all three limiting inflection points of the limiting curve can be flexibly controlled by the controller, resulting in a more complex and refined limiting curve.

[0045] The bias control circuit includes a detector circuit, a microprocessor, and an amplifier. The amplifier amplifies the input signal, and the detector circuit sends the detected voltage to the microprocessor for processing. The microprocessor generates a control voltage to control the amplifier's amplification factor. The detector circuit includes a diode detector 2, with its N-terminus connected to the input transmission line and its P-terminus grounded. The amplifier includes an operational amplifier 3. The input signal is input from the non-inverting input terminal and output from the output terminal of the operational amplifier 3. The microprocessor generates a control voltage, which is input from the non-inverting input terminal of the operational amplifier 3. This control voltage is also divided and then connected to the output terminal of the operational amplifier 3.

[0046] Currently, limiters (circuits) are crucial components for electromagnetic interference (EMI) protection. Placed at the front end of an RF receiver, the limiter's insertion loss increases rapidly when the input power is too high, protecting sensitive components in the downstream receiver from high-power interference or damage. Under lower signal conditions, the limiter experiences almost no attenuation, ensuring distortion-free signal transmission to the downstream circuitry. Limiters' power ratings (tolerance power) range from hundreds of milliwatts to several kilowatts, with leakage power typically below 25 dBm. As long as the downstream receiver can tolerate 25 dBm, the limiter achieves its EMI protection purpose.

[0047] In this embodiment, the high dynamic limiting circuit (high-power limiter) is implemented using a bypass-connected PIN diode. When the PIN diode is conducting, its on-resistance absorbs some RF power and reflects some RF power, thereby reducing the output power of the limiting circuit and achieving the limiting purpose. Depending on whether the PIN diode is equipped with a bias circuit, limiters are divided into passive and active limiters. Passive limiters directly utilize the microwave limiting characteristics of the diode for limiting. Bypassing the PIN diode requires providing an additional DC path, thus necessitating the use of an additional bypass inductor or two reverse-connected PIN diodes. Passive limiters have high leakage power and limited back-end protection. Furthermore, the power capacity of a single diode is low, and it generates significant heat under high-power conditions, making it prone to damage. Active limiters, on the other hand, couple out a portion of the input power and convert it into the bias voltage of the PIN diode using a detector circuit. This effectively reduces the on-resistance of the PIN diode, increases the power capacity, and reduces leakage power output, making it the most common form of high-power (100W and above) limiters.

[0048] In this embodiment, the front-stage PIN diode 10 of the multi-stage limiting circuit needs to withstand greater power. Therefore, it is necessary to select a PIN diode with high power handling capacity or a large size, and to use multiple diodes in parallel to distribute the power consumption and prevent damage caused by excessive power concentration. The power consumption of the mid-to-late-stage PIN diode 11 is relatively small, so the number of diodes connected in parallel can be reduced.

[0049] In this embodiment, the detection voltage can also be sent to a microprocessor for processing. The microprocessor generates a control voltage to achieve precise bias control of the PIN diode, preventing the diode from generating excessive conduction current due to its exponential characteristics. Therefore, all three limiting inflection points of the limiting curve can be flexibly controlled by the controller, resulting in a more complex and precise limiting curve.

[0050] This embodiment has the following characteristics:

[0051] This embodiment employs an active limiting circuit (device), which uses a directional coupler to extract a portion of the radio frequency power and uses a diode detector or a logarithmic detector to convert the radio frequency power into a DC voltage. This DC voltage provides bias to the PIN diode, thereby enabling the limiting circuit to control the starting limit level and the limiting level in real time according to the magnitude of the input power.

[0052] In this embodiment, a bias voltage proportional to the input power is generated by a detector diode and a voltage calculation circuit. Then, a multi-level diode network is used to form a stepped voltage drop, resulting in a multi-level bias voltage that provides bias to multiple sets of PIN diodes.

[0053] This embodiment utilizes multiple sets of PIN diodes for multi-stage limiting, which can greatly improve the power capacity of the limiting circuit. This embodiment divides the limiting diodes into three groups: the front stage, the middle stage, and the back stage, so as to consume high power input in a hierarchical manner.

[0054] In this embodiment, when the input signal is small, the bias voltage is also small, insufficient to turn on the DC diode. At this time, the limiting diode does not function, the limiting circuit is in the linear region, and the signal can pass through with minimal loss. When the input signal is large, the bias voltage increases, turning on the first DC diode and driving the preceding limiting diode, thus forming the first limiting inflection point of the limiting circuit. When the input signal is even larger, the bias voltage can turn on the first two DC diodes, at which point the preceding and intermediate limiting diodes function, and the limiting circuit forms the second limiting inflection point. When the input signal increases again, the bias voltage can turn on all three DC diodes, at which point all three limiting diodes function, and the limiting circuit forms the third limiting inflection point.

[0055] In high-power operation, most of the power is consumed by the front-stage limiting diodes. In order to prevent the diodes from overcurrent and overheating, this invention uses a parallel connection of multiple limiting diodes, which helps to distribute the power consumption. The intermediate and subsequent stages use a smaller number of limiting diodes.

[0056] In this embodiment, the detection voltage can also be sent to a microprocessor for processing, and the microprocessor generates a control voltage to control the ground bias of the PIN diode, thereby forming a more complex limiting curve.

Claims

1. A large dynamic amplitude limiting circuit based on an active amplitude limiter structure, arranged in a receiver for large dynamic amplitude limiting of an input signal received by the receiver; characterized in that: The ladder voltage reduction network and the multi-stage limiting circuit are included. The ladder voltage reduction network includes at least one ladder voltage reduction diode in series on the signal input transmission line and forward conducting, a number of isolation capacitors in series on the input balanced line, radio frequency isolation inductors connected between the ladder voltage reduction diode and the isolation capacitors, and DC communication diodes connected between the ladder voltage reduction diode and the ground. The multi-stage limiting circuit includes limiting diodes between the isolation capacitors and the ground. The P pole of the ladder voltage reduction diode is connected to the signal input direction, the N pole of the DC communication diode is connected to the ground, and the N pole of the limiting diode is connected to the ground. The first ladder voltage reduction diode (7) and the second ladder voltage reduction diode (8) are in series on the signal input transmission line and forward conducting; the DC communication diodes include the first DC communication diode (4), the second DC communication diode (5), and the third DC communication diode (6); the limiting diodes include the front-stage limiting diode (10), the middle-stage limiting diode (11), and the rear-stage limiting diode (12) connected to the first DC communication diode (4), the second DC communication diode (5), and the third DC communication diode (6) through the radio frequency isolation inductors (9) respectively.

2. The large dynamic range limiting circuit of claim 1, wherein: The front-stage limiting diode (10) is a PIN diode, and a plurality of PIN diodes are connected in parallel; the number of PIN diodes connected in parallel is reduced for the middle-stage limiting diode (11) and the rear-stage limiting diode (12) in turn.

3. The large dynamic range limiting circuit of claim 2, wherein: A bias control circuit for fine control of the bias of the PIN diode is further included.

4. The large dynamic range limiting circuit of claim 3, wherein: The bias control circuit includes a detection circuit, a microprocessor, and an amplifier; the amplifier amplifies the input signal, the detection circuit sends a detection voltage to the microprocessor for processing, and the microprocessor generates a control voltage to control the amplification coefficient of the amplifier.

5. The large dynamic range limiting circuit of claim 4, wherein: The detection circuit includes a diode detector (2), the N pole of the diode detector (2) is connected to the input transmission line, and the P pole is connected to the ground.

6. A receiver comprising a receiving antenna, characterized by: The amplifier includes an operational amplifier (3); the input signal is input from the non-inverting input terminal of the operational amplifier (3) and output from the output terminal, the control voltage generated by the microprocessor is input from the inverting input terminal of the operational amplifier (3), and the control voltage generated by the microprocessor is also input to the output terminal of the operational amplifier (3) after being divided.

7. The receiver of claim 6, characterized in that: A directional coupler and a limiting circuit are further included, the directional coupler couples the signal received by the antenna and connects the limiting circuit, and the limiting circuit is the large dynamic limiting circuit as claimed in any one of claims 1 to 5.

8. The receiver of claim 6, characterized in that: The directional coupler includes four inductors connected end to end, and the inductor connection is connected to the ground through a capacitor; the signal input from the antenna is input from the two ends of one inductor, and the directional output signal is formed from the two ends of the opposite inductor. The directional coupler is implemented by a transmission line transformer or a parallel line coupler.

Citation Information

Patent Citations

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    CN114726328A