A quantum measurement and control system based on RFSOC

Abstract

The present invention discloses a quantum measurement and control system based on RFSOC, specifically relating to the field of RFSOC control. The system includes an RFSOC chip, which integrates: a digital-to-analog conversion module, including eight 6.5GS / s digital-to-analog converters; an analog-to-digital conversion module, including eight 4GS / s analog-to-digital converters; an RF input module, connected to the digital-to-analog conversion module, including an RF input channel and a first signal conditioning circuit; and an RF output module, connected to the analog-to-digital conversion module, including an RF output channel and a second signal conditioning circuit. The digital-to-analog converter and the analog-to-digital converter are respectively connected to configurable IQ digital up / down conversion, a digitally controlled oscillator, a gain matrix, and decimation / interpolation filters. This invention fully leverages the advantages of the highly integrated RFSOC FPGA. It can be easily integrated into logic via an AXI interface. Furthermore, the present invention adds signal conditioning circuits to the DAC output and ADC output to achieve fine power adjustment.

Description

Technical Field

[0001] The present invention relates to the field of RFSOC control, and in particular to a quantum measurement and control system control system based on RFSOC. Background Art

[0002] In recent years, developed countries and high-tech companies have attached great importance to quantum computing, formulating long-term development plans and investing significant resources to promote the technology. With a series of landmark advances in quantum computing technology, global attention has gradually expanded from academia to society at large. Quantum computing has become a rich and complex technological field, extending from cutting-edge basic research in mathematics and physics to the intersection and integration of various engineering disciplines and the development of highly engineered applied technologies, and its rapid development momentum continues unabated.

[0003] There are two main traditional ways to generate microwave pulses:

[0004] IQ Modulation: OFDM (Orthogonal Frequency Division Multiplexing) is a multicarrier modulation technology primarily used in digital communication systems. It divides data into multiple subcarriers, each modulated into a low-rate data stream. These subcarriers are then combined into a high-rate data stream for transmission. The primary advantage of OFDM is its efficient use of spectrum resources, improving transmission rates and signal quality. The use of orthogonal subcarriers also reduces interference between signals, improving the system's ability to resist interference. OFDM is widely used in many digital communication fields, such as digital audio broadcasting, digital television, and wired and wireless networks.

[0005] Its main advantages are:

[0006] 1. Can effectively reduce errors and improve transmission reliability.

[0007] 2. It can achieve high-speed data transmission and is suitable for high-speed communication systems.

[0008] 3. It can flexibly change the frequency, phase and amplitude of the signal, and is suitable for complex communication systems.

[0009] 4. By modulating the phase and amplitude of the IQ signal, a variety of modulation methods can be achieved, such as AM, FM, PM, etc.

[0010] Double frequency conversion: Double frequency conversion refers to the process of performing two frequency conversions on the input signal during signal processing. This process typically consists of two stages: first, the original signal undergoes a primary frequency conversion to an intermediate frequency; then, the intermediate frequency signal undergoes a secondary frequency conversion to the final output frequency. This method is frequently used in wireless communications and broadcasting, enabling functions such as selective signal amplification, filtering, and mixing, thereby improving system performance and stability. Double frequency conversion requires specialized hardware devices, such as mixers, filters, and amplifiers.

[0011] Its main advantages are:

[0012] 1. Higher grid voltage and current quality: The secondary inverter can improve the quality of grid voltage and current by controlling the output waveform, thereby improving the stability and reliability of the grid;

[0013] 2. Higher efficiency: The secondary inverter can achieve efficient energy conversion, thereby reducing energy consumption and costs and improving system efficiency;

[0014] 3. Higher precision and controllability: The secondary inverter can precisely control the output power by controlling the frequency and amplitude of the output waveform to meet different application requirements;

[0015] 4. Higher adaptability: The secondary inverter can adapt to different grid and load conditions, thus achieving a wider range of applications and higher flexibility;

[0016] 5. Lower noise and vibration: The secondary inverter can control the frequency of the output waveform.

[0017] The IQ modulator has three key specifications: (1) frequency response across the entire bandwidth; (2) symmetry of the amplitude-frequency response between the two branches (IQ gain balance); and (3) orthogonality of the two LO signals.

[0018] In view of the above content, combined with existing technologies, the two methods have the following technical risks:

[0019] (1) The frequency response of the IQ modulator includes amplitude-frequency response and phase-frequency response. For an ideal linear time-invariant system (LTI), the amplitude-frequency response is flat and the phase-frequency response is linear, so the signal can be transmitted without distortion. Therefore, improving the linear frequency response places high demands on the peripheral circuits and other indicators of the entire system. There are also requirements for the amplitude-frequency symmetry between the two branches of the IQ modulator. If the frequency responses of the two branches are different, it will cause IQ unbalanced transmission. When a signal with a center frequency different from the IQ modulator LO frequency is generated, the image component suppression effect will deteriorate. Therefore, it is necessary to control the amplitude-frequency characteristic difference between the IQ modulator branches. This requires attention to the balance design between channels during design. The orthogonality of the LO of the two mixers will also affect the image suppression capability. If it is completely orthogonal, it will not affect the image suppression capability. When it deviates from orthogonality, the image component will be enhanced.

[0020] Therefore, if the characteristics of the IQ modulator are not ideal, the modulation quality of the signal will inevitably be affected. However, this can be compensated by pre-distortion at the source, thereby improving the signal quality.

[0021] (2) High cost of secondary frequency conversion system: The secondary frequency converter requires additional power electronic devices, control circuits, and sensors, which are expensive and increase the total cost of the system. High system complexity: The secondary frequency converter needs to implement multi-level conversion, which requires more control circuits and algorithms, increasing the complexity and design difficulty of the system. Requires more control strategies: The secondary frequency converter needs to implement multi-level conversion and coordinate multiple control strategies, which increases the difficulty of system control. Summary of the Invention

[0022] The object of the present invention is to overcome the deficiencies of the prior art and provide a quantum measurement and control system control system based on RFSOC, comprising an RFSOC chip, wherein the RFSOC chip is respectively integrated with:

[0023] Digital-to-analog conversion module, including 8-channel 6.5GS / s digital-to-analog converters;

[0024] Analog-to-digital conversion module, including 8-channel 4GS / s analog-to-digital converters;

[0025] An RF input module, connected to the analog-to-digital conversion module, includes an RF input channel and a first signal conditioning circuit;

[0026] The RF output module is connected to the digital-to-analog conversion module and includes an RF output channel and a second signal conditioning circuit;

[0027] The digital-to-analog converter and the analog-to-digital converter are respectively connected to a configurable IQ digital up / down converter, a digitally controlled oscillator, a gain matrix and a decimation / interpolation filter.

[0028] Furthermore, the RF output module includes a radio frequency switch, a first frequency band RF filter group, a second frequency band RF filter group, a third frequency band filter group, a first digital step attenuator, a first radio frequency amplifier, a second digital step attenuator, a first attenuator, a second radio frequency amplifier, an equalizer, a second attenuator, a third radio frequency amplifier and a first RF filter, wherein the control end of the radio frequency switch is respectively connected to the first frequency band RF filter group, the second frequency band RF filter group and the third frequency band RF filter group, the output end of the radio frequency switch is connected to the input end of the first digital step attenuator, the output end of the first digital step attenuator is connected to the input end of the first radio frequency amplifier, the output end of the first radio frequency amplifier is connected to the input end of the second digital step attenuator, the output end of the second digital step attenuator is connected to the input end of the first attenuator, the output end of the first attenuator is connected to the input end of the second radio frequency amplifier, the output end of the second radio frequency amplifier is connected to the input end of the equalizer, the output end of the equalizer is connected to the input end of the second attenuator, the output end of the second attenuator is connected to the input end of the third radio frequency amplifier, and the output end of the third radio frequency amplifier is connected to the input end of the first RF filter.

[0029] Furthermore, the first RF filter is specifically a bandpass filter composed of two groups of low-pass filters and high-pass filters.

[0030] Furthermore, the first frequency band RF filter group includes a low-pass filter with a cutoff frequency of 5500 MHz and a high-pass filter with a cutoff frequency of 3800 MHz connected in sequence; the second frequency band RF filter group includes a low-pass filter with a cutoff frequency of 6700 MHz and a high-pass filter with a cutoff frequency of 4600 MHz connected in sequence; and the third frequency band RF filter group includes a low-pass filter with a cutoff frequency of 7200 MHz and a high-pass filter with a cutoff frequency of 5500 MHz connected in sequence.

[0031] Furthermore, the RF input module includes a third attenuator, a fourth RF amplifier, a fourth attenuator, a first amplifier, a fifth attenuator, a second amplifier, an equalizer, a fifth RF amplifier and a second RF filter, wherein the output end of the third attenuator is connected to the input end of the fourth RF amplifier, the output end of the fourth RF amplifier is connected to the input end of the fourth attenuator, the output end of the fourth attenuator is connected to the input end of the first amplifier, the output end of the first amplifier is connected to the input end of the fifth attenuator, the output end of the fifth attenuator is connected to the input end of the second amplifier, the output end of the second amplifier is connected to the input end of the equalizer, the output end of the equalizer is connected to the input end of the fifth RF amplifier, and the output end of the fifth RF amplifier is connected to the input end of the second RF filter.

[0032] Furthermore, the RFSOC chip is also integrated with an ARM processing module, which includes at least one ARM processor for running the Linux kernel and the PYNQ software library.

[0033] The present invention leverages the advantages of the highly integrated RFSOC FPGA. The RFSOC chip integrates eight 6.5GS / s digital-to-analog converters (DACs) and eight 4GS / s analog-to-digital converters (ADCs). Both the DAC and ADC modules include configurable I / Q digital up / down conversion, an integrated numerically controlled oscillator (NCO), a gain matrix, and decimation / interpolation filters, enabling easy integration into logic via an AXI interface. Furthermore, the present invention adds signal conditioning circuitry to the DAC and ADC outputs to achieve fine power adjustment. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 Develop a system function block diagram for a quantum measurement and control system based on RFSOC;

[0035] Figure 2 This is a circuit block diagram of the RF output channel of a quantum measurement and control system based on RFSOC;

[0036] Figure 3 This is a circuit block diagram of the RF input channel of a quantum measurement and control system based on RFSOC;

[0037] Figure 4 This is a hardware system block diagram of a quantum measurement and control system based on RFSOC;

[0038] Figure 5 This is a software development block diagram for a quantum measurement and control system based on RFSOC;

[0039] Figure 6 This is a block diagram of the chip internal structure of a quantum measurement and control system control system based on RFSOC. DETAILED DESCRIPTION

[0040] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings, but the protection scope of the present invention is not limited to the following.

[0041] In order to make the objectives, technical solutions, and advantages of the present invention more clearly understood, the present invention is further described in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present invention and are not intended to limit the present invention. That is, the embodiments described herein are only some embodiments of the present invention, not all embodiments. Generally, the components of the embodiments of the present invention described and illustrated in the drawings herein may be arranged and designed in various different configurations.

[0042] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making any creative work shall fall within the scope of protection of the present invention. It should be noted that relational terms such as "first" and "second" are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations.

[0043] Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not preclude the presence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0044] The features and performance of the present invention are further described in detail below with reference to the embodiments.

[0045] A quantum measurement and control system based on RFSOC, including an RFSOC chip, wherein the XCZU47DR chip is respectively integrated with:

[0046] Digital-to-analog conversion module, including 8-channel 6.5GS / s digital-to-analog converters;

[0047] Analog-to-digital conversion module, including 8-channel 4GS / s analog-to-digital converters;

[0048] An RF input module, connected to the analog-to-digital conversion module, includes an RF input channel and a first signal conditioning circuit;

[0049] The RF output module is connected to the digital-to-analog conversion module and includes an RF output channel and a second signal conditioning circuit;

[0050] The digital-to-analog converter and analog-to-digital converter are respectively connected to configurable IQ digital up / down conversion, a numerically controlled oscillator, a gain matrix, and decimation / interpolation filters. The RF_SOC signal processing system leverages the highly integrated RFSoC FPGA. The chip integrates eight 6.5GS / s digital-to-analog converters (DACs) and eight 4GS / s analog-to-digital converters (ADCs). Both the DAC and ADC modules include configurable IQ digital up / down conversion, an integrated numerically controlled oscillator (NCO), a gain matrix, and decimation / interpolation filters, enabling easy integration into the logic via an AXI interface. The RFSoC also integrates multiple different ARM processors, capable of running various software, such as the Linux kernel and the PYNQ software library. Traditional commercial qubit controllers typically have an analog bandwidth of less than 1GHz, requiring analog mixers for upconversion of RF qubit control pulses (typically 4-6GHz). In contrast, the chip proposed in this paper can directly synthesize control pulses with carrier frequencies up to 3GHz within the first Nyquist zone and up to 6GHz within the second Nyquist zone. This eliminates mixer spurs and eliminates the need to calibrate IQ mixer offset and gain.

[0051] It should be noted that I / Q refers to the In-phase and Quadrature-phase, i.e., the two channels in quadrature upconversion, corresponding to the real and imaginary components of the signal, respectively. In digital signal processing, I / Q channels are often used for signal modulation, demodulation, and processing. The DAC mentioned in this article refers to a digital-to-analog converter, which is used to convert digital signals into analog signals. Since a 1.75 GHz output bandwidth is required and there are few high-speed DAC chips available on the market, two DAC chips are used to output the I / Q channels, respectively. These are then combined using an IQ modulator to produce a signal with a bandwidth of 1 GHz. This signal is then processed through IQ quadrature upconversion technology, where the I / Q channels are multiplied by sine and cosine signals, resulting in an output signal with a bandwidth of 4 GHz to 7.5 GHz. Specifically, this article describes a method for combining signals using two DAC chips using IQ quadrature upconversion technology to produce a high-bandwidth signal output in the 4 GHz to 7.5 GHz range. More specifically, the implementation process of this solution is as follows: First, two DAC chips are used to output I / Q channels, each with a bandwidth of 1 GHz. Then, an IQ modulator is used to combine the I / Q channels into a single signal, also with a bandwidth of 1 GHz. Finally, using IQ quadrature upconversion technology, the 1 GHz signal is multiplied by the sine and cosine signals, resulting in an output signal with a bandwidth of 4 GHz to 7.5 GHz. This solution solves the problem of high-bandwidth signal output, but it also involves certain technical difficulties and costs. It is important to note that using IQ quadrature upconversion technology can double the signal frequency bandwidth, so factors such as the signal sampling frequency and DAC conversion rate must be considered during design to ensure signal quality and stability. Furthermore, since DAC performance and parameters affect the quality of the output signal, high-performance DAC chips must be selected and precisely calibrated and debugged. Furthermore, the design and implementation of the IQ modulator and quadrature upconverter must also consider factors such as phase error and amplitude distortion to ensure signal accuracy and stability. Taking all factors into consideration, comprehensive system design and optimization are required to achieve stable output of high-bandwidth signals. The system function development is as follows: Figure 1 shown.

[0052] Further, such as Figure 2As shown, the RF output module includes a radio frequency switch, a first frequency band RF filter group, a second frequency band RF filter group, a third frequency band filter group, a first digital step attenuator, a first radio frequency amplifier, a second digital step attenuator, a first attenuator, a second radio frequency amplifier, an equalizer, a second attenuator, a third radio frequency amplifier and a first RF filter, wherein the control end of the radio frequency switch is respectively connected to the first frequency band RF filter group, the second frequency band RF filter group and the third frequency band RF filter group, the output end of the radio frequency switch is connected to the input end of the first digital step attenuator, the output end of the first digital step attenuator is connected to the input end of the first radio frequency amplifier, the output end of the first radio frequency amplifier is connected to the input end of the second digital step attenuator, the output end of the second digital step attenuator is connected to the input end of the first attenuator, the output end of the first attenuator is connected to the input end of the second radio frequency amplifier, the output end of the second radio frequency amplifier is connected to the input end of the equalizer, the output end of the equalizer is connected to the input end of the second attenuator, the output end of the second attenuator is connected to the input end of the third radio frequency amplifier, and the output end of the third radio frequency amplifier is connected to the input end of the first RF filter.

[0053] Furthermore, the first RF filter is specifically a bandpass filter composed of two groups of low-pass filters and high-pass filters.

[0054] Furthermore, the first frequency band RF filter group includes a low-pass filter with a cutoff frequency of 5500 MHz and a high-pass filter with a cutoff frequency of 3800 MHz connected in sequence; the second frequency band RF filter group includes a low-pass filter with a cutoff frequency of 6700 MHz and a high-pass filter with a cutoff frequency of 4600 MHz connected in sequence; and the third frequency band RF filter group includes a low-pass filter with a cutoff frequency of 7200 MHz and a high-pass filter with a cutoff frequency of 5500 MHz connected in sequence.

[0055] Specifically, this embodiment requires a frequency range of 4 GHz ≤ f ≤ 8 GHz, which is divided into three frequency bands for processing: 4-6 GHz, 5-7 GHz, and 6-8 GHz. Band selection is performed using an RF switch. Furthermore, no special processing is performed within the channel for phase noise and power stability. Furthermore, two low-pass and high-pass filters are added to the link output to form a bandpass filter to filter out waveforms in other Nyquist zones and other frequency bands.

[0056] Preferably, the HFCN 3800+ is used as the high-pass filter for the first-band RF filter group in this application. The HFCN 3800+ is a high-frequency filter designed to filter high-frequency noise and interference signals. It effectively filters signals with frequencies above 3.8 GHz and is suitable for wireless communications, radar, satellite communications, and other fields. The HFCN 3800+ offers both high-pass and low-pass filter types, allowing for selection of different filtering modes. It features high transparency, low insertion loss, and a high attenuation rate, improving the system's signal-to-noise ratio and anti-interference capabilities.

[0057] Preferably, the HFCN 4600+ is used as the high-pass filter for the second-band RF filter group in this application. The HFCN 4600+ is a high-frequency filter designed to filter high-frequency noise and interference signals. It effectively filters signals with frequencies above 4.6 GHz and is suitable for wireless communications, radar, satellite communications, and other fields. The HFCN 4600+ offers both high-pass and low-pass filter types, allowing for selection of different filtering modes. It features high transparency, low insertion loss, and a high attenuation rate, improving the system's signal-to-noise ratio and anti-interference capabilities.

[0058] Preferably, the HFCN 5500+ is used as the high-pass filter for the third-band RF filter group in this application. The HFCN 5500+ is a high-frequency filter designed to filter high-frequency noise and interference signals. It effectively filters signals with frequencies above 5.5 GHz and is suitable for wireless communications, radar, satellite communications, and other fields. The HFCN 5500+ offers both high-pass and low-pass filter types, allowing for selection of different filtering modes. It features high transparency, low insertion loss, and a high attenuation rate, improving the system's signal-to-noise ratio and anti-interference capabilities.

[0059] Preferably, the present application adopts LFCN 5500 as the low-pass filter of the first frequency band RF filter group, wherein LFCN 5500 is a low-pass filter for filtering signals with frequencies below 5.5 GHz. It is suitable for wireless communications, radar, satellite communications and other fields, and can filter out low-frequency noise and interference signals, thereby improving the system's signal-to-noise ratio and anti-interference capability. LFCN 5500 has the characteristics of low insertion loss, high permeability, and high attenuation rate, and can effectively filter and ensure signal quality. It is usually used at the signal receiving end to prevent high-frequency signals from entering the low-frequency circuit and affecting the stability and performance of the system.

[0060] Preferably, the present application adopts LFCN 6700+ as the low-pass filter of the second-band RF filter group, wherein LFCN 6700+ is a low-pass filter for filtering signals with frequencies below 6.7 GHz. It is suitable for wireless communications, radar, satellite communications and other fields, and can filter out low-frequency noise and interference signals, improving the system's signal-to-noise ratio and anti-interference capability. LFCN 6700+ has the characteristics of low insertion loss, high permeability, and high attenuation rate, and can effectively filter and ensure signal quality. It is usually used at the signal receiving end to prevent high-frequency signals from entering the low-frequency circuit and affecting the stability and performance of the system.

[0061] Preferably, the present application adopts LFCN 7200+ as the low-pass filter of the third-band RF filter group, wherein LFCN 7200+ is a low-pass filter for filtering signals with frequencies below 7.2GHz. It is suitable for wireless communications, radar, satellite communications and other fields, and can filter out low-frequency noise and interference signals, thereby improving the system's signal-to-noise ratio and anti-interference capability. LFCN 7200+ has the characteristics of low insertion loss, high permeability, and high attenuation rate, and can effectively filter and ensure signal quality. It is usually used at the signal receiving end to prevent high-frequency signals from entering the low-frequency circuit and affecting the stability and performance of the system.

[0062] Further, such as Figure 3 As shown, the RF input module includes a third attenuator, a fourth RF amplifier, a fourth attenuator, a first amplifier, a fifth attenuator, a second amplifier, an equalizer, a fifth RF amplifier and a second RF filter, wherein the output end of the third attenuator is connected to the input end of the fourth RF amplifier, the output end of the fourth RF amplifier is connected to the input end of the fourth attenuator, the output end of the fourth attenuator is connected to the input end of the first amplifier, the output end of the first amplifier is connected to the input end of the fifth attenuator, the output end of the fifth attenuator is connected to the input end of the second amplifier, the output end of the second amplifier is connected to the input end of the equalizer, the output end of the equalizer is connected to the input end of the fifth RF amplifier, and the output end of the fifth RF amplifier is connected to the input end of the second RF filter.

[0063] Specifically, this embodiment requires a frequency range of 0.1 GHz ≤ f ≤ 2 GHz, an input power range of -50 dBm to +10 dBm, and a power input to the FPGA of 1 dBm. The maximum input power requirement of 10 dBm is met within the channel, which is met by a two-stage attenuator (-31.5 dBm and -31.5 dBm, for a total of 60 dBm). The -50dBm link channel pre-stage adjustable attenuator is calculated, with an insertion loss of 2dB. At this moment, the link is -52dBm. After passing through the LNA, it is amplified by 15dB. At this moment, the link is -52+15=-37dBm. After passing through the fixed attenuator of 3dB, the link is -40dBm. After passing through the amplifier again, it is amplified by 20dBm. At this moment, the link is -20dBm. After passing through the adjustable attenuator again, the insertion loss is -2dBm. At this moment, the link is -22dBm. After passing through the first-stage amplifier, it is amplified by 20dBm. At this moment, the link is -2dBm. After passing through the first-stage equalizer, the insertion loss is -7dBm. At this moment, the link is -9dBm. After passing through the first-stage LNA again, it is amplified by 15dB. At this moment, the link is +6dBm. After passing through the first-stage low-pass filter, the final link is +5dBm, meeting the index requirement of +10dBm.

[0064] Furthermore, the RFSOC chip is also integrated with an ARM processing module, which includes at least one ARM processor for running the Linux kernel and the PYNQ software library.

[0065] Furthermore, as a preferred specific implementation scheme of this embodiment, a hardware development system for a quantum measurement and control system based on RFSOC is proposed, such as Figure 4 As shown, the entire measurement and control system is divided into two types of equipment according to the system functions: signal processing functional units, including three discrete units such as waveform processing and generation units, acquisition and analysis units, and analog outputs. In order to shorten the development cycle and reduce development risks, the chip peripheral circuits are developed in the form of core boards and baseboards. The waveform transmits the waveform data to the ZU47DR chip through the 10 Gigabit network card on the baseboard. The ZU47DR chip processes the data and sends the differential analog signal to the front-end balun board through a high-speed connector. In order to obtain a high-quality clock system, the clock system is placed separately on a clock board. The system block diagram it developed is shown below. Figure 3 .

[0066] Furthermore, as a preferred specific implementation plan of this embodiment, a software development process of a quantum measurement and control system based on RFSOC is proposed. The overall architecture of the RF_SOC undersampling system is as follows: Figure 5As shown in the figure below. Users use the self-developed RF_SOC undersampling Python API (top level) to run qubit experiments. These experiments are sent to the RFSoC (second level) and translated into FPGA-level instructions. The signals generated by the RFSoC are further processed by the self-developed RF_SOC undersampling RF board (third level) and finally sent to the qubits (bottom level). The qubit measurements are then returned to the user via the Python API in reverse order. The detailed development process is shown in the figure below. The core purpose is to simplify the development process and improve programming efficiency.

[0067] Furthermore, as a preferred specific implementation scheme of this embodiment, this scheme also includes an RF_SOC undersampling system functional module, whose functions are divided into a processor system (PS) and a programmable logic (PL), such as Figure 6 As shown in the figure, the PS portion of this UltraScale+ device is a Zynq system with DDR4, running the Linux operating system on a multi-core ARM processor. The PS uses the Pynq library and driver to implement DMA access to the PL. The user interface is a Jupyter notebook accessed via a remote web browser. The PL firmware primarily consists of a signal generation module, a reading module, and a timed-processor module to implement time-critical functions. Data flow between the PS and PL is implemented via an AXI interface, with fast data transfer implemented by the PL's DMA logic.

[0068] Furthermore, as a preferred implementation of this embodiment, to address multi-channel synchronization, both the ADC and DAC are integrated within the chip. Because the converter is a single, consistently aligned tile when the RF Data Converter is powered on, deterministic latency cannot be guaranteed. In a multi-tile system, deterministic latency cannot be guaranteed between tiles, and even latency alignment cannot be guaranteed. This requires a mechanism to align these tiles. This is implemented within the IP, managed by API calls in the software driver, and synchronization is ensured by ensuring acquisition clock skew, ensuring that all dividers are reset synchronously, and thus determining the phase of the tile PLL divider.

[0069] The foregoing description is merely a preferred embodiment of the present invention. It should be understood that the present invention is not limited to the form disclosed herein and should not be construed as excluding other embodiments. Rather, the present invention can be used in various other combinations, modifications, and environments and can be modified within the scope of the concept described herein through the above teachings or techniques or knowledge in the relevant field. Modifications and variations made by those skilled in the art that do not depart from the spirit and scope of the present invention are intended to be protected by the appended claims.

Claims

1. A quantum measurement and control system based on RFSOC, comprising an RFSOC chip, characterized in that: The RFSOC chips are respectively integrated with: Digital-to-analog conversion module, including 8-channel 6.5GS / s digital-to-analog converters; Analog-to-digital conversion module, including 8-channel 4GS / s analog-to-digital converters; RF input module, connected to the analog-to-digital conversion module; RF output module, connected to the digital-to-analog conversion module; The digital-to-analog converter and the analog-to-digital converter are respectively connected to a configurable IQ digital up / down converter, a digitally controlled oscillator, a gain matrix, and a decimation / interpolation filter; The RF output module includes a radio frequency switch, a first frequency band RF filter group, a second frequency band RF filter group, a third frequency band RF filter group, a first digital step attenuator, a first radio frequency amplifier, a second digital step attenuator, a first attenuator, a second radio frequency amplifier, an equalizer, a second attenuator, a third radio frequency amplifier and a first RF filter, wherein the control end of the radio frequency switch is connected to the first frequency band RF filter group, the second frequency band RF filter group and the third frequency band RF filter group respectively, the output end of the radio frequency switch is connected to the input end of the first digital step attenuator, the output end of the first digital step attenuator is connected to the input end of the first radio frequency amplifier, the output end of the first radio frequency amplifier is connected to the input end of the second digital step attenuator, the output end of the second digital step attenuator is connected to the input end of the first attenuator, the output end of the first attenuator is connected to the input end of the second radio frequency amplifier, the output end of the second radio frequency amplifier is connected to the input end of the equalizer, the output end of the equalizer is connected to the input end of the second attenuator, the output end of the second attenuator is connected to the input end of the third radio frequency amplifier, and the output end of the third radio frequency amplifier is connected to the input end of the first RF filter; The RF input module includes a third attenuator, a fourth RF amplifier, a fourth attenuator, a first amplifier, a fifth attenuator, a second amplifier, an equalizer, a fifth RF amplifier and a second RF filter, wherein the output end of the third attenuator is connected to the input end of the fourth RF amplifier, the output end of the fourth RF amplifier is connected to the input end of the fourth attenuator, the output end of the fourth attenuator is connected to the input end of the first amplifier, the output end of the first amplifier is connected to the input end of the fifth attenuator, the output end of the fifth attenuator is connected to the input end of the second amplifier, the output end of the second amplifier is connected to the input end of the equalizer, the output end of the equalizer is connected to the input end of the fifth RF amplifier, and the output end of the fifth RF amplifier is connected to the input end of the second RF filter; The system includes a software-driven synchronization control mechanism, which manages the acquisition clock deviation of the analog-to-digital converter and the digital-to-analog converter tiles in the RFSoC chip, and aligns the delay between each tile in conjunction with the synchronous reset of the divider.

2. A quantum measurement and control system based on RFSOC as claimed in claim 1, characterized in that: The first RF filter is specifically a bandpass filter composed of two groups of low-pass filters and high-pass filters.

3. A quantum measurement and control system based on RFSOC as claimed in claim 1, characterized in that: The first frequency band RF filter group includes a low-pass filter with a cutoff frequency of 5500 MHz and a high-pass filter with a cutoff frequency of 3800 MHz connected in sequence; the second frequency band RF filter group includes a low-pass filter with a cutoff frequency of 6700 MHz and a high-pass filter with a cutoff frequency of 4600 MHz connected in sequence; the third frequency band RF filter group includes a low-pass filter with a cutoff frequency of 7200 MHz and a high-pass filter with a cutoff frequency of 5500 MHz connected in sequence.

4. A quantum measurement and control system based on RFSOC as claimed in claim 1, characterized in that: The RFSOC chip is also integrated with an ARM processing module, which includes at least one ARM processor for running the Linux kernel and the PYNQ software library.

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