A video synchronous display method and device, equipment and medium

Abstract

A video synchronous display method, device, equipment and medium are disclosed. The method is executed by a first chip, the first chip is a screen casting end, and the first chip receives screen casting data and a screen casting instruction sent by a second chip as a screen casting end. The method comprises the following steps: when a pause screen casting instruction sent by the screen casting end is received, a video frame number value of a video frame sequence to which a current starting frame belongs is analyzed; a current to-be-decoded frame number is determined according to a current decoded frame number of the video frame sequence and the video frame number value; to-be-decoded video frame information is determined according to the current to-be-decoded frame number and final video frame information that has been received; the to-be-decoded video frame information is transmitted to a decoder, and a target picture fed back by the decoder with respect to the to-be-decoded video information is displayed. The consumption of cpu resources and VPU is reduced, the synchronism of video display at two ends of a cross system is realized, and the quick response of the screen casting end when the screen casting end resumes playing is realized.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a video synchronous display method, device, equipment and medium. BACKGROUND

[0002] With the development of the automobile industry, many cars now have multiple display screens. The front row has a central control display screen, and the rear row also has a corresponding entertainment display screen. At the same time, the front and rear screens can share the display content of some APPs, such as movie videos that can be projected from the front row display screen to the rear row display screen for viewing together. This involves sharing APP content, which requires both screens to display the same content simultaneously. For the same display solution, there is video transmission within the same operating system (OS), which is relatively simple to implement. Directly, it can be implemented by grabbing and pasting pictures within the same OS.

[0003] When projecting across chips and systems, several processes such as image data grabbing, encoding, transmission, decoding, and display are involved. In the scenario of sharing a movie for display on other screens, when the user clicks the video pause operation on the projection end, the decoder is notified to end the current decoding, and the decoder is required to decode and display the remaining buffered frames.

[0004] However, due to the sequence frame decoding rules required by the decoder of the projected screen system, there will be a certain amount of video frame data cached in the decoder during decoding, which will eventually result in different displays on both the projection end and the projected screen in the pause state. In addition, the decoder needs to be reinitialized when the pause is resumed, which consumes vpu and cpu resources. Since the decoder initialization requires time, the display effect of the projected screen will appear to be lagging. SUMMARY

[0005] The present application provides a video synchronous display method, device, equipment and medium to realize the synchronous display of videos across systems at the pause state.

[0006] According to a first aspect of the present application, a video synchronous display method is provided, which is executed by a first chip as a projected screen and receives projection data and projection instructions sent by a second chip as a projection end. The method comprises:

[0007] When receiving the pause projection instruction sent by the projection end, the video frame number value of the video frame sequence to which the current starting frame belongs is parsed;

[0008] According to the current decoded frame number of the video frame sequence determined and the video frame number value, the current to-be-decoded frame number is determined;

[0009] determine to-be-decoded video frame information according to the current to-be-decoded frame number and received final video frame information, wherein the final video frame information is generated by the screen projection end after encoding video data corresponding to the pause picture;

[0010] display the target picture fed back by the decoder relative to the to-be-decoded video information, wherein the target picture is the same as the pause picture.

[0011] According to a second aspect of the present application, a video synchronous display device is provided, comprising:

[0012] a numerical analysis module configured to analyze a video frame number value of a video frame sequence to which a current first frame belongs when receiving a pause screen projection instruction sent by the screen projection end;

[0013] a frame number determination module configured to determine a current to-be-decoded frame number according to the current decoded frame number of the video frame sequence and the video frame number value;

[0014] an information determination module configured to determine to-be-decoded video frame information according to the current to-be-decoded frame number and received final video frame information, wherein the final video frame information is generated by the screen projection end after encoding video data corresponding to the pause picture;

[0015] a picture display module configured to transmit the to-be-decoded video frame information to a decoder and display a target picture fed back by the decoder relative to the to-be-decoded video information, wherein the target picture is the same as the pause picture.

[0016] According to a third aspect of the present application, an electronic device is provided, comprising:

[0017] at least one processor; and

[0018] a memory in communication connection with the at least one processor; wherein

[0019] the memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor to enable the at least one processor to execute the video synchronous display method according to any one of the embodiments of the present application.

[0020] According to a fourth aspect of the present application, a computer readable storage medium is provided, which stores computer instructions for enabling a processor to execute the video synchronous display method according to any one of the embodiments of the present application.

[0021] The technical scheme of the embodiment of the application is executed by a first chip, the first chip is a screen casting end, and the first chip receives screen casting data and screen casting instructions sent by a second chip as a screen casting end. The method comprises the following steps: when a pause screen casting instruction sent by the screen casting end is received, a video frame number value of a video frame sequence to which a current first frame belongs is analyzed; a current to-be-decoded frame number is determined according to a current decoded frame number of the video frame sequence and the video frame number value; to-be-decoded video frame information is determined according to the current to-be-decoded frame number and the final received video frame information; the to-be-decoded video frame information is transmitted to a decoder, and a target picture fed back by the decoder with respect to the to-be-decoded video frame information is displayed. The synchronization of video display at two ends of a cross-system is realized on the principle of relatively small cpu resource consumption and VPU consumption, and the fast response of the screen casting end to the recovery of the screen casting end is realized.

[0022] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the application, nor is it used to limit the scope of the application. Other features of the application will become apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the application, the following will briefly introduce the drawings needed to be used in the embodiments. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative effort on the basis of these drawings.

[0024] Figure 1 is a flow chart of a video synchronous display method provided by the first embodiment of the application;

[0025] Figure 2 is a flow chart of a video synchronous display method provided by the second embodiment of the application;

[0026] Figure 3 is an example flow chart of a video synchronous display method provided by the second embodiment of the application

[0027] Figure 4 is a structural schematic diagram of a video synchronous display device provided by the third embodiment of the application;

[0028] Figure 5 is a structural schematic diagram of an electronic device for implementing the embodiment of the application. DETAILED DESCRIPTION

[0029] In the following, the technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application in order to make the technical personnel in the technical field better understand the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all the other embodiments obtained by the ordinary technical personnel in the technical field without creative labor should belong to the protection scope of the present application.

[0030] It should be noted that the terms "first", "second" and the like in the description and claims of the present application and the above drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in other than the order illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device that includes a list of steps or units need not be limited to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to such processes, methods, products or devices.

[0031] Embodiment one

[0032] Figure 1 A flowchart of a video synchronous display method is provided for the first embodiment of the present application. The present embodiment can be applied to the cross-system screen projection. The method can be executed by a video synchronous display device in a first chip. The first chip is the screen projection receiving end and receives the screen projection data and screen projection instruction sent by a second chip as the screen projection end. The video synchronous display device can be realized in the form of hardware and / or software. The video synchronous display device can be configured in the first chip of an electronic device. As shown in the figure, the method comprises: Figure 1

[0033] S110, when receiving the pause screen projection instruction sent by the screen projection end, parsing the video frame number value of the video frame sequence to which the current starting frame belongs.

[0034] ​In the embodiment, the pause screen projection instruction can be understood as an instruction sent by the screen projection end for pausing the playing video, such as when the user of the screen projection end clicks the pause button, the screen projection end sends the pause screen projection instruction to the projected end. The video frame sequence can be understood as a group of pictures (GOP). In the decoding process of the decoder (such as H264), it is a complete video frame group, which must be able to be completely played and displayed. This information is contained in the I frame at the beginning of the H264 video frame. When the decoder is working, it must decode a complete video frame sequence according to the information provided by the GOP. If the number of decoder frames does not meet the requirement of the number of GOP sequence frames, the H264 decoder will pause the current sequence frame decoding. The current starting frame can be understood as a video frame using intra-frame compression, which can be decoded into a complete picture alone. An I frame is the starting frame of a GOP sequence frame. The video frame number value can be understood as the number of all video frames in the video frame sequence.

[0035] The projected end belongs to a first operating system, and the screen projection end belongs to a second operating system, that is, belongs to two independent operating systems. The first operating system can be the same as the second operating system, such as both being the Android system.

[0036] Specifically, when the pause screen projection instruction sent by the screen projection end is received, the processor can obtain and analyze the video number value in the header of the current starting I frame, that is, the GOP value, which indicates that the video frame sequence to which the current starting frame belongs is composed of several video frames.

[0037] S120, determining the current to-be-decoded frame number according to the current decoded frame number of the video frame sequence and the video frame number value.

[0038] In the embodiment, the decoded frame number can be understood as the number of video frames in the video frame sequence that have been decoded at the time of pausing, which can be recorded each time the decoding is performed. The current to-be-decoded frame number can be understood as the number of video frames in the video frame sequence that have not been decoded.

[0039] Specifically, the processor can subtract the current decoded frame number of the video frame sequence from the video frame number value to determine the current to-be-decoded frame number.

[0040] S130, determining the to-be-decoded video frame information according to the current to-be-decoded frame number and the received final video frame information, wherein the final video frame information is generated by encoding the video data corresponding to the pause picture by the screen projection end.

[0041] In the embodiment, the final video frame information can be understood as the information generated by hardware encoding the final video data corresponding to the pause picture sent by the screen projection end at the time of pausing. The to-be-decoded video frame information can be understood as the video format used for decoding by the decoder.

[0042] It needs to be known that when decoding, the decoder judges whether the frame header sequence frame number in the to-be-decoded video frame information is consistent with the last decoded frame header sequence frame number by searching the frame header sequence frame number in the to-be-decoded video frame information, and the decoder is suspended when the frame header sequence frame number is consistent, and the to-be-decoded video frame information is decoded when the frame header sequence frame number is inconsistent.

[0043] Specifically, the processor can determine the number of times of modifying the frame header sequence frame number of the received final video frame information according to the current to-be-decoded frame number, so as to ensure that the frame header sequence frame number queried by the decoder each time is different from the last decoded frame header sequence frame number, and then generate to-be-decoded video frame information by modifying the frame header sequence frame number and the to-be-decoded final video frame, wherein the final video frame information is generated by the screen projection end after encoding the video data corresponding to the pause picture.

[0044] S140, transmitting the to-be-decoded video frame information to the decoder, and displaying the target picture fed back by the decoder relative to the to-be-decoded video information, wherein the target picture is the same as the pause picture.

[0045] In the embodiment, the target picture can be understood as a picture used for decoding and used for screen projection display.

[0046] Specifically, the processor can transmit the to-be-decoded video frame information to the decoder, and can receive the target picture fed back by the decoder relative to the to-be-decoded video information after the decoder decodes, and can project and display the target picture.

[0047] The technical scheme of the embodiment of the application is executed by the first chip, the first chip is the to-be-projected end, and receives the projection data and the projection instruction sent by the second chip as the projection end. The method comprises the following steps: when the pause projection instruction sent by the projection end is received, the video frame number value of the video frame sequence to which the current starting frame belongs is analyzed; the current to-be-decoded frame number is determined according to the current decoded frame number of the video frame sequence determined and the video frame number value; the to-be-decoded video frame information is determined according to the current to-be-decoded frame number and the received final video frame information; and the to-be-decoded video frame information is transmitted to the decoder, and the target picture fed back by the decoder relative to the to-be-decoded video information is displayed. The synchronization of video display on both ends of the cross-system is realized on the principle of relatively small cpu resource consumption and VPU consumption, and the fast response of the to-be-projected end when the projection end resumes playing is realized.

[0048] As a first optional embodiment of the application, on the basis of the above-mentioned embodiment, after the to-be-decoded video frame information is transmitted to the decoder and the target picture fed back by the decoder relative to the to-be-decoded video information is displayed, the following optimization can be further included:

[0049] Update the current decoded frame number based on the to-be-decoded video frame information to obtain an updated current decoded frame number.

[0050] Specifically, the processor can query whether the to-be-decoded video frame information is an end-decoding instruction. If yes, the number of video frames that have been decoded is equal to the number of video frames in the video frame sequence, and the decoded frame number is not updated. If no, the current decoded frame number is incremented by one to obtain the updated current decoded frame number.

[0051] As a first optional embodiment of the present application, the above embodiments can be further optimized to include:

[0052] When the continue-screening instruction is received, the to-be-displayed picture is determined according to the received to-be-screened data, and the to-be-displayed picture is displayed.

[0053] In the present embodiment, the continue-screening instruction can be understood as an instruction for continuing to play. For example, when the user of the screening end clicks the continue-playing button, the continue-screening instruction is generated and sent to the screened end. The to-be-screened data can be understood as data used for screening by the screening end. The to-be-displayed picture can be understood as decoded display picture data.

[0054] Specifically, when the processor receives the continue-screening instruction, the number of video frames in the video frame sequence to which the current starting frame belongs can be determined according to the received to-be-screened data, the decoded frame number is recorded again, and the to-be-screened data is converted into a form that can be decoded by the decoder and transmitted to the decoder. The to-be-displayed picture data decoded by the decoder is received, and the to-be-displayed picture is played to realize synchronized playing with the picture of the screening end.

[0055] Further, the step of determining the to-be-displayed picture according to the received to-be-screened data and displaying the to-be-displayed picture can be further optimized to include:

[0056] a1. Analyzing the number of target video frames in the target video frame sequence to which the to-be-screened data belongs.

[0057] In the present embodiment, the target video frame sequence can be understood as a video frame sequence corresponding to the to-be-screened data. The number of target video frames can be understood as a value reflecting the number of video frames included in the target video frame sequence.

[0058] Specifically, the processor can obtain and analyze the number of video frames in the header of the current starting frame I in the target video frame sequence to which the received to-be-screened data belongs, as the number of target video frames.

[0059] b1. Resetting the current decoded frame number of the target video frame sequence to obtain a reset current decoded frame number.

[0060] Specifically, the processor can reset the current decoded frame number of the target video frame sequence, i.e., clear and restart recording, to obtain the reset current decoded frame number.

[0061] c1. disassembling the to-be-screened data to form a to-be-decoded data packet.

[0062] Specifically, the processor can disassemble the to-be-screened data according to a preset rule, so as to obtain a to-be-decoded data packet in a format that can be decoded by the decoder.

[0063] d1. transmitting the to-be-decoded data packet to the decoder for decoding.

[0064] Specifically, the processor can transmit the to-be-decoded data packet to the decoder for decoding.

[0065] e1. receiving the to-be-displayed picture fed back by the decoder and displaying the to-be-displayed picture.

[0066] Specifically, the processor can receive the to-be-displayed picture fed back by the decoder and transmit the to-be-displayed picture to the corresponding display for screen display.

[0067] Embodiment Two

[0068] Figure 2 A flowchart of a video synchronous display method provided for the second embodiment of the application, the present embodiment is a further refinement based on the above-mentioned embodiment. As shown in the figure, the method comprises: Figure 2

[0069] S210. When a pause screen instruction sent by the screen casting end is received, the video frame number value of the video frame sequence to which the current starting frame belongs that has been received is analyzed.

[0070] S220. The current to-be-decoded frame number is determined according to the current decoded frame number of the video frame sequence that has been determined and in combination with the video frame number value.

[0071] S230. It is judged whether the current to-be-decoded frame number satisfies a decoding end condition.

[0072] In the present embodiment, the decoding end condition can be understood as a condition for whether the video frame sequence has been decoded completely.

[0073] Specifically, the processor can judge whether the current to-be-decoded frame number is greater than zero. If not, it means that the decoded frame number is consistent with the video frame number value, which corresponds to satisfying the decoding end condition. If yes, it means that the decoded frame number has not reached the video frame number value, and decoding needs to be continued.

[0074] S240. If yes, the end decoding instruction is taken as the to-be-decoded video frame information.

[0075] ​In the embodiment, the end-decoding instruction can be understood as an instruction for instructing the decoder to stop decoding.

[0076] Specifically, if the current number of frames to be decoded satisfies the end-decoding condition, the end-decoding instruction is taken as the video frame information to be decoded, so as to inform the decoder to stop decoding by means of the end-decoding instruction until the decoder resumes operation when the screen mirroring is continued.

[0077] S250, if not, updating the frame header sequence frame number of the final video frame information, and determining the video frame information to be decoded based on the updated frame header sequence frame number.

[0078] In the embodiment, the frame header sequence frame number can be understood as a sequence number of the final video frame in the video frame sequence.

[0079] Specifically, if the current number of frames to be decoded does not satisfy the end-decoding condition, the frame header sequence frame number of the final video frame information is updated, and the video frame information to be decoded is determined based on the updated frame header sequence frame number, so that the decoder can decode the final video frame information multiple times. For example, if the current number of frames to be decoded is 2, the frame header sequence frame number is updated twice, so that the number of decoded frames reaches the number of video frames, and it is ensured that the displayed picture after decoding is the picture corresponding to the final video frame.

[0080] Further, on the basis of the above embodiment, the step of updating the frame header sequence frame number of the final video frame information and determining the video frame information to be decoded based on the updated frame header sequence frame number can be further optimized as follows:

[0081] a2, extracting the frame header sequence frame number and the final video frame included in the final video frame information.

[0082] Specifically, the processor can extract the frame header sequence frame number and the final video frame from the final video frame information according to the type of data. If the final video frame information is extracted again, the frame header sequence frame number is the frame header sequence frame number updated last time.

[0083] b2, performing plus one processing on the frame header sequence frame number to obtain the updated frame header sequence frame number.

[0084] It should be noted that if the frame header sequence number is not updated, the decoder considers it as a repeated frame and directly discards it without decoding.

[0085] Specifically, the processor can perform plus one processing on the frame header sequence frame number to obtain the updated frame header sequence frame number.

[0086] c2, taking the final video frame and the updated frame header sequence number as the video frame information to be decoded.

[0087] Specifically, the processor can take the final video frame and the updated frame header sequence number as the to-be-decoded video frame information.

[0088] S260, the to-be-decoded video frame information is transmitted to the decoder, and the target picture fed back by the decoder relative to the to-be-decoded video information is displayed.

[0089] The video synchronous display method provided in the second embodiment comprises the following steps:

[0090] For the convenience of understanding the present scheme, a specific example is used for illustration, Figure 3 An example flow chart of the video synchronous display method provided in the second embodiment of the present application is shown in Figure 3

[0091] S1, when receiving the pause screen projection instruction sent by the screen projection end, the video frame number value of the video frame sequence to which the current starting frame belongs is parsed;

[0092] S2, the current to-be-decoded frame number is determined according to the current decoded frame number of the video frame sequence and the video frame number value;

[0093] S3, it is judged whether the current to-be-decoded frame number is greater than zero, if yes, the process is ended, if not, the process is transferred to step S4;

[0094] S4, the frame header sequence frame number of the final video frame information is modified to obtain the to-be-decoded video frame information;

[0095] S5, the to-be-decoded video frame information is transmitted to the decoder, and the target picture fed back by the decoder relative to the to-be-decoded video information is displayed;

[0096] S6, the current decoded frame number is updated, and the process is returned to step S2.

[0097] Embodiment three

[0098] ​Figure 4 A structural schematic diagram of a video synchronous display device provided for the third embodiment of the present application is shown in FIG. 4. As shown in the figure, the device comprises a value analysis module 41, a frame number determination module 42, an information determination module 43 and a picture display module 44. Among them, Figure 4

[0099] The value analysis module 41 is configured to analyze the video frame number value of the video frame sequence to which the current starting frame belongs when receiving the pause screen projection instruction sent by the screen projection end;

[0100] The frame number determination module 42 is configured to determine the current to-be-decoded frame number according to the current decoded frame number of the video frame sequence and the video frame number value;

[0101] The information determination module 43 is configured to determine the to-be-decoded video frame information according to the current to-be-decoded frame number and the final video frame information received, wherein the final video frame information is generated by the screen projection end after encoding the video data corresponding to the pause picture;

[0102] The picture display module 44 is configured to transmit the to-be-decoded video frame information to the decoder and display the target picture fed back by the decoder relative to the to-be-decoded video information, wherein the target picture is the same as the pause picture.

[0103] Among them, the screen projection end belongs to a first operating system, and the screen projection end belongs to a second operating system.

[0104] The technical solution of the embodiment of the present application is executed by the first chip, which serves as the screen projection end and receives the screen projection data and screen projection instruction sent by the second chip serving as the screen projection end. The method comprises the following steps: analyzing the video frame number value of the video frame sequence to which the current starting frame belongs when receiving the pause screen projection instruction sent by the screen projection end; determining the current to-be-decoded frame number according to the current decoded frame number of the video frame sequence and the video frame number value; determining the to-be-decoded video frame information according to the current to-be-decoded frame number and the final video frame information received; and transmitting the to-be-decoded video frame information to the decoder and displaying the target picture fed back by the decoder relative to the to-be-decoded video information. In the principle of relatively small cpu resource consumption and VPU consumption, the synchronization of video display on both ends of the cross system is realized, and the fast response of the screen projection end when the screen projection end resumes playing is realized.

[0105] Further, the information determination module 43 comprises:

[0106] A condition judgment unit is configured to judge whether the current to-be-decoded frame number meets the decoding end condition;

[0107] ​The first determining unit is configured to, if yes, take the end decoding instruction as the to-be-decoded video frame information.

[0108] The second determining unit is configured to, if no, update a frame header sequence frame number of the final video frame information, and determine the to-be-decoded video frame information based on the updated frame header sequence frame number.

[0109] Specifically, the second determining unit can be specifically configured to:

[0110] extract a frame header sequence frame number and a final video frame included in the final video frame information;

[0111] perform a plus one processing on the frame header sequence frame number to obtain an updated frame header sequence frame number;

[0112] take the final video frame and the updated frame header sequence number as the to-be-decoded video frame information.

[0113] Optionally, the apparatus further comprises a frame number updating module.

[0114] The frame number updating module is specifically configured to, after the to-be-decoded video frame information is transmitted to a decoder and a target picture fed back by the decoder relative to the to-be-decoded video information is displayed, update the current decoded frame number based on the to-be-decoded video frame information to obtain an updated current decoded frame number.

[0115] Optionally, the apparatus further comprises a screen projection display unit.

[0116] The screen projection display unit is configured to, when a continue screen projection instruction is received, determine a to-be-displayed picture according to received to-be-projected data and display the to-be-displayed picture.

[0117] Further, the screen projection display unit can be specifically configured to:

[0118] parse a target video frame number value of a target video frame sequence to which the to-be-projected data belongs;

[0119] reset a current decoded frame number of the target video frame sequence to obtain a reset current decoded frame number;

[0120] disassemble the to-be-projected data to form a to-be-decoded data packet;

[0121] transmit the to-be-decoded data packet to a decoder for decoding;

[0122] receive a to-be-displayed picture fed back by the decoder and display the to-be-displayed picture.

[0123] The video synchronous display device provided by the embodiment of the present application can execute the video synchronous display method provided by any embodiment of the present application, and has the function modules and beneficial effects corresponding to the execution method.

[0124] Embodiment Four

[0125] Figure 5 A structural schematic diagram of an electronic device 50 that can be used to implement embodiments of the present application is shown. The electronic device is intended to represent various forms of digital computers, such as laptops, desktops, tablets, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular telephones, smart phones, wearable devices (e.g., headsets, glasses, watches, etc.), and other similar computing devices. The components shown here, their connections and relationships, and their functions, are meant to be examples only, and are not meant to limit implementations of the present application described and / or claimed in this document.

[0126] As shown in Figure 5 The electronic device 50 includes at least one processor 51, and a memory, such as a read-only memory (ROM) 52, a random access memory (RAM) 53, etc., connected to the at least one processor 51 in communication, where the memory stores computer programs executable by the at least one processor. The processor 51 can perform various appropriate actions and processes according to the computer programs stored in the read-only memory (ROM) 52 or loaded from the storage unit 58 into the random access memory (RAM) 53. In the RAM 53, various programs and data required for the operation of the electronic device 50 can also be stored. The processor 51, the ROM 52, and the RAM 53 are connected to each other through a bus 54. An input / output (I / O) interface 55 is also connected to the bus 54.

[0127] A plurality of components in the electronic device 50 are connected to the I / O interface 55, including: an input unit 56, such as a keyboard, a mouse, etc.; an output unit 57, such as various types of displays, speakers, etc.; a storage unit 58, such as a magnetic disk, an optical disk, etc.; and a communication unit 59, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 59 allows the electronic device 50 to exchange information / data with other devices through a computer network, such as the Internet, and / or various telecommunications networks.

[0128] The processor 51 can be various general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the processor 51 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various specialized artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, and the like. The processor 51 performs various methods and processes described above, such as the video synchronous display method.

[0129] In some embodiments, the video synchronous display method can be implemented as a computer program tangibly embodied in a computer readable storage medium, such as the storage unit 58. In some embodiments, part or all of the computer program can be loaded and / or installed onto the electronic device 50 via the ROM 52 and / or the communication unit 59. When the computer program is loaded onto the RAM 53 and executed by the processor 51, one or more steps of the video synchronous display method described above can be performed. Alternatively, in other embodiments, the processor 51 can be configured to perform the video synchronous display method by any other suitable means, such as by means of firmware.

[0130] Various implementations of the systems and techniques described above can be realized in digital electronic circuitry, integrated circuitry, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a system on a chip (SOC), a programmable logic device (CPLD), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include implementation in one or more computer programs that are executable and / or interpretable on a programmable system including at least one programmable processor, which can be special or general purpose, coupled to receive data and instructions from, and to transmit data and instructions to, a storage system, at least one input device, and at least one output device.

[0131] Computer programs used to implement the methods of the present application can be written in any combination of one or more programming languages. These computer programs can be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the computer program, when executed by the processor of the machine, implements the functions / acts specified in the flowcharts and / or block diagrams. The computer program can be executed entirely on a machine, partially on a machine, partially on a machine as a stand-alone software package, partially on a machine and partially on a remote machine or entirely on a remote machine or server.

[0132] In the context of the present application, a computer-readable storage medium can be a tangible medium that can contain or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. A computer-readable storage medium can include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium can be a machine-readable signal medium. More specific examples of a machine-readable storage medium will include one or more lines of a program of instructions in a transitory signal, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0133] To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the electronic device. Other kinds of devices can be used to provide for interaction with a user as well; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form, including acoustic, speech, or tactile input.

[0134] The systems and techniques described here can be implemented in a computing system that includes a back end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front end component (e.g., a user computer having a graphical user interface or a Web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back end, middleware, or front end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0135] The computing system can include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system, to solve the defects of large management difficulty and weak business scalability in traditional physical host and VPS service.

[0136] It should be understood that the various forms of flow shown above can be reordered, added to, or have steps deleted. For example, the steps described in the present application can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solutions of the present application can be achieved, which are not limited herein.

[0137] The above detailed description does not constitute a limitation on the protection scope of the present application. Those skilled in the art should understand that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A method for synchronized video display, characterized in that, The method, executed by a first chip (which acts as the screen being projected onto) and receiving projection data and commands from a second chip (which acts as the projection end), includes: When a pause screen mirroring command is received from the screen mirroring terminal, the number of video frames in the video frame sequence to which the current starting frame belongs is parsed; the starting frame is an I-frame, and the video frame sequence is a group of pictures (GOP). The number of frames to be decoded is determined based on the number of currently decoded frames in the determined video frame sequence and the number of video frames. Based on the current number of frames to be decoded and the received final video frame information, the video frame information to be decoded is determined, wherein the final video frame information is generated by the projection terminal after encoding the video data corresponding to the paused screen; The video frame information to be decoded is transmitted to the decoder, and the target screen fed back by the decoder relative to the video frame information to be decoded is displayed, wherein the target screen is the same as the pause screen.

2. The method according to claim 1, characterized in that, The step of determining the video frame information to be decoded based on the current number of frames to be decoded and the received final video frame information includes: Determine whether the current number of frames to be decoded meets the decoding end condition; If so, the decoder is instructed to stop decoding by ending the decoding command; If not, the frame number of the frame header sequence of the final video frame information is updated, and the video frame information to be decoded is determined based on the updated frame header sequence number.

3. The method according to claim 2, characterized in that, The step of updating the frame header sequence frame number of the final video frame information and determining the video frame information to be decoded based on the updated frame header sequence frame number includes: Extract the frame header sequence frame number and the final video frame from the final video frame information; The frame header sequence frame number is incremented by one to obtain the updated frame header sequence frame number; The final video frame and the updated frame header sequence number are used as the video frame information to be decoded.

4. The method according to claim 1, characterized in that, After transmitting the video frame information to be decoded to the decoder and displaying the target image fed back by the decoder relative to the video frame information to be decoded, the method further includes: The number of currently decoded frames is updated based on the video frame information to be decoded, resulting in the updated number of currently decoded frames.

5. The method according to claim 1, characterized in that, Also includes: When a command to continue screen mirroring is received, the screen to be displayed is determined based on the received screen mirroring data, and the screen to be displayed is then displayed.

6. The method according to claim 5, characterized in that, The step of determining the screen to be displayed based on the received screen projection data and displaying the screen to be displayed includes: Analyze the numerical value of the target video frame in the target video frame sequence to which the data to be projected belongs; The number of currently decoded frames in the target video frame sequence is reset to obtain the reset number of currently decoded frames; The data to be projected is broken down to form a data packet to be decoded; The data packet to be decoded is transmitted to the decoder for decoding; Receive the screen to be displayed from the decoder and display the screen to be displayed.

7. The method according to claim 1, characterized in that, The device being projected to belongs to the first operating system, and the device projecting to belongs to the second operating system.

8. A video synchronization display device, characterized in that, include: The numerical analysis module is used to analyze the numerical values ​​of the video frames in the video frame sequence to which the current starting frame belongs when a pause screen projection command is received from the screen projection terminal; the starting frame is an I-frame, and the video frame sequence is a group of images (GOP). The frame number determination module is used to determine the current number of frames to be decoded based on the number of currently decoded frames in the determined video frame sequence and the number of video frames. The information determination module is used to determine the video frame information to be decoded based on the current number of frames to be decoded and the received final video frame information, wherein the final video frame information is generated by the projection terminal after encoding the video data corresponding to the paused screen; The screen display module is used to transmit the video frame information to be decoded to the decoder and display the target screen fed back by the decoder relative to the video frame information to be decoded, wherein the target screen is the same as the pause screen.

9. An electronic device, characterized in that, The electronic device includes: At least one processor; and A memory communicatively connected to the at least one processor; wherein, The memory stores a computer program that can be executed by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the video synchronization display method according to any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that cause a processor to execute the video synchronization display method according to any one of claims 1-7.

Images