A gated power supply, an SOC chip, an electronic device, and a timing control method

Abstract

The present application relates to a gated power supply, an SOC chip, an electronic device and a timing control method, belonging to the field of electronic circuits. The gated power supply includes: a switching module and a slew rate control module; an input end of the switching module is configured to be electrically connected to an input power supply; the slew rate control module is electrically connected to a control end of the switching module, the slew rate control module shares a power supply output end with the switching module, and the power supply output end is configured to be electrically connected to a power supply end of a power consumption module; the slew rate control module is configured to cooperate with the switching module to adjust a slew rate of an output voltage of the power supply output end during power-on and / or power-off of the power consumption module. The gated power supply can achieve precise control of power-on or power-off timing and slew rate at the module level, and can solve the timing conflict between power-on or power-off at the module level and power-on or power-off at the system level.

Description

Technical Field

[0001] This application belongs to the field of electronic circuits, and particularly relates to a gated power supply, an SOC chip, an electronic device, and a timing control method. Background Art

[0002] In a System On Chip (SOC) system, multiple voltage domains (power rails) may be used to meet the system power requirements. The power-on or power-off timing of each voltage domain is determined according to the system-level power-on or power-off requirements. At the same time, the power-on or power-off timing and slew rate of each module in the SOC system also need to be precisely controlled to ensure that the power-on or power-off requirements of the entire system level, the power-on or power-off requirements of each module level, and the power consumption optimization requirements are met. Summary of the Invention

[0003] In view of this, the purpose of this application is to provide a gated power supply, an SOC chip, an electronic device, and a timing control method to improve the timing conflict problem between module-level power-on or power-off and system-level power-on or power-off.

[0004] The embodiments of this application are implemented as follows:

[0005] In a first aspect, an embodiment of this application provides a gated power supply, including: a switch module and a slew rate control module; an input end of the switch module is configured to be electrically connected to an input power supply; the slew rate control module is electrically connected to a control end of the switch module, and the slew rate control module shares a power output end with the switch module, and the power output end is configured to be electrically connected to a power supply end of a power-consuming module; the slew rate control module is configured to cooperate with the switch module to adjust the slew rate of the output voltage of the power output end during power-on and / or power-off of the power-consuming module.

[0006] In the embodiment of this application, the input end of the switch module is configured to be electrically connected to the input power supply, the slew rate control module is electrically connected to the control end of the switch module, and the slew rate control module shares the power output end for connecting the power-consuming module with the switch module. In this way, the slew rate control module and the switch module cooperate to be able to adjust the slew rate of the output voltage of the power output end during power-on and / or power-off of the power-consuming module, and further adjust the timing during power-on and / or power-off of the power-consuming module, and can solve the timing conflict problem between module-level power-on or power-off, and / or, system-level power-on or power-off.

[0007] In a possible implementation manner combining with the embodiments of the first aspect, the slew rate control module is configured to receive a clock signal and a status signal, generate a control signal according to the status signal, where the control signal is used to control the conduction or cutoff of the switch module; and generate a voltage signal with a controllable slew rate according to the status signal and the clock signal, and output it to the power output terminal; wherein, the slew rate is related to the frequency of the clock signal, and the status signal is used to represent the power-on or power-off of the power-consuming module.

[0008] In the embodiments of the present application, the gated power supply is controlled by a clock signal and a status signal, so as to accurately control the slew rate of the output voltage of the gated power supply. According to the status signal, it can be known whether the power-consuming module is in the power-on or power-off stage. At the same time, by adjusting the frequency of the clock signal, the slew rate of the output voltage of the gated power supply can be adjusted, so as to accurately control the power-on or power-off timing of the power-consuming module.

[0009] In a possible implementation manner combining with the embodiments of the first aspect, the slew rate control module is configured to: when the status signal represents that the power-consuming module is powered on, generate a voltage signal whose voltage rises from a first voltage to a second voltage, and after the voltage value of the voltage signal is the second voltage, control the switch module to conduct; and / or; when the status signal represents that the power-consuming module is powered off, control the switch module to cutoff, and generate a voltage signal whose voltage drops from the second voltage to the first voltage, where the voltage rise time or voltage drop time of the voltage signal is related to the frequency of the clock signal.

[0010] In the embodiments of the present application, the above control logic is adopted to accurately control the power-on or power-off timing of the power-consuming module.

[0011] In a possible implementation manner combining with the embodiments of the first aspect, the slew rate control module includes: a logic control unit, a signal generation unit, and a voltage follower unit; the logic control unit is electrically connected to the control end of the switch module, the signal generation unit is electrically connected to the logic control unit, and the input end of the voltage follower unit is electrically connected to the signal generation unit. The logic control unit is configured to generate the control signal according to the status signal; the signal generation unit is configured to generate a ramp reference signal according to the clock signal and the status signal, where the voltage rise time or voltage drop time of the ramp reference signal is related to the frequency of the clock signal; the voltage follower unit is configured to control the output voltage of the power output terminal to follow the ramp reference signal during the power-on and / or power-off of the power-consuming module.

[0012] In the embodiments of the present application, by using a logic control unit, a signal generation unit, a voltage follower unit, and their cooperation, the slew rate of the output voltage at the power output terminal can be precisely adjusted during the power-on and / or power-off of the power consumption module. While achieving its invention purpose, the cost and volume of the circuit can be reduced.

[0013] In a possible implementation manner combining with the embodiments of the first aspect, the signal generation unit includes: a counter, a digital-to-analog converter, and a low-pass filter; the counter is electrically connected to the logic control unit, the digital-to-analog converter is electrically connected to the counter, and the low-pass filter is electrically connected to the digital-to-analog converter. The counter is configured to count the clock signal according to the status signal, wherein when the status signal indicates that the power consumption module is powered on, the count value increases from an initial default value to a maximum value, and when the status signal indicates that the power consumption module is powered off, the count value decreases from the maximum value to the initial default value; the digital-to-analog converter is configured to convert the count value of the counter into an analog voltage signal; the low-pass filter is configured to filter the analog voltage signal to obtain the ramp reference signal.

[0014] In the embodiments of the present application, a counter is used to count the clock signal, and then a digital-to-analog converter is used to convert the count value into a stepped analog voltage signal. After that, a low-pass filter is used for filtering, and a nearly continuous linear ramp reference signal can be obtained by processing the stepped analog voltage signal and provided to the voltage follower unit. Using low-cost devices such as a counter, a digital-to-analog converter, and a low-pass filter to achieve the required functions can reduce the cost. In a possible implementation manner combining with the embodiments of the first aspect, the voltage follower unit includes: a voltage follower, the non-inverting input terminal of the voltage follower is electrically connected to the signal generation unit, and the output terminal of the voltage follower is electrically connected to the power output terminal.

[0015] In the embodiments of the present application, by using a voltage follower, the output voltage at the power output terminal can be controlled to follow the ramp reference signal during the power-on and / or power-off of the power consumption module, which can further reduce the cost.

[0016] In the second aspect, the embodiments of the present application provide a SOC chip, including: a power consumption module and the above-mentioned gated power supply, the power output terminal of the gated power supply is electrically connected to the power consumption module; the gated power supply is configured to adjust the timing of the power consumption module during power-on and / or power-off.

[0017] In the third aspect, the embodiments of the present application provide an electronic device, including: a body and the above-mentioned SOC chip.

[0018] Fourth aspect, embodiments of the present application provide a timing control method, the method comprising: obtaining a clock signal and a status signal of an input gating power supply, the status signal being used to characterize the power-on or power-off of a power-consuming module; adjusting a slew rate of an output voltage of a power output terminal of the gating power supply according to the clock signal and the status signal, thereby adjusting the timing during the power-on and / or power-off of the power-consuming module; wherein, a power input terminal of the gating power supply is configured to be electrically connected to an input power supply, a power output terminal of the gating power supply is configured to be electrically connected to a power supply terminal of the power-consuming module, and the slew rate is related to a frequency of the clock signal.

[0019] Combined with a possible implementation manner of the fourth aspect embodiment, the gating power supply includes a switching module and a slew rate control module, an input end of the switching module is configured to be electrically connected to an input power supply, the slew rate control module is electrically connected to a control end of the switching module, and the slew rate control module shares the power output terminal with the switching module; adjusting the slew rate of the output voltage of the power output terminal of the gating power supply according to the clock signal and the status signal includes: when the status signal characterizes that the power-consuming module is powered on, the slew rate control module generates a voltage signal whose voltage rises from a first voltage to a second voltage, and outputs it to the power output terminal, and after the voltage value of the voltage signal is the second voltage, controls the switching module to conduct; and / or; when the status signal characterizes that the power-consuming module is powered off, the slew rate control module controls the switching module to turn off, and generates a voltage signal whose voltage drops from the second voltage to the first voltage, wherein a voltage rise time or a voltage drop time of the voltage signal is related to the frequency of the clock signal.

[0020] Other features and advantages of the present application will be described in the subsequent specification. The objectives and other advantages of the present application can be realized and obtained by the structures specifically pointed out in the written specification and the drawings. Description of the Drawings

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required to be used in the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings. As shown by the drawings, the above and other objectives, features, and advantages of the present application will be more clearly understood. The same reference numerals indicate the same parts in all the drawings. The drawings are not deliberately drawn to scale in actual size, and the focus is on showing the gist of the present application.

[0022] Figure 1 The structural schematic diagram of a gating power supply provided by an embodiment of the present application is shown.

[0023] Figure 2 Shows a schematic structural diagram of another gated power supply provided by an embodiment of the present application.

[0024] Figure 3 Shows a schematic principle diagram of a voltage tracker provided by an embodiment of the present application.

[0025] Figure 4 Shows a schematic structural diagram of a signal generation unit provided by an embodiment of the present application.

[0026] Figure 5 Shows a schematic timing diagram of the principle of a gated power supply provided by an embodiment of the present application.

[0027] Figure 6 Shows a schematic structural diagram of a connection between a gated power supply and an OTP module provided by an embodiment of the present application.

[0028] Figure 7 Shows a schematic timing diagram of using a gated power supply for power-on and power-off timing control provided by an embodiment of the present application.

[0029] Figure 8 Shows a schematic flowchart of a timing control method provided by an embodiment of the present application. Detailed implementation manners

[0030] Next, the technical solutions in the embodiments of the present application will be described with reference to the accompanying drawings in the embodiments of the present application.

[0031] It should be noted that: Similar reference numerals and letters denote similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of the present application, relational terms such as "first", "second", etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variation thereof is intended to cover a non-exclusive inclusion, so that a process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising a..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the element.

[0032] Furthermore, the term "and / or" in this application only describes the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent three situations: A exists alone, A and B exist simultaneously, and B exists alone. Among them, the symbol " / " represents "or" unless otherwise clearly specified. For example, power on / power off means power on or power off.

[0033] To solve the timing conflict between module-level power on or power off and system-level power on or power off, the embodiments of this application use a gated power supply to implement the timing and slew rate control of module-level power on or power off, so as to solve the timing conflict between module-level power on or power off and system-level power on or power off. For example, the power input terminal of the gated power supply can be configured to be electrically connected to the input power supply VDD, the power output terminal of the gated power supply can be configured to be electrically connected to the power supply terminal of the power-consuming module, and by controlling the slew rate of the output voltage of the power output terminal of the gated power supply, that is, controlling the slope of the output voltage of the power output terminal of the gated power supply, the timing of the power-consuming module during power on and / or power off can be adjusted. Among them, the larger the slew rate, the shorter the delay time of delayed power on or delayed power off, and the smaller the slew rate, the longer the delay time of delayed power on or delayed power off.

[0034] As Figure 1 shown, the gated power supply provided by the embodiments of this application includes a switch module and a slew rate control module. The input terminal of the switch module (the power input terminal of the gated power supply) is configured to be electrically connected to the input power supply VDD, the slew rate control module is electrically connected to the control terminal of the switch module, the slew rate control module shares the power output terminal with the switch module, and the power output terminal is configured to be electrically connected to the power supply terminal of the power-consuming module. Figure 1 In

[0035] Among them, the slew rate control module is configured to cooperate with the switch module to adjust the slew rate of the output voltage of the power output terminal during power on and / or power off of the power-consuming module, and thus the timing of the power-consuming module during power on and / or power off can be adjusted.

[0036] Since each power-consuming module in the SOC chip has specific requirements for the power on or power off slew rate, too fast a slew rate will affect the normal operation of the power-consuming module, and too slow a slew rate will affect the system response time. Therefore, it is necessary to precisely control the power on or power off slew rate of the gated power supply, so as to achieve the optimal control of the power on or power off performance at the module level and the system level.

[0037] To facilitate the precise control of the power - on or power - off slew rate of a power - consuming module to meet the specific requirements of different power - consuming modules for the power - on or power - off slew rate, in a possible implementation, a clock signal (denoted as CLK) and a status signal (denoted as ENABLE) can be utilized to adjust the slew rate of the output voltage at the power output terminal of a gated power supply. Among them, the slew rate is related to the frequency of the clock signal. By adjusting the frequency of CLK, the slew rate of the output voltage of the gated power supply can be adjusted, thereby achieving precise control of the power - on or power - off slew rate of the gated power supply.

[0038] At this time, the slew - rate control module is configured to receive the clock signal and the status signal, and generate a control signal (denoted as Switch_EN) according to the status signal. Among them, the control signal is used to control the conduction or cutoff of the switch module. And the slew - rate control module is also configured to generate a voltage signal with a controllable slew rate according to the status signal and the clock signal, and output it to the power output terminal, where the status signal is used to represent the power - on or power - off of the power - consuming module.

[0039] When the status signal is different, the generated control signal is different. For example, when the status signal represents the power - on of the power - consuming module, a control signal for controlling the conduction of the switch module is generated; when the status signal represents the power - off of the power - consuming module, a control signal for controlling the cutoff of the switch module is generated. Exemplarily, the status signal changing from a low level to a high level represents the power - on of the power - consuming module, and the status signal changing from a high level to a low level represents the power - off of the power - consuming module. Of course, it can also be the other way around.

[0040] When the status signal is different, the generated voltage signal is also different. When the status signal represents the power - on of the power - consuming module, a voltage signal with the voltage rising from a first voltage to a second voltage is generated; when the status signal represents the power - off of the power - consuming module, a voltage signal with the voltage dropping from the second voltage to the first voltage is generated. Among them, the first voltage is less than the second voltage. Exemplarily, the first voltage can be 0, and the second voltage can be the same as the voltage of the input power supply VDD. Among them, the slew rate of the output voltage refers to the slope of the output voltage rising from 0 to VDD or dropping from VDD to 0.

[0041] In a possible implementation, it can be that the rising edge or falling edge of the status signal represents the power - on or power - off process of the power - consuming module. For example, the rising edge of the status signal represents the power - on of the power - consuming module, and the falling edge of the status signal represents the power - off of the power - consuming module.

[0042] When the status signal is different, the timing for controlling the conduction or cutoff of the switch module is also different. For example, the slew rate control module is configured to: when the status signal indicates that the power-consuming module is powered on, generate a voltage signal whose voltage rises from a first voltage to a second voltage, and after the voltage value of the voltage signal reaches the second voltage, control the switch module to conduct; and / or; when the status signal indicates that the power-consuming module is powered off, control the switch module to cutoff and generate a voltage signal whose voltage drops from the second voltage to the first voltage, where the voltage rise time or voltage drop time of the voltage signal is related to the frequency of the clock signal.

[0043] It can be understood that the clock signal input to the gated power supply when the power-consuming module is powered on and the clock signal input to the gated power supply when the power-consuming module is powered off can be the same clock signal or different clock signals. If the slew rate of the output voltage when powered on is the same as the slew rate of the output voltage when powered off, the clock signals when powered on and when powered off are the same. If the slew rate requirement of the output voltage when powered on is inconsistent with the slew rate requirement of the output voltage when powered off, the clock signals when powered on and when powered off are different. In addition, the clock signals corresponding to different power-consuming modules can be different.

[0044] Among them, the switch module can include at least one controlled switch, and at least one controlled switch is in parallel. Using at least one controlled switch to form the switch module can increase the service life of the switch module and improve the reliability of the switch module. In addition, using multiple parallel switches can also increase the power supply capacity. The controlled switch can be a transistor switch, an IGBT switch, etc.

[0045] Exemplarily, the switch module can include a PMOS (Positive channel Metal Oxide Semiconductor) switch. Connect the source and drain of the PMOS switch to the input power supply VDD and the output power supply voltage VDD_OUT respectively, and control the conduction or cutoff of the PMOS switch by controlling the gate to achieve the gating of the output power supply voltage VDD_OUT.

[0046] In one implementation, the above functions of the slew rate control module can be implemented in a software manner. At this time, the slew rate control module can include an IP (Intellectual Property) core to implement the above functions using the IP core.

[0047] In another implementation, as Figure 2 shown, the slew rate control module can include a logic control unit, a signal generation unit, and a voltage follower unit. The logic control unit is electrically connected to the switch module and the signal generation unit respectively. The signal generation unit is electrically connected to the voltage follower unit, and the voltage follower unit is electrically connected to the power supply output terminal.

[0048] Among them, the logic control unit is configured to generate a control signal according to the status signal. For example, when the status signal indicates that the power consumption module is powered on, the logic control unit is configured to generate a control signal for turning on the switch module after the voltage value of the voltage signal generated by the signal generation unit is the second voltage. When the status signal indicates that the power consumption module is powered off, the logic control unit is configured to generate a control signal for turning off the switch module. The logic control unit may include a signal generator for generating a control signal.

[0049] The signal generation unit is configured to generate a ramp reference signal according to the clock signal and the status signal. The voltage rise time or voltage fall time of the ramp reference signal is related to the frequency of the clock signal. For example, when the status signal indicates that the power consumption module is powered on, a ramp reference signal with a voltage rising from the first voltage to the second voltage is generated, and / or when the status signal indicates that the power consumption module is powered off, a ramp reference signal with a voltage falling from the second voltage to the first voltage is generated. For example, when the power consumption module is powered on, a ramp reference signal rising from 0 to VDD is generated, and when the power consumption module is powered off, a ramp reference signal falling from VDD to 0 is generated.

[0050] The voltage follower unit is configured to control the output voltage of the power supply output terminal to follow the ramp reference signal during the power-on and / or power-off of the power consumption module, that is, during the power-on and / or power-off of the power consumption module, the output signal of itself follows the ramp reference signal.

[0051] Optionally, the voltage follower unit includes: a voltage follower. The non-inverting input terminal of the voltage follower is electrically connected to the signal generation unit, and the output terminal of the voltage follower is electrically connected to the power supply output terminal, as Figure 3 shown. The output terminal of the operational amplifier is fed back to the inverting input terminal to form a voltage follower. The non-inverting input terminal is connected to the output of the signal generation unit, that is, connected to the ramp reference signal (represented by Vref for example), as the reference signal of the voltage follower. The output of the voltage follower is connected to the external output VDD_OUT of the gated power supply. In this way, when powered on, the output VDD_OUT of the gated power supply will follow the slew rate of the ramp reference signal and rise from 0 to VDD, and when powered off, the output VDD_OUT of the gated power supply will follow the slew rate of the ramp reference signal and fall from VDD to 0.

[0052] This application adopts a method combining a ramp reference signal and operational amplifier feedback. An accurate slew rate ramp reference signal is achieved through precise clock control. Through operational amplifier feedback, the output voltage of the gated power supply follows the ramp reference signal with an accurate slew rate, realizing precise slew rate control of the output voltage of the gated power supply during the power-on or power-off of the power consumption module, and meeting the power-on or power-off requirements of the power consumption module.

[0053] In an alternative embodiment, as Figure 4As shown, the signal generation unit includes: a counter, a digital-to-analog converter, and a low-pass filter. The counter, the digital-to-analog converter, and the low-pass filter are connected in sequence, and the counter is also electrically connected to the logic control unit.

[0054] The counter is configured to count the clock signal according to the status signal and output a count value (denoted as SlewRate_Cnt[N-1:0]). Among them, when the status signal indicates that the power-consuming module is powered on, the count value increases from the initial default value to the maximum value; when the status signal indicates that the power-consuming module is powered off, the count value decreases from the maximum value to the initial default value. The value output by the counter is a binary digital signal with N bits. For example, when the power-consuming module is powered on, the count value increases from 0 to all 1s; when the power-consuming module is powered off, the count value decreases from all 1s to 0.

[0055] The count value of the counter is also sent to the logic control unit. So when the status signal indicates that the power-consuming module is powered on, after the count value of the counter is all 1s (i.e., the maximum value), the logic control unit generates a control signal to turn on the switch module. The digital-to-analog converter is configured to convert the count value of the counter into an analog voltage signal. For example, it converts the digital count value (SlewRate_Cnt[N-1:0]) into an analog voltage signal (denoted as Vref_IN). The analog voltage signal has a linear relationship with the digital count value, all 0s corresponding to 0 voltage, all 1s corresponding to VDD voltage. When powered on, the analog voltage signal gradually steps up from 0 to VDD with the count value; when powered off, the analog voltage gradually steps down from VDD to 0 with the count value.

[0056] The low-pass filter is configured to filter the stepped analog voltage signal output by the digital-to-analog converter to obtain a nearly continuous linear ramp reference signal (denoted as Vref), which is provided to the voltage follower unit as a reference signal.

[0057] Adopting the solution of this application, precise control of the slew rate of the output voltage of the gated power supply is achieved during the power-on or power-off of the power-consuming module. The slew rate of the output voltage is related to the clock frequency and the number of bits of the counter. The formula is as follows:

[0058] Slew Rate = VDD / [(2^N - 1) / Fclk], where Slew Rate is the slew rate, Fclk is the frequency of the clock signal, and N is the number of bits of the counter. In this formula, " / " means "divide by". It can be seen that the slew rate is related to the frequency of the clock signal and the number of bits of the counter. When the number of bits of the counter is fixed, it is only related to the frequency of the clock signal.

[0059] For better understanding, the following is combined with Figure 5The waveform example diagram shown below illustrates the principle of the gated power supply provided by this application. When the ENABLE signal jumps from 0 to 1, it indicates that the power-consuming module enters the power-on stage. The counter starts counting the clock signal CLK (increasing from all 0s to all 1s). The ramp reference signal Vref gradually rises from 0 to VDD, and the output VDD_OUT of the gated power supply follows the ramp reference signal Vref and rises to VDD. After the counter is all 1s, the switch module is turned on, and then the slew rate control module is turned off. Thus, the entire power-on process of the power-consuming module is completed, and it enters the normal working stage.

[0060] When the ENABLE signal jumps from 1 to 0, it indicates that the power-consuming module enters the power-off stage. The slew rate control module turns off the switch module, and the counter starts counting the clock signal CLK (decreasing from all 1s to all 0s). The ramp reference signal Vref gradually drops from VDD to 0, and the output VDD_OUT of the gated power supply follows the ramp reference signal Vref and drops to 0. After the counter is all 0s, the slew rate control module is turned off. Thus, the entire power-off process of the power-consuming module is completed, and it enters the off state.

[0061] The gated power supply provided by the embodiments of this application can be applied to various integrated circuits to solve the timing conflicts between system-level power-on or power-off and module-level power-on or power-off, so as to meet the power-on or power-off requirements of the system and the module. Hereinafter, an example of applying the gated power supply to the OTP (One Time Programmable) in a Central Processing Unit (CPU) will be used for illustration. The OTP module in the CPU has strict requirements for both the power-on or power-off timing and the power-on or power-off slew rate. When the power-on or power-off timing of the OTP module conflicts with the system power-on or power-off timing, by applying the gated power supply solution of this application, control can be increased on the original basis to meet the power-on or power-off timing of the OTP module. At the same time, the precise control of the power-on or power-off voltage slew rate of the gated power supply can meet the power-on or power-off slew rate requirements of the OTP module.

[0062] As Figure 6 shown, by using the gated power supply of this application, the VDD2 of the system can be connected to the VDD2 power supply terminal of the OTP module through the switch module of the gated power supply (as shown by VDD_OUT in Figure 6 ), and the VDD1 power supply terminal of the OTP module is connected to the system VDD1 together. Among them, VDD1 in the gated power supply is the power supply for the gated power supply.

[0063] Figure 6 The power-on or power-off timing of the gated power supply application example shown in Figure 7As shown in the figure. The power-on or power-off sequence of the CPU system is as follows: VDD2 is powered on before VDD1, and VDD1 is powered off before VDD2. While the power-on or power-off sequence of the OTP module is: VDD2 is powered on after VDD1, and VDD1 is powered off after VDD2, resulting in a conflict between the system power-on / off sequence and the OTP module power-on / off sequence.

[0064] During power-on, the system's VDD2 is powered on first, and then VDD1 is powered on. After VDD1 is powered on, ENABLE is switched from low to high, and the VDD2 of the OTP module is powered on through the gated power supply, ensuring that the VDD2 of the OTP module is powered on after VDD1. And precise slew rate control can meet the power-on slew rate requirements of the OTP and the system's optimal power-on response time requirements. During power-off, ENABLE is first switched from high to low, and the VDD2 of the OTP module is powered off through the gated power supply. And precise slew rate control can meet the power-off slew rate requirements of the OTP and the system's optimal power-off response time requirements. After the VDD2 of the OTP module is powered off, the system's VDD1 is powered off, ensuring that the VDD1 of the OTP module lags behind VDD2 in power-off. Finally, the system's VDD2 is powered off.

[0065] It can be understood that Figure 7 In the example, the power-on clock and the power-off clock are the same clock. In actual applications, clocks with the same frequency or different frequencies can be selected according to the power-on or power-off time requirements. In addition, the above application is only an example of this application. The application of the gated power supply in this application is not limited to the application of the OTP module or EFuse (Electronic Fuse, a solid-state memory that can only write data once). Any module in the SOC chip that is inconsistent with the overall system power-on or power-off sequence or slew rate and requires power supply timing control or slew rate control can be applied, such as DDR (Double Data Rate) PHY (Physical), USB (Universal Serial Bus PHY module, etc.).

[0066] The embodiment of this application also provides an SOC chip, which includes a power-consuming module and the gated power supply as described above. The power input terminal of the gated power supply is configured to be electrically connected to the input power supply, and the power output terminal is electrically connected to the power-consuming module. The gated power supply is configured to adjust the timing of the power-consuming module during power-on and / or power-off.

[0067] It can be understood that the power-consuming module can be a module in the SOC chip that is inconsistent with the overall system power-on or power-off sequence or slew rate and requires power supply timing control or slew rate control.

[0068] The SOC chip can be various integrated circuit chips, including but not limited to processors. The above-mentioned processors can be general-purpose processors, including Central Processing Unit (CPU), Network Processor (NP), Graphics Processing Unit, microprocessors, etc.; they can also be Digital Signal Processor (DSP), Application Specific Integrated Circuit (ASIC), Field Programmable Gate Array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. Or, the processor can also be any conventional processor, etc.

[0069] The gated power supply provided by the SOC chip embodiment has the same implementation principle and technical effects as those of the foregoing gated power supply embodiment. For the sake of brief description, for the parts not mentioned in the SOC chip embodiment, reference can be made to the corresponding content in the foregoing gated power supply embodiment.

[0070] The embodiment of the present application also provides an electronic device, which includes a body and the SOC chip as described above.

[0071] The electronic device includes but is not limited to devices such as mobile phones, tablets, and computers, where the corresponding bodies of different electronic devices are different.

[0072] The SOC chip provided by the electronic device embodiment has the same implementation principle and technical effects as those of the foregoing SOC chip embodiment. For the sake of brief description, for the parts not mentioned in the electronic device embodiment, reference can be made to the corresponding content in the foregoing SOC chip embodiment.

[0073] The embodiment of the present application also provides a timing control method, which can be applied to the above-mentioned gated power supply. The following will be combined with Figure 8 , to illustrate the timing control method provided by the embodiment of the present application.

[0074] S1: Obtain the clock signal and the status signal input to the gated power supply, where the status signal is used to represent the power-on or power-off of the power-consuming module.

[0075] When it is necessary to use the gated power supply shown in this application to solve the timing conflict between module-level power-on or power-off and system-level power-on or power-off, the input power supply of the power-consuming module with a timing conflict can be connected to the power-consuming module after being controlled by the gated power supply. Then, a clock signal and a status signal can be input to the gated power supply, so that the gated power supply can obtain the clock signal and the status signal input to the gated power supply, and use this to adjust the slew rate of the output voltage of the power output terminal of the gated power supply, thereby adjusting the timing of the power-consuming module during power-on and / or power-off.

[0076] S2: According to the clock signal and the status signal, adjust the slew rate of the output voltage of the power output terminal of the gated power supply, thereby adjusting the timing of the power-consuming module during power-on and / or power-off.

[0077] When the gated power supply obtains the clock signal and the status signal, it can adjust the slew rate of the output voltage of the power output terminal of the gated power supply according to the clock signal and the status signal, thereby adjusting the timing of the power-consuming module during power-on and / or power-off.

[0078] Exemplarily, when the status signal indicates that the power-consuming module is powered on, a voltage signal whose voltage rises from a first voltage to a second voltage is generated, and after the voltage value of the voltage signal is the second voltage, the switch module is controlled to conduct; and / or; when the status signal indicates that the power-consuming module is powered off, the switch module is controlled to cut off, and a voltage signal whose voltage drops from the second voltage to the first voltage is generated, wherein the voltage rise time or the voltage drop time of the voltage signal is related to the frequency of the clock signal.

[0079] The implementation principle and the technical effects generated by the method embodiment are the same as those of the foregoing gated power supply embodiment. For the sake of brief description, for the parts not mentioned in the method embodiment, reference may be made to the corresponding content in the foregoing gated power supply embodiment.

[0080] It should be noted that the various embodiments in this specification are all described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts among the various embodiments can be referred to each other.

[0081] In addition, each functional module in the various embodiments of this application can be integrated together to form an independent part, or each module can exist alone, or two or more modules can be integrated to form an independent part.

[0082] The above is only the specific implementation manner of this application, but the protection scope of this application is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed in this application, and all should be covered by the protection scope of this application. Therefore, the protection scope of this application should be subject to the protection scope of the claims.

Claims

1. A gated power supply, characterized in that, Comprising: A switching module, the input end of the switching module being configured to be electrically connected to an input power supply; A slew rate control module, electrically connected to the control end of the switching module, the slew rate control module sharing a power output end with the switching module, the power output end being configured to be electrically connected to the power supply end of a power-consuming module; The slew rate control module is configured to cooperate with the switching module to adjust the slew rate of the output voltage of the power output end during the power-on and / or power-off of the power-consuming module; The slew rate control module is configured to, during the power-on of the power-consuming module, output a voltage signal whose voltage rises from a first voltage to a second voltage to the power output end, and after the voltage value of the voltage signal is the second voltage, control the switching module to conduct, so as to adjust the output voltage of the power output end to rise from the first voltage to the second voltage following the slew rate of the voltage signal; And during the power-off of the power-consuming module, control the switching module to cut off, and output a voltage signal whose voltage drops from the second voltage to the first voltage to the power output end, so as to adjust the output voltage of the power output end to drop from the second voltage to the first voltage following the slew rate of the voltage signal.

2. The gated power supply according to claim 1, characterized in that, The slew rate control module is configured to receive a clock signal and a status signal, and generate a control signal according to the status signal, the control signal being used to control the conduction or cut-off of the switching module; and generate a voltage signal with a controllable slew rate according to the status signal and the clock signal, and output it to the power output end; Wherein, the slew rate is related to the frequency of the clock signal, and the status signal is used to characterize the power-on or power-off of the power-consuming module.

3. The gated power supply according to claim 2, characterized in that, The slew rate control module is configured to: when the status signal characterizes the power-on of the power-consuming module, generate a voltage signal whose voltage rises from a first voltage to a second voltage, and after the voltage value of the voltage signal is the second voltage, control the switching module to conduct; and / or; When the status signal characterizes the power-off of the power-consuming module, control the switching module to cut off, and generate a voltage signal whose voltage drops from the second voltage to the first voltage, wherein the voltage rise time or voltage drop time of the voltage signal is related to the frequency of the clock signal.

4. The gated power supply according to claim 2 or 3, characterized in that, The slew rate control module includes: A logic control unit, electrically connected to the control end of the switching module, the logic control unit being configured to generate the control signal according to the status signal; A signal generation unit, electrically connected to the logic control unit, the signal generation unit being configured to generate a ramp reference signal according to the clock signal and the status signal, the voltage rise time or voltage drop time of the ramp reference signal being related to the frequency of the clock signal; A voltage follower unit, the input end of the voltage follower unit being electrically connected to the signal generation unit, the output end of the voltage follower unit being electrically connected to the power output end; The voltage follower unit is configured to, during the power-on and / or power-off of the power-consuming module, control the output voltage of the power output end to follow the ramp reference signal.

5. The gated power supply according to claim 4, characterized in that, The signal generation unit includes: A counter, electrically connected to the logic control unit, the counter being configured to count the clock signal according to the status signal, wherein, when the power supply module is powered on, the count value increases from an initial default value to a maximum value according to the status signal, and when the power supply module is powered off, the count value decreases from the maximum value to the initial default value; A digital-to-analog converter, electrically connected to the counter, the digital-to-analog converter being configured to convert the count value of the counter into an analog voltage signal; A low-pass filter, electrically connected to the digital-to-analog converter, the low-pass filter being configured to filter the analog voltage signal to obtain the ramp reference signal.

6. The gated power supply according to claim 4, characterized in that, The voltage follower unit includes: a voltage follower, the non-inverting input terminal of the voltage follower being electrically connected to the signal generation unit, and the output terminal of the voltage follower being electrically connected to the power output terminal.

7. An SOC chip, characterized in that, Including: A power supply module and the gated power supply according to any one of claims 1-6, the power output terminal of the gated power supply being electrically connected to the power supply module; The gated power supply is configured to adjust the timing during power-on and / or power-off of the power supply module.

8. An electronic device, characterized in that, Including: A body and the SOC chip according to claim 7.

9. A timing control method, characterized in that, The method includes: Obtaining a clock signal and a status signal of the input gated power supply, the status signal being used to represent the power-on or power-off of the power supply module; According to the clock signal and the status signal, adjusting the slew rate of the output voltage of the power output terminal of the gated power supply, thereby adjusting the timing during power-on and / or power-off of the power supply module; Wherein, the power input terminal of the gated power supply is configured to be electrically connected to an input power supply, the power output terminal of the gated power supply is configured to be electrically connected to the power supply terminal of the power supply module, and the slew rate is related to the frequency of the clock signal; The gated power supply includes a switch module and a slew rate control module, the input terminal of the switch module is configured to be electrically connected to an input power supply, the slew rate control module is electrically connected to the control terminal of the switch module, and the slew rate control module shares the power output terminal with the switch module; According to the clock signal and the status signal, adjusting the slew rate of the output voltage of the power output terminal of the gated power supply includes: If the status signal represents that the power supply module is powered on, the slew rate control module generates a voltage signal with the voltage rising from a first voltage to a second voltage, and outputs it to the power output terminal, and after the voltage value of the voltage signal is the second voltage, controls the switch module to conduct, so as to adjust the output voltage of the power output terminal to follow the slew rate of the voltage signal rising from the first voltage to the second voltage; And / or; When the status signal represents that the power supply module is powered off, the slew rate control module controls the switch module to turn off, and generates a voltage signal with the voltage dropping from the second voltage to the first voltage, so as to adjust the output voltage of the power output terminal to follow the slew rate of the voltage signal dropping from the second voltage to the first voltage; wherein, the voltage rise time or voltage fall time of the voltage signal is related to the frequency of the clock signal.

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