Method, apparatus and radar sensor for data processing

Abstract

The application provides a data processing method, which can be applied to histogram statistics of preset data sequences, each data in the preset data sequences comprising an index part and a mantissa part, the method comprising: performing normalization processing on the preset data sequences to obtain a first index and a first mantissa of each data; generating a register address according to the first index and the first mantissa of each data; and adjusting a value in a corresponding register according to the register address. The data processing method provided by the application can be applied to fixed-point non-negative real data such as ADC sampling data, floating-point non-negative real data such as two-dimensional FFT power data, and other types of data statistics and sorting processes, and the classification statistics performed by the method is fast and has low computational complexity, thereby improving the data processing efficiency.

Description

Technical Field

[0001] This application relates to the field of data processing, and more particularly to a data processing method, apparatus, and radar sensor. Background Technology

[0002] In processing data types such as radar data, it is often necessary to sort the data. The time complexity of simple sorting is O(N). 2 The time complexity of quicksort is O(Nlgo(N)), where N is the number of data points. Therefore, as the amount of data to be sorted increases, the time complexity of both simple sort and quicksort increases exponentially. Consequently, in applications requiring sorting massive amounts of data, such as radar data, data sorting consumes significant processing and time resources. Summary of the Invention

[0003] In view of at least one deficiency of the prior art, the present invention provides a data processing method applicable to the statistical sorting of fixed-point non-negative real data such as ADC sampling data, floating-point non-negative real data such as two-dimensional FFT power data, and other types of data. This method performs classification and statistics quickly and with low computational complexity, improving data processing efficiency. Furthermore, this method is easy to implement in hardware, providing hardware support for subsequent operations such as noise floor estimation, interference detection, constant false alarm rate (CFAR) processing, or sidetrack detection using the aforementioned various types of data. Specifically:

[0004] A data processing method can be applied to perform histogram statistics on a preset data sequence, wherein each data in the preset data sequence includes an exponent part and a mantissa part. The method may include: normalizing the preset data sequence to obtain a first exponent and a first mantissa for each data; generating a register address based on the first exponent and the first mantissa for each data; and adjusting the value in the corresponding register based on the register address.

[0005] The data processing method described above, through histogram statistics of a preset data sequence, can quickly perform statistical analysis and sorting of data in the processing of data types such as radar data. Especially for statistical and sorting operations on fixed-point or floating-point non-negative real number data, it can reduce the time complexity of simple sorting from O(N^2) to O(N^2). 2The time complexity is reduced from O(Nlog(N)) to O(N). For example, when sorting sampled data, velocity dimension data after 2D FFT processing, and energy dimension data in radar data, the time complexity does not increase exponentially with the increase of sorted data, whether it is simple sorting or quick sorting. Therefore, in application scenarios such as radar data that require sorting massive amounts of data, it can ensure that data sorting does not consume a lot of system processing and time resources, thus ensuring the real-time performance of the processing output.

[0006] In some optional embodiments, normalizing the preset data sequence to obtain the first exponent and the first mantissa of each data point includes: shifting the mantissa portion of any current data point until the first digit of the mantissa portion is "1", and using the shifted mantissa portion as the first mantissa of the current data; subtracting the exponent portion of the current data to obtain the first mantissa, so that its data value remains unchanged, and using the processed exponent portion as the first exponent of the current data.

[0007] In some optional embodiments, the register address has a preset number of bits, and the method includes: searching in the normalized preset data sequence to obtain the maximum and minimum values ​​of the first exponent; determining the first number of bits in the register address used to store exponent information based on the maximum and minimum values ​​of the first exponent; and determining the second number of bits in the register address used to store mantissa information based on the first number of bits in the register address used to store exponent information and the preset number of bits in the register address.

[0008] In some optional embodiments, generating the register address based on the first exponent and the first mantissa of the data includes: obtaining a first exponent number based on the first exponent, the first exponent number having the first number of bits used to store exponent information; obtaining a first mantissa number based on one or more preset valid bits of the first mantissa, the first mantissa number having the second number of bits used to store mantissa information; and combining the first exponent number and the first mantissa number to generate the register address.

[0009] In some alternative embodiments, the first index number is obtained based on the minimum value of the first index of the data and the first index in the preset data sequence.

[0010] In some optional embodiments, adjusting the value in the corresponding register according to the register address includes: incrementing the value in the corresponding register by 1 according to the register address.

[0011] In some optional embodiments, the method may further include: after counting all the data in the preset data sequence, generating a statistical histogram with the register address as the x-axis and the value stored in the register as the y-axis.

[0012] In some optional embodiments, the method may further include: locking a preset interval in the statistical histogram, and using an inverse transformation algorithm to restore the register addresses within the preset interval to the data in the preset data sequence.

[0013] In some optional embodiments, the data in the preset data sequence is fixed-point or floating-point non-negative real number data.

[0014] In some optional embodiments, the preset data sequence is a radar data sequence.

[0015] In some optional embodiments, the radar data includes one or more of the following: sampled data obtained by sampling the echo signal, two-dimensional FFT velocity dimension data obtained by performing a fast Fourier transform on the sampled data, and energy dimension data obtained by processing the sampled data.

[0016] This application also provides a data processing apparatus for performing histogram statistics on a preset data sequence. Each data point in the preset data sequence includes an exponent and a mantissa. The apparatus includes: a data processing unit configured to perform normalization processing on the preset data sequence to obtain a first exponent and a first mantissa for each data point; an address generation unit coupled to the data processing unit configured to generate a register address based on the first exponent and the first mantissa for each data point; and a counting unit coupled to the address generation unit configured to adjust the value in the corresponding register based on the register address.

[0017] In some optional embodiments, the apparatus may further include: a histogram generation unit coupled to the counting unit, configured to, after counting all data in the preset data sequence, read the register address and the value stored in the register, and generate a statistical histogram with the register address as the horizontal axis and the value in the register as the vertical axis.

[0018] This application embodiment also provides a radar sensor, which may include: a transmitting unit configured to transmit a continuous wave whose frequency changes linearly with time; a receiving unit configured to receive an echo signal; a mixing unit coupled to the transmitting unit and the receiving unit respectively, configured to perform down-frequency processing on the echo signal to obtain an intermediate frequency signal; a sampling unit coupled to the mixing unit, configured to perform analog-to-digital conversion on the intermediate frequency signal and then sample it to output sampled data; an FFT unit coupled to the sampling unit, configured to perform a two-dimensional fast Fourier transform on the sampled data, and output one-dimensional Fourier transform data and two-dimensional Fourier transform data respectively; any of the above-mentioned data processing devices, coupled to the sampling unit and the FFT unit respectively, are configured to: perform statistics on one or more of the sampled data, the two-dimensional FFT velocity dimension data obtained after performing fast Fourier transform on the sampled data, and the energy dimension data obtained by processing the sampled data; after completing the statistics on all data, read the register address and the value stored in the register, and generate a statistical histogram with the register address as the horizontal axis and the value in the register as the vertical axis.

[0019] In some alternative embodiments, the radar sensor may include an interference determination unit coupled to the data processing device, configured to perform one or more operations of interference detection, constant false alarm rate processing, and lane detection on the intermediate frequency signal based on the statistical histogram.

[0020] In some optional embodiments, the radar sensor may include a target detection unit, coupled to the FFT unit and the interference determination unit respectively, configured such that when the interference determination unit determines that the intermediate frequency signal does not contain an interference signal, the target detection unit obtains the distance and velocity of the target object in the one-dimensional FFT data and / or the two-dimensional FFT data according to the interference detection threshold after constant false alarm rate processing.

[0021] This application also provides an integrated circuit, which may include a radio frequency (RF) module, an analog signal processing module, and a digital signal processing module connected in sequence. The RF module is used to generate RF transmit signals and receive RF receive signals. The analog signal processing module is used to down-convert the RF receive signals to obtain intermediate frequency (IF) signals. The digital signal processing module is used to perform analog-to-digital conversion on the IF signals to obtain digital signals. A data processing module is also provided, which is used to process the digital signals to achieve target detection. The data processing module further includes a histogram hardware accelerator, which is used to implement the methods described in this application embodiment, and to implement at least one signal processing procedure based on the methods, such as low noise estimation, interference detection, OS-CFAR, and sidetrack detection.

[0022] In some alternative embodiments, the integrated circuit may be a millimeter-wave radar chip.

[0023] This application also provides a wireless device, which may include: a carrier; an integrated circuit as described in any of the embodiments of this application, disposed on the carrier; an antenna disposed on the carrier, or the antenna and the integrated circuit are integrated into a single device disposed on the carrier; wherein the integrated circuit is connected to the antenna and is used to transmit the radio frequency transmission signal and / or receive the radio frequency reception signal.

[0024] This application also provides a terminal device, which may include: a device body; and a wireless device as described in the embodiments of this application, disposed on the device body; wherein the wireless device is used for target detection to provide reference information to the operation of the device body.

[0025] The data processing method provided by this invention is applicable to the statistical classification of various data (such as radar data), including ADC sampling data, two-dimensional FFT power data obtained after performing a fast Fourier transform on the sampling data, and fixed-point or floating-point non-negative real number data generated during other processing. This method offers fast classification and statistical analysis with low computational complexity, improving data processing efficiency. The data processing device provided by this invention is easy to implement in hardware, providing hardware support for subsequent operations such as noise floor estimation, interference detection, constant false alarm rate (CFAR) processing, or edge detection using various radar data. The radar sensor provided by this invention can integrate any of the histogram hardware accelerators described in the embodiments of this application. Based on the same hardware accelerator physical architecture, it enables operations such as noise floor estimation, interference detection, OS-CFAR, and edge detection based on energy or velocity dimensions during radar data processing. This simplifies the computation process, saves computing power, improves the reusability of the hardware structure, and enhances the integration of the device. Furthermore, the hardware accelerator physical architecture effectively improves the speed of radar data processing. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings, without exceeding the scope of protection claimed by this application.

[0027] Figure 1 This invention illustrates a statistical method for radar data provided by an embodiment of the present invention;

[0028] Figure 2The register address and stored value corresponding to the radar data statistical method provided in one embodiment of the present invention are shown;

[0029] Figure 3 This illustrates a statistical histogram formed in a statistical method for radar data provided in an embodiment of the present invention;

[0030] Figure 4 The data type and storage format are shown in one embodiment of the present invention;

[0031] Figure 5 The bit information and storage format of the register address provided in one embodiment of the present invention are shown;

[0032] Figure 6 The register address and stored value corresponding to the radar data statistical method provided in one embodiment of the present invention are shown;

[0033] Figure 7 An apparatus for radar data statistics is shown according to an embodiment of the present invention;

[0034] Figure 8 An embodiment of the radar sensor provided by the present invention is shown;

[0035] Figures 9a-9g This is a schematic diagram illustrating OS-CFAR related to the hardware accelerator based on the embodiments of this application. Detailed Implementation

[0036] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0037] The following will take millimeter-wave radar as an example for a detailed explanation:

[0038] Millimeter-wave radar is a detection radar that operates in the millimeter-wave band. Millimeter waves typically refer to electromagnetic wave signals in the 30 GHz to 300 GHz frequency range (corresponding to wavelengths of 1 mm to 10 mm). Since the wavelength of millimeter waves falls between microwaves and centimeter waves, radar sensors combine some advantages of both microwave and electro-optical radar. For example, radar sensors are small in size, lightweight, have high spatial resolution, strong penetration capabilities through fog, smoke, and dust, and possess all-weather detection performance. Radar sensors can distinguish and identify very small targets and can simultaneously identify multiple targets.

[0039] Linear Frequency Modulated Continuous Wave (LFMCW) is widely used in automotive radar sensor systems. In this radar system, the transmitter continuously transmits multiple LFMCW pulse waveforms. The receiver down-converts the received LFMCW reflected signals to obtain the baseband signal, and then performs a 2D Fast Fourier Transform (FFT). The first dimension is the FFT within each LFMCW pulse, i.e., the range-dimensional FFT; the second dimension is the value at the same spectral line position within the FFT spectrum of all pulses, and then performs another FFT operation, i.e., the Doppler-dimensional FFT. In the resulting 2D FFT plane, targets at different distances and velocities will appear as peaks at different coordinates. The stronger the target's reflection, the higher the peak value will be. The target detection process involves searching for peak values ​​in the 2D FFT plane. When the value at a certain coordinate of the 2D FFT is higher than a certain detection threshold, such as the noise floor of the 2D FFT plane, and meets certain specific conditions, it can be considered a target. The distance dimension and Doppler dimension coordinates corresponding to this coordinate correspond to the distance and velocity of the target, respectively.

[0040] The challenge of radar data processing lies in how to quickly identify targets and measure distance and velocity using raw radar data from radar sensors and 2DFFT data obtained through two-dimensional Fourier transform, while simultaneously performing a series of tasks such as interference detection and constant false alarm rate (CFAR) processing.

[0041] First, taking the LFMCW radar sensor as an example, we will briefly describe the process and principle of radar data generation.

[0042] The LFMCW radar sensor generates a digital signal whose frequency varies linearly with time via a signal generator. A digital-to-analog converter (DAC) is coupled to the signal generator and configured to receive the digital signal and convert it into an analog signal. An oscillator is coupled to the DAC and configured to receive the analog signal and generate a millimeter-wave band radio frequency (RF) signal based on the analog signal. A splitter is coupled to the oscillator and configured to separate the RF signal generated by the oscillator. One part is used as a transmit signal, which is transmitted by the transmitting antenna toward the detection space where a target may be present. The other part is used as the input signal of a mixer to generate a mixed signal.

[0043] The receiving antenna of the LFMCW radar sensor is configured to receive millimeter-wave signals within the detection space, including echoes formed by reflections of the transmitted signal from targets within the detection space, and potentially interference signals, such as those from other vehicle-mounted radar sensors. A mixer, coupled to the receiving antenna, is configured to mix the millimeter-wave signal received by the receiving antenna with the transmitted signal. The mixer includes a low-pass filter; after multiplying the transmitted and received signals in the time domain, the mixture is low-pass filtered to form the mixed signal (i.e., the radar sensor's raw data). An analog-to-digital converter, coupled to the low-pass filter, is configured to sample the mixed signal and output it to the signal processing unit.

[0044] The signal processing unit is coupled to the analog-to-digital converter and configured to receive the sampled mixed signal and perform a two-dimensional Fast Fourier Transform (FFT) on it. First, a Fast Fourier Transform is performed on the time-domain sampled signal; the resulting frequency value (beat frequency) is related to the distance to the target object. After the one-dimensional Fourier Transform, the velocity information of the target object is still retained in the phase information of the mixed signal. The one-dimensional FFT data with the same range resolution (range gate) is sampled again, and a Fast Fourier Transform is performed on the sampled FFT data; the resulting frequency value (Doppler frequency) is related to the velocity of the target object.

[0045] In the above-mentioned process of mixing signal processing, there are three data outputs: the analog-to-digital converter (ADC) samples the mixing signal and outputs the ADC sampled data; the signal processing unit first performs a fast Fourier transform on the sampled signal in the time domain to obtain one-dimensional FFT data and outputs it; the signal processing unit then samples the one-dimensional FFT data with the same distance resolution (distance gate) again, performs a fast Fourier transform on the sampled FFT data, obtains two-dimensional FFT data and outputs it.

[0046] This invention provides a method for performing statistics on one or more of the above-mentioned ADC sampling data, one-dimensional FFT data, and two-dimensional FFT data. This statistical method is fast, simple, and easy to implement in hardware, providing hardware support for subsequent use of one or more of the above-mentioned ADC sampling data, one-dimensional FFT data, and two-dimensional FFT data for noise floor estimation, interference detection, constant false alarm rate processing, or sidetrack detection.

[0047] According to one embodiment of the present invention, such as Figure 1 As shown, the present invention provides a statistical method 10 for radar data. The radar data includes a preset data sequence, wherein the data in the preset data sequence consists of an exponent part and a mantissa part. The statistical method 10 for radar data includes steps S101 to S103. Wherein:

[0048] In step S101, the preset data sequence is normalized to obtain the first exponent and the first mantissa of the data. The power data sampled by the ADC and subjected to two-dimensional FFT is typically a data sequence of known length. The data representation methods for different data sequences vary depending on the data type and storage format, and may include, for example:

[0049] 1.(-1) s *(1.M)*2 E-offset The IEEE 754 floating-point representation rule includes a separate sign bit s in the data, with offset = 127.

[0050] 2.M*2 -E

[0051] 3.M*2 E

[0052] 4.M, excluding the exponent E.

[0053] In this invention, M and 1.M are referred to as the mantissa and E and E-offset are referred to as the exponent.

[0054] Since the data statistics objects involved in this invention, such as ADC sampling data, one-dimensional FFT data, two-dimensional FFT data (including energy data), velocity data, etc., only involve positive numbers, the sign bit of IEEE 754 floating-point numbers is not considered. Therefore, each data can be represented as:

[0055] Where E val =(-1) se *(E-offset)

[0056] The parameters `se` and `offset` can be configured as needed to represent the first, second, third, and fourth data types and storage formats mentioned above. For example, setting `se = 1` and `offset = 0` represents the second data type; setting `se = 0`, `E = 0`, and `offset = 0` represents the fourth data type.

[0057] It should be noted that histogram statistics for velocity-dimensional data can be performed directly, while for energy-dimensional data, logarithmic processing of the energy data should be performed first (e.g., logarithmic operations to base 2 or 10; considering compatibility with computer data storage characteristics, logarithmic operations to base 2 are preferred, thus reducing implementation difficulty). Furthermore, histogram statistics based on energy-dimensional data can be applied to scenarios such as low noise estimation, interference detection, constant false alarm rate (CFAR) processing (e.g., OS-CFAR), or edge detection.

[0058] According to an embodiment of the present invention, in step S101 above, normalizing the data sequence to obtain the first exponent and the first mantissa of the data further includes steps S1011 and S1012. Wherein:

[0059] In step S1011, the mantissa portion of the data is shifted until the first digit of the mantissa is 1, and the shifted mantissa portion is used as the first mantissa. In step S1012, the exponent portion of the data that has obtained the first mantissa is subtracted to keep the data value unchanged, and the processed exponent portion is used as the first exponent.

[0060] The above is expressed as The data is processed by left-shifting the mantissa M (M is not 0) by p bits until the highest bit becomes "1", thus obtaining the first mantissa M. norm To keep the value unchanged, the exponent needs to be updated: making E norm =E val -p, where E norm The first index. The new value is... It and the original value They are equal. It should be noted that in this embodiment, only a left shift operation can be performed on the mantissa portion of the data to obtain the first mantissa M. norm .

[0061] In step S102, a register address is formed based on the first exponent and the first mantissa of the data.

[0062] According to one embodiment of the present invention, the number of bits of the register identifier (usually corresponding to the register address) is first determined. Since the address width allocated to the register by the processor or programmable controller is known (the address width allocated to the register by the processor or programmable controller is a preset number of bits), it is necessary to determine how many bits in the known register address width (preset number of bits) are used to store (identify) the exponent information and how many bits are used to store (identify) the mantissa information. The radar data statistical method 10 further includes:

[0063] The maximum and minimum values ​​of the first exponent are obtained by searching within the normalized preset data sequence. In the normalized data sequence {d1, d2…d…} n The search is performed within the normalized data sequence {d1, d2, ..., d}. n Each data d in} i By the first index E norm_di and the first last digit M norm_di The maximum and minimum values ​​of the extracted first exponent are denoted as E. norm_max and E norm_min .

[0064] Based on the maximum and minimum values ​​of the first exponent, determine the number of bits in the register identifier (register address) used to store the exponent information. Assuming the total bit width of the register identifier (register address) is W bits, where the high K bits are used to store the exponent information and the low WK bits are used to store the mantissa information, then the integer K satisfies:

[0065] E norm_max -E norm_min <2 K ,

[0066] 2 K-1 <E norm_max -E norm_min

[0067] K that satisfies this condition is unique.

[0068] Therefore, based on the first number of bits K in the register identifier (register address) used to store the exponent information and the preset number of bits W in the register identifier (register address), the second number of bits WK in the register identifier (register address) used to store the mantissa information is determined.

[0069] The above embodiments provide a method for determining the number of bits for storing data exponent information and the number of bits for storing mantissa information based on a preset number of bits in the register identifier (register address). Typically, the exponent information needs to be stored precisely, while the mantissa information can be simplified and merged before storage. These embodiments can quickly determine the number of bits for storing data exponent information and the number of bits for storing mantissa information by processing the preset data sequence as needed, even when the storage address allocated to the register by the processor or programmable controller is sufficient to cover all information bits. When the storage address allocated to the register by the processor or programmable controller is sufficient to cover all information bits, both the exponent information and the mantissa information of the data can be stored precisely. These implementation methods are also within the scope of protection of this invention. Furthermore, the method provided by this invention for determining the number of bits for storing data exponent information and the number of bits for storing mantissa information based on a preset number of bits in the register identifier (register address) can improve the speed of data statistics and save computational power in the statistical process without affecting subsequent calculation results.

[0070] The register address mentioned above can be the actual storage address assigned to the register by the processor or programmable controller, or it can be a virtual address or pointer.

[0071] Having determined the number of bits in the register address, the first number of bits used to store (identify) the exponent information, and the second number of bits used to store (identify) the mantissa information, the method for generating the corresponding register address for each data in the preset data sequence is described below.

[0072] According to an embodiment of the present invention, step S102 above, the generation of the register address based on the first exponent and the first mantissa of the data, further includes steps S1021 to S1023. Specifically: in step S1021, a first exponent number is obtained based on the first exponent, the first exponent number having the first number of bits used to store exponent information. The first exponent number is obtained based on the minimum value of the first exponent of each data point and the first exponent in the preset data sequence.

[0073] For example, the normalized data sequence {d1, d2…d} n One of the data d in} i Its first index is E norm_di Then the data d i The corresponding first index number is:

[0074] E norm_di -E norm_min

[0075] Following the above embodiment, the preset number of bits identified by the register is W, wherein the first number of bits used to store the exponent information is K, since the first number of bits is determined by E. norm_max -E norm_min Calculated, the first index number is located in E norm_max -E norm_min Within a given interval, it can be represented using K bits.

[0076] In step S1022, a first mantissa number is obtained based on one or more preset valid bits of the first mantissa, and the first mantissa number has the second number of bits used to store the mantissa information.

[0077] For example, the normalized data sequence {d1, d2…d} n One of the data d in} i Its first last digit is M norm_di For the first last digit M norm_di The bits following the highest bit "1" are truncated, with a truncation width of WK bits, to obtain the first mantissa number M. norm_di ′.

[0078] In step S1023, the first exponent number and the first mantissa number are combined to form the register address. Let the register address with a total width of W bits be bin_cnt_addr_d. i ,but:

[0079]

[0080] Among them, E norm_di-E norm_min M is a relative index. norm_di ′ represents the high-order digit of the mantissa.

[0081] By placing the first exponent number in the high-order bits of the register address and the first mantissa number in the low-order bits, a sequential search is performed on the register addresses, effectively sorting the data in ascending order. Based on this sequential search of register addresses, the values ​​stored in the registers are output, forming a statistical histogram where the horizontal axis represents the data volume range (energy range, velocity range, etc.) and the vertical axis represents the number of samples corresponding to each data volume range.

[0082] According to an embodiment of the present invention, the present invention provides a data processing method 10, which can be applied to data processing processes such as millimeter-wave radar. In step S103, the value in the corresponding register can be adjusted according to the register address.

[0083] For example, in the above embodiment, the normalized data sequence {d1, d2…d... n One of the data d in} i The corresponding register address is:

[0084]

[0085] Then the register address is The value in the register is incremented by 1.

[0086] For the normalized data sequence {d1, d2…d n For each data in the sequence {d1, d2, ..., d6}, generate a first exponent number and a first mantissa number based on its first exponent and first mantissa, and then generate the corresponding register address. Increment the value in the corresponding register by 1, and traverse the data sequence {d1, d2, ..., d6}. n After processing all the data in}, the statistical processing for radar processing is completed.

[0087] An embodiment of the data processing method 10 provided by this invention, which obtains the register address and the value stored in the register, is as follows: Figure 2 As shown.

[0088] According to an embodiment of the present invention, the radar data statistical method 10 provided by the present invention further includes: generating a statistical histogram with the register address as the abscissa and the value in the register as the ordinate. One embodiment of generating a statistical histogram using the radar data statistical method 10 provided by the present invention is as follows: Figure 3 As shown.

[0089] The following uses two-dimensional FFT power data as an example to illustrate the radar data processing method 10 provided by the present invention.

[0090] like Figure 4 As shown, assuming the power data output by the two-dimensional FFT is stored in the format shown, the exponent E has a bit width of 5 bits, the mantissa M has a bit width of 15 bits, and both E and M are unsigned numbers, with a total bit width of 20 bits, representing a numerical value of M*2. -E .

[0091] Suppose one of the 20 bits of power data is:

[0092] 20′b0011_0110_0010_1000_1111,

[0093] Then M = 15'b001_1011_0001_0100, E = 5'b0_1111 = 15, and according to the unified data representation method described above:

[0094] Where E val =(-1) se *(E-offset)

[0095] but:

[0096] E val =-E=-15.

[0097] Since the highest 2 bits of M are "0", shifting it left by 2 bits yields the first mantissa:

[0098] M norm =13'b110_1100_0101_0000

[0099] To keep the value unchanged, the exponent part needs to be updated to the first exponent:

[0100] E norm =E val -2 = -17

[0101] Assuming that in the normalized data sequence, the maximum value of the first exponent is E norm_max and minimum value E norm_min If the values ​​are -12 and -19 respectively, then K = 3 satisfies:

[0102] E norm_max -E norm_min <2 K ,

[0103] 2 K-1 <E norm_max -E norm_min

[0104] Assuming the processor or programmable controller allocates an address width W = 6 bits to the register, the register's storage format is as follows: Figure 5 As shown, K = 3 bits are used to store the exponent information, and WK = 3 bits are used to store the mantissa information.

[0105] For the normalized preset data sequence {d1, d2…d…} n Each data d in} i According to the first index E of the data norm_di The difference E from the first exponential minimum in the data sequence norm_di -E norm_min To obtain the first index number (relative index), for the power data 20′b0011_0110_0010_1000_1111 in the above embodiment, then:

[0106] E norm_di -E norm_min =-17-(-19)=2=3'b010

[0107] Then, based on the first digit M of the data norm_di After removing the highest 1, the three highest bits are used to obtain the first tail number M. norm_di For the power data 20′b0011_0110_0010_1000_1111 in the above embodiment, then:

[0108] M norm_di ′=3'b101

[0109] Then, as Figure 5 The high 3 bits of the register address shown store E norm_di -E norm_min The lower 3 bits store M norm_di This generates its corresponding 6-bit register address. The 20-bit power data 20%0011_0110_0010_1000_1111 in the above embodiment corresponds to the following register address:

[0110]

[0111] The generated register address (register identifier) ​​is as follows: Figure 6 As shown, the value in the register at register address 6'b01_0101 is incremented by 1.

[0112] The radar data statistical method 10 provided by this invention has a register address that is positively correlated with the size of the data (energy value, velocity value, etc.) falling into the interval, which facilitates the search for the interval where the sample is located.

[0113] According to an embodiment of the present invention, in the radar data statistical method 10 provided by the present invention, the radar data includes one or more of the following: sampled data obtained after sampling the original radar data, two-dimensional FFT power data obtained after performing a fast Fourier transform on the sampled data, and fixed-point or floating-point non-negative real number data generated during other processing.

[0114] According to an embodiment of the present invention, the present invention also provides a method for data restoration using the statistical histogram described above. In various applications of the statistical histogram, including searching for median intervals, maximum frequency intervals, etc., after locking the target interval through the search, the first exponent and the first mantissa are separated from the register address corresponding to the target interval. According to the inverse transformation algorithm, the first exponent and the first mantissa are restored to the original sample data to adapt to the subsequent application of the target statistics.

[0115] According to one embodiment of the present invention, such as Figure 7 As shown, the present invention also provides a device 100 for radar data statistics. The radar data includes a preset data sequence, wherein the data in the preset data sequence consists of an exponent portion and a mantissa portion. The device 100 for radar data statistics includes: a data processing unit 110, an address generation unit 120, and a counting unit 130. Specifically: the data processing unit 110 is configured to receive the radar data, perform normalization processing on the preset data sequence, and obtain a first exponent and a first mantissa of the data. The address generation unit 120 is coupled to the data processing unit 110 and is configured to generate a register address based on the first exponent and the first mantissa of the data. The counting unit 130 is coupled to the address generation unit 120 and is configured to increment the value in the corresponding register by 1 based on the register address.

[0116] According to an embodiment of the present invention, the data processing unit 110 is further configured to: shift the mantissa portion of the data until the first digit of the mantissa portion is 1, and use the shifted mantissa portion as the first mantissa; subtract the exponent portion of the data to obtain the first mantissa, so that the data value remains unchanged, and use the processed exponent portion as the first exponent.

[0117] According to one embodiment of the present invention, wherein the register address has a preset number of bits, the apparatus 100 for radar data statistics further includes: a search unit and a bit width determination unit. The search unit is coupled to the data processing unit 110 and configured to search within the normalized preset data sequence to obtain the maximum and minimum values ​​of the first exponent.

[0118] The bit width determination unit is coupled to the search unit and configured to: determine the first number of bits in the register address used to store the exponent information based on the maximum and minimum values ​​of the first exponent; and determine the second number of bits in the register address used to store the mantissa information based on the first number of bits in the register address used to store the exponent information and a preset number of bits in the register address.

[0119] According to an embodiment of the present invention, the address generation unit 120 is coupled to the bit width determination unit, and the address generation unit 120 is further configured to: obtain a first exponent number based on the first exponent of the data, the first exponent number having the first number of bits used to store exponent information; obtain a first mantissa number based on one or more preset valid bits of the first mantissa of the data, the first mantissa number having the second number of bits used to store mantissa information; and combine the first exponent number and the first mantissa number to form the register address.

[0120] According to one embodiment of the present invention, the address generation unit 120 is further configured to generate the first index number based on the minimum value of the first index in the preset data sequence and the first index of the data.

[0121] According to an embodiment of the present invention, the apparatus 100 for radar data statistics provided by the present invention further includes a histogram generation unit. The histogram generation unit is coupled to the counting unit 130 and configured to, after counting all data in the preset data sequence, read the register address and the value stored in the register, and generate a statistical histogram with the register address as the horizontal axis and the value in the register as the vertical axis.

[0122] Other specific limitations of the apparatus 100 for radar data statistics are similar to those of the radar data statistics method 10 described above, and can be found in the above description of the radar data statistics method 10, which will not be repeated here.

[0123] According to one embodiment of the present invention, such as Figure 8As shown, the present invention also provides a radar sensor 200, including: a transmitting unit 210, a receiving unit 220, a mixing unit 230, a sampling unit 240, an FFT unit 250, a radar data statistics device 100 as described above, and an interference determination unit 260. The transmitting unit 210 is configured to transmit a continuous wave whose frequency varies linearly with time. The receiving unit 220 is configured to receive millimeter-wave signals, including echoes transmitted by the transmitting unit 210 and reflected by a target. The mixing unit 230 is coupled to the transmitting unit 210 and the receiving unit 220, respectively, and is configured to mix the millimeter-wave signal received by the receiving unit 230 with the continuous wave signal transmitted by the transmitting unit 210 to generate a mixed signal. The sampling unit 240 is coupled to the mixing unit 230 and is configured to sample the mixed signal, and output sampled data after analog-to-digital conversion. FFT unit 250 is coupled to sampling unit 240 and configured to perform two-dimensional fast Fourier transform on the sampled data, and output one-dimensional Fourier transform data and two-dimensional Fourier transform data respectively.

[0124] The radar data statistics device 100, as described above, is coupled to the sampling unit 240 and the FFT unit 250, respectively, and configured to: perform statistics on one or more of the sampled data, the one-dimensional FFT data, and the two-dimensional FFT data; after completing the statistics on all data, read the register address and the value stored in the register, and generate a statistical histogram with the register address as the x-axis and the value in the register as the y-axis. The interference determination unit 260 is coupled to the radar data statistics device 100 and configured to: perform one or more of the following operations on the mixed signal: interference detection, constant false alarm rate processing, and sidetrack detection, based on the statistical histogram.

[0125] According to one embodiment of the present invention, in the radar sensor 200, the device 100 for radar data statistics performs statistics on two-dimensional FFT data to obtain the number of samples corresponding to multiple energy values, and the interference detection unit 260 performs interference detection based on the number of samples corresponding to the multiple energy values.

[0126] According to one embodiment of the present invention, the interference detection unit 260 calculates the sum of energy within a preset energy range based on the number of samples corresponding to the plurality of energy values; and determines whether the mixing signal includes an interference signal based on the sum of energy.

[0127] According to one embodiment of the present invention, in the radar sensor 100, the device 100 for radar data statistics performs statistics on the two-dimensional FFT data to obtain the number of samples corresponding to multiple speed values. The interference detection unit 260 determines whether there are large obstacles such as lane changes or guardrails that exceed the radar detection range based on the number of samples corresponding to the multiple speed values.

[0128] According to one embodiment of the present invention, in the radar sensor 200, the device 100 for radar data statistics performs statistics on two-dimensional FFT data to obtain the number of samples corresponding to multiple energy values, and the interference detection unit 260 performs constant false alarm processing based on the number of samples corresponding to the multiple energy values.

[0129] According to one embodiment of the present invention, the interference detection unit 260 obtains the median of the energy values ​​based on the number of samples corresponding to the plurality of energy values, and sets a dynamic threshold (interference detection threshold) based on the median of the energy values.

[0130] It is important to note that in practical applications, after finding the interval (bin) containing the median, the corresponding sample data can be recovered using the interval index (bin address) to ensure that the format of the recovered data is consistent with the format of the sample data.

[0131] According to one embodiment of the present invention, such as Figure 8 As shown, the radar sensor 200 provided by the present invention further includes a target detection unit 270. The target detection unit 270 is coupled to the FFT unit 250 and the interference determination unit 260, respectively, and configured such that: when the interference determination unit 260 determines that the mixed signal does not contain an interference signal, the target detection unit 270 obtains the distance and velocity of the target object from the one-dimensional FFT data and / or the two-dimensional FFT data according to the interference detection threshold after constant false alarm rate processing.

[0132] The radar data statistical method provided by this invention is applicable to various radar data, including ADC sampling data, 2D FFT power data, and other formats of non-negative real data. This method offers fast classification and statistical analysis with low computational complexity, improving radar data processing efficiency. The radar data statistical device provided by this invention is easy to implement in hardware, providing hardware support for subsequent noise floor estimation, interference detection, constant false alarm rate (CFAR) processing, or edge detection using the aforementioned various radar data A. The radar sensor provided by this invention, integrating the aforementioned radar data statistical device, simultaneously detects the distance and velocity of targets and uses the detected data (2D FFT data) for interference detection, simplifying the calculation process, saving computational power, and increasing the speed of processing raw radar data.

[0133] Based on the histogram hardware accelerator described in the above embodiments, the application of the above histogram hardware accelerator in an automotive millimeter-wave radar system, taking constant false alarm rate (CFAR) detection as an example, will be explained in detail below:

[0134] Due to the presence of interference signals, the range-Doppler spectrum generated after the signal processing unit performs a two-dimensional fast Fourier transform on the mixed signal may exhibit false alarms. To address this issue, an appropriate detection threshold needs to be set. If the detection threshold is set too high, some weak targets will not be detected; if the threshold is set too low, some noise energy may be detected, resulting in false alarms. The detection threshold is typically set based on the distance between the target and the radar. Since radar has a minimum range resolution, different detection thresholds can be set according to different range thresholds.

[0135] Commonly used constant false alarm rate (CFAR) detection algorithms include CA-CFAR, SOGO-CFAR, and OS-CFAR. OS-CFAR is widely used due to its superior detection performance. Figure 9a As shown, OS-CFAR requires sorting the input data. For example, it sorts the energy values ​​corresponding to the 2D-FFT plane, selects the Kth largest energy value, multiplies it by a coefficient T, and uses this as the first detection threshold. Then, it compares the energy value corresponding to the 2D-FFT plane at the target coordinate with the first detection threshold. If the corresponding energy value is greater than the first detection threshold, the sample at that coordinate is determined to be the target; if the corresponding energy value is less than or equal to the first detection threshold, the sample at that coordinate is determined to be noise and ignored. In the OS-CFAR operation, the time complexity of simple sorting is O(N). 2 The time complexity of quicksort is O(Nlog(N)), where N is the number of energy value samples. As the number of samples N increases, the complexity grows more rapidly than linearly, regardless of the sorting method used. In automotive radar applications, real-time processing of the algorithm is crucial. With the increasing resolution of automotive radar, the amount of 2D-FFT data is also growing. At this point, the time consumption of CFAR detection becomes a bottleneck restricting the system's real-time performance.

[0136] To address the constant false alarm rate (CFAR) problem in radar echoes, the histogram hardware accelerator described in this application can replace traditional sorting operations with histogram statistics to implement the histogram-based OS-CFAR method. This effectively reduces processing time while obtaining approximate detection threshold estimation results. A histogram-based ordered statistical constant false alarm rate (OS-CFAR) method may include:

[0137] Step S101: After performing discretization spectrum analysis on the signal received by the radar, such as analog-to-digital conversion, sampling, and two-dimensional fast Fourier transform, the range-Doppler spectrum (RD spectrum) can be obtained. The range-Doppler spectrum may include target parameter-related data information such as range dimension, velocity dimension, and energy dimension.

[0138] Step S102: In the aforementioned range-Doppler spectrum, energy distribution statistics can be performed along the velocity dimension for a preset range gate to obtain the number of samples corresponding to multiple first energy values. This energy distribution statistics are completed using the histogram hardware accelerator described in the above embodiments. For example: normalizing multiple first energy values ​​to obtain the first exponent and first mantissa of each first energy value; generating register addresses based on the first exponent and first mantissa of each first energy value; and adjusting the values ​​in the corresponding registers based on the register addresses.

[0139] Simultaneously, when performing energy distribution statistics using the aforementioned histogram hardware accelerator, the mantissa portion of multiple first energy values ​​can be shifted until the first digit of the mantissa is 1, and the shifted mantissa portion can be used as the first mantissa; the exponent portion of the multiple first energy values ​​for which the first mantissa is obtained can be subtracted to keep the corresponding first energy value unchanged, and the processed exponent portion can be used as the first exponent; the first number of bits used to store exponent information in the register address is determined based on the maximum and minimum values ​​of the first exponents of the multiple first energy values; the second number of bits used to store mantissa information in the register address is determined based on the first number of bits used to store exponent information in the register address and the preset number of bits in the register address; a first exponent number is obtained based on the first exponent of each first energy value, and the first exponent number has the first number of bits used to store exponent information; a first mantissa number is obtained based on one or more preset valid bits of the first mantissa of each first energy value, and the first mantissa number may have the second number of bits used to store mantissa information; the first exponent number and the first mantissa number are combined to generate a register address; and the value in the corresponding register is incremented by 1 based on the register address.

[0140] Step S103 involves searching for the Kth sample based on the number of samples corresponding to multiple first energy values, where K can be a preset ordinal number, i.e., K is a positive integer. After processing by the aforementioned histogram hardware accelerator, the Kth sample is searched based on the values ​​stored in the registers corresponding to multiple register addresses. In the aforementioned statistical histogram, the total number of samples for the first energy value is N, and K = N / 2 is taken.

[0141] Step S104: Set the detection threshold based on the first energy value of the Kth sample. The value of K is related to the noise distribution in the application scenario. Optionally, the Kth first energy value can be multiplied by a preset factor to set the detection threshold of the corresponding distance gate. For example, multiplying the Kth first energy value by 2 corresponds to the distance detection threshold. The coefficient T can be used to reflect the actual noise floor.

[0142] The OS-CFAR algorithm and other algorithms in the aforementioned constant false alarm rate (CFAR) detection methods can reduce the time complexity of sorting operations from O(N) to O(N). 2 The time complexity is reduced from O(Nlog(N)) to O(N) using histogram statistics, thus significantly improving the real-time performance of signal processing and making it more suitable for vehicle radar applications.

[0143] Specifically:

[0144] like Figures 9b-9c As shown, in a radar system, the transmitter can transmit M LFMCW waveform pulses per frame. After receiving these M LFMCW waveform pulses, the receiver first samples each pulse, assuming each pulse obtains N equally spaced sampling points. Then, an N-point range-dimensional FFT is performed on each pulse with N sampling points, resulting in M ​​sets of N-point range-dimensional FFT data. From these M sets of N-point range-dimensional FFT data, M data points with the same index value (the index value range can be 1, 2, ..., n...N) are extracted and subjected to an M-point Doppler-dimensional FFT, resulting in N sets of M-point Doppler-dimensional FFT data, thus obtaining the following... Figure 9c The 2D FFT data plane is shown.

[0145] like Figure 9c As shown, assuming that for a certain coordinate to be detected on the nth distance gate, the reference region is selected as the distance gate. Based on the M 2D FFT energy data along the Doppler dimension of the distance gate: P1, P2...PM, after taking the logarithm of these energy data, histogram statistics are performed to find the interval where the Kth size of energy is located from the statistical results. The energy value obtained by multiplying the energy value of the detection interval by a coefficient can be used as the detection threshold.

[0146] like Figure 9d As shown, taking actual LFMCW radar 2D FFT data as an example, if the range dimension FFT points are 256, due to symmetry, the range gate index values ​​from 0 to 127 can be obtained, meaning the Doppler dimension FFT points can also be 256. In the figure, the range gate index value for target T is 56, and the statistical results of the 2D FFT energy histogram on this range gate are as follows... Figure 9eAs shown, the number of interval divisions is set to 32. Assuming that the energy of the 128th sample from smallest to largest is taken as the decision threshold, the energy interval of the sample is approximately -13.8dB calculated from the histogram. This energy value can be used as the detection threshold value of the distance gate.

[0147] In some optional embodiments, based on the descriptions in the above embodiments, there are many methods for setting the statistical interval range of histogram statistics. The maximum and minimum values ​​of the statistical interval can be determined in advance; alternatively, the maximum and minimum values ​​of the statistical interval can be obtained from the input data, for example, using the maximum value of the input data as the maximum value of the statistical interval and the minimum value of the input data as the minimum value of the statistical interval. Similarly, there are many methods for selecting the reference region. As described in the embodiments of this application, a distance gate can be selected as the reference region, i.e. Figure 9f The reference area shown can also be as follows: Figure 9g A reference region surrounding the target to be detected. Furthermore, the preprocessing of the input energy can be performed using a base-2 logarithm or a base-10 logarithm, depending on the specific requirements. The order of magnitude K can also be adjusted based on actual needs; for example, K can be set to N / 2, where N can be the total number of samples in the target region.

[0148] In this embodiment, histogram statistics are performed on the energy values ​​of the input reference region sample points. Since the energy intervals of the resulting histogram are arranged in ascending order and the number of samples in each interval is known, the interval of the Kth energy value in the histogram can be quickly found. The energy within this interval can then be used as the estimated detection threshold. Compared to the time complexity of OS-CFAR, which is O(N²) or O(Nlog(N)), the time complexity of OS-CFAR based on histogram statistics in this embodiment is only O(N), which is much lower than the time complexity of the sorting operation, thus significantly improving real-time performance.

[0149] Based on the same histogram hardware accelerator or the same architecture, a histogram-based interference detection method can also be implemented, specifically:

[0150] Step S201: Perform a two-dimensional fast Fourier transform on the received signal to obtain a range-Doppler spectrum, which includes a range dimension, a velocity dimension, and an energy dimension.

[0151] In step S202, within the range-Doppler spectrum, for a preset range gate, energy distribution statistics are performed along the velocity dimension to obtain an energy statistical histogram. The energy distribution statistics are completed using the aforementioned histogram hardware accelerator, specifically: performing histogram statistics on the first energy value of the energy dimension includes: normalizing the multiple first energy values ​​to obtain the first exponent and first mantissa of each first energy value; generating register addresses based on the first exponent and first mantissa of each first energy value; and adjusting the values ​​in the corresponding registers based on the register addresses.

[0152] Step S103: Based on the statistical characteristics of the energy statistical histogram, interference detection is performed on the preset distance gate. After energy statistics are completed by the aforementioned histogram hardware accelerator, the statistical characteristics of the energy statistical histogram are reflected in multiple register addresses and the values ​​stored at those addresses. Based on the multiple register addresses and their stored values, a series of operations such as retrieval, summation / partial summation, etc., can be performed to complete the interference detection of the preset distance gate.

[0153] Based on the same histogram hardware accelerator or architecture, a histogram-based detection method for stationary targets can also be implemented, specifically:

[0154] Step S301: Perform a two-dimensional fast Fourier transform on the received signal to obtain the range-Doppler spectrum, which includes a range dimension, a velocity dimension, and an energy dimension.

[0155] Step S302: In the range-Doppler spectrum, velocity distribution statistics are performed on the effective target points to obtain the number of samples corresponding to multiple first velocity values. The velocity distribution statistics are completed by the aforementioned histogram hardware accelerator, namely: performing histogram statistics on multiple first velocity values, including: normalizing the multiple first velocity values ​​to obtain the first exponent and first mantissa of each first velocity value; generating register addresses based on the first exponent and first mantissa of each first velocity value; and adjusting the values ​​in the corresponding registers based on the register addresses.

[0156] Step S303: Based on the number of samples corresponding to the plurality of first velocity values, determine whether a stationary target exists. After processing by the aforementioned histogram hardware accelerator, the presence of a stationary target is determined based on the values ​​stored in the registers corresponding to the multiple register addresses.

[0157] In some alternative embodiments, based on similar ideas described above, histogram hardware accelerators with the same or similar architectures can also be used, as well as signal processing / data processing / detection methods that require obtaining statistical characteristics of the output data, such as noise floor estimation.

[0158] It should be noted that the aforementioned hardware structure based on histogram hardware accelerators can be integrated into the chip (or integrated circuit structure) as a hardware accelerator for related algorithms. That is, the same histogram hardware accelerator can be used to implement the related signal processing algorithms based on histogram statistics in the chip, such as noise reduction estimation, interference detection, OS-CFAR, and sidetrack detection.

[0159] This application also provides an integrated circuit, which may include a radio frequency (RF) module, an analog signal processing module, and a digital signal processing module connected in sequence. The RF module can be used to generate RF transmitted signals and receive RF received signals. The analog signal processing module can be used to down-convert the RF received signals to obtain intermediate frequency (IF) signals. The digital signal processing module can be used to perform analog-to-digital conversion on the IF signals to obtain digital signals. The data processing module can be used to perform sampling, discretization spectrum processing, and digital data analysis on the digital signals to achieve target information detection. The data processing module can also perform histogram statistics based on the method described in any embodiment of this application.

[0160] In an optional embodiment, the integrated circuit in this application embodiment can be a millimeter-wave radar chip. The types of digital functional modules in the integrated circuit can be determined according to actual needs. For example, in a millimeter-wave radar chip, the data processing module can be used for range Vidoff transformation, velocity Vidoff transformation, constant false alarm rate detection, direction of arrival detection, point cloud processing, etc., to acquire information such as the target's distance, angle, velocity, shape, size, surface roughness, and dielectric properties.

[0161] Optionally, the integrated circuit may be an AiP (Antenna-In-Package) chip structure, an AoP (Antenna-On-Package) chip structure, or an AoC (Antenna-On-Chip) chip structure.

[0162] In an optional embodiment, the integrated circuit may be equivalent to the radar chip described in any embodiment of this application, that is, they may have the same structure and function, and may be combined with each other to form a cascaded structure. For the sake of simplicity, it will not be described in detail here, but it should be understood that the technology that those skilled in the art should know based on the content described in this application should be included within the scope of this application.

[0163] In one embodiment, this application also provides a wireless device, comprising: a carrier; an integrated circuit as described in any of the above embodiments, wherein the integrated circuit may be disposed on the carrier; and an antenna disposed on the carrier, or integrated with the integrated circuit as a single device disposed on the carrier (i.e., the antenna may be an antenna disposed in an AiP, AoP, or AoC structure); wherein the integrated circuit is connected to the antenna (i.e., the sensing chip or integrated circuit does not have an integrated antenna, such as a conventional SoC), and is used to transmit and receive radio signals. The carrier may be a printed circuit board (PCB), and the first transmission line may be a PCB trace or other types of waveguide structures, etc.

[0164] In one embodiment, this application also provides a wireless device, which may include: a carrier; an integrated circuit as described in any of the above embodiments; and an antenna disposed on the carrier, or integrated with the sensing chip or the integrated circuit as a single device disposed on the carrier (i.e., the antenna may be an antenna disposed in an AiP or AoC structure); wherein the sensing chip or the integrated circuit is connected to the antenna via a first transmission line (i.e., the integrated circuit does not have an integrated antenna, and may be a SoC chip, etc.), for transmitting and receiving radio signals. The carrier may be a printed circuit board (PCB) (such as a development board, data acquisition board, or the motherboard of a device, etc.).

[0165] In one embodiment, this application also provides a terminal device, including: a device body; and a wireless device disposed on the device body as described in any of the above embodiments; wherein the wireless device can be used to achieve target detection.

[0166] Specifically, based on the above embodiments, in one optional embodiment of this application, the wireless device may be disposed outside the device body or inside the device body. In other optional embodiments of this application, the wireless device may be partially disposed inside the device body and partially disposed outside the device body. This application does not limit the specific implementation; it may be determined according to the circumstances.

[0167] In an optional embodiment, the aforementioned device body can be a component or product applied in fields such as smart cities, smart homes, transportation, smart homes, consumer electronics, security monitoring, industrial automation, in-cabin detection (such as smart cockpits), medical devices, and healthcare. For example, the device body can be intelligent transportation equipment (such as automobiles, bicycles, motorcycles, ships, subways, trains, etc.), security equipment (such as cameras), liquid level / flow rate detection equipment, smart wearable devices (such as wristbands, glasses, etc.), smart home devices (such as robot vacuum cleaners, door locks, televisions, air conditioners, smart lights, etc.), various communication devices (such as mobile phones, tablets, etc.), as well as devices such as barriers, intelligent traffic lights, intelligent signs, traffic cameras, and various industrial robotic arms (or robots). It can also be various instruments for detecting vital signs parameters and various devices equipped with such instruments, such as in-cabin vital sign detection in automobiles, indoor personnel monitoring, smart medical devices, and consumer electronic devices.

[0168] The wireless device may be any of the wireless devices described in any embodiment of this application. The structure and working principle of the wireless device have been described in detail in the above embodiments, and will not be repeated here.

[0169] It should be noted that wireless devices can transmit and receive radio signals to achieve functions such as target detection and / or communication, thereby providing the device body with target detection information and / or communication information, and thus assisting or even controlling the operation of the device body.

[0170] For example, when the aforementioned device is applied to an advanced driver assistance system (ADAS), wireless devices (such as millimeter-wave radar) used as vehicle sensors can assist the ADAS system in realizing application scenarios such as adaptive cruise control, automatic braking assist (AEB), blind spot detection warning (BSD), lane change assist warning (LCA), rear cross traffic alert (RCTA), parking assist, rear vehicle warning, collision avoidance, and pedestrian detection.

[0171] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0172] The above-described embodiments merely illustrate preferred embodiments of the present invention and the technical principles employed. While the descriptions are specific and detailed, they should not be construed as limiting the scope of the invention. Those skilled in the art can make various obvious changes, readjustments, and substitutions without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments. Many other equivalent embodiments may be included without departing from the inventive concept, and the scope of protection of this patent is determined by the appended claims.

Claims

1. A data processing method, characterized in that, The method is applied to perform histogram statistics on a preset data sequence, wherein each data point in the preset data sequence includes an exponent and a mantissa. The method includes: The preset data sequence is normalized to obtain the first exponent and the first tail of each data point; Generate the register address based on the first exponent and first mantissa of each data point; and Adjust the value in the corresponding register according to the register address; The register address has a preset number of bits and is generated based on the first exponent and first mantissa of each data point, including: The maximum and minimum values ​​of the first exponent are obtained by searching within the normalized preset data sequence. Based on the maximum and minimum values ​​of the first exponent, determine the number of bits in the register address used to store the exponent information; A first index number is obtained based on the first index, the first index number having the first number of bits used to store index information, and the first index number is obtained based on the minimum value of the first index of the data and the first index in the preset data sequence; The preset data sequence is a radar data sequence.

2. The method as described in claim 1, wherein normalizing the preset data sequence to obtain the first exponent and the first mantissa of each data point includes: Shift the mantissa of any current data until the first bit of the mantissa is "1", and use the shifted mantissa as the first mantissa of the current data. The exponent portion of the current data that yields the first last digit is subtracted to keep its value unchanged, and the processed exponent portion is used as the first exponent of the current data.

3. The method as described in claim 1 or 2, wherein the register address has a preset number of bits, the method comprising: The number of bits used to store the exponent information in the register address is determined based on the first number of bits in the register address used to store the exponent information and the preset number of bits in the register address.

4. The method of claim 3, wherein generating the register address based on the first exponent and the first mantissa of each data further includes: A first mantissa number is obtained based on one or more preset valid bits of the first mantissa, and the first mantissa number has the second number of bits used to store mantissa information; The register address is generated by combining the first exponent number with the first mantissa number.

5. The method as described in claim 1 or 2, wherein adjusting the value in the corresponding register according to the register address includes: Increment the value in the corresponding register by 1 based on the register address.

6. The method of claim 1 or 2, comprising: After counting all the data in the preset data sequence, a statistical histogram is generated with the register address as the horizontal axis and the value stored in the register as the vertical axis.

7. The method of claim 6, comprising: A preset interval in the statistical histogram is locked, and the register addresses within the preset interval are restored to the data in the preset data sequence through an inverse transformation algorithm.

8. The method according to any one of claims 1-7, wherein the data in the preset data sequence is fixed-point non-negative real number data or floating-point non-negative real number data.

9. The method of claim 8, wherein the radar data includes one or more of the following: sampled data obtained by sampling the echo signal, two-dimensional FFT velocity dimension data obtained by performing a fast Fourier transform on the sampled data, and energy dimension data obtained by processing the sampled data.

10. A data processing apparatus, characterized in that, An apparatus for performing histogram statistics on a preset data sequence, wherein each data point in the preset data sequence includes an exponent portion and a mantissa portion, the apparatus being used to execute the method as described in any one of claims 1-9, the apparatus comprising: The data processing unit is configured to perform normalization processing on the preset data sequence to obtain the first exponent and the first tail number of each data. The address generation unit is coupled to the data processing unit and configured to generate a register address based on the first exponent and the first mantissa of each data. The counting unit, coupled to the address generation unit, is configured to adjust the value in the corresponding register according to the register address.

11. The apparatus of claim 10, comprising: The histogram generation unit, coupled to the counting unit, is configured to, after counting all data in the preset data sequence, read the register address and the value stored in the register, and generate a statistical histogram with the register address as the horizontal axis and the value in the register as the vertical axis.

12. A radar sensor, characterized in that, include: The transmitting unit is configured to transmit a continuous wave whose frequency changes linearly with time; The receiving unit is configured to receive echo signals; A mixing unit is coupled to the transmitting unit and the receiving unit respectively, and is configured to perform down-frequency processing on the echo signal to obtain an intermediate frequency signal; A sampling unit, coupled to the mixing unit, is configured to perform analog-to-digital conversion on the intermediate frequency signal and then sample it to output sampled data; The FFT unit is coupled to the sampling unit and configured to perform a two-dimensional fast Fourier transform on the sampled data, and output one-dimensional Fourier transform data and two-dimensional Fourier transform data respectively. The data processing apparatus as described in claim 10 or 11, coupled to the sampling unit and the FFT unit respectively, is configured as follows: Statistical analysis is performed on one or more of the following: the sampled data, the two-dimensional FFT velocity dimension data obtained by performing a fast Fourier transform on the sampled data, and the energy dimension data obtained by processing the sampled data. After all the data has been statistically analyzed, the register address and the value stored in the register are read. A statistical histogram is generated with the register address as the x-axis and the value in the register as the y-axis.

13. The radar sensor of claim 12, comprising: The interference determination unit, coupled to the data processing device, is configured as follows: Based on the statistical histogram, one or more of the following operations are performed on the intermediate frequency signal: interference detection, constant false alarm rate processing, and sidetrack detection.

14. The radar sensor of claim 13, comprising: The target detection unit, coupled to the FFT unit and the interference determination unit respectively, is configured as follows: When the interference determination unit determines that the intermediate frequency signal does not contain interference signals, the target detection unit obtains the distance and velocity of the target object from the one-dimensional FFT data and / or the two-dimensional FFT data based on the interference detection threshold after constant false alarm rate processing.

15. An integrated circuit, characterized in that, It includes a radio frequency module, an analog signal processing module, and a digital signal processing module connected in sequence; The radio frequency module is used to generate radio frequency transmission signals and receive radio frequency reception signals; The analog signal processing module is used to down-frequency the received radio frequency signal to obtain an intermediate frequency signal; The digital signal processing module is used to perform analog-to-digital conversion on the intermediate frequency signal to obtain a digital signal; as well as A data processing module is used to process the digital signal to achieve target detection; The data processing module further includes a histogram hardware accelerator, which performs signal processing based on the method described in any one of claims 1-9.

16. The integrated circuit according to claim 15, characterized in that, The integrated circuit is a millimeter-wave radar chip.

17. The integrated circuit according to claim 16, characterized in that, The histogram hardware accelerator performs at least one of the following signal processing steps: noise low estimation, interference detection, OS-CFAR, and sidetrack detection.

18. A wireless device, characterized in that, include: Carrier; The integrated circuit as described in claim 15 or 16 is disposed on the carrier. An antenna is disposed on the carrier, or the antenna and the integrated circuit are integrated into a single device and disposed on the carrier. The integrated circuit is connected to the antenna and is used to transmit the radio frequency transmission signal and / or receive the radio frequency reception signal.

19. A terminal device, characterized in that, include: Equipment body; as well as The wireless device as described in claim 18 is disposed on the device body; The wireless device is used for target detection to provide reference information for the operation of the device body.

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