Battery structure and method of manufacturing the same

CN116632094BActive Publication Date: 2026-11-03CHUZHOU JIETAI NEW ENERGY TECH CO LTD
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Patent Information

Application Number
CN202310745006.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-06-25
Publication Date
2026-11-03
Estimated Expiration
2043-06-25

AI Technical Summary

Technical Problem

现有双面隧穿层结构的太阳能电池中,正表面导电浆料的腐蚀能力难以控制,导致多晶硅层需要较高的掺杂浓度,造成蓝光吸收损耗与载流子表面再复合损耗,降低光电转换效率。

Method used

A battery structure design with partitioned doping of ultrathin silicon oxide layer and polycrystalline silicon layer is adopted. The positive-to-reflection layer is prepared by plasma chemical vapor deposition. Low-concentration and high-concentration polycrystalline silicon layers are used for electrode connection and tunneling layer connection, respectively. The boron doping concentration is optimized and combined with silver-aluminum paste electrode to improve film thickness uniformity and reflectivity.

Benefits of technology

The overall boron doping concentration was reduced, which decreased blue light absorption loss and carrier surface recombination loss, improved photoelectric conversion efficiency, enhanced film thickness uniformity and light absorption, and improved the photoelectric conversion efficiency of the battery.

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Abstract

The present application relates to the field of battery, specifically relates to a battery structure and a preparation method thereof, the preparation method comprises the following steps: (1) depositing an ultra-thin silicon oxide layer and a positive minus reverse layer on the front surface of a silicon substrate; (2) growing a low-concentration polysilicon layer one on the ultra-thin silicon oxide layer, and growing a high-concentration polysilicon layer two on the polysilicon layer one; (3) printing an electrode one on the polysilicon layer two, and connecting an electrode two on the electrode one, thus obtaining the battery structure. The part directly connected with the electrode is doped with high-concentration boron, and the part connected with the tunnel layer is doped with low-concentration boron, so that the overall boron doping concentration is reduced while ensuring good contact, the blue light absorption loss and the carrier surface recombination loss are reduced, and the photoelectric conversion efficiency is improved. The film thickness of the anti-reflection layer obtained by improving the plasma chemical vapor deposition process is uniform, and the reflectivity is small, so that the light absorption is increased, and thus the photoelectric conversion efficiency of the battery is improved.
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Description

Technical Field

[0001] This invention relates to the field of battery technology, and specifically to a battery structure and its preparation method. Background Technology

[0002] For solar cells with a double-sided tunneling layer structure, the corrosive ability of the conductive paste on the front surface is difficult to control. To protect the tunneling layer, the polycrystalline silicon layer needs to be deposited to a certain thickness to prevent it from burning through. Furthermore, to ensure good ohmic contact between the metal gate electrode and the emitter, the front surface layer requires a high surface doping concentration. Currently, full-surface doping is mainly used. However, a high-concentration boron diffusion layer across the entire surface causes blue light absorption loss and carrier surface recombination loss, leading to a decrease in photoelectric conversion efficiency. Therefore, we propose a cell structure and its fabrication method. Summary of the Invention

[0003] (i) In view of the shortcomings of the prior art, the present invention provides a battery structure and its preparation method, which overcomes the problem of serious light absorption loss in existing polycrystalline silicon batteries and improves photoelectric conversion efficiency.

[0004] (II) To achieve the above objectives, the present invention is implemented through the following technical solution: a battery structure, including a silicon substrate, a positive anti-reflection layer, an ultrathin silicon oxide layer, a polycrystalline silicon layer one, a polycrystalline silicon layer two, a positive electrode one, and a positive electrode two.

[0005] Preferably, both electrode one and electrode two are silver-aluminum paste.

[0006] This invention also provides a method for preparing a battery structure, specifically including the following steps:

[0007] (1) Deposit an ultrathin silicon oxide layer and a positive anti-reflection layer on the front side of a silicon substrate;

[0008] (2) A low-concentration polycrystalline silicon layer 1 is grown on an ultrathin silicon oxide layer, and a high-concentration polycrystalline silicon layer 2 is grown on the polycrystalline silicon layer 1.

[0009] (3) Print electrode one on polycrystalline silicon layer two, connect electrode two on electrode one, and dry and sinter to obtain the product.

[0010] Preferably, in step (1), the thickness of the ultrathin silicon oxide layer is 1-3 nm, and the thickness of the positive-to-reverse layer is 65-70 nm.

[0011] Preferably, in step (1), the positive-to-reverse layer is prepared by plasma chemical vapor deposition, and the process is as follows: the temperature is controlled at 420-450℃, the radio frequency power is 2500-3000W, the pressure is 160-180Pa, the total gas flow rate is 3200-3500sccm, the flow ratio of NH3 to SiH4 is (5-10):1, and the time is 600-750s.

[0012] Preferably, the controlled temperature is 450℃, the radio frequency power is 3000W, the pressure is 170Pa, the total gas flow rate is 3300sccm, the flow ratio of NH3 to SiH4 is 8:1, and the time is 700s.

[0013] Preferably, in step (2), the thickness of the first polycrystalline silicon layer is 8-15 nm, the thickness of the second polycrystalline silicon layer is 120-180 nm, and the width of the first polycrystalline silicon layer is 70-90 μm, and the width of the second polycrystalline silicon layer is 50-70 μm.

[0014] Preferably, in step (2), the boron doping concentration of the first polycrystalline silicon layer is 2E19-10E19 cm⁻¹. -3 The boron doping concentration of the second polycrystalline silicon layer is 2E20-5E20cm⁻¹. -3 .

[0015] (III) This invention provides a battery structure and its preparation method, which have the following beneficial effects:

[0016] 1. The present invention performs high-concentration boron doping on the part directly connected to the electrode and low-concentration boron doping on the part connected to the tunneling layer. While ensuring good contact, it can also reduce the overall boron doping concentration, reduce blue light absorption loss and carrier surface recombination loss, and improve photoelectric conversion efficiency.

[0017] 2. By improving the plasma chemical vapor deposition process, the present invention obtains an antireflective layer with uniform thickness and low reflectivity, which increases light absorption and thus improves the photoelectric conversion efficiency of the battery. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the battery structure of the present invention;

[0019] Figure 2 This is a top view of part of the battery structure of the present invention;

[0020] Figure 3 This is a schematic diagram of the back structure of the TOPCon battery.

[0021] In the figure: 1-Silicon substrate, 2-Ultra-thin silicon oxide layer, 3-Polycrystalline silicon layer one, 4-Polycrystalline silicon layer two, 5-Positive anti-reflection layer, 6-Positive electrode one, 7-Positive electrode two, 8-Tunneling layer, 9-Polycrystalline silicon layer, 10-Back anti-reflection layer, 11-Back electrode. Detailed Implementation

[0022] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0023] Example 1

[0024] like Figure 1-2 As shown, a battery structure includes a silicon substrate 1, a positive anti-reflection layer 5, an ultrathin silicon oxide layer 2, a first polycrystalline silicon layer 3, a second polycrystalline silicon layer 4, a first positive electrode 6, and a second positive electrode 7.

[0025] Among them, electrode 6 and electrode 7 are both silver-aluminum paste.

[0026] Example 2

[0027] A TOPCon cell back-side structure, wherein a tunneling layer 8 is deposited on the back side of the TOPCon cell silicon wafer 12, a polycrystalline silicon layer 9 is grown on the tunneling layer 8, a back anti-reflection layer 10 is grown on the polycrystalline silicon layer 9, and a back electrode 11 is connected to the polycrystalline silicon layer 9.

[0028] Example 3

[0029] A method for preparing a battery structure includes the following steps:

[0030] (1) An ultrathin silicon oxide layer with a thickness of 1 nm and a positive anti-reflection layer with a thickness of 65 nm are deposited on the front side of a silicon substrate;

[0031] (2) A low-concentration polycrystalline silicon layer 1 with a thickness of 8 nm and a width of 70 μm is grown on an ultrathin silicon oxide layer, and a high-concentration polycrystalline silicon layer 2 with a thickness of 120 nm and a width of 50 μm is grown on the polycrystalline silicon layer 1. The boron doping concentration of the polycrystalline silicon layer 1 is 2E19cm⁻¹. -3 The boron doping concentration of the second polycrystalline silicon layer is 2E20cm⁻¹. -3 .

[0032] (3) Print electrode one on polycrystalline silicon layer two, connect electrode two on electrode one, and dry and sinter to obtain the product.

[0033] In step (1), the positive-to-reverse layer is prepared by plasma chemical vapor deposition. The process is as follows: the temperature is controlled at 420℃, the radio frequency power is 2500W, the pressure is 160Pa, the total gas flow rate is 3200sccm, the flow ratio of NH3 to SiH4 is 5:1, and the time is 600s.

[0034] In this embodiment, the back side of the silicon substrate adopts the TOPCon battery back side structure of Embodiment 2.

[0035] Example 4

[0036] A method for preparing a battery structure includes the following steps:

[0037] (1) An ultrathin silicon oxide layer with a thickness of 2 nm and a positive anti-reflection layer with a thickness of 68 nm are deposited on the front side of a silicon substrate;

[0038] (2) A low-concentration polycrystalline silicon layer 1 with a thickness of 10 nm and a width of 80 μm is grown on an ultrathin silicon oxide layer, and a high-concentration polycrystalline silicon layer 2 with a thickness of 160 nm and a width of 60 μm is grown on the polycrystalline silicon layer 1. The boron doping concentration of the polycrystalline silicon layer 1 is 6E19cm⁻¹. -3 The boron doping concentration of the second polycrystalline silicon layer is 4E20cm⁻¹. -3 .

[0039] (3) Print electrode one on polycrystalline silicon layer two, connect electrode two on electrode one, and dry and sinter to obtain the product.

[0040] In step (1), the positive-to-reverse layer is prepared by plasma chemical vapor deposition. The process is as follows: the temperature is controlled at 450℃, the radio frequency power is 3000W, the pressure is 170Pa, the total gas flow rate is 3300sccm, the flow ratio of NH3 to SiH4 is 8:1, and the time is 700s.

[0041] In this embodiment, the back side of the silicon substrate adopts the TOPCon battery back side structure of Embodiment 2.

[0042] Example 5

[0043] A method for preparing a battery structure includes the following steps:

[0044] (1) An ultrathin silicon oxide layer with a thickness of 3 nm and a positive anti-reflection layer with a thickness of 70 nm are deposited on the front side of a silicon substrate;

[0045] (2) A low-concentration polycrystalline silicon layer 1 with a thickness of 15 nm and a width of 90 μm is grown on an ultrathin silicon oxide layer, and a high-concentration polycrystalline silicon layer 2 with a thickness of 180 nm and a width of 70 μm is grown on the polycrystalline silicon layer 1. The boron doping concentration of the polycrystalline silicon layer 1 is 10E19cm⁻¹. -3The boron doping concentration of the second polycrystalline silicon layer is 5E20cm. -3 .

[0046] (3) Print electrode one on polycrystalline silicon layer two, connect electrode two on electrode one, and dry and sinter to obtain the product.

[0047] In step (1), the positive-to-reverse layer is prepared by plasma chemical vapor deposition. The process is as follows: the temperature is controlled at 450℃, the radio frequency power is 2800W, the pressure is 180Pa, the total gas flow rate is 3500sccm, the flow ratio of NH3 to SiH4 is 10:1, and the time is 750s.

[0048] In this embodiment, the back side of the silicon substrate adopts the TOPCon battery back side structure of Embodiment 2.

[0049] Performance testing

[0050] 1. The performance of conventional TOPCon batteries and the batteries in Examples 3-5 was tested. The specific test results are shown in the table below.

[0051] Table 1 Test Results

[0052]

[0053]

[0054] 2. The cells (antireflection layer) in Examples 3-5 were tested using an ellipsometry and a reflectometer. The specific test results are shown in the table below.

[0055] Table 2 Test Results

[0056] Group Refractive index reflectivity Example 3 2.01 4.2 Example 4 1.98 3.8 Example 5 1.99 4.5

[0057] The embodiments disclosed herein are preferred embodiments, but are not limited thereto. Those skilled in the art can readily grasp the spirit of the present invention based on the above embodiments and make different extensions and variations, but as long as they do not depart from the spirit of the present invention, they are all within the protection scope of the present invention.

Claims

1. A method for preparing a battery structure, characterized in that, It includes a silicon substrate, a positive anti-reflection layer, an ultrathin silicon oxide layer, a first polycrystalline silicon layer, a second polycrystalline silicon layer, a first positive electrode, and a second positive electrode; wherein, the thickness of the first polycrystalline silicon layer is 8-15nm, the thickness of the second polycrystalline silicon layer is 120-180nm, the width of the first polycrystalline silicon layer is 70-90μm, the width of the second polycrystalline silicon layer is 50-70μm, the thickness of the ultrathin silicon oxide layer is 1-3nm, and the thickness of the positive anti-reflection layer is 65-70nm; The positive-to-negative layer was prepared by plasma chemical vapor deposition, and the process is as follows: the temperature is controlled at 420-450℃, the radio frequency power is 2500-3000W, the pressure is 160-180Pa, the total gas flow rate is 3200-3500sccm, the flow ratio of NH3 to SiH4 is (5-10):1, and the time is 600-750s; The method for preparing this battery structure includes the following steps: (1) Deposit an ultrathin silicon oxide layer and a positive anti-reflection layer on the front side of a silicon substrate; (2) A low-concentration polycrystalline silicon layer one is grown on an ultrathin silicon oxide layer, and a high-concentration polycrystalline silicon layer two is grown on the polycrystalline silicon layer one; wherein, the boron doping concentration of the polycrystalline silicon layer one is 2E19-10E19cm. -3 The boron doping concentration of the second polycrystalline silicon layer is 2E20-5E20cm⁻¹. -3 ; (3) Print electrode one on polycrystalline silicon layer two, connect electrode two on electrode one, and dry and sinter to obtain the product.

2. The method for preparing the battery structure as described in claim 1, characterized in that, Both electrode one (6) and electrode two (7) are made of silver-aluminum paste.

3. The method for preparing the battery structure as described in claim 1, characterized in that, The temperature was controlled at 450℃, the radio frequency power at 3000W, the pressure at 170Pa, the total gas flow rate at 3300sccm, the flow ratio of NH3 to SiH4 at 8:1, and the time at 700s.

Citation Information

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