A low-dropout linear voltage regulator and related devices, voltage control methods

Abstract

The application relates to a low-dropout linear voltage regulator and related devices and a voltage control method, and belongs to the field of electronic circuits. The low-dropout linear voltage regulator comprises a transistor switch and a bias tube control circuit. The first end of the transistor switch is configured to be electrically connected with an input power supply, the second end of the transistor switch is configured to be electrically connected with a load, and the transistor switch is configured to adjust the output current thereof according to a received control signal, wherein the control signal is used for adjusting the output current of the transistor switch; the bias tube control circuit is electrically connected with the substrate end of the transistor switch; and the bias tube control circuit is configured to provide a bias voltage to the substrate end of the transistor switch to adjust the substrate voltage of the transistor switch. By adjusting the substrate voltage of the transistor switch in the low-dropout linear voltage regulator, the response speed of the LDO can be improved, and the output voltage has a wider output range, so that the chip power consumption can be reduced in a low-power mode.

Description

TECHNICAL FIELD

[0001] The present application belongs to the field of electronic circuits, and particularly relates to a low dropout linear regulator and related devices and voltage control methods. BACKGROUND

[0002] In current integrated circuit design, different modules of the same chip are usually powered by different power supply voltages. In order to meet the above power supply requirements, the power management device often uses LDO (Low Dropout linear regulator) power supply. LDO can provide configurable current and configurable voltage for different loads.

[0003] The output voltage Vout of the LDO is controlled by controlling the conduction strength (related to the number of conducting transistors and the conduction degree of the transistors) of the transistor switch MP (as an array of transistor switches) in the LDO. The conduction strength of the transistor switch MP can be controlled according to the feedback voltage Vfb, so that the output voltage is stable. Among them, Vfb is the resistance division of Vout, which is used to represent the actual voltage when the integrated circuit is working. If the output voltage Vout rises, Vfb will also rise, and by controlling the transistor switch MP, the output voltage will drop and stabilize to the expected stable voltage value; similarly, if the output voltage drops, by controlling the transistor switch MP, the output voltage will rise back to the expected stable voltage value. SUMMARY

[0004] In view of this, the purpose of the present application is to provide a low dropout linear regulator and related devices (including power management devices, SOC chips, electronic devices) and voltage control methods to improve the problem of slow response speed of the existing LDO.

[0005] Embodiments of the present application are implemented as follows:

[0006] In a first aspect, the embodiments of the present application provide a low dropout linear regulator, comprising: a transistor switch and a bias tube control circuit; a first end of the transistor switch is configured to be electrically connected with an input power supply, a second end of the transistor switch is configured to be electrically connected with a load, and the transistor switch is configured to adjust its output current according to a received control signal, wherein the control signal is used to adjust the output current of the transistor switch; the bias tube control circuit is electrically connected with a substrate end of the transistor switch; and the bias tube control circuit is configured to provide a bias voltage to the substrate end of the transistor switch to adjust the substrate voltage of the transistor switch.

[0007] In the embodiments of the present application, by introducing a bias control circuit, a bias voltage is provided to the substrate end of the transistor switch in the low dropout linear regulator, so as to adjust the substrate voltage of the transistor switch in the low dropout linear regulator, so that the conduction of the transistor switch is easier or more difficult, so that the response speed of the LDO can be improved, and the output voltage has a wider output range, so as to reduce the chip power consumption in the low power consumption mode.

[0008] In a possible implementation of the first aspect, the bias control circuit has multiple bias voltages, and is configured to provide different bias voltages to the substrate end of the transistor switch under different working conditions.

[0009] In the embodiments of the present application, the bias control circuit is configured to provide different bias voltages to the substrate end of the transistor switch under different working conditions, so as to adapt to different working conditions and meet various working condition requirements.

[0010] In a possible implementation of the first aspect, the bias control circuit is configured to provide any one of the following bias voltages to the substrate end of the transistor switch: a first bias voltage under a first working condition, a second bias voltage under a second working condition, and a third bias voltage under a third working condition, wherein the first bias voltage is consistent with the voltage of the input power supply, the second bias voltage is greater than the voltage of the input power supply, and the third bias voltage is less than the voltage of the input power supply.

[0011] In the embodiments of the present application, under the first working condition, a voltage consistent with the voltage of the input power supply is provided to the substrate end of the transistor switch to meet normal use requirements. Under the second working condition, a voltage greater than the voltage of the input power supply is provided to the substrate end of the transistor switch, so that the conduction of the transistor switch is more difficult, so that the output voltage can be lowered more than the original basis, which is beneficial to reduce the power consumption of the chip. Under the third working condition, a voltage less than the voltage of the input power supply is provided to the substrate end of the transistor switch, so that the conduction of the transistor switch is easier, so as to provide more current for the load, so that the output voltage can be quickly raised, and the problem of insufficient LDO power supply capacity when the load is heavy can be alleviated.

[0012] In a possible implementation of the first aspect, the bias control circuit includes multiple control branches, one end of each control branch is configured to be electrically connected with a bias voltage source, one end of each control branch is electrically connected with the substrate end of the transistor switch, and the bias voltages generated by the bias voltage sources electrically connected with different control branches are different.

[0013] In this embodiment, multiple control branches are used to provide different bias voltages to the substrate of the transistor switch, which can avoid interference between circuits.

[0014] In one possible implementation of the first aspect embodiment, each control branch includes a controlled switch, and by controlling the opening and closing of each controlled switch, different bias voltages are provided to the substrate of the transistor switch under different operating conditions.

[0015] In this embodiment, by controlling the on and off states of the controlled switches of different control branches, it is easy to provide different bias voltages to the substrate of the transistor switch under different operating conditions.

[0016] In one possible implementation of the first aspect embodiment, the bias voltage source is an LDO power supply.

[0017] In this embodiment, an LDO power supply is used to provide a bias voltage. The LDO power supply is used to track changes in the system voltage, thereby providing a reasonable bias voltage to the substrate. This avoids the bias voltage being too low compared to the input power supply, which could lead to problems such as MOSFET malfunction or excessive leakage.

[0018] Secondly, embodiments of this application also provide a power management device, including: an input power supply and a low-dropout linear regulator as described above.

[0019] Thirdly, embodiments of this application also provide a SOC chip, including the power management device as described above.

[0020] Fourthly, embodiments of this application also provide an electronic device, including the SOC chip as described above.

[0021] Fifthly, embodiments of this application also provide a voltage control method, comprising: providing a bias voltage to the substrate terminal of a transistor switch in a low-dropout linear regulator to adjust the output voltage of the low-dropout linear regulator; wherein a first terminal of the transistor switch is configured to be electrically connected to an input power supply, a second terminal of the transistor switch is configured to be electrically connected to a load, the substrate terminal of the transistor switch is configured to receive the bias voltage, and the transistor switch is configured to adjust its own output current according to a received control signal, wherein the control signal is used to adjust the output current of the transistor switch.

[0022] In one possible implementation of the fifth aspect embodiment, providing a bias voltage to the substrate of a transistor switch in a low dropout linear regulator includes providing different bias voltages to the substrate of the transistor switch under different operating conditions.

[0023] In one possible implementation of the fifth aspect embodiment, different bias voltages are provided to the substrate terminal of the transistor switch under different operating conditions, including: providing a first bias voltage to the substrate terminal of the transistor switch under a first operating condition; or, providing a second bias voltage to the substrate terminal of the transistor switch under a second operating condition; or, providing a third bias voltage to the substrate terminal of the transistor switch under a third operating condition.

[0024] Other features and advantages of this application will be set forth in the following description. The objectives and other advantages of this application can be realized and obtained through the structures specifically pointed out in the written description and the accompanying drawings. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the accompanying drawings used in the embodiments will be briefly described below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. The above and other objects, features, and advantages of this application will become clearer through the accompanying drawings.

[0026] Figure 1 A schematic diagram of a low-dropout linear regulator provided in an embodiment of this application is shown.

[0027] Figure 2 A schematic diagram of a low-dropout linear regulator provided in an embodiment of this application is shown.

[0028] Figure 3 This paper shows a schematic diagram of another low-dropout linear regulator provided in an embodiment of this application.

[0029] Figure 4 A circuit diagram of a low-dropout linear regulator provided in an embodiment of this application is shown. Detailed Implementation

[0030] The technical solutions of the embodiments of this application will now be described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. The following embodiments are provided as examples to more clearly illustrate the technical solutions of this application, and should not be used to limit the scope of protection of this application. Those skilled in the art will understand that, without conflict, the following embodiments and features can be combined with each other.

[0031] It should be noted that similar reference numerals and letters in the following figures denote similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, relational terms such as "first," "second," etc., in the description of this application are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one…" does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0032] Furthermore, the term "and / or" in this application is merely a description of the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can represent three situations: A exists alone, A and B exist simultaneously, and B exists alone.

[0033] In the description of the embodiments of this application, unless otherwise expressly specified and limited, the technical term "electrical connection" can refer to a direct electrical connection or an indirect electrical connection through an intermediate medium.

[0034] When the power consumption of a chip or load suddenly increases, the output voltage Vout of the LDO will suddenly drop. At this point, it is urgent to increase Vout to ensure the correct operation of the chip. The inventors of this application have discovered that the response time of the feedback control mechanism in existing low-dropout linear regulators (LDOs) is too slow. It is very likely that the chip will malfunction due to the low voltage before Vout is increased. And / or, when the load is in low-power mode, due to the inherent limitations of the LDO circuit design (the output voltage is typically about 0.2V lower than the input voltage Vin), its output voltage range is limited, resulting in significant power waste in low-power mode.

[0035] In view of this, this application provides a novel low-dropout linear regulator that can be widely used in power management designs of various types of chips. By adjusting the substrate voltage of the transistor switches in the low-dropout linear regulator, the response speed of the LDO can be improved, and the output voltage can have a wider output range, so as to reduce the power consumption of the chip in low-power mode.

[0036] The circuit structure of the low-dropout linear regulator provided in this application is as follows: Figure 1As shown, it includes a transistor switch and a bias control circuit. The transistor switch is a transistor array switch containing multiple transistors connected in parallel.

[0037] This application, on the one hand, adjusts the substrate voltage of the transistor switch by adding a bias control circuit for providing a bias voltage Vbias to the substrate of the transistor switch. On the other hand, by changing the connection method of the transistor switch, for example, no longer connecting the source terminal (S) of the transistor switch to the substrate terminal (B), the source terminal voltage Vs of the transistor switch and the substrate terminal voltage Vb are no longer completely consistent, thereby improving the response speed of the LDO and enabling the output voltage to have a wider output range.

[0038] The first terminal of the transistor switch is configured to be electrically connected to the input power supply Vin, and the second terminal is configured to be electrically connected to the load. The transistor switch is configured to adjust its output current according to a received control signal. The control signal is used to adjust the output current of the transistor switch. Specifically, the control signal acts on the gate of the transistor switch, adjusting the output current of the transistor switch by controlling the conduction strength of the transistor switch (related to the number of transistors conducting and the degree of conduction).

[0039] The stronger the conduction capability of a transistor switch, the greater the corresponding output current. That is, the more transistors that are conducting in a transistor switch and / or the greater the conduction degree of the transistors, the greater the corresponding output current.

[0040] Understandably, different types of transistors have different first and second terminals. For example, for a PMOS transistor, the first terminal can be the source and the second terminal can be the drain. For an NMOS transistor, the first terminal can be the drain and the second terminal can be the source.

[0041] In one implementation, a control signal can be generated based on the feedback voltage Vfb (a resistor divider of the LDO's output voltage Vout) to control the conduction strength of the transistor switch. For example, an error amplifier (EA) can be used to generate the control signal. The inverting input of the error amplifier receives the reference voltage Vref (the reference voltage output from a bandgap reference voltage source), and the non-inverting input receives the feedback voltage Vfb. The output of the error amplifier is electrically connected to the gate of the transistor switch. The schematic diagram is shown below. Figure 2 As shown. The main function of the error amplifier is to amplify the difference between the reference voltage Vref and the feedback voltage Vfb, and then use this amplified difference to control the transistor switching. Figure 2 MP stands for transistor switch, and its type is PMOS transistor.

[0042] The bias control circuit is electrically connected to the substrate end of the transistor switch. The bias control circuit is configured to provide a bias voltage to the substrate end of the transistor switch to adjust the substrate voltage of the transistor switch. Among them, the threshold voltage Vth of the MOS transistor (that is, the voltage required to turn on the MOS transistor) will change with the potential difference between its source and substrate.

[0043] The magnitude of the threshold voltage is also related to the charge amount in the depletion layer. Taking the NMOS transistor as an example, when Vb < Vs of the NMOS transistor, that is, Vbs < 0, as Vgs (the voltage difference between the gate and the source) rises, the gate attracts electrons inside the substrate to move towards the substrate surface, and a depletion layer is generated on the substrate surface. When Vgs rises to the threshold voltage, inversion occurs on the substrate surface under the gate, and the NMOS transistor starts to conduct electricity between the source and the drain. The more the charge amount in the depletion layer, the more difficult it is for the NMOS transistor to conduct, and the higher the threshold voltage. The less the charge amount in the depletion layer, the easier it is for the NMOS transistor to conduct, and the lower the threshold voltage.

[0044] When Vbs < 0, the potential difference between the gate and the substrate increases, the thickness of the depletion layer also increases, the charge amount in the depletion layer increases, resulting in an increase in the threshold voltage, and it is more difficult for the NMOS transistor to conduct. When Vbs > 0, the potential difference between the gate and the substrate decreases, the thickness of the depletion layer also decreases accordingly, the charge amount in the depletion layer decreases, resulting in a decrease in the threshold voltage, and it is easier for the NMOS transistor to conduct. For the PMOS transistor, when Vb > Vs, the threshold voltage will increase, and it is more difficult for the PMOS to conduct. When Vb < Vs, the threshold voltage will decrease, and it is easier for the PMOS to conduct, but the leakage will increase.

[0045] In this application, by introducing a bias control circuit to adjust the substrate voltage of the transistor switch, the transistor switch can be made to conduct more easily or more difficultly, so as to improve the response speed of the LDO or make the output voltage have a wider output range.

[0046] In an optional implementation manner, the bias voltage provided by the bias control circuit to the substrate end of the transistor switch can be fixed. For example, a first bias voltage is provided to the substrate end of the transistor switch, and the first bias voltage is consistent with the voltage of the input power supply.

[0047] In an optional implementation manner, the bias control circuit has multiple bias voltages. The bias control circuit is configured to provide different bias voltages to the substrate end of the transistor switch under different working conditions, so as to make the transistor switch conduct more easily or more difficultly, so as to adapt to different working conditions and meet the requirements of various working conditions.

[0048] Optionally, the bias control circuit is configured to provide any of the following bias voltages to the substrate end of the transistor switch:

[0049] (i) Under the first operating condition, a first bias voltage is provided to the substrate terminal of the transistor switch;

[0050] (ii) In the second operating condition, a second bias voltage is provided to the substrate terminal of the transistor switch;

[0051] (iii) In the third operating condition, a third bias voltage is provided to the substrate of the transistor switch.

[0052] The first bias voltage is the same as the input power supply voltage, the second bias voltage is greater than the input power supply voltage, and the third bias voltage is less than the input power supply voltage. For example, the first bias voltage = Vin, the second bias voltage = Vin + ΔV (e.g., 0.2V), and the third bias voltage = Vin - ΔV.

[0053] Understandably, the various operating conditions described above can be switched according to actual needs to meet various operating requirements. For example, assuming the current operating condition is the second operating condition, the bias control circuit is configured to provide a second bias voltage to the substrate of the transistor switch. When the operating condition switches from the second operating condition to the first operating condition, the bias voltage provided to the substrate of the transistor switch needs to be switched from the second bias voltage to the first bias voltage. Similarly, when the operating condition switches from the second operating condition to the third operating condition, the bias voltage provided to the substrate of the transistor switch needs to be switched from the second bias voltage to the third bias voltage.

[0054] For example, suppose the current operating condition is the first condition, in which the bias control circuit is configured to provide a first bias voltage to the substrate of the transistor switch. When the operating condition switches from the first condition to the second condition, the bias voltage provided to the substrate of the transistor switch needs to be switched from the first bias voltage to the second bias voltage. If the operating condition switches from the first condition to the third condition, the bias voltage provided to the substrate of the transistor switch needs to be switched from the first bias voltage to the third bias voltage.

[0055] For example, suppose we are currently in the third operating condition. At this time, the bias control circuit is configured to provide a third bias voltage to the substrate of the transistor switch. When the operating condition switches from the third operating condition to the second operating condition, the bias voltage provided to the substrate of the transistor switch needs to be switched from the third bias voltage to the second bias voltage. If the operating condition switches from the third operating condition to the first operating condition, the bias voltage provided to the substrate of the transistor switch needs to be switched from the third bias voltage to the first bias voltage.

[0056] Because different types of transistors have different first and second terminals, the first, second, and third operating conditions corresponding to different types of transistors are different.

[0057] For PMOS transistors, the source is typically connected to the power supply. The output of the bias control circuit can be configured according to the operating conditions of the load. For example, in the first operating condition (which can be any condition other than the second and third operating conditions), a first bias voltage is provided to the substrate of the transistor switch; in the second operating condition (such as when the load is in a low-power state), a second bias voltage is provided to the substrate of the transistor switch; and in the third operating condition (such as when the output voltage drop is greater than a threshold, i.e., the output voltage suddenly drops, indicating a sudden increase in the power consumption of the load), a third bias voltage is provided to the substrate of the transistor switch.

[0058] When the load is in a low-power state, by providing a second bias voltage greater than the input power supply voltage to the substrate of the transistor switch, it becomes more difficult for the PMOS transistor to turn on, thus the output voltage will drop even lower than the original voltage.

[0059] A sudden drop in the LDO's output voltage Vout indicates a sudden increase in the load's power consumption. In this case, it is urgent to increase Vout to ensure the correct operation of the chip. By providing a third bias voltage, which is lower than the input power supply voltage, to the substrate of the transistor switch, it is easier for the PMOS transistor to turn on and can provide a larger current for the load, thus alleviating the problem of insufficient power supply capacity of the LDO when the load increases.

[0060] In one implementation, the bias control circuit can be a voltage source containing multiple bias voltages, which can provide different voltages to the substrate of the transistor switch according to different operating conditions.

[0061] In another implementation, the bias control circuit may include: multiple control branches, one end of each control branch being configured to be electrically connected to a bias voltage source, one end of each control branch being electrically connected to the substrate of a transistor switch, and the bias voltage generated by the bias voltage source electrically connected to different control branches being different.

[0062] In one possible implementation, the bias control circuit includes: a first control branch, a second control branch, and a third control branch, as shown in the schematic diagram below. Figure 3 As shown. It is understandable that at any given time, among the multiple control branches, only one control branch provides a bias voltage to the substrate of the transistor switch.

[0063] One end of the first control branch is configured to be electrically connected to a first bias voltage source, and the other end of the first control branch is electrically connected to the substrate of a transistor switch. The first bias voltage source is used to generate a first bias voltage. One end of the second control branch is configured to be electrically connected to a second bias voltage source, and the other end of the second control branch is electrically connected to the substrate of a transistor switch. The second bias voltage source is used to generate a second bias voltage. One end of the third control branch is configured to be electrically connected to a third bias voltage source, and the other end of the second control branch is electrically connected to the substrate of a transistor switch. The third bias voltage source is used to generate a third bias voltage.

[0064] Each control branch includes a controlled switch. By controlling the opening and closing of each controlled switch, different bias voltages are provided to the substrate of the transistor switch under different operating conditions. The controlled switch can be a switch that can be controlled by a control signal, such as various transistor switches, relays, or IGBT switches.

[0065] The first bias voltage source, the second bias voltage source, and the third bias voltage source mentioned above can be constant voltage sources or LDO power supplies.

[0066] To better understand the principles mentioned above, the following will be combined with... Figure 4 The principle shown will be explained. Figure 4 Three bias voltage provision modes are shown, controlled by switches 101, 102, and 103, respectively. By controlling the on or off states of different switches, different bias voltages can be provided to the substrate of the transistor switch under different operating conditions.

[0067] When switch 101 is turned on, for MP, Vs = Vb, similar to a traditional LDO design.

[0068] When switch 102 is turned on, for MP, Vb is connected to a voltage ΔV higher than Vin (for example, ΔV = 0.2V), making it more difficult for MP to conduct and causing Vout to drop even lower, similar to the low-power mode mentioned above.

[0069] When switch 103 is turned on, Vb = Vout'. This application employs a tracking design mechanism, using a small LDO module to track system voltage changes, thereby providing a reasonable Vout' to Vb, preventing Vb from being excessively less than Vs, which could lead to MOSFET malfunction or excessive leakage. For ease of understanding, Vout' can be simply considered as Vin - 0.2V. In the branch where switch 103 is located, a voltage source Vin - ΔV can also be simply connected to achieve the same effect, but it lacks the tracking function shown in the illustration.

[0070] Based on the same inventive concept, embodiments of this application also provide related devices for low dropout linear regulators, such as power management devices, SOC chips, and electronic devices.

[0071] The power management device may include the low dropout linear regulator described above, the SOC chip may include the power management device described above, and the electronic device may include the SOC chip described above.

[0072] Based on the same inventive concept, this application also provides a power management device, which includes an input power supply and the aforementioned low dropout linear regulator, wherein the input power supply is electrically connected to the first terminal of the transistor switch in the low dropout linear regulator to provide an input voltage to the voltage dropout linear regulator.

[0073] Power management devices are used to provide stable voltages to the various modules in a chip. The low-dropout linear regulator provided in the power management device embodiment has the same implementation principle and technical effects as the aforementioned low-dropout linear regulator embodiment. For the sake of brevity, any parts not mentioned in the power management device embodiment can be referred to the corresponding content in the aforementioned low-dropout linear regulator embodiment.

[0074] Based on the same inventive concept, this application also provides a System-on-Chip (SOC) chip, which includes the aforementioned power management device. This SOC chip can be any type of SOC chip that includes the power management device. For example, the SOC chip can be, but is not limited to, a processor, memory, or other chips.

[0075] For example, the memory can be, but is not limited to, Random Access Memory (RAM), Read Only Memory (ROM), Programmable Read-Only Memory (PROM), Erasable Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM), etc.

[0076] The processors mentioned above can be general-purpose processors, including central processing units (CPUs), network processors (NPs), microprocessors, etc.; they can also be digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. Alternatively, the processors mentioned above can be any conventional processor.

[0077] The power management device provided in the SOC chip embodiment has the same implementation principle and technical effect as the aforementioned power management device embodiment. For the sake of brevity, any parts not mentioned in the SOC chip embodiment can be referred to the corresponding content in the aforementioned power management device embodiment.

[0078] Based on the same inventive concept, this application also provides an electronic device, which includes the aforementioned SOC chip. This electronic device may be, but is not limited to, a mobile phone, tablet, computer, in-vehicle device, server, or other similar device.

[0079] The SOC chip provided in the electronic device embodiment has the same implementation principle and technical effect as the aforementioned SOC chip embodiment. For the sake of brevity, any parts not mentioned in the electronic device embodiment can be referred to the corresponding content in the aforementioned SOC chip embodiment.

[0080] Based on the same inventive concept, this application also provides a voltage control method that can be applied to the aforementioned low-dropout linear regulator.

[0081] The voltage control method includes providing a bias voltage to the substrate terminal of a transistor switch in a low-dropout linear regulator to adjust the output voltage of the low-dropout linear regulator. A first terminal of the transistor switch is configured to be electrically connected to an input power supply, a second terminal of the transistor switch is configured to be electrically connected to a load, the substrate terminal of the transistor switch is configured to receive the bias voltage, and the transistor switch is configured to adjust its output current according to a received control signal, wherein the control signal is used to adjust the output current of the transistor switch.

[0082] Optionally, the bias control circuit described above can provide a bias voltage to the substrate of the transistor switch. In one embodiment, a bias voltage corresponding to the operating condition information can be provided to the substrate of the transistor switch in the low dropout linear regulator.

[0083] The bias control circuit has multiple bias voltages. Providing a bias voltage to the substrate of the transistor switch in the low dropout linear regulator can be achieved by providing different bias voltages to the substrate of the transistor switch under different operating conditions.

[0084] In this context, providing different bias voltages to the substrate of the transistor switch under different operating conditions can be:

[0085] (i) Under the first operating condition, a first bias voltage or is provided to the substrate terminal of the transistor switch.

[0086] (ii) In the second operating condition, a second bias voltage is provided to the substrate terminal of the transistor switch; or

[0087] (iii) In the third operating condition, a third bias voltage is provided to the substrate terminal of the transistor switch.

[0088] Wherein, the first bias voltage is the same as the voltage of the input power supply, the second bias voltage is greater than the voltage of the input power supply, and the third bias voltage is less than the voltage of the input power supply.

[0089] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0090] In addition, the functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0091] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A low-dropout linear regulator, characterized in that, include: A transistor switch, wherein a first terminal of the transistor switch is configured to be electrically connected to an input power supply, a second terminal of the transistor switch is configured to be electrically connected to a load, and the transistor switch is configured to adjust its output current according to a received control signal, wherein the control signal is used to adjust the output current of the transistor switch; A bias control circuit is electrically connected to the substrate terminal of the transistor switch; the bias control circuit is configured to provide a bias voltage to the substrate terminal of the transistor switch to adjust the substrate voltage of the transistor switch. The bias control circuit is integrated within the low-dropout linear regulator. The bias control circuit includes multiple control branches, one end of which is configured to be electrically connected to a bias voltage source, and another end of which is electrically connected to the substrate of the transistor switch. Different bias voltages are generated by the bias voltage sources connected to different control branches. At any given time, only one of the multiple control branches provides the bias voltage. The bias voltage source of one of the multiple control branches is an LDO tracking voltage generated by the LDO power supply tracking the system voltage change of the low-dropout linear regulator.

2. The low-dropout linear regulator according to claim 1, characterized in that, The bias control circuit has multiple bias voltages; the bias control circuit is configured to provide different bias voltages to the substrate of the transistor switch under different operating conditions.

3. The low-dropout linear regulator according to claim 2, characterized in that, The bias control circuit is configured to provide any of the following bias voltages to the substrate terminal of the transistor switch: In the first operating condition, a first bias voltage is provided to the substrate terminal of the transistor switch; In the second operating condition, a second bias voltage is provided to the substrate terminal of the transistor switch; In the third operating condition, a third bias voltage is provided to the substrate terminal of the transistor switch; Wherein, the first bias voltage is the same as the voltage of the input power supply, the second bias voltage is greater than the voltage of the input power supply, and the third bias voltage is less than the voltage of the input power supply.

4. The low-dropout linear regulator according to claim 1, characterized in that, Each control branch includes a controlled switch. By controlling the opening and closing of each controlled switch, different bias voltages can be provided to the substrate of the transistor switch under different operating conditions.

5. The low-dropout linear regulator according to claim 1, characterized in that, The bias voltage source is an LDO power supply.

6. A power management device, characterized in that, include: Input power supply and a low dropout linear regulator as described in any one of claims 1-5.

7. A SOC chip, characterized in that, Includes the power management device as described in claim 6.

8. An electronic device, characterized in that, Includes the SOC chip as described in claim 7.

9. A voltage control method, characterized in that, include: A bias control circuit is used to provide a bias voltage to the substrate of the transistor switch in the low dropout linear regulator in order to adjust the output voltage of the low dropout linear regulator. The bias control circuit is integrated inside the low dropout linear regulator; Wherein, the first terminal of the transistor switch is configured to be electrically connected to the input power supply, the second terminal of the transistor switch is configured to be electrically connected to the load, the substrate terminal of the transistor switch is configured to receive the bias voltage, and the transistor switch is configured to adjust its output current according to the received control signal, wherein the control signal is used to adjust the output current of the transistor switch; The bias control circuit includes: multiple control branches, one end of each control branch is configured to be electrically connected to a bias voltage source, and one end of each control branch is electrically connected to the substrate terminal of the transistor switch. Different bias voltages are generated by the bias voltage sources electrically connected to different control branches. At any given time, only one of the multiple control branches provides a bias voltage. The bias voltage source of one of the multiple control branches is an LDO tracking voltage generated by the LDO power supply tracking the system voltage change of the low dropout linear regulator.

10. The voltage control method according to claim 9, characterized in that, Providing a bias voltage to the substrate of the transistor switch in a low-dropout linear regulator includes: Different bias voltages are provided to the substrate of the transistor switch under different operating conditions.

11. The voltage control method according to claim 10, characterized in that, Providing different bias voltages to the substrate of the transistor switch under different operating conditions includes: In a first operating condition, a first bias voltage is provided to the substrate of the transistor switch, wherein the first bias voltage is the same as the voltage of the input power supply; or, In the second operating condition, a second bias voltage is provided to the substrate terminal of the transistor switch, wherein the second bias voltage is greater than the voltage of the input power supply; or, In the third operating condition, a third bias voltage is provided to the substrate terminal of the transistor switch, wherein the third bias voltage is less than the voltage of the input power supply.

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