Driving circuit and driving method thereof, display panel and display device

Abstract

The application discloses a driving circuit and a driving method thereof, a display panel and a display device, and relates to the technical field of display. The driving circuit comprises a first data writing module, a second data writing module, a judging module and a voltage regulating module. In the first stage, the first data writing module is turned on, and the signal of the first voltage terminal is transmitted to the first node. In the second stage, the judging module transmits the signal of the first voltage terminal to the second data writing module in response to the signal of the second control signal terminal. The second data writing module is turned on, and the signal of the second voltage terminal is output to the first node through the second data writing module. Alternatively, the second data writing module is turned off, and the signal of the first control signal terminal is coupled and transmitted to the first node by the voltage regulating module. In the third stage, the first data writing module, the second data writing module and the judging module are all turned off, and the first node maintains the signal of the second stage. The voltage of the signal transmitted to the first node is improved, and the driving capacity of the driving circuit is improved.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and more particularly, to a driving circuit and a driving method thereof, a display panel, and a display device. Background Art

[0002] With the development of display technology, electronic paper technology, with its unique advantages such as ultra-low power consumption and ability to replicate the visual quality of paper, is becoming increasingly common in e-book reading devices. Specifically, electronic paper displays use an electric field to control the movement of charged particles in electrophoresis to predetermined positions, where they reflect light under external illumination to create a display.

[0003] How to increase the electric field applied to charged particles and enhance the driving capability of electronic paper display devices has become one of the technical problems that need to be solved urgently at this stage. Summary of the Invention

[0004] In view of this, the present invention provides a driving circuit and a driving method thereof, a display panel and a display device, which are conducive to improving driving capability.

[0005] In a first aspect, the present invention provides a driving circuit, comprising: a first data writing module, a second data writing module, a judgment module, and a voltage regulating module;

[0006] An input terminal of the first data writing module is connected to the first voltage terminal, a control terminal of the first data writing module is connected to the first control signal terminal, an output terminal of the first data writing module is connected to the first node, and the first node is connected to the pixel electrode;

[0007] An input terminal of the second data writing module is connected to the second voltage terminal, a first control terminal of the second data writing module is connected to the second control signal terminal, a second control terminal of the second data writing module is connected to the second node, and an output terminal of the second data writing module is connected to the first node;

[0008] The first control terminal of the judgment module is connected to the first control signal, the second control terminal of the judgment module is connected to the second control signal terminal, the first input terminal of the judgment module is connected to the first voltage terminal, the second input terminal of the judgment module is connected to the common voltage terminal, and the output terminal of the judgment module is connected to the second node;

[0009] The first end of the voltage regulating module is connected to the first control signal end, and the second end is connected to the first node.

[0010] In a second aspect, based on the same inventive concept, the present invention further provides a driving method for a driving circuit, which is applied to the driving circuit provided in the first aspect, and the driving method includes:

[0011] In the first stage, the first data writing module is turned on in response to the signal of the first control signal terminal, and the signal of the first voltage terminal is transmitted to the first node through the first data writing module;

[0012] In the second stage, the judgment module responds to the signal of the second control signal terminal and transmits the signal of the first voltage terminal to the second data writing module through the second node;

[0013] The second data writing module is connected to the second node in response to the signal of the second control signal terminal, and the signal of the second voltage terminal is output to the first node through the second data writing module;

[0014] Alternatively, the second data writing module responds to the signal of the second control signal terminal and the signal of the second node being cut off, and the voltage regulating module couples the signal of the first control signal terminal and transmits it to the first node;

[0015] In the third stage, the first data writing module, the second data writing module and the judgment module are all turned off, and the first node maintains the signal of the second stage.

[0016] In a third aspect, based on the same inventive concept, the present invention further provides a display panel, comprising the driving circuit provided in the first aspect of the present invention, the display panel further comprising an electrophoretic fluid and a common electrode, the electrophoretic fluid being located between the common electrode and the pixel electrode.

[0017] In a fourth aspect, based on the same inventive concept, the present invention further provides a display device, comprising the display panel provided in the third aspect of the present invention.

[0018] Compared with the prior art, the driving circuit and driving method thereof, the display panel, and the display device provided by the present invention achieve at least the following beneficial effects:

[0019] In the present invention, the driving circuit includes a first data writing module, a second data writing module, a judgment module and a voltage regulating module. The first data writing module is electrically connected to the first control signal terminal and the first voltage terminal respectively. The second data writing module is electrically connected to the second control signal terminal, the first voltage terminal, the second node and the judgment module. The judgment module is electrically connected to the first control signal terminal, the second control signal terminal, the first voltage terminal, the common voltage terminal and the second node, and transmits a control signal to the second data writing module through the second node. During operation, it includes at least three stages, namely the first stage, the second stage and the third stage. The first stage can be regarded as a charging stage, the second stage can be regarded as a voltage judgment stage, and the third stage can be regarded as a holding stage. In the second stage, when the second data writing module is turned on, the signal at the second voltage terminal is transmitted to the first node through the second data writing module; when the second data writing module is turned off, the signal at the first control signal terminal is converted into a signal with an absolute value greater than the absolute value of the voltage at the first control signal terminal after coupling with the voltage regulating module and output to the pixel electrode, thereby increasing the absolute value of the voltage signal transmitted to the pixel electrode. When the driving circuit provided by the present invention is applied to a display product including an electrophoretic element, since the electrophoretic liquid in the electrophoretic element moves by applying an electric field thereto, the greater the electric field strength, the higher the movement rate of the electrophoretic liquid. The pixel electrode mentioned in the embodiment of the present invention can be regarded as one plate of the electrophoretic element, and the other plate of the electrophoretic element receives a fixed potential signal. When a voltage signal with a large absolute value is provided to the pixel electrode by the driving circuit provided by the present invention, it is beneficial to increase the voltage difference between the two plates in the electrophoretic element, thereby increasing the electric field strength between the two plates, and therefore, it is beneficial to improve the movement rate of the electrophoretic liquid, and further, it is beneficial to improve the screen switching sensitivity of the display product, and improve the display effect and the user experience.

[0020] Of course, any product implementing the present invention does not necessarily need to achieve all of the above-mentioned technical effects at the same time.

[0021] Further features and advantages of the present invention will become apparent from the following detailed description of exemplary embodiments of the present invention with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

[0023] Figure 1 FIG2 is a schematic structural diagram of a driving circuit provided by an embodiment of the present invention;

[0024] Figure 2 FIG. 1 is a circuit diagram of a driving circuit provided by an embodiment of the present invention;

[0025] Figure 3 FIG. 1 is another structural diagram of a driving circuit provided by an embodiment of the present invention;

[0026] Figure 4 FIG2 is another circuit diagram of a driving circuit provided by an embodiment of the present invention;

[0027] Figure 5 FIG2 is another circuit diagram of a driving circuit provided by an embodiment of the present invention;

[0028] Figure 6 FIG2 is another circuit diagram of a driving circuit provided by an embodiment of the present invention;

[0029] Figure 7 FIG2 is another circuit diagram of a driving circuit provided by an embodiment of the present invention;

[0030] Figure 8 FIG2 is a flow chart of a driving method of a driving circuit provided by an embodiment of the present invention;

[0031] Figure 9 Shown Figure 4 A driving timing diagram of the driving circuit in FIG.

[0032] Figure 10 Shown Figure 4 Another driving timing diagram of the driving circuit in FIG.

[0033] Figure 11 Shown with Figure 6 A driving timing diagram corresponding to the driving circuit in;

[0034] Figure 12 FIG2 is a schematic structural diagram of a display panel provided by an embodiment of the present invention;

[0035] Figure 13 FIG. 1 is a schematic structural diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0036] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that unless otherwise specifically stated, the relative arrangement of components and steps, numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present invention.

[0037] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

[0038] Techniques, methods, and apparatus known to those of ordinary skill in the relevant art(s) can not be discussed in detail in order to avoid obscuring the present description.

[0039] In all of the examples shown and discussed herein, any specific values should be interpreted as merely exemplary and not as a limitation. Thus, other examples of the exemplary embodiments can have different values.

[0040] Various modifications and changes can be made as would be obvious to a person of ordinary skill in the art having the benefit of this disclosure, without departing from the spirit and scope of the application. Thus, the scope of the application should not be limited to the examples described herein, but should be given the broadest interpretation available to a claimant under the circumstances. It is to be understood that the examples provided by the embodiments disclosed herein can be interchanged with one another insofar as they are not mutually contradictory.

[0041] It should be borne in mind, that, as the use of night letters and numerals are arbitrary, the embodiments disclosed herein could have different names, depending upon most common usage. The reader is to understand that they are to be used only for descriptive purposes as examples only and are not to be construed as a limitation on the embodiments disclosed herein. It is to be understood that the examples provided by the embodiments disclosed herein can be interchanged with one another insofar as they are not mutually contradictory.

[0042] Figure 1 A structure schematic diagram of the driving circuit provided by the embodiments of the present application is shown, please refer to Figure 1 The driving circuit provided by the embodiments of the present application comprises a first data writing module 10, a second data writing module 20, a judging module 30 and a voltage regulating module 40.

[0043] The input end of the first data writing module 10 is connected with a first voltage end D1, the control end of the first data writing module 10 is connected with a first control signal end Gate1, and the output end of the first data writing module 10 is connected with a first node N1, and the first node N1 is connected with a pixel electrode P.

[0044] The input end of the second data writing module 20 is connected with a second voltage end D2, the first control end of the second data writing module 20 is connected with a second control signal end Gate2, the second control end of the second data writing module 20 is connected with a second node N2, and the output end of the second data writing module 20 is connected with the first node N1.

[0045] The first control end of the judging module 30 is connected with the first control signal end Gate1, the second control end of the judging module 30 is connected with the second control signal end Gate2, the first input end of the judging module 30 is connected with the first voltage end D1, the second input end of the judging module 30 is connected with a common voltage end com, and the output end of the judging module 30 is connected with the second node N2.

[0046] The first end of the voltage regulating module 40 is connected with the first control signal end Gate1, and the second end is connected with the first node N1.

[0047] It should be noted that the connections mentioned in the embodiments of the present invention include direct connections and electrical connections, and the electrical connections include signal connections achieved through other electrical components. Optionally, the first voltage terminal D1 and the second voltage terminal D2 mentioned in the embodiments of the present invention can transmit voltage signals to the modules connected thereto, and the first control signal terminal Gate1 and the second control signal terminal Gate2 mentioned in the embodiments of the present invention can transmit control signals to electronic components in the modules connected thereto to control the conduction or cutoff of the electronic components.

[0048] The driving circuit provided in the embodiment of the present invention includes a first data writing module 10, a second data writing module 20, a judgment module 30 and a voltage regulating module 40. When working, it includes at least three stages, namely the first stage, the second stage and the third stage.

[0049] The first data writing module 10 is electrically connected to the first control signal terminal Gate1 and the first voltage terminal D1 respectively. In the first stage, the first data writing module 10 is turned on in response to the signal of the first control signal terminal Gate1, and the signal of the first voltage terminal D1 is transmitted to the first node N1 through the first data writing module 10. This first stage can be regarded as a charging stage.

[0050] The second data writing module 20 is electrically connected to the second control signal terminal Gate2, the second voltage terminal D2, the second node N2, and the judgment module 30. The judgment module 30 is electrically connected to the first control signal terminal Gate1, the second control signal terminal Gate2, the first voltage terminal D1, the common voltage terminal com, and the second node N2, and transmits a control signal to the second data writing module 20 via the second node N2. In the second phase, the judgment module 30 responds to the signal from the second control signal terminal Gate2 and transmits a signal to the second node N2. This signal is further transmitted to the second data writing module 20. The second data writing module 20 is turned on or off in response to the signal from the second control signal terminal Gate2 and the signal from the second node N2. When the second data writing module 20 is turned on, the signal from the second voltage terminal D2 is output to the first node N1 via the second data writing module 20. At this time, the signal transmitted to the pixel electrode P via the first node N1 is the signal from the second voltage terminal D2. When the second data writing module 20 is turned off, the voltage regulating module 40 couples the signal at the first control signal terminal Gate1 and transmits it to the first node N1. At this time, the signal transmitted to the pixel electrode P through the first node N1 is the signal coupled by the voltage regulating module 40. The aforementioned second stage can be regarded as a voltage determination stage, in which the second data writing module 20 is turned on or off in response to the signal output to the second node N2 by the determination module 30.

[0051] In the third stage, the first data writing module 10, the second data writing module 20 and the judgment module 30 are all cut off, and the first node N1 maintains the signal of the second stage. The third stage can be regarded as a signal holding stage, that is, the signal output to the pixel electrode P through the first node N1 in the third stage and the second stage remains unchanged, thereby achieving the stability of the voltage output to the driving electrode in the third stage and the second stage.

[0052] In an embodiment of the present invention, in the second stage, when the second data writing module 20 is turned off, the signal at the first control signal terminal Gate1 is converted into a signal having an absolute value greater than the absolute value of the voltage at the first control signal terminal Gate1 after coupling with the voltage regulating module 40 and output to the pixel electrode P, thereby increasing the absolute value of the voltage signal transmitted to the pixel electrode P. When the driving circuit provided by the present invention is applied to a display product including an electrophoretic element, since the electrophoretic fluid in the electrophoretic element moves by applying an electric field thereto, the greater the electric field strength, the higher the movement rate of the electrophoretic fluid. The pixel electrode P mentioned in the embodiment of the present invention can be regarded as one plate of the electrophoretic element, and the other plate of the electrophoretic element receives a fixed potential signal. When a voltage signal with a larger absolute value is provided to the pixel electrode P by the driving circuit provided by the present invention, it is beneficial to increase the voltage difference between the two plates in the electrophoretic element, thereby increasing the electric field strength between the two plates, and thus is beneficial to increasing the movement rate of the electrophoretic fluid, thereby improving the screen switching sensitivity of the display product, improving the display effect and the user experience.

[0053] It should be noted that the present invention only illustrates the driving capability of the driving circuit by applying the driving circuit to a display panel containing an electrophoretic element, but does not limit the type of display product to which it is applied. The driving circuit provided in the embodiment of the present invention can be applied to any display product that realizes the display function through electric field driving.

[0054] Figure 2 FIG. 1 is a schematic diagram of a driving circuit according to an embodiment of the present invention. Figure 2 In an optional embodiment of the present invention, the voltage regulating module 40 includes a first capacitor C1, a first electrode of the first capacitor C1 is connected to the first control signal terminal Gate1, and a second electrode is connected to the first node N1.

[0055] The first capacitor C1 provided in this embodiment has a fixed capacitance, and its first electrode is connected to the first control signal terminal Gate1. When the voltage signal at the first control signal terminal Gate1 changes, the voltage signal at the first electrode of the first capacitor C1 also changes, and correspondingly, the voltage signal at the second electrode of the first capacitor C1 also changes in response. Assuming that the signal at the first control signal terminal Gate1 is a high-level signal in the first phase and changes to a low-level signal in the second phase, in the second phase, the signal at the first electrode of the first capacitor C1 will become a low-level signal, the same as the signal at the first control signal terminal Gate1. Due to the coupling effect of the first capacitor C1, the signal at the second electrode of the first capacitor C1 will become a low-level signal lower than the low-level signal at the first electrode, but the absolute value of the voltage signal at the second electrode will increase. In existing display products that include electrophoretic elements, the value of the low-level signal provided to the electrophoretic element has reached its limit and cannot be further reduced. When using the driving circuit provided by the present invention, the coupling effect of the voltage regulator module 40 can be used to transmit the further reduced low-level signal to the pixel electrode P, thus breaking the limitation of the prior art that the output voltage cannot be further reduced. When the low-level voltage signal output to the electrophoretic element is lower, it is beneficial to increase the electric field strength between the plates on both sides of the electrophoretic element, thereby helping to increase the movement rate of the electrophoretic fluid, and further helping to improve the screen switching sensitivity of the display product, thereby improving the display effect and user experience.

[0056] Figure 3 FIG. 1 is another structural diagram of a driving circuit provided by an embodiment of the present invention. This embodiment shows a solution in which the driving circuit further includes a voltage stabilizing module 50 .

[0057] Please refer to Figure 3 In an optional embodiment of the present invention, the driving circuit further includes a voltage stabilizing module 50, a first end of the voltage stabilizing module 50 is connected to the first node N1, and a second end of the voltage stabilizing module 50 is connected to the common voltage terminal com.

[0058] Specifically, the embodiment of the present invention introduces a voltage stabilizing module 50 between the first node N1 and the common voltage terminal com. Since the signal at the common voltage terminal com is fixed, the voltage stabilizing module 50 can stabilize the potential of the first node N1, ensuring that the signal transmitted from the first node N1 to the pixel electrode P is a stable electrical signal. When this driving circuit is applied to a display panel, it is beneficial to improve the overall display stability of the display panel.

[0059] Figure 4 FIG. 1 is another circuit diagram of a driving circuit provided by an embodiment of the present invention. This embodiment shows a circuit structure in which the driving circuit includes a voltage stabilizing module 50 .

[0060] Please refer to Figure 4In an optional embodiment of the present invention, the voltage stabilizing module 50 includes a second capacitor C2, a first electrode of the second capacitor C2 is connected to the first node N1, and a second electrode of the second capacitor C2 is connected to the common voltage terminal com.

[0061] In this embodiment, the second electrode of the second capacitor C2 in the voltage stabilizing module 50 is connected to the common voltage terminal com. Since the voltage signal of the common voltage terminal com is constant, the stability of the signal of the first node N1 to which the first electrode of the second capacitor C2 is connected can be maintained through the coupling effect of the second capacitor C2, which is beneficial to improving the stability of the electrical signal transmitted from the first node N1 to the pixel electrode P.

[0062] Continue to refer Figure 2 and Figure 4 In an optional embodiment of the present invention, the first data writing module 10 includes a first transistor T1, a gate of the first transistor T1 is connected to the first control signal terminal Gate1, a first electrode is connected to the first voltage terminal D1, and a second electrode is connected to the first node N1.

[0063] The embodiment of the present invention is described using the example of the first data writing module 10 including the first transistor T1, and using the example of the first transistor T1 being an N-type transistor. However, the actual type of the first transistor T1 is not limited. In some other embodiments of the present invention, the first transistor T1 may also be a P-type transistor. The gate of the N-type transistor is turned on when receiving a high-level signal and turned off when receiving a low-level signal; the gate of the P-type transistor is turned on when receiving a low-level signal and turned off when receiving a high-level signal.

[0064] by Figure 2 and Figure 4 Taking the first transistor T1 in the example, in the first stage, the first control signal terminal Gate1 transmits a high-level signal to the gate of the first transistor T1, controlling the first transistor T1 to be turned on. At this time, the signal of the first voltage terminal D1 is transmitted to the first node N1 through the turned-on first transistor T1, and then transmitted to the pixel electrode P. The method of using the first transistor T1 to form the first data writing module 10 has a simple structure and is easy to implement.

[0065] Continue to refer Figure 2 and Figure 4 In an optional embodiment of the present invention, the second data writing module 20 includes a second transistor T2 and a third transistor T3, the gate of the second transistor T2 is connected to the second node N2, and the gate of the third transistor T3 is connected to the second control signal terminal Gate2; the first electrode of the second transistor T2 is connected to the second voltage terminal D2, the second electrode is connected to the first electrode of the third transistor T3, and the second electrode of the third transistor T3 is connected to the first node N1.

[0066] Specifically, the second data write module 20 in the embodiment of the present invention includes two transistors, namely a second transistor T2 and a third transistor T3. The gates of the second transistor T2 and the third transistor T3 are connected to different signal terminals, respectively. The gate of the second transistor T2 is connected to the second node N2. The signal at the second node N2 can be regarded as the signal output by the judgment module 30. In other words, the second transistor T2 is turned on or off in response to the signal output by the judgment module 30. The gate of the third transistor T3 is connected to the second control signal terminal Gate2. In other words, the third transistor T3 is turned on or off in response to the control signal at the second control signal terminal Gate2. When the second transistor T2 and the third transistor T3 are turned on simultaneously, the second data write module 20 is turned on, and the signal at the second voltage terminal D2 can be transmitted to the first node N1. When one of the second transistor T2 and the third transistor T3 is turned off, the second data writing module 20 is turned off as a whole, and the signal of the second voltage terminal D2 is no longer transmitted to the first node N1 through the second data writing module 20. Since the first node N1 is also electrically connected to the voltage regulating module 40, one electrode of the first capacitor C1 in the voltage regulating module 40 is connected to the first node N1, and the other electrode is connected to the first control signal terminal Gate1. When the signal of the first control signal terminal Gate1 is a low-level signal, the signal becomes a signal lower than the low-level signal of the first control signal terminal Gate1 after coupling through the first capacitor C1 and is transmitted to the first node N1, which is equivalent to increasing the absolute value of the voltage transmitted to the first node N1, thereby improving the driving capability of the driving circuit.

[0067] Continue to refer Figure 2 and Figure 4 In an optional embodiment of the present invention, the judgment module 30 includes a fourth transistor T4, a fifth transistor T5, a sixth transistor T6 and a third capacitor C3, wherein a first electrode of the third capacitor C3 is connected to the third node N3, and a second electrode is connected to the second node N2; gates of the fourth transistor T4 and the sixth transistor T6 are connected to the first control signal terminal Gate1, and the gate of the fifth transistor T5 is connected to the second control signal terminal Gate2; a first electrode of the fourth transistor T4 is connected to the first voltage terminal D1, and a second electrode is connected to the second node N2; a first electrode of the fifth transistor T5 is connected to the first voltage terminal D1, and a second electrode is connected to the third node N3; a first electrode of the sixth transistor T6 is connected to the common voltage terminal com, and a second electrode is connected to the third node N3.

[0068] Specifically, Figure 2 and Figure 4The illustrated embodiment refines the judgment module 30 and illustrates the judgment module 30 as including three transistors and one capacitor, specifically a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, and a third capacitor C3. The fourth transistor T4 and the sixth transistor T6 are turned on or off in response to a signal from the first control signal terminal Gate1, and the fifth transistor T5 is turned on or off in response to a signal from the second control signal terminal Gate2. During the first phase of operation of the driving circuit, the fourth transistor T4 and the sixth transistor T6 are turned on, the signal from the first voltage terminal D1 is transmitted to the second node N2 via the fourth transistor T4, and the signal from the common voltage terminal com is transmitted to the third node N3 via the sixth transistor T6. The potential of the second node N2 is maintained and transmitted to the second transistor T2 in the second data writing module 20. The second transistor T2 is turned on, and at this time, the third transistor T3 is turned off. The second data writing module 20 is not turned on, and the first node N1 receives the signal from the first voltage terminal D1 transmitted only by the first transistor T1.

[0069] In the second phase, the fourth transistor T4 and the sixth transistor T6 in the determination module 30 are turned off, the fifth transistor T5 is turned on, and the signal at the first voltage terminal D1 is transmitted to the third node N3 via the fifth transistor. When the signal at the first voltage terminal D1 is high, the signal at the second node N2 is increased due to the coupling effect of the third capacitor C3, and the second transistor T2 remains on. At this time, the third transistor T3 is turned on under the control of the signal at the second control signal terminal Gate2, and the signal at the second voltage terminal D2 is transmitted to the first node N1 via the second data writing module 20. When the signal at the first voltage terminal D1 is low, the signal at the second node N2 is decreased due to the coupling effect of the third capacitor C3, and the second transistor T2 is turned off, the second data writing module 20 is turned off, and the low-level signal at the first control signal terminal Gate1 is converted to a lower-level signal due to the coupling effect of the first capacitor C1 and transmitted to the first node N1, thereby increasing the absolute value of the voltage transmitted to the first node N1, which is beneficial to improving the driving capability of the driving circuit.

[0070] Figure 5 FIG. 1 is another circuit diagram of a driving circuit provided by an embodiment of the present invention. This embodiment provides another structure of the judgment module 30 .

[0071] Please refer to Figure 5 In an optional embodiment of the present invention, the judgment module 30 further includes a fourth capacitor C4, a first electrode of the fourth capacitor C4 is connected to the common voltage terminal com, and a second electrode is connected to the third node N3.

[0072] When the fourth capacitor C4 is introduced between the third node N3 and the common voltage terminal com, the fourth capacitor C4 can stabilize the voltage of the third node N3. When the high-level signal of the second voltage terminal D2 is transmitted to the third node N3 through the fifth transistor T5, the fourth capacitor C4 can maintain the signal of the third node N3, thereby effectively boosting the signal of the third node N3 after coupling through the third capacitor C3.

[0073] Figure 6 FIG. 1 is a circuit diagram of a driving circuit provided by an embodiment of the present invention. This embodiment provides another structure of the judgment module 30 .

[0074] In an optional embodiment of the present invention, the judgment module 30 further includes a voltage holding unit 31, which includes a seventh transistor T7 and a fifth capacitor C5. The gate of the seventh transistor T7 is connected to the first control signal terminal Gate1, the first electrode of the fifth transistor T5 is connected to the first voltage terminal D1 via the fourth node N4 and the seventh transistor T7, the fourth node N4 is located between the fifth transistor T5 and the seventh transistor T7, and the fifth capacitor is connected between the common voltage terminal com and the fourth node N4. In an optional embodiment of the present invention, when a valid signal is input to the first control signal terminal Gate1, the seventh transistor T7 is turned on, and the signal of the first voltage terminal D1 is stored in the fifth capacitor through the seventh transistor T7.

[0075] Figure 6 The illustrated embodiment is described using the example of each transistor being an N-type transistor. In the first stage, the first control signal terminal Gate1 controls the seventh transistor T7 to be turned on, and the signal of the first voltage terminal D1 will be able to be transmitted to the fourth node N4, so that the fifth capacitor stores the signal of the first voltage terminal D1. In the first stage, the fifth transistor T5 is in the off state, so the signal of the first voltage terminal D1 is maintained by the fifth capacitor. In the second stage, the seventh transistor T7 is turned off and the fifth transistor T5 is turned on. Since the fifth capacitor C5 maintains the signal of the first voltage terminal D1 in the first stage, the signal stored in the fifth capacitor C5 will be able to be transmitted to the third node N3 through the fifth transistor T5. At this time, the first voltage terminal D1 does not need to transmit a voltage signal to the third node N3. In this way, the signal of the first voltage terminal D1 can change in the second stage and does not need to be consistent with the signal in the first stage, which is conducive to improving the application flexibility of the drive circuit.

[0076] It should be noted that Figure 6 The embodiment shown shows that the judgment module 30 does not include the fourth capacitor C4 when it includes the voltage holding unit 31. In some other embodiments of the present invention, the judgment module 30 may include both the voltage holding power supply and the fourth capacitor C4. For example, please refer to Figure 7 , Figure 7 FIG. 1 is another circuit diagram of a driving circuit provided by an embodiment of the present invention.

[0077] Please refer to Figures 4 to 7 In an optional embodiment of the present invention, the first data writing module 10, the second data writing module 20 and the judgment module 30 each include at least one transistor, and the transistors included in the first data writing module 10, the second data writing module 20 and the judgment module 30 are all P-type transistors, or are all N-type transistors.

[0078] In the aforementioned embodiments, the transistors included in the driving circuit are all N-type transistors. In some other embodiments of the present invention, the transistors included in the driving circuit may also all be P-type transistors. When the driving circuit uses the same type of transistors, the same process can be used to form the same type of transistors, which is conducive to simplifying the manufacturing process of the driving circuit. It should be noted that the difference between the driving circuit using P-type transistors and the driving circuit using N-type transistors is that the transistors have different turn-on signals. The N-type transistor is turned on in response to a high-level signal and is turned off in response to a low-level signal, while the P-type transistor is turned on in response to a low-level signal and is turned off in response to a high-level signal.

[0079] Figure 8 The figure shows a flow chart of a driving method of a driving circuit provided by an embodiment of the present invention. Figure 1 and Figure 8 Based on the same inventive concept, the present invention further provides a driving method of the driving circuit as in any of the aforementioned embodiments, comprising:

[0080] The first stage can be regarded as a charging stage, in which the first data writing module 10 is turned on in response to the signal of the first control signal terminal Gate1, and the signal of the first voltage terminal D1 is transmitted to the first node N1 through the first data writing module 10;

[0081] The second stage can be regarded as a voltage judgment stage, in which the judgment module 30 responds to the signal of the second control signal terminal Gate2 and transmits the signal of the first voltage terminal D1 to the second data writing module 20 through the second node N2;

[0082] The second data writing module 20 is turned on in response to the signal of the second control signal terminal Gate2 and the signal of the first voltage terminal D1, and the signal of the second voltage terminal D2 is output to the first node N1 through the second data writing module 20;

[0083] Alternatively, the second data writing module 20 is cut off in response to the signal of the second control signal terminal Gate2 and the signal of the first voltage terminal D1, and the voltage regulating module 40 couples the signal of the first control signal terminal Gate1 and transmits it to the first node N1;

[0084] The third stage can be regarded as a voltage holding stage, in which the first data writing module 10 , the second data writing module 20 and the judgment module 30 are all turned off, and the first node N1 maintains the signal of the second stage.

[0085] The driving method of the driving circuit provided in an embodiment of the present invention includes at least three stages, namely the first stage, the second stage, and the third stage. The first stage can be regarded as a charging stage, the second stage can be regarded as a voltage determination stage, and the third stage can be regarded as a voltage maintenance stage. In the second stage, the second data writing module 20 is turned on or off in response to the signal of the second node N2 and the second voltage terminal D2. When the second data writing module 20 is turned on, the signal of the second voltage terminal D2 is transmitted to the first node N1 through the second data writing module 20; when the second data writing module 20 is turned off, the signal of the first control signal terminal Gate1 is coupled by the voltage regulating module 40 and converted into a signal with an absolute value greater than the absolute value of the voltage of the first control signal terminal Gate1 and output to the pixel electrode P, thereby increasing the absolute value of the voltage signal transmitted to the pixel electrode P. When the driving circuit provided by the present invention is applied to a display product including an electrophoretic element, since the electrophoretic fluid in the electrophoretic element moves by the electric field applied thereto, the greater the electric field strength, the higher the movement rate of the electrophoretic fluid. The pixel electrode P mentioned in the embodiments of the present invention can be considered as one plate of an electrophoretic element, while the other plate of the electrophoretic element receives a fixed potential signal. When a voltage signal with a large absolute value is provided to the pixel electrode P by the driving circuit provided by the present invention, the voltage difference between the two plates in the electrophoretic element is increased, thereby increasing the electric field strength between the two plates. This helps to increase the movement rate of the electrophoretic fluid, thereby improving the image switching sensitivity of the display product, enhancing the display quality and the user experience.

[0086] The following will be combined Figure 4 and Figure 9 、 Figure 10 , Figure 9 Shown Figure 4 A driving timing diagram of the driving circuit in FIG. 1 , wherein the signal at the corresponding first voltage terminal D1 is a high level signal, Figure 10 Shown Figure 4 Another driving timing diagram of the driving circuit in FIG. 1 , the corresponding signal at the first voltage terminal D1 is a low level signal.

[0087] Please combine Figure 4 and Figure 9 Optionally, the signals at the first voltage terminal D1 and the second voltage terminal D2 are high-level signals.

[0088] In the first stage T01, the first control signal terminal Gate1 outputs the first control signal, which is a high-level signal, and the signal of the second control signal terminal Gate2 is a low-level signal. At this time, the first transistor T1, the fourth transistor T4 and the sixth transistor T6 are turned on, and the signal of the first voltage terminal D1 is transmitted to the first node N1 through the first transistor T1, and is transmitted to the pixel electrode P through the first node N1; the signal of the first voltage terminal D1 is transmitted to the second node N2 through the fourth transistor T4, and the signal of the common voltage terminal com is transmitted to the third node N3 through the sixth transistor T6.

[0089] In the second stage T02, the second control signal terminal Gate2 outputs the first control signal, which is a high-level signal. The third transistor T3 and the fifth transistor T5 are turned on, and the signal of the first voltage terminal D1 is transmitted to the third node N3 through the fifth transistor T5, and is coupled to the second node N2 through the third capacitor C3; the signal of the second node N2 controls the second transistor T2 to be turned on, and the signal of the second control signal terminal Gate2 controls the third transistor T3 to be turned on. The signal of the second voltage terminal D2 is transmitted to the first node N1 through the second transistor T2 and the third transistor T3. At this time, the signal transmitted to the first node N1 is a high-level signal; optionally, in the first stage and the second stage, the signal of the first voltage terminal D1 remains unchanged and is both a high-level signal.

[0090] In the third stage T03 , the first transistor T1 , the second transistor T2 , the third transistor T3 , the fourth transistor T4 and the fifth transistor T5 are all turned off, and the signal at the first node N1 remains unchanged, that is, a high-level signal.

[0091] Continue to refer Figure 4 and Figure 10 Optionally, the signals at the first voltage terminal D1 and the second voltage terminal D2 are low-level signals.

[0092] In the first stage T01, the first control signal terminal Gate1 outputs the first control signal, which is a high-level signal, and the signal of the second control signal terminal Gate2 is a low-level signal. At this time, the first transistor T1, the fourth transistor T4 and the sixth transistor T6 are turned on, and the signal of the first voltage terminal D1 is transmitted to the first node N1 through the first transistor T1, and is transmitted to the pixel electrode P through the first node N1; the signal of the first voltage terminal D1 is transmitted to the second node N2 through the fourth transistor T4, and the signal of the common voltage terminal com is transmitted to the third node N3 through the sixth transistor T6.

[0093] In the second phase T02, the second control signal terminal Gate2 outputs the first control signal, the third transistor T3 and the fifth transistor T5 are turned on, and the signal at the first voltage terminal D1 is transmitted to the third node N3 via the fifth transistor T5 and coupled to the second node N2 via the third capacitor C3. At this time, the signal at the second node N2 is lower than the signal at the first voltage terminal D1, the second transistor T2 is turned off, and the second data write module 20 is in the off state. At this time, due to the coupling effect of the first capacitor C1, the low-level signal at the first control signal terminal Gate1 is coupled and transmitted to the first node N1. The signal transmitted to the first node N1 is a signal lower than the low-level signal at the first control signal terminal Gate1. Optionally, in both the first and second phases, the signal at the first voltage terminal D1 remains unchanged and is a low-level signal.

[0094] In the third stage T03, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are all turned off, and the signal at the first node N1 remains unchanged, still being the same low-level signal as in the second stage. When the first voltage terminal D1 outputs a negative voltage, the absolute value of the signal ultimately output to the first node N1 is higher than the absolute value of the negative voltage of the first voltage terminal D1, thereby providing a stronger driving capability for the pixel electrode P.

[0095] In an optional embodiment of the present invention, the cut-off time of the effective level signal of the second control signal terminal Gate2 is before the cut-off time of the effective level signal of the first voltage terminal D1. Figure 9 and Figure 10 , the effective level signal mentioned in the embodiment of the present invention refers to a signal that can control the conduction of the transistor. This embodiment is described by taking a high level signal as an example of an effective level signal. In the present invention, the cut-off time of the effective level signal output by the second control signal terminal Gate2 is before the cut-off time of the effective level of the first voltage terminal D1, that is, the low point of the signal corresponding to the second control signal terminal Gate2 is before the low point of the signal of the first voltage terminal D1, and the two maintain a certain time difference. Please combine Figure 4When the low-level point of the signal corresponding to the second control signal is after the low-level point of the signal at the first voltage terminal D1, the signal at the second control signal terminal Gate2 controls the fifth transistor T5 to conduct. The low-level signal at the first voltage terminal D1 is written to the third node N3, lowering the potential of the third node N3. This is equivalent to writing an erroneous signal to the third node N3, affecting the conduction of the second transistor T2 and the normal operation timing of the drive circuit. Therefore, in this embodiment of the present invention, the low-level point of the signal corresponding to the second control signal terminal Gate2 is set before the low-level point of the signal at the first voltage terminal D1. This helps prevent erroneous signals from being written to the third node N3, ensures the accuracy of the signal at the third node N3, and thus ensures the accuracy and stability of the output drive signal.

[0096] Figure 11 Shown with Figure 6 A driving timing diagram corresponding to the driving circuit in the figure, corresponding to the scheme when the signal at the first voltage end is high level, please combine Figure 6 and Figure 11 In an optional embodiment of the present invention, the determination module 30 further includes a voltage holding unit 31. In the first phase, the voltage signal of the first voltage terminal D1 is stored in the voltage holding unit 31. The signal of the first voltage terminal D1 differs between the first and second phases. Since the voltage holding unit 31 has already stored the signal of the first voltage terminal D1 in the first phase, the first voltage terminal D1 no longer needs to provide a voltage signal to the fifth transistor T5 in the second phase. Therefore, the signal of the first voltage terminal D1 can change in the second phase and no longer needs to remain the same as in the first phase. This improves the application flexibility of the driving circuit.

[0097] Continue to refer Figure 9 、 Figure 10 and Figure 11 In an optional embodiment of the present invention, a first time interval t is defined between the end time of the active level signal at the first control signal terminal Gate1 and the start time of the active level signal at the second control signal terminal Gate2, where t>0. This configuration helps prevent the active level signal at the first control signal terminal Gate1 and the active level signal at the second control signal terminal Gate2 from overlapping in time, which could cause all transistors in the driver circuit to turn on and cause circuit malfunction. Optionally, to prevent overlap of the active level signals of the first and second control signals, t ≥ 1 μs.

[0098] Based on the same inventive concept, Figure 12 FIG2 is a schematic diagram of a structure of a display panel provided by an embodiment of the present invention, please refer to FIG2. Figure 12The present invention further provides a display panel 100, comprising the driving circuit provided in the aforementioned embodiment; the display panel further comprises an electrophoretic fluid 00 and a common electrode P0, wherein the electrophoretic fluid is located between the common electrode P0 and the pixel electrode P. The driving circuit provided in the embodiment of the present invention provides a driving voltage to the pixel electrode P, thereby generating an electric field between the pixel electrode P and the common electrode P0 that drives the electrophoretic fluid to move. Because the driving circuit provided in the embodiment of the present invention can increase the absolute value of the voltage provided to the pixel electrode P, it is beneficial to increase the voltage difference between the pixel electrode P and the common electrode P0, thereby increasing the electric field strength between the two, and thus facilitating improved display sensitivity of the display panel.

[0099] Figure 13 FIG2 is a schematic diagram of a structure of a display device provided by an embodiment of the present invention, please refer to FIG2 Figure 13 Based on the same inventive concept, the present invention further provides a display device 200 , comprising the display panel 100 provided by the above embodiment of the present invention.

[0100] It is understood that the display device provided in the embodiments of the present invention may be a mobile phone, tablet, computer, television, vehicle-mounted display device, or other display device having a display function, and the present invention does not specifically limit this. The display device provided in the embodiments of the present invention has the beneficial effects of the display panel provided in the embodiments of the present invention. For details, please refer to the detailed description of the display panel in the above embodiments, and this embodiment will not be repeated here.

[0101] It can be seen from the above embodiments that the driving circuit and driving method thereof, the display panel, and the display device provided by the present invention achieve at least the following beneficial effects:

[0102] In the present invention, the driving circuit includes a first data writing module, a second data writing module, a judgment module, and a voltage regulating module. The first data writing module is electrically connected to the first control signal terminal Gate1 and the first voltage terminal, respectively. The second data writing module is electrically connected to the second control signal terminal, the first voltage terminal, the second node, and the judgment module. The judgment module is electrically connected to the first control signal terminal Gate1, the second control signal terminal, the first voltage terminal, the common voltage terminal, and the second node, and transmits a control signal to the second data writing module via the second node. During operation, the driving circuit includes at least three phases: the first phase, the second phase, and the third phase. The first phase can be regarded as a charging phase, the second phase can be regarded as a voltage judgment phase, and the third phase can be regarded as a holding phase. In the second phase, when the second data writing module is turned on, the signal at the second voltage terminal is transmitted to the first node via the second data writing module. When the second data writing module is turned off, the signal at the first control signal terminal is converted into a signal having an absolute value greater than the absolute value of the voltage at the first control signal terminal after coupling with the voltage regulating module and output to the pixel electrode, thereby increasing the absolute value of the voltage signal transmitted to the pixel electrode. When the driving circuit provided by the present invention is applied to a display product including an electrophoretic element, since the electrophoretic liquid in the electrophoretic element moves by applying an electric field thereto, the greater the electric field strength, the higher the movement rate of the electrophoretic liquid. The pixel electrode mentioned in the embodiment of the present invention can be regarded as one plate of the electrophoretic element, and the other plate of the electrophoretic element receives a fixed potential signal. When a voltage signal with a large absolute value is provided to the pixel electrode by the driving circuit provided by the present invention, it is beneficial to increase the voltage difference between the two plates in the electrophoretic element, thereby increasing the electric field strength between the two plates, and therefore, it is beneficial to improve the movement rate of the electrophoretic liquid, and further, it is beneficial to improve the screen switching sensitivity of the display product, and improve the display effect and the user experience.

[0103] Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present invention. It should be understood by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. A driving circuit, characterized in that: include: a first data writing module, a second data writing module, a judgment module and a voltage regulating module; The input end of the first data writing module is connected to the first voltage end, the control end of the first data writing module is connected to the first control signal end, the output end of the first data writing module is connected to the first node, and the first node is connected to the pixel electrode; The input terminal of the second data writing module is connected to the second voltage terminal, the first control terminal of the second data writing module is connected to the second control signal terminal, the second control terminal of the second data writing module is connected to the second node, and the output terminal of the second data writing module is connected to the first node; The judgment module includes a fourth transistor, a fifth transistor, a sixth transistor, and a third capacitor, wherein a first electrode of the third capacitor is connected to a third node, and a second electrode is connected to the second node; the gates of the fourth transistor and the sixth transistor are connected to the first control signal terminal, and the gate of the fifth transistor is connected to the second control signal terminal; the first electrode of the fourth transistor is connected to the first voltage terminal, and the second electrode is connected to the second node; the first electrode of the fifth transistor is connected to the first voltage terminal, and the second electrode is connected to the third node; the first electrode of the sixth transistor is connected to a common voltage terminal, and the second electrode is connected to the third node; The first end of the voltage regulating module is connected to the first control signal end, and the second end is connected to the first node.

2. The driving circuit according to claim 1, wherein: The voltage regulating module includes a first capacitor, a first electrode of the first capacitor is connected to the first control signal terminal, and a second electrode of the first capacitor is connected to the first node.

3. The driving circuit according to claim 1, wherein: It also includes a voltage stabilizing module, a first end of the voltage stabilizing module is connected to the first node, and a second end is connected to the common voltage end.

4. The driving circuit according to claim 3, wherein: The voltage stabilizing module includes a second capacitor, a first electrode of the second capacitor is connected to the first node, and a second electrode of the second capacitor is connected to the common voltage terminal.

5. The driving circuit according to claim 1, wherein: The first data writing module includes a first transistor, wherein a gate of the first transistor is connected to the first control signal terminal, a first electrode is connected to the first voltage terminal, and a second electrode is connected to the first node.

6. The driving circuit according to claim 1, wherein: The second data writing module includes a second transistor and a third transistor, the gate of the second transistor is connected to the second node, and the gate of the third transistor is connected to the second control signal end; the first electrode of the second transistor is connected to the second voltage end, the second electrode is connected to the first electrode of the third transistor, and the second electrode of the third transistor is connected to the first node.

7. The driving circuit according to claim 1, wherein: The judgment module further includes a fourth capacitor, a first electrode of the fourth capacitor is connected to the common voltage terminal, and a second electrode of the fourth capacitor is connected to the third node.

8. The driving circuit according to claim 1, wherein: The judgment module also includes a voltage holding unit, which includes a seventh transistor and a fifth capacitor. The gate of the seventh transistor is connected to the first control signal terminal, the first electrode of the fifth transistor is connected to the first voltage terminal through a fourth node and the seventh transistor, the fourth node is located between the fifth transistor and the seventh transistor, and the fifth capacitor is connected between the common voltage terminal and the fourth node.

9. The driving circuit according to claim 8, wherein: When a valid signal is input to the first control signal terminal, the seventh transistor is turned on, and the signal at the first voltage terminal is stored in the fifth capacitor through the seventh transistor.

10. The driving circuit according to claim 1, wherein: The first data writing module, the second data writing module and the judgment module each include at least one transistor, and the transistors included in the first data writing module, the second data writing module and the judgment module are all P-type transistors, or are all N-type transistors.

11. A driving method for a driving circuit according to any one of claims 1 to 10, characterized in that: include: In the first stage, the first data writing module is turned on in response to the signal of the first control signal terminal, and the signal of the first voltage terminal is transmitted to the first node through the first data writing module; In the second stage, the judgment module responds to the signal of the second control signal terminal and transmits the signal of the first voltage terminal to the second data writing module through the second node; The second data writing module is turned on in response to the signal at the second control signal terminal and the second node signal, and the signal at the second voltage terminal is output to the first node through the second data writing module; Alternatively, the second data writing module is cut off in response to the signal of the second control signal terminal and the signal of the second node, and the voltage regulating module couples the signal of the first control signal terminal and transmits it to the first node; In the third stage, the first data writing module, the second data writing module and the judgment module are all turned off, and the first node maintains the signal of the second stage.

12. The driving method according to claim 11, wherein: During the first phase and the second phase, the signal at the first voltage terminal remains unchanged.

13. The driving method according to claim 12, wherein: The cut-off time of the effective level signal at the second control signal terminal is before the cut-off time of the effective level signal at the first voltage terminal.

14. The driving method according to claim 11, wherein: The judgment module further includes a voltage holding unit, and in the first stage, the voltage signal of the first voltage terminal is stored in the voltage holding unit; The signal of the first voltage terminal in the first phase is different from the signal of the first voltage terminal in the second phase.

15. The driving method according to claim 11, wherein: There is a first time interval t between the end time of the effective level signal at the first control signal terminal and the start time of the effective level signal at the second control signal terminal, where t>0.

16. A display panel, characterized in that: The display panel comprises the driving circuit according to any one of claims 1 to 10; the display panel further comprises an electrophoretic fluid and a common electrode, the electrophoretic fluid being located between the common electrode and the pixel electrode.

17. A display device, characterized in that: The display panel according to claim 16 is included.

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