A modular voltage equalization circuit suitable for supercapacitor bank voltage equalization

Abstract

This invention discloses a modular voltage equalization circuit suitable for voltage balancing of supercapacitor banks. It includes n ≥ 2 converters and an input voltage source. Each converter is a three-transistor Buck / Boost converter with a supercapacitor connected in parallel at its output. The positive input terminal of the first converter is connected to the positive terminal of the input voltage source, and the negative input terminal of the first converter is connected to the positive input terminal of the second converter. The negative input terminal of the second converter is connected to the positive input terminal of the third converter, and so on. That is, the negative input terminal of the previous converter is connected to the positive input terminal of the next converter, and the negative input terminal of the last converter is connected to the negative terminal of the input voltage source. This invention adopts a modular design with strong topological scalability. Using a three-transistor Buck / Boost converter as a sub-module enables bidirectional power transfer, allowing for charging and discharging of the supercapacitor bank, thus improving the voltage equalization performance of the circuit.

Description

Technical Field

[0001] This invention relates to the technical field of power electronic converters, and in particular to a modular voltage equalization circuit suitable for voltage balancing of supercapacitor banks. Background Technology

[0002] Supercapacitors possess excellent energy storage performance and long service life, leading to their widespread application in the energy storage field. However, due to their low individual operating voltages, they are typically used in series in practical applications. During series operation, different supercapacitors exhibit varying charging and discharging voltages due to differences in parameters, making them prone to overcharging or over-discharging. To maintain voltage consistency among supercapacitors, modular voltage equalization circuits are needed to balance the voltage of the supercapacitor bank. In recent years, researchers have proposed modular voltage equalization circuits based on two-phase bidirectional Buck / Boost converters to achieve voltage equalization of supercapacitor banks. However, these circuits require a large number of switching and energy storage components, leading to discontinuous input current in some operating modes. Furthermore, there is still significant room for improvement in voltage equalization speed. Therefore, the research and development of novel modular voltage equalization circuits with fewer components is becoming increasingly important. Summary of the Invention

[0003] The purpose of this invention is to overcome the shortcomings and deficiencies of the prior art and propose a modular voltage equalization circuit suitable for voltage balancing of supercapacitor banks. This circuit adopts a modular design with strong topology scalability. It uses a three-switch Buck / Boost converter as a sub-module, which enables it to have bidirectional power transmission characteristics and charge and discharge the supercapacitor bank. This solves the problem of discontinuous input current in some operating modes of traditional modular voltage equalization circuits and improves the voltage equalization performance of the voltage equalization circuit.

[0004] To achieve the above objectives, the technical solution provided by this invention is as follows: a modular voltage equalization circuit suitable for voltage balancing of supercapacitor banks, comprising n≥2 converters and an input voltage source, wherein the converter is a three-switch Buck / Boost converter with a supercapacitor connected in parallel at the output terminal, the positive input terminal of the first converter is connected to the positive terminal of the input voltage source, the negative input terminal of the first converter is connected to the positive input terminal of the second converter, the negative input terminal of the second converter is connected to the positive input terminal of the third converter, and so on, that is, the negative input terminal of the previous converter is connected to the positive input terminal of the next converter, and the negative input terminal of the last converter is connected to the negative terminal of the input voltage source.

[0005] Furthermore, the converter includes a supercapacitor, an inductor, a first MOSFET, a second MOSFET, a third MOSFET, a first diode, a second diode, and a third diode. The positive terminal of the supercapacitor is connected to one end of the inductor, and the other end of the inductor is connected to the drain of the first MOSFET, the cathode of the first diode, the source of the second MOSFET, and the anode of the second diode. The source of the first MOSFET is connected to the anode of the first diode and the negative terminal of the supercapacitor. The drain of the second MOSFET is connected to the cathode of the second diode, the drain of the third MOSFET, and the cathode of the third diode. The source of the third MOSFET is connected to the anode of the third diode, the source of the first MOSFET, and the anode of the first diode.

[0006] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0007] This invention utilizes a MOSFET connected in parallel at the input of a three-switch Buck / Boost converter, solving the problem of discontinuous input current at the converter input in some operating modes of traditional modular voltage equalization circuits, thus improving the speed of voltage equalization. Compared with traditional modular voltage equalization circuits, under the same input voltage, the circuit of this invention can achieve rapid voltage equalization of supercapacitor banks with one less MOSFET, and it does not suffer from the problem of zero current at the converter input. Therefore, the circuit of this invention has broad application prospects and is worthy of promotion. Attached Figure Description

[0008] Figure 1 This is a circuit diagram of a modular voltage equalization circuit for voltage balancing of supercapacitor banks according to an embodiment of the present invention. Figure 2 A control block diagram for implementing voltage equalization based on a modular voltage equalization circuit.

[0009] Figures 3(a), 3(b), 3(c), and 3(d) are Figure 1 The circuit diagram shown illustrates the main operating modes during one switching cycle. Figure 3(a) shows operating mode 1 (MOSFET S). 12 S 22 All are on, S 11 S 13 S 21 S 23 The circuit diagram of the MOSFET (all off) is shown in Figure 3(b), which is the operating mode 2 (MOSFET S). 11 S 13 S 22 All are on, S 12 S 21 S 23 The circuit diagram of the MOSFET (all off) is shown in Figure 3(c), which is the operating mode 3 (MOSFET S). 12S 21 S 23 All are on, S 11 S 13 S 22 The circuit diagram of the MOSFET (all off) mode is shown in Figure 3(d). 11 S 13 S 21 S 23 All are on, S 12 S 22 The circuit diagram is shown with all circuits turned off. Solid lines in the diagram represent the parts of the converter through which current flows.

[0010] Figure 4(a) is a physical diagram of a modular voltage equalization circuit suitable for voltage balancing of supercapacitor banks according to an embodiment of the present invention. Figure 4(b) is based on V in =15V, the supercapacitor voltage V of converter 1 sc,1 =0.8V, the supercapacitor voltage V of converter 2 sc,2 Taking 1.08V as an example, the experimental waveforms of relevant variables in the circuit of this invention are given. The input voltage source charges the supercapacitor bank through the circuit of this invention. After charging, the voltages of the supercapacitors are equal, achieving voltage equalization. Detailed Implementation

[0011] The present invention will be further described in detail below with reference to the embodiments and accompanying drawings, but the embodiments of the present invention are not limited thereto.

[0012] This embodiment discloses a modular voltage equalization circuit suitable for voltage balancing of supercapacitor banks, the basic topology of which is as follows: Figure 1 As shown, it includes converters 1 and 2 and an input voltage source V. in Both converters 1 and 2 are three-switch Buck / Boost converters with a supercapacitor connected in parallel at the output. Converter 1 includes a supercapacitor C. sc,1 Inductor L1, MOSFET S 11 MOSFET 12 MOSFET 13 diode D 11 diode D 12 and diode D 13 Converter 2 includes a supercapacitor C sc,2 Inductor L2, MOSFET S 21 MOSFET 22 MOSFET 23 diode D 21 diode D 22 and diode D 23 Supercapacitor C sc,1The positive terminal is connected to one end of inductor L1, and the other end of inductor L1 is connected to MOSFET S. 11 Drain of diode D 11 Cathode, MOSFET 12 The source and diode D 12 Anode connection, MOSFET S 11 The source of each diode is connected to the diode D. 11 anode, supercapacitor C sc,1 The negative terminal connection of the MOSFET S 12 The drains of the diodes are respectively connected to diode D. 12 Cathode, MOSFET 13 Drain of diode D 13 Cathode connection, MOSFET S 13 The source and diode D 13 anode, MOSFET 11 The source and diode D 11 Anode connection; Supercapacitor C sc,2 The positive terminal of the circuit is connected to one end of inductor L2, and the other end of inductor L2 is connected to the MOSFET S1. 21 Drain of diode D 21 Cathode, MOSFET 22 The source and diode D 22 Anode connection, MOSFET S 21 The source of each diode is connected to the diode D. 21 anode, supercapacitor C sc,2 The negative terminal connection of the MOSFET S 22 The drains of the diodes are respectively connected to diode D. 22 Cathode, MOSFET 23 Drain of diode D 23 Cathode connection, MOSFET S 23 The source and diode D 23 anode, MOSFET 21 The source and diode D 21 The anode connection is made; the positive input terminal of converter 1 is connected to the input voltage source V. in The positive terminal of converter 1 is connected to the positive terminal of converter 2, and the negative terminal of converter 2 is connected to the input voltage source V. in The negative terminal connection.

[0013] For ease of verification, all components in the circuit structure are considered ideal. The current in inductor L1 of converter 1 is assumed to be i. L1 The current in inductor L2 of converter 2 is i L2 The input voltage of converter 1 is V in1 The input voltage of converter 2 is V. in2The supercapacitor C of converter 1 sc,1 The voltage is V sc,1 The supercapacitor C of converter 2 sc,2 The voltage is V sc,2 . Figure 2 This is the control block diagram for a modular voltage equalization circuit.

[0014] As shown in Figures 3(a), 3(b), 3(c), and 3(d), this modular voltage equalization circuit has four main operating modes within one switching cycle, which are described below:

[0015] Operating mode 1: As shown in Figure 3(a), MOSFET S 12 S 22 All are on, S 11 S 13 S 21 S 23 All are off, diode D of converter 1 11 diode D 13 And diode D of converter 2 21 diode D 23 Both are reverse-biased and turned off. At this time, the input voltage source supplies power to the inductor L1 and supercapacitor C of converter 1. sc,1 Inductor L2 of converter 2, supercapacitor C sc,2 Charge.

[0016] Under this operating mode, the relevant electrical parameters are related as follows:

[0017] V in1 =V L1 +V SC,1 (1)

[0018] V in2 =V L2 +V SC,2 (2)

[0019] Operating mode 2: As shown in Figure 3(b), MOSFET S 12 S 21 S 23 All are on, S 11 S 13 S 22 All are off, diode D of converter 1 12 And diode D of converter 2 21 diode D 23 Both are reverse-biased and turned off. At this time, the inductor L1 of converter 1 is inversely biased towards the supercapacitor C. sc,1 Charging, input voltage source V in The inductor L2 and supercapacitor C of converter 2 sc,2 Charge.

[0020] Under this operating mode, the relevant electrical parameters are related as follows:

[0021] V L1 =-V SC,1 (3)

[0022] V in2 =V L2 +V SC,2 (4)

[0023] Operating mode 3: As shown in Figure 3(c), MOSFET S 12 S 21 S 23 All are on, S 11 S 13 S 22 All are off, diode D of converter 1 11 diode D 13 And diode D of converter 2 22 Both are reverse-biased and turned off. At this time, the input voltage source V... in The inductor L1 and supercapacitor C of converter 1 sc,1 Charging, the inductor L2 of converter 2 is connected to the supercapacitor C sc,2 Charge.

[0024] Under this operating mode, the relevant electrical parameters are related as follows:

[0025] V in1 =V L1 +V SC,1 (5)

[0026] V L2 =-V SC,2 (6)

[0027] Operating mode 4: As shown in Figure 3(d), MOSFET S 11 S 13 S 21 S 23 All are on, S 12 S 22 All are off, diode D of converter 1 12 And diode D of converter 2 22 Both are reverse-biased and turned off. At this time, the inductor L1 of converter 1 is inversely biased towards the supercapacitor C. sc,1 Charging, the inductor L2 of converter 2 is connected to the supercapacitor C sc,2 Charge.

[0028] Under this operating mode, the relevant electrical parameters are related as follows:

[0029] V SC,1 =-VL1 (7)

[0030] V L2 =-V SC,2 (8)

[0031] Based on the above analysis, the volt-second balance principle is applied to the inductor L1 of converter 1 and the inductor L2 of converter 2, respectively. That is, the average value of the inductor voltage over one switching cycle is zero. And let the MOSFET S... 12 The conduction time is D1T s Let MOSFET S 22 The conduction time is D2T s MOSFET 11 S 13 The conduction time is (1-D1)T s MOSFET 21 S 23 The conduction time is (1-D2)T s Where D1 and D2 represent the corresponding through duty cycles, and T... s This represents the corresponding switching cycle. Combining equations (1), (2), (3), (4), (5), (6), (7), and (8), the expression for the steady-state voltage of the supercapacitor can be obtained as follows:

[0032]

[0033]

[0034] When D1 equals D2, the supercapacitor voltages of converter 1 and converter 2 are equal, achieving voltage balance.

[0035] During the operation of the circuit in this invention, the on-time of the switching transistor needs to be controlled by the control system to drive the converter to charge the supercapacitor with constant currents of varying magnitudes. The control block diagram of the control system is as follows: Figure 2 As shown. Let the inductor current i of converter 1 be... L1 The reference current is i ref1 The inductor current i of converter 2 L2 The reference current is i ref2 The reference voltage of the supercapacitor is V. ref .

[0036] from Figure 2 It can be seen that the control system includes two control loops.

[0037] First, the purpose of the current loop is to make the first inductor current of the converter follow a given reference current through a PI controller; the purpose of the voltage loop is to make the supercapacitor voltage of the converter follow a given reference voltage through a PI controller. Further, the output of the PI controller, after PWM modulation, serves as the input for the six MOSFETs in this embodiment. 11 S 12 S 13 S 21 S 22 and S 23 The gate signal.

[0038] In order to achieve a uniform voltage across the supercapacitor during charging, the relevant electrical parameters of the circuit in this invention should meet the following requirements:

[0039]

[0040] Since the inductor current of the converter follows a given reference current, the control system, according to equation (9), uses a given i ref1 V ref and V sc,1 V sc,2 Calculate i ref2 This allows different converters to charge the supercapacitor with constant current of different magnitudes.

[0041] As shown in Figure 4(a), the physical circuit of the modular voltage equalization circuit for supercapacitor bank voltage balancing proposed in this invention consists of two three-switch Buck / Boost converter circuits and a DSP control circuit. The DSP control circuit implements dual-loop control through an internally written digital control program, controlling converter 1 with an inductor current i of 3.9A. L1 For voltage V sc,1 The supercapacitor is charged to 0.8V, and the converter 2 is controlled to use an inductor current i of 2.6A. L2 For voltage V sc,2 A 1V supercapacitor is charged, as shown in Figure 4(b). As can be seen from Figure 4(b), due to i L1 i L2 and V sc,1 V sc,2 The current-voltage relationship in equation (9) is satisfied, therefore the supercapacitor voltage V sc,1 V sc,2 As charging progresses and the voltage becomes more uniform, voltage equalization is achieved.

[0042] In summary, the modular voltage equalization circuit for supercapacitor banks proposed in this invention reduces the number of passive components used compared to traditional modular voltage equalization circuits, eliminates the need for additional power switching transistors, has a simple structure, and is easy to control. It achieves rapid voltage equalization of supercapacitor banks and eliminates the problem of zero current at the converter input. Therefore, the circuit of this invention has broad application prospects and is worth promoting.

[0043] The above embodiments are preferred embodiments of the present invention, but the embodiments of the present invention are not limited to the above embodiments. Any changes, modifications, substitutions, combinations, or simplifications made without departing from the spirit and principle of the present invention shall be considered equivalent substitutions and shall be included within the protection scope of the present invention.

Claims

1. A modular voltage equalization circuit suitable for voltage balancing of supercapacitor banks, characterized in that, It includes n≥2 converters and one input voltage source. The converter is a three-switch Buck / Boost converter with a supercapacitor connected in parallel at the output. The positive input terminal of the first converter is connected to the positive terminal of the input voltage source. The negative input terminal of the first converter is connected to the positive input terminal of the second converter. The negative input terminal of the second converter is connected to the positive input terminal of the third converter, and so on. That is, the negative input terminal of the previous converter is connected to the positive input terminal of the next converter, and the negative input terminal of the last converter is connected to the negative terminal of the input voltage source. The converter includes a supercapacitor, an inductor, a first MOSFET, a second MOSFET, a third MOSFET, a first diode, a second diode, and a third diode. The positive terminal of the supercapacitor is connected to one end of the inductor. The other end of the inductor is connected to the drain of the first MOSFET, the cathode of the first diode, the source of the second MOSFET, and the anode of the second diode. The source of the first MOSFET is connected to the anode of the first diode and the negative terminal of the supercapacitor. The drain of the second MOSFET is connected to the cathode of the second diode, the drain of the third MOSFET, and the cathode of the third diode. The source of the third MOSFET is connected to the anode of the third diode, the source of the first MOSFET, and the anode of the first diode. The on-time of the switching transistor needs to be controlled by a control system, which includes two control loops: a current loop and a voltage loop. The purpose of the current loop is to make the inductor current of the converter follow a given reference current through a PI controller; the purpose of the voltage loop is to make the supercapacitor voltage of the converter follow a given reference voltage through a PI controller; the output of the PI controller is modulated by PWM and used as the gate signal of the MOSFET. To ensure that the voltage of the supercapacitor tends to be consistent during charging, the relevant electrical parameters of the circuit must satisfy: （9）； In the formula, i L1 Let i be the inductor current of converter 1. L2 V is the inductor current of converter 2. sc,1 The supercapacitor C of converter 1 sc,1 voltage, V sc,2 For the supercapacitor C of converter 2 sc,2 voltage, V ref The reference voltage of the supercapacitor is given; since the inductor current of the converter follows the given reference current, the control system, according to equation (9), uses the given i ref1 V ref and V sc,1 V sc,2 Calculate i ref2 This allows different converters to charge the supercapacitor with constant currents of varying magnitudes, where i ref1 The inductor current i of converter 1 L1 The reference current, i ref2 The inductor current i of converter 2 L2 The reference current.

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