Electrohydrodynamics-driven three-dimensional embedded loop heat pipe and its laminated manufacturing method

Abstract

The present invention discloses an electrohydrodynamic-driven three-dimensional encapsulated embedded loop heat pipe, which mainly solves the problems of large volume, strong vibration, high power consumption, and easy liquid leakage existing in the current three-dimensional encapsulated microchannel liquid cooling structure. It includes an evaporator (1), a vapor circulation pipeline (2), a condenser (3), a liquid circulation pipeline (4), and a compensation chamber (5); a three-dimensional encapsulated stack (6) is provided in the evaporator, and a plurality of three-dimensional electrodes are arranged in each encapsulated single layer, and microchannels are formed between the electrodes to promote the directional flow boiling of the working fluid under the drive of electrohydrodynamics; planar electrodes are arranged in the liquid circulation pipeline to promote the working fluid to flow from the liquid pipeline to the compensator and back to the evaporator under the drive of electrohydrodynamics, realizing the circulation of the working fluid and the transfer of heat; the compensation chamber is provided with a temperature control system. The present invention strengthens the heat and mass transfer characteristics of the loop heat pipe, avoids the use of mechanical components, improves the thermal reliability and working stability of three-dimensional encapsulation, and can be used for electronic packaging.

Description

Technical Field

[0001] The present invention belongs to the technical field of electronic devices, and particularly relates to an electrohydrodynamic-driven three-dimensional package-embedded loop heat pipe, which can be used for heat dissipation in the three-dimensional package of electronic devices. Background Technique

[0002] With the rapid and diversified development of semiconductor and integrated circuit technologies, advanced three-dimensional packaging is the biggest breakthrough point for exceeding the bottleneck of Moore's Law.

[0003] However, while the three-dimensional packaging technology is developing rapidly, it often faces difficult heat dissipation problems. Traditional external enhanced heat dissipation technologies can no longer meet the requirements of heat dissipation with high heat flux density in the local small-space stack of three-dimensional packaging. It is necessary to develop a new internal heat dissipation technology to increase the number of stacked layers of three-dimensional packaging and improve its thermal reliability.

[0004] At present, scholars have found that the use of microchannel liquid flow cooling technology can meet the heat dissipation requirements between the stacked layers of three-dimensional packaging, and research has been carried out on the structural design of internal heat dissipation for three-dimensional packaging with microchannel liquid flow cooling.

[0005] The patent application with the publication number CN103489838B proposed a three-dimensional packaging structure for enhanced heat dissipation and its packaging method. The three-dimensional packaging enhanced heat dissipation structure includes multiple layers of substrates, devices and interconnection circuits on the substrates, microchannels, heat dissipation plates, external heat dissipation devices, and water pumps. It uses the way of convective heat transfer of microfluids and heat conduction of metal good conductors connected to the heat-generating devices in the substrates to discharge the heat generated by the heat-generating devices inside the three-dimensional packaging.

[0006] The patent application with the publication number CN109524373B proposed a three-dimensional active heat dissipation packaging structure with embedded microchannels and its manufacturing process. The three-dimensional active heat dissipation packaging structure is composed of a three-dimensional packaging structure, a top microchannel chip structure unit, a bottom two-dimensional heterogeneous integration structure unit, a substrate, and a housing, and is processed by using micro-nano processing technology, conventional TSV technology, bump interconnection technology, and conventional capping technology. The device realizes active heat dissipation inside the three-dimensional packaging by integrating microchannel structures on the back of the chip and inside the substrate.

[0007] Since the above two patents both require the use of mechanical components such as pumps and valves for driving, the heat dissipation structures have problems such as large volume, strong vibration, high power consumption, easy leakage, and complex design, reducing the reliability of three-dimensional packaging.

[0008] As a gas-liquid phase change device, the micro loop heat pipe has separate and non-interfering flow paths for steam and liquid, enabling long-distance heat transfer and the transfer of a large amount of heat without the use of a mechanical drive system. If its evaporator adopts a microchannel flat plate structure, the loop heat pipe can be embedded in a three-dimensional package and closely integrated with the package stack structure to improve the heat dissipation performance of the three-dimensional package. However, traditional loop heat pipes generally use passive heat transfer and mass transfer enhancement technologies, and the circulation of the working fluid depends on gravity and capillary action, severely restricting the heat dissipation capacity of the micro loop heat pipe.

[0009] The electrohydrodynamic active heat transfer enhancement technology has the characteristics of simple structure, low noise, low energy consumption, and non-mechanical drive. The flow and heat transfer of the fluid can be controlled by the electric field force. Applying the electrohydrodynamic active heat transfer enhancement technology to the loop heat pipe and embedding it in a three-dimensional package is expected to improve the flow and heat transfer performance of the micro loop heat pipe. Summary of the Invention

[0010] The purpose of the present invention is to address the deficiencies of the above-mentioned existing technologies and provide an electrohydrodynamic-driven three-dimensional package embedded loop heat pipe and its stacked manufacturing method. By embedding the three-dimensional package in the microchannel flat plate evaporator of the loop heat pipe, active and efficient heat dissipation inside the three-dimensional package can be achieved, improving the reliability of the three-dimensional package. By applying electrohydrodynamic action to the evaporator and liquid path of the loop heat pipe, the loop heat pipe can be promoted to transform from passive enhancement to active enhancement technology, enhancing the heat transfer limit and heat transfer performance of the loop heat pipe.

[0011] To achieve the above purpose, the technical solution of the present invention includes the following:

[0012] 1. An electrohydrodynamic-driven three-dimensional package embedded loop heat pipe, including an evaporator, a vapor flow pipe, a condenser, a liquid flow pipe, and a compensation chamber. The evaporator is sequentially connected to the vapor flow pipe, the condenser, the liquid flow pipe, and the compensation chamber. It is characterized in that:

[0013] The evaporator is internally provided with a three-dimensional package stack and is driven by electrohydrodynamics;

[0014] The three-dimensional package stack includes multiple package single layers. Each package single layer includes a device layer, a silicon substrate, and silicon through holes. The device layer is located on the upper surface of the silicon substrate. A plurality of three-dimensional electrodes with columnar boss structures are arranged in the silicon substrate, and the positive and negative electrodes are alternately distributed along the flow direction of the working fluid. Microchannels are formed between the three-dimensional electrodes;

[0015] The liquid flow pipe is internally provided with a planar negative electrode and a planar positive electrode, and the two are alternately distributed for generating electrohydrodynamic drive;

[0016] The compensation chamber is internally provided with an auxiliary heating sheet, and a phase change material is wound around the outside. The two form a temperature control system through an external PID controller.

[0017] Preferably, the three-dimensional package stack is tightly connected to the lower wall surface in the evaporator through solder balls.

[0018] Preferably, the number of stacked layers of the three-dimensional package stack is 2, 3, 4 or multiple layers.

[0019] Preferably, the columnar convex type three-dimensional electrode adopts any one of a cuboid, a cube, a trapezoidal column or other polygonal geometric bodies.

[0020] Preferably, the condenser adopts any one of air cooling, radiator cooling, heat pipe cooling or thermoelectric cooling.

[0021] Preferably, the compensation cavity is located on one side parallel to the evaporator, and together with the evaporator forms a rectangular cavity structure, and the rectangular cavity includes an input port, a package upper cover plate, an output port and a package lower substrate.

[0022] Preferably, the working fluid in the heat pipe is a dielectric fluid with a conductivity lower than 10 -8 Siemens per meter.

[0023] 2. A method for preparing a three-dimensional package stack in the above three-dimensional package embedded loop heat pipe, which is characterized by including the following:

[0024] a) Using a reactive ion etching process to etch a plurality of blind holes on the upper substrate and the lower substrate wafers of the silicon substrate respectively;

[0025] b) Adopting a high-temperature thermal oxidation process to form a uniform and dense silicon dioxide insulating layer on the surfaces of the upper substrate and the lower substrate wafers and the inner walls of each blind hole, and then adopting a sputtering process to deposit a diffusion barrier layer and a seed layer on the surfaces of the upper substrate and the lower substrate wafers and the inner walls of the blind holes respectively;

[0026] c) Using an electroplating process to fill and fill each blind hole with a metal heat-conducting material;

[0027] d) Polishing to remove the excess metal material on the surfaces of the upper substrate and the lower substrate wafers, and using a reactive ion etching process to etch micro-channels on the lower substrate wafer;

[0028] e) Adopting a high-temperature thermal oxidation process to grow silicon dioxide on the surface of the lower substrate silicon channel as an insulating layer to isolate the high-voltage electrode from the silicon wafer;

[0029] f) Using a sputtering process to sequentially sputter and deposit a diffusion barrier layer and a conductive layer on the silicon dioxide surface of the lower substrate silicon channel;

[0030] g) Using a spin coating process to coat a mask layer on the conductive layer of the lower substrate silicon channel for chemically etching the diffusion barrier layer and the conductive layer, and photolithographically obtaining a mask pattern for the electrode wiring area;

[0031] h) removing the diffusion barrier layer and the conductive layer in the non-electrode region of the silicon trench of the lower substrate by chemical etching, and retaining the diffusion barrier layer and the conductive layer in the electrode wiring region;

[0032] i) electroforming a conductive material on the surface of the conductive layer of the silicon groove portion of the lower substrate to form a three-dimensional electrode with the same depth as the silicon micro-groove;

[0033] j) bonding the upper silicon substrate wafer with an oxidized surface and the lower silicon substrate wafer with microchannels and microelectrodes using a silicon-silicon direct bonding process, and enhancing the bonding strength using a high-temperature annealing process;

[0034] k) performing thinning, grinding, and polishing processes on the upper and lower substrates of the silicon microchannel until the blind holes are opened to form through-silicon vias filled with metal material;

[0035] l) forming a silicon dioxide insulating layer on the outer sides of the upper and lower substrates of the silicon microchannel by plasma chemical vapor deposition, and then depositing a device layer thereon to form a packaged single-layer structure;

[0036] m) Use micro solder balls or adhesives to connect multiple package single-layer structures to form a three-dimensional package stacked structure to achieve thermal or electrical interconnection.

[0037] Compared with the prior art, the present invention has the following advantages:

[0038] First, the present invention provides a three-dimensional packaging stack in the evaporator, which can contain the heat source inside the loop heat pipe, avoiding the heat source from exchanging heat through the shell wall, shortening the heat exchange path of the heat source, and improving the heat exchange performance of the loop heat pipe.

[0039] Second, the present invention processes a microchannel composed of three-dimensional electrodes with columnar bosses in the three-dimensional packaging stack, and utilizes the capillary action of the microchannel and the electrofluid force generated between the electrodes to drive the working fluid to flow and change phase in a directional manner in the three-dimensional packaging stack, which helps to quickly remove the heat of the three-dimensional packaging stack, avoids the use of mechanical components, and improves the thermal reliability of the three-dimensional packaging stack.

[0040] Third, the present invention arranges alternating positive and negative planar electrodes in the liquid circulation pipeline, which accelerates the reflux of the liquid working medium, helps to avoid the backflow of the working medium in the compensation cavity, weakens the temperature oscillation phenomenon, and improves the stability of the loop heat pipe.

[0041] Fourth, the present invention arranges auxiliary heating plates in the compensation cavity, wraps phase change materials on the outside and combines an external PID controller to form a temperature control system, which can control the preheating temperature of the working medium in the compensation cavity within a certain range, thereby improving the working efficiency and heat exchange performance of the loop heat pipe.

[0042] Fifth, the present invention proposes a laminated manufacturing method for an electrohydrodynamic-driven three-dimensional encapsulated embedded loop heat pipe, which helps to solve the problem of the processing and manufacturing of the electrohydrodynamic-driven embedded loop heat pipe for three-dimensional encapsulated laminated heat dissipation, and realizes active and efficient heat dissipation inside the three-dimensional encapsulated laminate. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 is the overall structure diagram of the present invention;

[0044] Figure 2 is the structure diagram of the three-dimensional encapsulated laminate arranged in the evaporator of the present invention;

[0045] Figure 3 is the structure diagram of the rectangular cavity formed by the evaporator and the compensation chamber of the present invention;

[0046] Figure 4 is the schematic diagram of the cube electrode distribution of the microchannels in the three-dimensional encapsulated laminate of the present invention;

[0047] Figure 5 is the schematic diagram of the planar electrode distribution in the liquid circulation pipeline of the present invention;

[0048] Figure 6 is the schematic diagram of the trapezoidal column electrode distribution of the microchannels in the three-dimensional encapsulated laminate of the present invention;

[0049] Figure 7 is the implementation flowchart of manufacturing the three-dimensional encapsulated laminate of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0050] The following further elaborates on the embodiments of the present invention with reference to the accompanying drawings.

[0051] Refer to Figure 1 , and the present invention provides the following three embodiments of the electrohydrodynamic-driven three-dimensional encapsulated embedded loop heat pipe:

[0052] Embodiment 1:

[0053] The electrohydrodynamic-driven three-dimensional encapsulated embedded loop heat pipe in this embodiment includes an evaporator 1, a vapor circulation pipeline 2, a condenser 3, a liquid circulation pipeline 4, a compensation chamber 5, and a three-dimensional encapsulated laminate 6. Among them: the evaporator 1 is successively connected to the vapor circulation pipeline 2, the condenser 3, the liquid circulation pipeline 4, and the compensation chamber 5. The three-dimensional encapsulated laminate 6 is arranged inside the evaporator 1 and is driven by electrohydrodynamics to introduce the heat source from the outside into the heat pipe, avoiding heat transfer of the heat source through the shell wall and shortening the heat transfer path of the heat source.

[0054] The condenser 3 is cooled by a radiator and is used to quickly discharge the heat in the loop heat pipe to the outside.

[0055] The liquid circulation pipeline 4 is provided with planar electrodes inside, which are used to generate electrohydrodynamic driving force on the working fluid to accelerate the reflux of the liquid working fluid and prevent the reverse flow of the working fluid in the compensation chamber.

[0056] The compensation chamber 5 is located on one side parallel to the evaporator 1, and it and the evaporator 1 together form a rectangular cavity structure; an auxiliary heating sheet 7 is arranged inside the compensation chamber 5, and a phase change material 8 is wound outside it. The two form a temperature control system through an external PID controller to control the preheating temperature of the working fluid in the compensation chamber 5 to be stable within a set range, improve the starting performance of the loop heat pipe, and strengthen the flow and phase change heat transfer of the working fluid in the evaporator 1.

[0057] Refer to Figure 2 , the three-dimensional packaging stack 6 of this example includes 3 packaging single layers, and each packaging single layer includes a device layer 61, a silicon substrate 62 and silicon vias 63. The device layer 61 is located on the upper surface of the silicon substrate 62. A plurality of three-dimensional electrodes 621 with columnar boss structures are arranged inside the silicon substrate, which are used to generate electrohydrodynamic force to drive the working fluid to flow and phase change directionally in the three-dimensional packaging; microchannels 622 are formed between the three-dimensional electrodes 621 to provide a flow channel for the working fluid; the working temperature of the three-dimensional packaging stack 6 is 55 °C, and the working fluid used is n-hexane.

[0058] Refer to Figure 3 , the rectangular cavity structure formed by the evaporator 1 and the compensation chamber 5 of this example includes an input port 9, a packaging upper cover plate 10, an output port 11 and a packaging lower substrate 12. The three-dimensional packaging stack 6 is tightly connected to the packaging lower substrate 12 through solder balls 13.

[0059] Refer to Figure 4 , 48 three-dimensional electrodes 621 with columnar boss structures are arranged inside the silicon substrate of the three-dimensional packaging stack 6 of this example. 24 negative electrodes 6211 and 24 positive electrodes 6212 are alternately distributed along the flow direction of the working fluid to generate electrohydrodynamic force to drive the working fluid in the evaporator 1 to flow and phase change directionally, and quickly discharge the heat inside the three-dimensional packaging stack 6. The morphologies of the negative electrode 6211 and the positive electrode 6212 are cubes, and the distance between each pair of positive and negative three-dimensional electrodes is 2.5 times the internal distance of the electrode pair to avoid mutual interference between the electrode pairs.

[0060] Refer to Figure 5 , the liquid circulation pipeline 4 of this example is provided with alternating planar negative electrodes 14 and planar positive electrodes 15 inside to generate electrohydrodynamic force to drive the liquid working fluid to reflux into the compensation chamber 5, prevent the reverse flow of the working fluid in the compensation chamber 5, and realize the active enhanced flow heat transfer of the loop heat pipe.

[0061] Example 2:

[0062] The structure of this example is the same as that of Example 1, and the differences are as follows:

[0063] The condenser 3 selects the heat pipe cooling method.

[0064] The three-dimensional packaging stack 6 includes 4 packaging monolayers.

[0065] The operating temperature of the three-dimensional packaging stack 6 is 90 °C, and the working fluid is n-heptane.

[0066] The electrode morphologies of the negative electrode 6211 and the positive electrode 6212 are trapezoidal columns, and the distance between each pair of positive and negative three-dimensional electrodes is 2 times the internal distance of the electrode pair to avoid mutual interference between the electrode pairs. Figure 6 as shown.

[0067] Example 3:

[0068] The structure of this example is the same as that of Example 1, and the differences are as follows:

[0069] The condenser 3 selects the thermoelectric cooling method.

[0070] The three-dimensional packaging stack 6 includes 5 packaging monolayers.

[0071] The operating temperature of the three-dimensional packaging stack 6 is 80 °C, and the working fluid is HFE-7300.

[0072] The electrode morphologies of the negative electrode 6211 and the positive electrode 6212 are pentagonal prisms, and the distance between each pair of positive and negative three-dimensional electrodes is 3 times the internal distance of the electrode pair to avoid mutual interference between the electrode pairs.

[0073] The working principles of the above three three-dimensional packaging embedded loop heat pipes are as follows:

[0074] When heat is generated in the device layer within the three-dimensional packaging stack, the working fluid is heated in the microchannels of the three-dimensional packaging stack. Under the combined action of capillary force and electrohydrodynamic driving force, directional flow boiling phase change occurs to generate steam, increasing the pressure in the evaporator and prompting the steam to flow through the steam flow pipeline to the condenser. The steam condenses into liquid in the condenser and releases energy. The liquid flows through the liquid flow pipeline to the compensator under the combined action of gravity, capillary force, and electrohydrodynamic driving force, and then returns to the evaporator, realizing the circulation of the working fluid and the transfer of heat from high temperature to low temperature.

[0075] Refer to Figure 7 , the method for fabricating the three-dimensional packaging stack in this current-driven three-dimensional packaging embedded loop heat pipe is as follows:

[0076] Step 1, etch blind holes on the silicon substrate, as Figure 7 a.

[0077] Select SF6 as the etching gas and C4F8 as the passivation gas, set the gas pressure to 20 Pa and the radio frequency power to 300 W, and use the reactive ion etching process to etch the corresponding number of blind holes on the upper and lower substrate wafers of the silicon substrate 62 according to the number of silicon through holes.

[0078] Step 2, grow an insulating layer and deposit a diffusion barrier layer and a seed layer, as Figure 7 b.

[0079] Place the upper and lower substrates in an oxidation furnace using the high-temperature thermal oxidation process, introduce oxygen and the inert carrier gas N2 at a high temperature of 900 °C for high-temperature oxidation, so that a uniform and dense silicon dioxide insulating layer is formed on the surfaces of the upper and lower substrate wafers and the inner walls of each blind hole. Then, set the temperature of the sputtering system to 90 °C and the vacuum degree to 10 -3 Pa, and use the sputtering process to sputter and deposit a uniform and continuous titanium diffusion barrier layer and a copper seed layer on the surfaces of the upper and lower substrate wafers and the inner walls of the blind holes respectively.

[0080] Step 3, fill the blind holes with copper, as Figure 7 c.

[0081] Use an electroplating solution mainly composed of copper sulfate, and under the condition of a direct current of 100 A, fill and fill each blind hole with the metal heat-conducting material copper using the electroplating process.

[0082] Step 4, etch microchannels on the silicon substrate, as Figure 7 d.

[0083] Use the polishing process, with the physical grinding action of nano-abrasives and the corrosion action of oxidants, to remove the excess metal material copper on the surfaces of the upper and lower substrate wafers, and select SF6 as the etching gas and C4F8 as the passivation gas, set the gas pressure to 20 Pa and the radio frequency power to 300 W, and use the reactive ion etching process to etch the microchannel 622 on the lower substrate wafer.

[0084] Step 5, grow an insulating layer on the lower substrate, as Figure 7 e.

[0085] Use the high-temperature thermal oxidation process, introduce oxygen and the inert carrier gas N2 at a high temperature of 900 °C to perform high-temperature oxidation on the lower substrate, so that silicon dioxide grows on the surface of the silicon channel as an insulating layer to isolate the high-voltage electrode from the silicon wafer.

[0086] Step 6, deposit a diffusion barrier layer and a conductive layer on the lower substrate, as Figure 7 f.

[0087] Use the sputtering process at a sputtering system temperature of 90 °C and a vacuum degree of 10 -3Pa, a titanium diffusion barrier layer and a copper conductive layer are sequentially sputter-deposited on the silicon dioxide surface of the silicon trench of the lower substrate.

[0088] Step 7: Obtain the electrode wiring area mask pattern on the lower substrate, such as Figure 7 g.

[0089] Using the spray process, high-pressure nitrogen is used to break up the diluted photoresist droplets to form a droplet-shaped spray. A mask layer is coated on the silicon groove conductive layer of the lower substrate through an ultrasonic spray nozzle for chemically etching the diffusion barrier layer and the conductive layer. The mask pattern of the electrode wiring area is obtained through a photolithography process using pre-baking, exposure, and development.

[0090] Step 8, etching away the diffusion barrier layer and the conductive layer in the non-electrode region, such as Figure 7 h.

[0091] Using a chemical etching process, a copper etching solution composed of acetic acid, hydrogen peroxide and water and a titanium etching solution composed of hydrofluoric acid and water are used to remove the copper conductive layer and titanium diffusion barrier layer in the non-electrode area of the silicon groove of the substrate, thereby retaining the titanium diffusion barrier layer and copper conductive layer in the electrode wiring area.

[0092] Step 9, electroforming three-dimensional electrodes, such as Figure 7 i.

[0093] An electrolyte containing copper sulfate as the main component is used, the electrolyte temperature is set to 50°C, and the DC current is set to 100A. Conductive copper is electroformed on the surface of the conductive layer of the silicon groove part of the lower substrate to form a three-dimensional electrode 621 with the same depth as the silicon microgroove.

[0094] Step 10: Bond the upper and lower substrates, as shown in Figure 7 j.

[0095] The upper substrate silicon wafer with surface oxidation and the lower substrate silicon wafer with microchannels and microelectrodes are bonded using a silicon-silicon direct bonding process. That is, first, under the conditions of a temperature of 100°C and a pressure of 1500N, the silicon wafers are attached to each other by relying on surface adsorption force to establish hydrogen bond connections. Then, a temperature curve with a maximum temperature not exceeding 900°C is set to perform a high-temperature annealing process on the bonded silicon wafers to enhance the bonding strength.

[0096] Step 11, prepare through silicon vias, such as Figure 7 k.

[0097] The upper and lower substrates of the microchannel are thinned and ground using a high-speed rotating grinding wheel. The upper and lower substrates of the microchannel are then polished using the physical grinding effect of nano-abrasive particles and the corrosion effect of oxidants until the blind holes are opened, forming silicon-through vias 63 filled with metal materials.

[0098] Step 12, depositing a device layer to form a single-layer packaging structure, such as Figure 7 l.

[0099] Select SiH4 and N2O as deposition reaction gases, and N2 as a passivation gas. At room temperature, use plasma chemical vapor deposition to form a dense silicon dioxide insulating layer on the outer sides of the upper and lower substrates of the silicon microchannel, and then deposit the device layer 61 thereon to form a single-layer packaging structure.

[0100] Step 13, connecting to form a three-dimensional packaging stacked structure, such as Figure 7 m.

[0101] Set a reflow curve with a maximum temperature of 230°C, and use micro solder balls to connect multiple single-layer packaging structures through the reflow soldering process to form a three-dimensional packaging stacked structure, realizing thermal or electrical interconnection.

[0102] It should be understood that this embodiment is only used to illustrate the present invention and not to limit the scope of the present invention. In addition, it should also be understood that after reading the content described in the present invention, those skilled in the art can make various changes or modifications to the present invention. However, these equivalent forms also fall within the scope defined by the appended claims of this application.

Claims

1. A current - fluid - driven three - dimensional encapsulated and embedded loop heat pipe, comprising an evaporator (1), a vapor flow pipe (2), a condenser (3), a liquid flow pipe (4) and a compensation chamber (5). The evaporator (1) is sequentially connected to the vapor flow pipe (2), the condenser (3), the liquid flow pipe (4) and the compensation chamber (5). It is characterized in that: The evaporator (1) is internally provided with a three - dimensional encapsulated stack (6) and is driven by electro - fluid; The three - dimensional encapsulated stack (6) includes multiple encapsulated single layers. Each encapsulated single layer includes a device layer (61), a silicon substrate (62) and a through - silicon via (63). The device layer (61) is located on the upper surface of the silicon substrate (62). Multiple three - dimensional electrodes (621) with a columnar boss structure are arranged in the silicon substrate (62), and the positive and negative electrodes are alternately distributed along the working fluid flow direction. Micro - channels (622) are formed between the three - dimensional electrodes (621); The liquid flow pipe (4) is internally provided with a planar negative electrode (14) and a planar positive electrode (15), and the two are alternately distributed for generating electro - fluid drive; The compensation chamber (5) is internally provided with an auxiliary heating sheet (7), and a phase - change material (8) is wound outside. The two form a temperature control system through an external PID controller.

2. The heat pipe according to claim 1, characterized in that: The three - dimensional encapsulated stack (6) is tightly connected to the lower wall surface in the evaporator (1) through solder balls (13).

3. The heat pipe according to claim 1, wherein: The number of stacked layers of the three - dimensional encapsulated stack (6) is 2 layers, 3 layers, 4 layers or multiple layers.

4. The heat pipe according to claim 1, characterized in that: The three - dimensional electrode (621) with a columnar boss structure adopts any one of a cuboid, a cube, a trapezoidal column or other polygonal geometric bodies.

5. The heat pipe according to claim 1, wherein: The condenser (3) adopts any one of air cooling, radiator cooling, heat pipe cooling or thermoelectric cooling methods.

6. The heat pipe according to claim 1, wherein: The compensation chamber (5) is located on one side parallel to the evaporator (1), and together with the evaporator (1) forms a rectangular cavity structure. The rectangular cavity includes an input port (9), a packaged upper cover plate (10), an output port (11) and a packaged lower substrate (12).

7. The heat pipe according to claim 1, wherein: The working fluid in the heat pipe is a dielectric fluid with a conductivity lower than 10 -8 Siemens per meter.

8. A method for preparing the three-dimensional packaging stack in claim 1, characterized in that, It includes the following: a) Using a reactive ion etching process to etch several blind holes on the upper and lower substrate wafers of the silicon substrate (62) respectively; b) Adopting a high - temperature thermal oxidation process to form a uniform and dense silicon dioxide insulating layer on the surfaces of the upper and lower substrate wafers and the inner walls of each blind hole. Then, using a sputtering process to deposit a diffusion barrier layer and a seed layer on the surfaces of the upper and lower substrate wafers and the inner walls of the blind holes respectively; c) Using an electroplating process to fill and fill each blind hole with a metal heat - conducting material; d) Polishing to remove the excess metal material on the surfaces of the upper and lower substrate wafers, and using a reactive ion etching process to etch micro - channels (622) on the lower substrate wafer; e) Adopting a high - temperature thermal oxidation process to grow silicon dioxide on the surface of the lower substrate channel as an insulating layer to isolate the high - voltage electrode from the silicon wafer; f) Using a sputtering process to sequentially sputter - deposit a diffusion barrier layer and a conductive layer on the silicon dioxide surface of the lower substrate channel; g) Using a spin - coating process to coat a mask layer on the conductive layer of the lower substrate channel for chemically etching the diffusion barrier layer and the conductive layer, and photolithographically obtaining a mask pattern for the electrode wiring area; h) removing the diffusion barrier layer and the conductive layer in the non-electrode region of the silicon trench of the lower substrate by chemical etching, and retaining the diffusion barrier layer and the conductive layer in the electrode wiring region; i) electroforming a conductive material on the surface of the conductive layer of the silicon groove portion of the lower substrate to form a three-dimensional electrode (621) with the same depth as the silicon micro-groove; j) bonding the upper silicon substrate wafer with an oxidized surface and the lower silicon substrate wafer with microchannels and microelectrodes using a silicon-silicon direct bonding process, and enhancing the bonding strength using a high-temperature annealing process; k) performing thinning, grinding, and polishing processes on the upper and lower substrates of the silicon microchannel until the blind holes are opened to form through-silicon vias (63) filled with metal material; 1) forming a silicon dioxide insulating layer on the outer sides of the upper and lower substrates of the silicon microchannel by plasma chemical vapor deposition, and then depositing a device layer (61) thereon to form a packaged single-layer structure; m) Use micro solder balls or adhesives to connect multiple package single-layer structures to form a three-dimensional package stacked structure to achieve thermal or electrical interconnection.

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