Baseline capacitance cancellation circuit and device termination

Abstract

The application relates to a baseline capacitance elimination circuit and a device terminal, the baseline capacitance elimination circuit comprising a baseline capacitance, a first switch unit, a second switch unit, an operational amplifier unit, a third switch unit, a fourth switch unit, a signal conversion and storage unit and an adjustable amplifier, when the other end of the fourth switch unit is electrically connected, the signal conversion and storage unit is further used for converting an initial digital voltage signal into an initial analog voltage signal and outputting the initial analog voltage signal to a non-inverting input end of the adjustable amplifier; the adjustable amplifier is further used for acquiring a second voltage output signal of the operational amplifier unit through a corresponding inverting input end when the fourth switch unit is turned on, comparing the second voltage output signal with the initial analog voltage signal, and outputting a corresponding difference value amplification signal to measure the change of the baseline capacitance, thereby laying a foundation for eliminating the influence of the baseline capacitance on the whole circuit.

Description

Technical Field

[0001] This application relates to the field of circuits, specifically to a baseline capacitance elimination circuit and device terminal. Background Technology

[0002] Since their introduction to smartphones and tablet PCs (personal computers), capacitive touchscreens have become increasingly popular. Capacitive touchscreens are getting larger, and there is a growing demand for improved responsiveness, resolution, and intelligence in these screens.

[0003] Specifically, when there is no contact with the capacitive touchscreen, the sensing capacitance of the capacitive touchscreen serves as the baseline capacitance. When in contact with the capacitive sensor, the value of the baseline capacitance is subtracted from the sensing capacitance, and this result is used as the measurement result of the subsequent circuit.

[0004] Among them, the accurate measurement of the baseline capacitance is very important for the subsequent circuit. Currently, all capacitive touch screens require accurate measurement of the baseline capacitance. Summary of the Invention

[0005] In view of this, this application provides a baseline capacitance elimination circuit and device terminal that can accurately measure the change value of the baseline capacitance, thereby eliminating the influence of the measured value of the baseline capacitance itself on the entire circuit.

[0006] The baseline capacitance elimination circuit includes:

[0007] Baseline capacitor, with one end of the baseline capacitor grounded;

[0008] First switching unit;

[0009] Second switching unit;

[0010] An operational amplifier unit, wherein the inverting input terminal of the operational amplifier unit is electrically connected to one end of the first switching unit, and the non-inverting input terminal of the operational amplifier unit is electrically connected to one end of the second switching unit;

[0011] The other end of the first switching unit is used to electrically connect to the other end of the baseline capacitor;

[0012] The other end of the second switching unit is used to connect to a reference voltage source;

[0013] The baseline capacitance elimination circuit also includes a third switching unit, a fourth switching unit, a signal conversion and storage unit, and an adjustable amplifier;

[0014] One end of the third switching unit is electrically connected to the output of the operational amplifier unit and the other end is electrically connected to the signal conversion and storage unit. One end of the fourth switching unit is electrically connected to the output of the operational amplifier unit and the other end is electrically connected to the inverting input of the adjustable amplifier. Only one of the third and fourth switching units is turned on.

[0015] The operational amplifier unit is also used to generate and output a first output voltage signal when the first switching unit and the second switching unit are turned on.

[0016] The signal conversion and storage unit is electrically connected to the non-inverting input of the adjustable amplifier. The signal conversion and storage unit is used to convert the first voltage output signal of the operational amplifier unit into an initial digital voltage signal and store it when the third switching unit is turned on.

[0017] When the fourth switching unit is turned on, the signal conversion and storage unit is also used to convert the initial digital voltage signal into an initial analog voltage signal and output it to the non-inverting input of the adjustable amplifier.

[0018] The adjustable amplifier is also used to obtain the second voltage output signal of the operational amplifier unit through the corresponding inverting input terminal when the fourth switching unit is turned on, compare the second voltage output signal with the initial analog voltage signal, and output the corresponding difference amplification signal to measure the change of the baseline capacitance.

[0019] In one embodiment, the baseline capacitance elimination circuit further includes a fifth switching unit, one end of which is grounded and the other end is electrically connected to the inverting input of the operational amplifier unit.

[0020] In one embodiment, the baseline capacitance elimination circuit further includes a sixth switching unit, one end of which is grounded and the other end is electrically connected to the non-inverting input of the operational amplifier unit.

[0021] In one embodiment, the baseline capacitance elimination circuit further includes a seventh switching unit, one end of which is grounded and the other end is electrically connected to the output of the operational amplifier unit.

[0022] In one embodiment, the signal conversion and storage unit includes an analog-to-digital converter (ADC), a digital-to-analog converter (DAC), and a buffer. The input terminal of the ADC is electrically connected to the other end of the third switching unit. The output terminal of the ADC is electrically connected to the input terminal of the buffer. The output terminal of the buffer is electrically connected to the input terminal of the DAC. The output terminal of the DAC is electrically connected to the non-inverting input terminal of the adjustable amplifier.

[0023] In one embodiment, the operational amplifier unit includes an operational amplifier and a feedback unit, one end of which is electrically connected to the output of the operational amplifier, and the other end of which is electrically connected to the input of the operational amplifier.

[0024] In one embodiment, the feedback unit is a feedback capacitor.

[0025] In one embodiment, the baseline capacitance elimination circuit further includes a first switching unit, a second switching unit, a third switching unit, and a fourth switching unit, all of which are single-pole single-throw switches.

[0026] In one embodiment, the baseline capacitance elimination circuit further includes a first switching unit, a second switching unit, a third switching unit, and a fourth switching unit, all of which employ MOSFET switching control circuits.

[0027] In addition, a device terminal is provided, including the aforementioned baseline capacitance elimination circuit.

[0028] The aforementioned baseline capacitance elimination circuit includes a baseline capacitor, a first switching unit, a second switching unit, an operational amplifier unit, a third switching unit, a fourth switching unit, a signal conversion and storage unit, and an adjustable amplifier. One end of the baseline capacitor is grounded; the inverting input of the operational amplifier unit is electrically connected to one end of the first switching unit, and the non-inverting input of the operational amplifier unit is electrically connected to one end of the second switching unit; the other end of the first switching unit is electrically connected to the other end of the baseline capacitor; the other end of the second switching unit is connected to a reference voltage source; one end of the third switching unit is electrically connected to the output of the operational amplifier unit, and the other end is electrically connected to the signal conversion and storage unit; one end of the fourth switching unit is electrically connected to the output of the operational amplifier unit, and the other end is electrically connected to the inverting input of the adjustable amplifier; the third and fourth switching units are activated if and only if one of them is active. The operational amplifier unit is also used to generate and output a first output voltage signal when the first and second switching units are turned on. The signal conversion and storage unit is electrically connected to the non-inverting input of the adjustable amplifier. When the third switching unit is turned on, the signal conversion and storage unit converts the first voltage output signal of the operational amplifier unit into an initial digital voltage signal and stores it. When the other end of the fourth switching unit is electrically connected, the signal conversion and storage unit is also used to convert the initial digital voltage signal into an initial analog voltage signal and output it to the non-inverting input of the adjustable amplifier. The adjustable amplifier is also used to obtain the second voltage output signal of the operational amplifier unit through the corresponding inverting input, compare the second voltage output signal with the initial analog voltage signal, and output the corresponding difference amplification signal to measure the change of the baseline capacitance, thereby laying the foundation for eliminating the influence of the baseline capacitance on the entire circuit. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 This is a schematic diagram of the circuit structure of a baseline capacitance elimination circuit provided in this application. Detailed Implementation

[0031] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, the following embodiments and their technical features can be combined with each other unless otherwise specified.

[0032] like Figure 1 As shown, a baseline capacitance elimination circuit 100 is provided, the baseline capacitance elimination circuit 100 including:

[0033] Baseline capacitor C1, with one end of baseline capacitor C1 grounded;

[0034] First switching unit 110;

[0035] Second switching unit 120;

[0036] Operational amplifier unit 130, the inverting input terminal Vb of operational amplifier unit 130 is electrically connected to one end of the first switching unit 110, and the non-inverting input terminal Vp of operational amplifier unit 130 is electrically connected to one end of the second switching unit 120.

[0037] The other end of the first switching unit 110 is used to electrically connect to the other end of the baseline capacitor C1;

[0038] The other end of the second switching unit 120 is used to connect to a reference voltage source;

[0039] The baseline capacitance elimination circuit 100 also includes a third switching unit 140, a fourth switching unit 150, a signal conversion and storage unit 160, and an adjustable amplifier 170.

[0040] One end of the third switching unit 140 is electrically connected to the output of the operational amplifier unit 130 and the other end is electrically connected to the signal conversion and storage unit 160. One end of the fourth switching unit 150 is electrically connected to the output of the operational amplifier unit 130 and the other end is electrically connected to the inverting input Vb of the adjustable amplifier 170. Only one of the third switching unit 140 and the fourth switching unit 150 is turned on.

[0041] The operational amplifier unit 130 is also used to generate a first output voltage signal and output it when the first switching unit 110 and the second switching unit 120 are turned on.

[0042] The signal conversion and storage unit 160 is electrically connected to the non-inverting input terminal of the adjustable amplifier 170. The signal conversion and storage unit 160 is used to convert the first voltage output signal of the operational amplifier unit 130 into an initial digital voltage signal and store it when the third switching unit 140 is turned on.

[0043] When the fourth switching unit 150 is turned on, the signal conversion and storage unit 160 is also used to convert the initial digital voltage signal into an initial analog voltage signal and output it to the non-inverting input of the adjustable amplifier 170.

[0044] The adjustable amplifier 170 is used to acquire the second voltage output signal of the operational amplifier unit 130 through the corresponding inverting input terminal when the third switching unit 140 is turned on, compare the second voltage output signal with the initial analog voltage signal, and output the corresponding difference amplification signal to measure the change of the baseline capacitance C1.

[0045] Specifically, when the third switch unit 140 is turned on, the fourth switch unit 150 is not turned on, and the first switch unit 110 and the second switch unit 120 are turned on; when the fourth switch unit 150 is turned on, the third switch unit 140 is not turned on, and both the first switch unit 110 and the second switch unit 120 are turned on.

[0046] When the third switching unit 140 is turned on, the fourth switching unit 150 is not turned on, and the first switching unit 110 and the second switching unit 120 are turned on. At this time, the baseline capacitor C1 is connected to the inverting input terminal Vb of the operational amplifier unit 130 through the first switching unit 110. The operational amplifier unit 130 is connected to the reference voltage source VREF through the second switching unit 120. The operational amplifier unit 130 generates a first output voltage signal and outputs it. The signal conversion and storage unit 160 converts the first voltage output signal of the operational amplifier unit 130 into an initial digital voltage signal and stores it. This stage is the elimination stage of the baseline capacitor C1.

[0047] Furthermore, when the third switching unit 140 is not turned on and the fourth switching unit 150 is not turned on, the first switching unit 110 and the second switching unit 120 are turned on. At this time, the signal conversion and storage unit 160 is also used to convert the initial digital voltage signal into an initial analog voltage signal and output it to the non-inverting input terminal of the adjustable amplifier 170. The adjustable amplifier 170 obtains the second voltage output signal of the operational amplifier unit 130 through the corresponding inverting input terminal, compares the second voltage output signal with the initial analog voltage signal, and outputs the corresponding difference amplification signal to measure the change of the baseline capacitance C1.

[0048] The aforementioned baseline capacitance elimination circuit 100, through the cooperation of baseline capacitor C1, first switching unit 110, second switching unit 120, operational amplifier unit 130, third switching unit 140, fourth switching unit 150, signal conversion and storage unit 160, and adjustable amplifier 170, achieves the following: When the third switching unit 140 is turned on, the signal conversion and storage unit 160 converts the first voltage output signal of the operational amplifier unit 130 into an initial digital voltage signal and stores it; when the fourth switching unit 150 is turned on, the signal conversion and storage unit 160 converts the initial digital voltage signal into an initial analog voltage signal and outputs it to the non-inverting input terminal of the adjustable amplifier 170; the adjustable amplifier 170 obtains the second voltage output signal of the operational amplifier unit 130 through the corresponding inverting input terminal, compares the second voltage output signal with the initial analog voltage signal, and outputs the corresponding difference amplification signal to measure the change of baseline capacitor C1, thereby laying the foundation for eliminating the influence of baseline capacitor C1 on the entire circuit.

[0049] In one embodiment, the baseline capacitance elimination circuit 100 further includes a fifth switching unit 180, one end of which is grounded and the other end is electrically connected to the inverting input terminal Vb of the operational amplifier unit 130.

[0050] In this embodiment, before the baseline capacitance elimination circuit 100 operates, a fifth switching unit 180 is set so that when the fifth switching unit 180 is turned on, the baseline capacitance elimination circuit 100 first clears the potential of the inverting input terminal Vb of the operational amplifier unit 130 and the potential of one end of the baseline capacitor C1 to zero before starting to operate.

[0051] In one embodiment, the baseline capacitance elimination circuit 100 further includes a sixth switching unit 190, one end of which is grounded and the other end is electrically connected to the non-inverting input terminal Vp of the operational amplifier unit 130.

[0052] In this embodiment, before the baseline capacitance elimination circuit 100 operates, a sixth switching unit 190 is set so that when the sixth switching unit 190 is turned on, the baseline capacitance elimination circuit 100 first clears the potential of the non-inverting input terminal Vp of the operational amplifier unit 130 to zero before starting to operate.

[0053] In one embodiment, before the baseline capacitance elimination circuit 100 operates, the baseline capacitance elimination circuit 100 further includes a seventh switching unit 200, one end of which is grounded and the other end is electrically connected to the output of the operational amplifier unit 130.

[0054] In this embodiment, before the baseline capacitance elimination circuit 100 is activated, a seventh switching unit 200 is set so that when the seventh switching unit 200 is turned on, the potential at the output terminal of the operational amplifier unit 130 is cleared to zero.

[0055] In one embodiment, the signal conversion and storage unit 160 includes an analog-to-digital converter (ADC), a digital-to-analog converter (DAC), and a buffer 160a. The input terminal of the ADC is electrically connected to the other end of the third switching unit 140, the output terminal of the ADC is electrically connected to the input terminal of the buffer 160a, the output terminal of the buffer 160a is electrically connected to the input terminal of the DAC, and the output terminal of the DAC is electrically connected to the non-inverting input terminal of the adjustable amplifier 170.

[0056] In this embodiment, the buffer 160a is used to store the output result of the analog-to-digital converter (ADC) (i.e., the initial digital voltage signal), and when the digital-to-analog converter (DAC) is working, it outputs the corresponding stored result to the DAC. The DAC converts the stored result into an initial analog voltage signal and outputs it to the non-inverting input of the adjustable amplifier 170.

[0057] In one embodiment, the operational amplifier unit 130 includes an operational amplifier A1 and a feedback unit 130a. One end of the feedback unit 130a is electrically connected to the output terminal of the operational amplifier A1, and the other end of the feedback unit 130a is electrically connected to the input terminal of the operational amplifier A1.

[0058] In one embodiment, the feedback unit 130a is a feedback capacitor C2.

[0059] In one embodiment, the baseline capacitance elimination circuit 100 includes a fifth switching unit 180, a sixth switching unit 190, and a seventh switching unit 200; the signal conversion and storage unit 160 includes an analog-to-digital converter (ADC), a digital-to-analog converter (DAC), and a buffer 160a; and the operational amplifier unit 130 includes an operational amplifier A1 and a feedback unit 130a, wherein the feedback unit 130a is a feedback capacitor C2.

[0060] Before the baseline capacitance elimination circuit 100 operates, by turning on the fifth switch unit 180, the sixth switch unit 190 and the seventh switch unit 200, the potentials of the inverting input terminal Vb, the non-inverting input terminal Vp and the output terminal of the operational amplifier unit 130, as well as the potential of one end of the baseline capacitor C1, can be cleared to zero.

[0061] Furthermore, the inverting input terminal Vb and the output terminal of the operational amplifier unit 130 are both disconnected from the ground terminal, and the non-inverting input terminal Vp of the operational amplifier unit 130 is connected to the reference voltage source VREF. If the initial value of the baseline capacitor C1 is represented by Cb, then the output terminal of the operational amplifier unit 130 generates a first output voltage signal and outputs it. If the first output voltage signal is represented by Vo, then Vo = (1 + Cb / C2) * VREF. When the third switching unit 140 is turned on, the first voltage output signal Vo of the operational amplifier unit 130 is converted into an initial digital voltage signal and stored.

[0062] Furthermore, if the baseline capacitance C1 changes by Cx based on Cb, then V'o = (1 + Cb / C2) * VREF + Cx / C2 * VREF. When the fourth switching unit 150 is turned on, the signal conversion and storage unit 160 converts the initial digital voltage signal into an initial analog voltage signal and outputs it to the non-inverting input of the adjustable amplifier 170. When the third switching unit 140 is turned on, it obtains the second voltage output signal of the operational amplifier unit 130 through the corresponding inverting input, compares the second voltage output signal with the initial analog voltage signal, and outputs the corresponding difference amplification signal to measure the change in the baseline capacitance C1.

[0063] In this embodiment, when the third switching unit 140 is turned on, the second voltage output signal of the operational amplifier unit 130 is obtained through the corresponding inverting input terminal, and the second voltage output signal is compared with the initial analog voltage signal. The corresponding difference amplification signal is then output to measure the change in the baseline capacitor C1.

[0064] In this embodiment, by amplifying the change in baseline capacitance C1 to a suitable value, the change in baseline capacitance C1 can be effectively measured. In this way, a large on-chip capacitor is not required, and the feedback capacitor C2 is not limited by the traditional range. Noise performance can be optimized by using a relatively large C2. The aforementioned adjustable amplifier 170 also does not require additional circuit overhead.

[0065] In one embodiment, the output of the adjustable amplifier 170 can be electrically connected to another high-precision analog-to-digital converter to effectively measure the differential amplified signal.

[0066] In one embodiment, the first switching unit 110, the second switching unit 120, the third switching unit 140, and the fourth switching unit 150 are all single-pole single-throw switches.

[0067] In one embodiment, the first switching unit 110, the second switching unit 120, the third switching unit 140, and the fourth switching unit 150 all employ MOSFET switching control circuits.

[0068] In addition, a device terminal is provided, including the aforementioned baseline capacitance elimination circuit 100.

[0069] The division of each unit in the baseline capacitance elimination circuit 100 described above is only for illustrative purposes. In other embodiments, the baseline capacitance elimination circuit 100 may be divided into different units as needed to complete all or part of the functions of the baseline capacitance elimination circuit 100.

[0070] That is, the above description is only an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural changes made using the content of this application’s specification and drawings, such as the combination of technical features between different embodiments, or direct or indirect application in other related technical fields, are similarly included within the patent protection scope of this application.

[0071] Furthermore, for structural elements with the same or similar characteristics, this application may use the same or different reference numerals for identification. In addition, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first" and "second" may explicitly or implicitly include one or more features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0072] In this application, the word "for example" is used to mean "used as an example, illustration, or explanation." Any embodiment described as "for example" in this application is not necessarily to be construed as more preferred or advantageous than other embodiments. This application has been provided above to enable any person skilled in the art to make and use it. Various details are set forth in the above description for purposes of explanation.

[0073] It should be understood that those skilled in the art will recognize that this application can be implemented without using these specific details. In other embodiments, well-known structures and processes will not be described in detail to avoid obscuring the description of this application with unnecessary detail. Therefore, this application is not intended to be limited to the embodiments shown, but is consistent with the broadest scope of the principles and features disclosed herein.

Claims

1. A baseline capacitance elimination circuit, characterized in that, include: A baseline capacitor, one end of which is grounded; First switching unit; Second switching unit; An operational amplifier unit, wherein the inverting input terminal of the operational amplifier unit is electrically connected to one end of the first switching unit, and the non-inverting input terminal of the operational amplifier unit is electrically connected to one end of the second switching unit; The other end of the first switching unit is used to electrically connect to the other end of the baseline capacitor; The other end of the second switching unit is used to connect to a reference voltage source; The baseline capacitance elimination circuit also includes a third switching unit, a fourth switching unit, a signal conversion and storage unit, and an adjustable amplifier; One end of the third switching unit is electrically connected to the output terminal of the operational amplifier unit and the other end is electrically connected to the signal conversion and storage unit. One end of the fourth switching unit is electrically connected to the output terminal of the operational amplifier unit and the other end is electrically connected to the inverting input terminal of the adjustable amplifier. Only one of the third switching unit and the fourth switching unit is turned on. The operational amplifier unit is also used to generate and output a first output voltage signal when the first switching unit and the second switching unit are turned on. The signal conversion and storage unit is electrically connected to the non-inverting input terminal of the adjustable amplifier. The signal conversion and storage unit is used to convert the first voltage output signal of the operational amplifier unit into an initial digital voltage signal and store it when the third switching unit is turned on. When the fourth switching unit is turned on, the signal conversion and storage unit is also used to convert the initial digital voltage signal into an initial analog voltage signal and output it to the non-inverting input terminal of the adjustable amplifier; The adjustable amplifier is also used to acquire the second voltage output signal of the operational amplifier unit through the corresponding inverting input terminal when the fourth switching unit is turned on, compare the second voltage output signal with the initial analog voltage signal, and output the corresponding difference amplification signal to measure the change of the baseline capacitance. The baseline capacitance elimination circuit further includes a fifth switching unit and a sixth switching unit; one end of the fifth switching unit is grounded and the other end is electrically connected to the inverting input terminal of the operational amplifier unit; one end of the sixth switching unit is grounded and the other end is electrically connected to the non-inverting input terminal of the operational amplifier unit.

2. The baseline capacitance elimination circuit according to claim 1, characterized in that, It also includes a seventh switching unit, one end of which is grounded and the other end is electrically connected to the output terminal of the operational amplifier unit.

3. The baseline capacitance elimination circuit according to claim 1, characterized in that, The signal conversion and storage unit includes an analog-to-digital converter (ADC), a digital-to-analog converter (DAC), and a buffer. The input terminal of the ADC is electrically connected to the other end of the third switching unit. The output terminal of the ADC is electrically connected to the input terminal of the buffer. The output terminal of the buffer is electrically connected to the input terminal of the DAC. The output terminal of the DAC is electrically connected to the non-inverting input terminal of the adjustable amplifier.

4. The baseline capacitance elimination circuit according to claim 1, characterized in that, The operational amplifier unit includes an operational amplifier and a feedback unit. One end of the feedback unit is electrically connected to the output terminal of the operational amplifier, and the other end of the feedback unit is electrically connected to the input terminal of the operational amplifier.

5. The baseline capacitance elimination circuit according to claim 4, characterized in that, The feedback unit is a feedback capacitor.

6. The baseline capacitance elimination circuit according to claim 1, characterized in that, The first switch unit, the second switch unit, the third switch unit, and the fourth switch unit are all single-pole single-throw switches.

7. The baseline capacitance elimination circuit according to claim 1, characterized in that, The first switching unit, the second switching unit, the third switching unit, and the fourth switching unit all employ MOS transistor switching control circuits.

8. A device terminal, characterized in that, Includes the baseline capacitance elimination circuit according to any one of claims 1 to 7.

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