Array substrate, color filter substrate, liquid crystal display panel and display device

Abstract

The present disclosure provides an array substrate, a color film substrate, a liquid crystal display panel and a display device, and belongs to the technical field of display. The array substrate comprises a first heat dissipation metal layer, a first substrate and a driving layer which are sequentially stacked; the driving layer is provided with a common voltage line for loading a common voltage; the orthographic projection of the first heat dissipation metal layer on the first substrate is located within the orthographic projection of a metal structure in the driving layer on the first substrate; and the first heat dissipation metal layer is connected with the common voltage line through a first metal connecting structure. The array substrate can improve the heat dissipation capacity of the liquid crystal display panel.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and more specifically, to an array substrate, a color filter substrate, a liquid crystal display panel, and a display device. Background Technology

[0002] LCD projectors project images from an LCD panel using direct or reflected backlighting. The backlight intensity is approximately 100 knit, far exceeding the 10 knit intensity of ordinary display devices. This results in higher temperatures for the LCD panel, which can easily lead to problems such as screen blacking and partial ghosting.

[0003] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0004] The purpose of this disclosure is to overcome the shortcomings of the prior art and provide an array substrate, a color filter substrate, a liquid crystal display panel, and a display device, thereby improving the heat dissipation capability of the liquid crystal display panel.

[0005] According to a first aspect of the present disclosure, an array substrate is provided, comprising a first heat dissipation metal layer, a first substrate, and a driving layer sequentially stacked thereon;

[0006] The driving layer is provided with a common voltage line for loading a common voltage;

[0007] The orthographic projection of the first heat-dissipating metal layer on the first substrate is located within the orthographic projection of the metal structure in the driving layer on the first substrate; the first heat-dissipating metal layer is connected to the common voltage line through a first metal connection structure.

[0008] According to one embodiment of the present disclosure, the first substrate is provided with a first through hole, and the first metal connection structure includes a first metal pillar located in the first through hole.

[0009] According to one embodiment of this disclosure, the driving layer has an array of pixel electrodes;

[0010] At least a portion of the first metal pillar is located in the gap between the pixel electrodes.

[0011] According to one embodiment of the present disclosure, the first metal connection structure includes a first metal connection line, which connects the common voltage line to the first heat dissipation metal layer through the edge of the first substrate.

[0012] According to one embodiment of this disclosure, the driving layer further includes an adapter pad, which is connected to the common voltage line via a via; the first heat dissipation metal layer and the adapter pad are connected via the first metal connection line.

[0013] According to one embodiment of this disclosure, the driving layer includes a gate layer and a source / drain metal layer;

[0014] The pattern of the first heat dissipation metal layer is the same as the pattern of the gate layer or the source / drain metal layer.

[0015] According to a second aspect of this disclosure, a color filter substrate is provided, comprising a second substrate, a black matrix, and a color filter layer stacked sequentially; wherein the material of the black matrix is ​​a metallic material; or, the black matrix comprises a first black matrix layer and a second black matrix layer covering the surface of the first black matrix layer, wherein the thermal conductivity of the second black matrix layer is greater than that of the first black matrix layer.

[0016] According to one embodiment of the present disclosure, the color filter substrate further includes a second heat-dissipating metal layer located on the side of the second substrate away from the black matrix; the second heat-dissipating metal layer is connected to the black matrix through a second metal connection structure; the orthographic projection of the second heat-dissipating metal layer on the second substrate does not exceed the orthographic projection of the black matrix on the second substrate.

[0017] According to one embodiment of the present disclosure, the second substrate is provided with a second through hole, and the second metal connection structure includes a second metal pillar located in the second through hole.

[0018] According to one embodiment of the present disclosure, the second metal connection structure includes a second metal connection line disposed at the edge of the second substrate.

[0019] According to one embodiment of this disclosure, the orthographic projection of the second heat-dissipating metal layer on the second substrate coincides with the orthographic projection of the black matrix on the second substrate.

[0020] According to a third aspect of this disclosure, a liquid crystal display panel is provided, comprising an array substrate and a color filter substrate disposed opposite each other, wherein a liquid crystal layer is disposed between the array substrate and the color filter substrate; wherein,

[0021] The array substrate is the array substrate described above, and / or the color filter substrate is the color filter substrate described above.

[0022] According to one embodiment of this disclosure, the array substrate is the array substrate described above, and the color filter substrate is the color filter substrate described above.

[0023] The liquid crystal display panel also has a third metal heat dissipation structure, which connects the common voltage line and the second heat dissipation metal layer.

[0024] According to one embodiment of this disclosure, the driving layer surface of the array substrate is provided with an adapter pad, and the adapter pad is connected to the common voltage line through a via; the second heat dissipation metal layer and the adapter pad are connected through the third metal heat dissipation structure.

[0025] According to a fourth aspect of this disclosure, a display device is provided, including the liquid crystal display panel described above.

[0026] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0027] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0028] Figure 1 This is a schematic diagram of the structure of a horizontal projector in some embodiments of this disclosure.

[0029] Figure 2 This is a schematic diagram of the structure of a vertical projector in one of the embodiments of this disclosure.

[0030] Figure 3 This is a schematic diagram of the structure of a liquid crystal display panel in some embodiments of this disclosure.

[0031] Figure 4 This is a schematic diagram of the structure of the array substrate in some embodiments of this disclosure.

[0032] Figure 5 This is a schematic diagram of the liquid crystal display panel in some embodiments of this disclosure.

[0033] Figure 6 This is a schematic diagram of the metal structure in the driving layer in some embodiments of this disclosure.

[0034] Figure 7 This is a schematic diagram of the structure of the first heat-dissipating metal layer in some embodiments of this disclosure.

[0035] Figure 8 This is a schematic diagram of the structure of the first heat-dissipating metal layer in some embodiments of this disclosure.

[0036] Figure 9 This is a schematic diagram of the metal structure in the driving layer in some embodiments of this disclosure.

[0037] Figure 10 This is a schematic diagram of the structure of the first heat-dissipating metal layer in some embodiments of this disclosure.

[0038] Figure 11 This is a schematic diagram of the structure of the first heat-dissipating metal layer in some embodiments of this disclosure.

[0039] Figure 12 This is a schematic diagram of the structure of the array substrate in some embodiments of this disclosure.

[0040] Figure 13 This is a schematic diagram of the structure of the array substrate in some embodiments of this disclosure.

[0041] Figure 14 This is a schematic diagram of the structure of the array substrate in some embodiments of this disclosure.

[0042] Figure 15 This is a schematic diagram of the structure of the color filter substrate in some embodiments of this disclosure.

[0043] Figure 16 This is a schematic diagram of the structure of the color filter substrate in some embodiments of this disclosure.

[0044] Figure 17 This is a schematic diagram of the structure of the black matrix in the color filter substrate in some embodiments of this disclosure.

[0045] Figure 18 This is a schematic diagram of the structure of the second heat dissipation metal layer in the color filter substrate in some embodiments of this disclosure.

[0046] Figure 19 This is a partial structural schematic diagram of a liquid crystal display panel in some embodiments of this disclosure.

[0047] Figure 20 This is a partial structural schematic diagram of a liquid crystal display panel in some embodiments of this disclosure.

[0048] Explanation of reference numerals in the attached figures:

[0049] AA, Display Area; ARR, Array Substrate; BB, Peripheral Area; BM, Black Matrix; BPA, First Substrate; BPB, Second Substrate; CF, Color Filter Substrate; CFL, Color Filter Layer; CFU, Color Filter Unit; CL, Common Voltage Line; COMP, Common Electrode; DL, Data Line; DRL, Driving Layer; FSA, Sealing Adhesive; GI, Gate Insulating Layer; GL, Scan Line; GT, Gate Layer; LC, Liquid Crystal Layer; MAL, First Heat Dissipation Metal Layer; MAS, First Metal Connection Structure; MAS1, First Metal Pillar; MAS2, First Metal Connection Line; MBL, second heat dissipation metal layer; MBS1, second metal pillar; MCS, third metal heat dissipation structure; PIXP, pixel electrode; PNL, liquid crystal display panel; POLA, first polarizer; POLB, second polarizer; PP, electrode pair; PVX, passivation layer; SD, source / drain metal layer; SW, switching transistor; TGV1, first through-hole; TGV2, second through-hole; TRP, adapter pad; U1, light source; U2, light cup; U3, rear Fresnel lens; U4, heat-insulating glass; U5, front Fresnel lens; U6, front reflector; U7, lens; U8, rear reflector. Detailed Implementation

[0050] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, they are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and therefore detailed descriptions of them will be omitted. Furthermore, the drawings are merely illustrative of this disclosure and are not necessarily drawn to scale.

[0051] Although relative terms such as "up" and "down" are used in this specification to describe the relative relationship of one component of an icon to another, these terms are used only for convenience, such as according to the orientation of the examples shown in the accompanying drawings. It is understood that if the device of the icon is flipped upside down, the component described as "up" will become the component described as "down." When a structure is "up" of another structure, it may mean that the structure is integrally formed on the other structure, or that the structure is "directly" mounted on the other structure, or that the structure is "indirectly" mounted on the other structure through another structure.

[0052] The terms “a,” “one,” “the,” “the,” and “at least one” are used to indicate the presence of one or more elements / components / etc.; the terms “including” and “having” are used to indicate an open-ended inclusion and to mean that there may be other elements / components / etc. in addition to the listed elements / components / etc.; the terms “first” and “second” are used only as markers and are not a limitation on the number of objects.

[0053] This disclosure provides a display device, such as a liquid crystal projector. Figure 1 This is a schematic diagram of the structure of a horizontal projector. Figure 2 This is a schematic diagram of a vertical projector. (See also...) Figure 1 and Figure 2 The LCD projector includes a light source module, a display module, and a projection module. For a horizontal projector, the light source module includes a light source U1, a light cup U2, and a rear Fresnel lens U3. The light emitted from the light source U1 is focused by the light cup U2 and then shaped into parallel light by the rear Fresnel lens U3. For a vertical projector, the light source module also includes a rear reflector U8. The parallel light shaped by the rear Fresnel lens U3 is refracted by the rear reflector U8, changing its light path direction. The display module includes a first polarizer POLA, a heat-insulating glass U4, a liquid crystal display panel PNL, and a second polarizer POLB, arranged sequentially. The parallel light provided by the light source module passes sequentially through the first polarizer POLA, the heat-insulating glass U4, the liquid crystal display panel PNL, and the second polarizer POLB, resulting in the parallel light carrying the pattern on the liquid crystal display panel PNL. The projection module includes a front frosted mirror U5, a front reflector U6, and a lens U7 arranged in sequence. Parallel light from the display module is focused by the front frosted mirror U5, its direction is adjusted by the front reflector U6, and its beam is expanded and transmitted by the lens U7, so that the pattern on the liquid crystal display panel PNL is projected.

[0054] Figure 3 This is a schematic diagram of the structure of the liquid crystal display panel (PNL) in an embodiment of this disclosure. See also... Figure 3 A liquid crystal display panel (PNL) includes an array substrate (ARR) and a color filter substrate (CF) arranged in pairs, and a liquid crystal layer (LC) located between the array substrate (ARR) and the color filter substrate (CF). For example... Figure 3 As shown, the liquid crystal display panel PNL also includes a sealant FSA located between the array substrate ARR and the color filter substrate CF. The sealant FSA can surround the liquid crystal cell, and the liquid crystal layer LC is located in the liquid crystal cell.

[0055] In this embodiment, the liquid crystal display panel (PNL) includes a display area and a peripheral area surrounding the display area. Within the display area, the PNL is equipped with a light switch serving as a sub-pixel. This light switch includes electrode pairs capable of controlling the flipping or bending of liquid crystal molecules at corresponding positions. The PNL can cooperate with a first polarizer (POLA) and a second polarizer (POLB) to allow the light switch to control the light emission brightness of the sub-pixel. The peripheral area may not have sub-pixels, or the sub-pixels provided may not be used for displaying images.

[0056] In one embodiment of this disclosure, see [link to relevant documentation]. Figure 4 and Figure 5The array substrate ARR includes a first substrate BPA and a driving layer DRL stacked together. The driving layer DRL includes an electrode pair PP, a switching transistor SW, a scan line GL, a data line DL, and a common voltage line CL located on one side of the first substrate BPA. The electrode pair PP includes a pixel electrode PIXP and a common electrode COMP stacked together. The source of the switching transistor SW is electrically connected to the data line DL, the drain of the switching transistor SW is electrically connected to the pixel electrode PIXP, the gate of the switching transistor SW is electrically connected to the scan line GL (for example, the gate of the switching transistor SW is part of the scan line GL), and the common electrode COMP is electrically connected to the common voltage line CL. During operation, the common voltage line CL can apply a common voltage to the common electrode COMP; the switching transistor SW can respond to the scan signal applied on the scan line GL and apply the driving voltage from the data line DL to the pixel electrode PIXP. Thus, the electric field between the pixel electrode PIXP and the common electrode COMP can control the flipping or undulation of liquid crystal molecules in the liquid crystal layer, thereby controlling the brightness of the sub-pixels. In one example, the driving layer DRL includes film layers such as a gate layer, source / drain metal layers, a semiconductor layer, a pixel electrode layer, and a common electrode layer, as well as multiple insulating layers. The scan trace GL and the common voltage line CL can be disposed on the gate layer, and the data line DL can be disposed on the source / drain metal layers. The pixel electrode PIXP can be disposed on the pixel electrode layer, and the common electrode COMP can be disposed on the common electrode layer. The active layer (including the channel region, source, and drain) of the switching transistor SW is disposed on the semiconductor layer. It is understood that the order of the various film layers in the driving layer DRL can be adaptively configured as needed. It is also understood that the array substrate ARR can also include other film layers, such as an alignment layer disposed on the side of the driving layer DRL away from the first substrate BPA.

[0057] In one embodiment of this disclosure, see Figure 15 The color filter substrate CF includes a second substrate BPB, a black matrix BM, and a color filter layer CFL stacked sequentially. The black matrix BM has a light-transmitting window through which light passing through the electrode PP exits. The color filter layer CFL includes color filter units CFUs corresponding to each light-transmitting window, with each CFU covering its corresponding light-transmitting window. Thus, light passing through the light-transmitting window is also filtered by the corresponding CFU. For example, the color filter layer CFL may include red, green, and blue color filter units.

[0058] In this embodiment, the common voltage line CL, scan line GL, and data line DL can be metal traces. The black matrix BM can cover the data line DL, scan line GL, and common voltage line CL to prevent reflection from these metal traces. In some examples, an edge electric field is formed between the data line DL, scan line GL, and other traces and electrodes such as the common electrode COMP and pixel electrode PIXP. This edge electric field can cause disordered deflection of liquid crystal molecules at the edges of the common electrode COMP and pixel electrode PIXP, which can easily lead to abnormal light emission at the pixel edges. To ensure the normal display of the liquid crystal display panel PNL, the black matrix BM can cover the edges of the common electrode COMP or pixel electrode PIXP. Optionally, the material of the pixel electrode PIXP and common electrode COMP can be a transparent conductive metal oxide, such as indium tin oxide.

[0059] exist Figure 5 In the example, the common voltage line CL is paired with the scan trace GL. The scan trace GL is used to load the scan signal to the switching transistor SW of the sub-pixel row, and the common voltage line CL is used to load the common electrode COMP of the sub-pixel row. It is understood that in some other embodiments of this disclosure, the common voltage line CL may not be paired with the scan trace GL. For example, see [link to relevant documentation]. Figure 9 The common voltage line CL can be located in the peripheral area BB of the liquid crystal display panel PNL, for example, surrounding the display area AA. The driving layer DRL can have a common electrode layer, which can have common electrode connection lines and arrayed common electrodes COMP. The common electrode connection lines are electrically connected to the common voltage line CL, and each common electrode COMP is connected to the common electrode connection line. In this way, the common voltage line CL can apply a common voltage to the common electrodes COMP through the common electrode connection lines.

[0060] In this embodiment, the heat dissipation capability of the liquid crystal display panel (PNL) can be improved by optimizing any one or both of the array substrate (ARR) and the color filter substrate (CF) to adapt to high-temperature environments, especially those in liquid crystal projectors. In other words, this embodiment can provide an array substrate (ARR) with high heat dissipation capability and / or a color filter substrate (CF) with high heat dissipation capability to improve the heat dissipation capability of the liquid crystal display panel (PNL).

[0061] In one embodiment of this disclosure, see Figure 4The array substrate ARR also includes a first heat-dissipating metal layer MAL disposed on the side of the first substrate BPA away from the driving layer DRL. The orthographic projection of the first heat-dissipating metal layer MAL on the first substrate BPA lies within the orthographic projection of the metal structure in the driving layer DRL on the first substrate BPA. That is, the orthographic projection of the first heat-dissipating metal layer MAL on the first substrate BPA can completely coincide with the orthographic projection of the metal structure in the driving layer DRL on the first substrate BPA; or the entire orthographic projection of the first heat-dissipating metal layer MAL on the first substrate BPA lies within the orthographic projection of the metal structure in the driving layer DRL on the first substrate BPA. The first heat-dissipating metal layer MAL is connected to the common voltage line CL through a first metal connection structure MAS. In this way, heat from the side of the first substrate BPA near the color filter substrate CF, such as heat in the liquid crystal, can be quickly transferred to the first heat-dissipating metal layer MAL through the first metal connection structure MAS. The first heat-dissipating metal layer MAL is located on the side of the first substrate BPA away from the color filter substrate CF, which can dissipate heat more quickly, overcoming the disadvantages of slow heat transfer and slow heat dissipation of the first substrate BPA, thereby helping to reduce the temperature of the liquid crystal and prevent the liquid crystal from undergoing performance changes at high temperatures.

[0062] In this embodiment, the pattern of the first heat-dissipating metal layer MAL does not extend beyond the metal structure in the driving layer DRL, thus not affecting the light transmission effect of the array substrate ARR. Furthermore, the first heat-dissipating metal layer MAL is connected to the common voltage line CL via the first metal connection structure MAS. On one hand, the common voltage line CL, being made of metal, has strong thermal conductivity, facilitating rapid heat transfer to the first metal connection structure MAS, thereby accelerating heat dissipation. On the other hand, even if the common voltage applied to the common voltage line CL is applied to the first heat-dissipating metal layer MAL through the first metal connection structure MAS, it will not affect the electrical performance of the array substrate ARR.

[0063] In one embodiment of this disclosure, see Figure 6 The common voltage line CL can be at least partially set in the display area AA, for example, the common voltage line CL is set to correspond one-to-one with the scan trace GL. In this way, the higher density of common voltage lines CL and the larger distribution range of common voltage lines CL can improve the heat collection efficiency, further improve the heat dissipation efficiency of the first heat dissipation metal layer MAL, and improve the cooling effect of the liquid crystal display panel PNL.

[0064] In one embodiment of this disclosure, see Figure 12 and Figure 13A first via TGV1 can be formed on the first substrate BPA, and a first metal pillar MAS1 serving as a first metal connection structure MAS is disposed within the first via TGV1. A common voltage line CL is connected to a first heat-dissipating metal layer MAL through the first metal pillar MAS1. Thus, the common voltage line CL can transfer heat to the first heat-dissipating metal layer MAL through the first metal pillar MAS1, thereby accelerating the heat dissipation of the liquid crystal layer. Optionally, the first metal pillar MAS1 can be a copper pillar or a metallized copper via. Of course, the material of the first metal pillar MAS1 can also be other metallic materials, such as tungsten, copper-nickel alloy, molybdenum, aluminum, etc.

[0065] In one embodiment of this disclosure, the common voltage line CL can be at least partially disposed in the display area AA, and at least a portion of the first via TGV1 can be disposed in the display area AA. Thus, at least a portion of the first metal pillar MAS1 is disposed in the display area AA, which allows heat from the array substrate ARR to be transferred more quickly to the first heat dissipation metal layer MAL through the first metal pillar MAS1 located in the display area AA, thereby further accelerating the heat dissipation capacity of the array substrate ARR. Furthermore, the orthographic projection of the first metal pillar MAS1 located in the display area AA onto the first substrate BPA is located in the gap between the orthographic projections of each pixel electrode onto the first substrate BPA, and overlaps with the orthographic projection of the common voltage line CL onto the first substrate BPA. In other words, at least a portion of the first metal pillar MAS1 is located in the gap between the pixel electrodes. In one example, the first substrate BPA is a glass substrate, and glass via technology can be used to form the first via TGV1 and the first metal pillar MAS1.

[0066] In another embodiment of this disclosure, see [link to relevant documentation]. Figure 9 The common voltage line CL is located in the peripheral area BB of the liquid crystal display panel PNL. At this time, each of the first through holes TGV1 and the first metal pillars MAS1 are also located in the peripheral area BB and overlap with the common voltage line CL.

[0067] In one embodiment of this disclosure, the pattern of the first heat-dissipating metal layer MAL can be the same as the metal structure in the driving layer DRL. This allows the first heat-dissipating metal layer MAL to have a larger area, thereby improving its heat dissipation capacity.

[0068] For example, Figure 6 This is a schematic diagram of the metal structure on a driving layer DRL in one example. The metal structure in the driving layer DRL includes a scan trace GL located on the gate layer GT, a common voltage line CL, and a data line DL located on the source / drain metal layers SD. The common voltage line CL and the scan trace GL are arranged in pairs, and at least a portion of the common voltage line CL passes through the display area AA. See also... Figure 6A plurality of first vias TGV1 overlapping with a common voltage line CL are provided in the first substrate BPA, and first metal pillars MAS1 can be disposed in the first vias TGV1. Figure 6 In the example, only the common voltage line CL, scan trace GL, and data line DL in the display area AA are used to illustrate the metal structure in the driver layer DRL; it is understood that... Figure 6 All metal structures in the driving layer DRL are not shown in the figure. Figure 7 This is a schematic diagram of the structure of the first heat dissipation metal layer MAL in this example; see [link / reference]. Figure 7 The pattern of the first heat dissipation metal layer MAL is completely consistent with the pattern of the metal structure in the drive layer DRL. It is understandable that... Figure 7 Not all portions of the first heat-dissipating metal layer MAL are shown.

[0069] For example, Figure 9 This is a schematic diagram of the metal structure on the driving layer DRL in one example. The metal structure in the driving layer DRL includes a scan trace GL located on the gate layer GT, a common voltage line CL, and a data line DL located on the source / drain metal layers SD. The common voltage line CL is at least partially located in the peripheral area BB and surrounds the display area AA. See also... Figure 9 A plurality of first vias TGV1 overlapping with a common voltage line CL are provided on the first substrate BPA, and first metal pillars MAS1 can be disposed in the first vias TGV1. Figure 9 In the example, only the common voltage line CL, scan trace GL, and data line DL are used to illustrate the metal structure in the driver layer DRL; it is understood that... Figure 9 All metal structures in the driving layer DRL are not shown in the diagram. Figure 10 This is a schematic diagram of the structure of the first heat dissipation metal layer MAL in this example; see [link / reference]. Figure 10 The pattern of the first heat dissipation metal layer MAL is completely consistent with the pattern of the metal structure in the drive layer DRL. It is understandable that... Figure 10 Not all portions of the first heat-dissipating metal layer MAL are shown.

[0070] Figure 6 and Figure 9 In the example, the driving layer DRL has two metal layers: a gate layer GT and a source / drain metal layer SD. The metal structure in the driving layer DRL is disposed within these two metal layers. When fabricating the first heat-dissipating metal layer MAL, the pattern of the first heat-dissipating metal layer MAL can be defined using the mask used to fabricate the gate layer GT and the source / drain metal layer SD. This ensures that the pattern of the first heat-dissipating metal layer MAL is the sum of the patterns of the gate layer GT and the source / drain metal layer SD, without the need to develop a new mask. This reduces the cost of the first heat-dissipating metal layer MAL.

[0071] In other embodiments of this disclosure, the pattern of the first heat-dissipating metal layer MAL may be the same as the pattern of the gate layer GT or the pattern of the source / drain metal layer SD.

[0072] For example, Figure 6 This is a schematic diagram of the metal structure on a driving layer DRL in one example. The metal structure in the driving layer DRL includes a scan trace GL located on the gate layer GT, a common voltage line CL, and a data line DL located on the source / drain metal layers SD. The common voltage line CL and the scan trace GL are arranged in pairs, and at least a portion of the common voltage line CL passes through the display area AA. See also... Figure 6 A plurality of first vias TGV1 overlapping with a common voltage line CL are provided in the first substrate BPA, and first metal pillars MAS1 can be disposed in the first vias TGV1. Figure 6 In the example, the metal structure in the driver layer DRL is only illustrated by the common voltage line CL, scan trace GL, and data line DL in the display area AA; it is understood that... Figure 6 All metal structures in the driving layer DRL are not shown in the diagram. Figure 8 This is a schematic diagram of the structure of the first heat dissipation metal layer MAL in this example; see [link / reference]. Figure 8 The pattern of the first heat dissipation metal layer MAL is completely identical to the pattern of the gate layer GT. It is understandable that... Figure 8 Not all portions of the first heat-dissipating metal layer MAL are shown. Thus, the first heat-dissipating metal layer MAL can be fabricated using the same mask used for the gate layer GT, thereby avoiding the design and development of a new mask and reducing the fabrication cost of the array substrate ARR. Of course, in other examples, the pattern of the first heat-dissipating metal layer MAL can also be made consistent with the pattern of the source / drain metal layers SD; in this case, the first via TGV1 can be positioned at the intersection of the data line DL and the common voltage line CL, allowing the first heat-dissipating metal layer MAL to be connected to the common voltage line CL via the first metal pillar MAS1.

[0073] For example, Figure 9 This is a schematic diagram of the metal structure on the driver layer DRL in one example. The metal structure in the driver layer DRL includes a scan trace GL located on the gate layer GT, a common voltage line CL, and a data line DL located on the source / drain metal layers SD. The common voltage line CL is at least partially located in the peripheral area BB and surrounds the display area AA. See also... Figure 9 A plurality of first vias TGV1 overlapping with a common voltage line CL are provided on the first substrate BPA, and first metal pillars MAS1 can be disposed in the first vias TGV1. Figure 9In the examples, only the common voltage line CL, scan trace GL, and data line DL are used to illustrate the metal structure in the driver layer DRL; it is understood that... Figure 9 All metal structures in the driving layer DRL are not shown in the diagram. Figure 11 This is a schematic diagram of the structure of the first heat dissipation metal layer MAL in this example; see [link / reference]. Figure 10 The pattern of the first heat dissipation metal layer MAL is completely identical to the pattern of the gate layer GT. It is understandable that... Figure 10 Not all portions of the first heat-dissipating metal layer MAL are shown. Thus, the first heat-dissipating metal layer MAL can be fabricated using the same mask used for the gate layer GT, thereby avoiding the design and development of a new mask and reducing the fabrication cost of the array substrate ARR. Of course, in other examples, the pattern of the first heat-dissipating metal layer MAL can also be made consistent with the pattern of the source / drain metal layers SD; in this case, the first via TGV1 can be positioned at the intersection of the data line DL and the common voltage line CL, allowing the first heat-dissipating metal layer MAL to be connected to the common voltage line CL via the first metal pillar MAS1.

[0074] In one embodiment of this disclosure, the peripheral area BB has a bonding area for bonding a driver chip or circuit board. In this embodiment, a first through-hole TGV1 can be disposed between the bonding area and the display area AA, and a first metal pillar MAS1 is disposed in the first through-hole TGV1 to reduce the heat transferred from the display area AA to the bonding area, thereby preventing the driver chip or circuit board from overheating and causing driving abnormalities. Of course, the first through-hole TGV1 and the first metal pillar MAS1 filling the first through-hole TGV1 can also be disposed in other locations.

[0075] In one example, the distribution density of the first via TGV1 between the display area AA and the bonding area is greater than the distribution density of the first via TGV1 in other areas of the array substrate ARR, in order to better protect the driver chip or circuit board.

[0076] In one embodiment of this disclosure, the common voltage line CL includes a first common voltage line disposed in the display area AA and a second common voltage line disposed in the peripheral area BB. The orthographic projection of the first metal pillar MAS1 on the first substrate BPA may overlap with the orthographic projection of either the first or second common voltage line on the first substrate BPA. For example, a portion of the orthographic projection of the first metal pillar MAS1 on the first substrate BPA may overlap with the orthographic projection of the first common voltage line on the first substrate BPA, and a portion of the orthographic projection of the first metal pillar MAS1 on the first substrate BPA may overlap with the orthographic projection of the second common voltage line on the first substrate BPA.

[0077] In some embodiments of this disclosure, see Figure 14 Alternatively, the array substrate ARR may not have the first metal pillar MAS1. Instead, it may have a first metal connection line MAS2, which serves as the first metal connection structure MAS, to connect the common voltage line CL and the first heat dissipation metal layer MAL. This first metal connection line MAS2 connects the common voltage line CL to the first heat dissipation metal layer MAL through the edge of the first substrate BPA (especially the side of the first substrate BPA).

[0078] In one example, the common voltage line CL can extend to the edge of the first substrate BPA so that the common voltage line CL and the first heat dissipation metal layer MAL can be connected to the first metal interconnect line MAS2.

[0079] In another example, see Figure 14 The driving layer DRL further includes a transition pad TRP, which is connected to the common voltage line CL via a via; the first heat dissipation metal layer MAL and the transition pad TRP are connected via the first metal interconnect MAS2. In this example, the transition pad TRP may extend to the edge of the first substrate BPA to connect with the first metal interconnect MAS2. For example, in Figure 14 In the example, the drive layer DRL has a via penetrating the passivation layer PVX and the gate insulating layer GI, which exposes at least a portion of the common voltage line CL; the common electrode layer is provided with a common electrode COMP and a transition pad TRP, which is connected to the common voltage line CL through the via.

[0080] Of course, it is understandable that in some embodiments, the first metal connection structure MAS may simultaneously include a first metal pillar MAS1 disposed in the first through hole TGV1 and a first metal connection line MAS2 disposed on the side of the first substrate BPA.

[0081] In one embodiment of this disclosure, the color filter substrate CF may include a second substrate BPB, a high thermal conductivity black matrix BM, and a color filter layer CFL stacked sequentially. The black matrix BM is made of a material with good thermal conductivity to improve heat dissipation through the black matrix BM and the second substrate BPB. For example, the black matrix BM can be made of a metallic material, such as molybdenum, aluminum, or copper, or an alloy material. As another example, the black matrix BM includes a first black matrix layer and a second black matrix layer covering the surface of the first black matrix layer. The thermal conductivity of the second black matrix layer is greater than that of the first black matrix layer. In this example, a high thermal conductivity second black matrix layer can be coated on the surface of the first black matrix layer to allow heat to be transferred more quickly to the second substrate BPB through the black matrix BM, thereby facilitating heat dissipation of the color filter substrate CF. Optionally, the second black matrix layer can be made of a metal or alloy, especially a low-reflectivity metal or alloy. Of course, the second black matrix layer can also be made of an organic material or composite material with high thermal conductivity, such as a coating with high thermal conductivity.

[0082] In some embodiments of this disclosure, see Figure 16 Furthermore, a second heat dissipation metal layer (MBL) and a second metal connection structure (e.g.,) can be disposed on the color filter substrate (CF). Figure 16 The second metal pillar (MBS1) and the second heat dissipation metal layer (MBL) can be disposed on the side of the second substrate (BPB) away from the black matrix (BM), and connected to the black matrix (BM) through a second metal connection structure. The orthographic projection of the second heat dissipation metal layer (MBL) onto the second substrate (BPB) does not exceed the orthographic projection of the black matrix (BM) onto the second substrate (BPB). In this way, heat from the black matrix (BM) can be transferred to the second heat dissipation metal layer (MBL) through the second metal connection structure, thereby achieving rapid heat dissipation. This overcomes the problem of slow heat transfer and dissipation speed of the second substrate (BPB), improving the heat dissipation speed of the color filter substrate (CF) and thus reducing the temperature of the liquid crystal layer.

[0083] In one embodiment of this disclosure, the orthographic projection of the second heat-dissipating metal layer MBL onto the second substrate BPB coincides with the orthographic projection of the black matrix BM onto the second substrate BPB. This maximizes the area of ​​the second heat-dissipating metal layer MBL, increasing its effective heat dissipation surface area and improving heat dissipation efficiency. Furthermore, it allows the use of the same photomask as the black matrix BM during the fabrication of the second heat-dissipating metal layer MBL, reducing the number of photomasks and lowering the fabrication cost of the color filter substrate CF.

[0084] In one implementation, see Figure 16 , Figure 17 and Figure 18 The second substrate BPB has a second via TGV2, and the second metal connection structure includes a second metal pillar MBS1 located in the second via TGV2. The second metal pillar MBS1 connects the second heat dissipation metal layer MBL and the black matrix BM. In this example, the position of the orthographic projection of the second via TGV2 on the second substrate BPB can be within the range of the orthographic projection of the second heat dissipation metal layer MBL on the second substrate BPB. Optionally, the material of the second metal pillar MBS1 can be a metal material or alloy material such as copper, aluminum, or tungsten, for example, a copper alloy. In one example, the second substrate BPB is a glass substrate, and glass via technology can be used to form the second via TGV2 and the second metal pillar MBS1.

[0085] For example, Figure 17 This is a schematic diagram of the structure of a black matrix BM in one example; the orthographic projection of the second through-hole TGV2 on the second substrate BPB is located at the intersection of the row-direction light-blocking portion and the column-direction light-blocking portion of the black matrix BM. Figure 18 This is a schematic diagram of the structure of the second heat dissipation metal layer MBL in this embodiment. The pattern of the second heat dissipation metal layer MBL is completely consistent with the pattern of the black matrix BM.

[0086] In another embodiment, the second metal connection structure may not include the second metal pillar MBS1, but instead includes a second metal connection line disposed on the edge of the second substrate BPB (e.g., the side of the second substrate BPB). This second metal connection line connects the second heat dissipation metal layer MBL and the black matrix BM, serving as a heat transfer channel from the black matrix BM to the second heat dissipation metal layer MBL.

[0087] In other embodiments of this disclosure, the second metal connection structure of the color filter substrate CF may also include a second metal pillar MBS1 and a second metal connection line to improve the heat dissipation capability of the color filter substrate CF.

[0088] In other embodiments of this disclosure, the color filter substrate CF can simultaneously provide a black matrix BM with high thermal conductivity and a second heat-dissipating metal layer MBL. For example, the black matrix BM of the color filter substrate CF is made of a metallic material, or the black matrix BM includes a first black matrix layer and a second black matrix layer covering the first black matrix layer, and the second substrate BPB has a second heat-dissipating metal layer MBL connected to the black matrix BM via a second metal connection structure on the side away from the black matrix BM. This further improves the heat dissipation efficiency of the color filter substrate CF.

[0089] In one embodiment of this disclosure, the array substrate ARR on the liquid crystal display panel PNL can be an array substrate ARR with high heat dissipation capability, that is, the array substrate ARR is an array substrate ARR with a first heat dissipation metal layer MAL.

[0090] In another embodiment of this disclosure, the color filter substrate CF of the liquid crystal display panel PNL can be a color filter substrate CF with high heat dissipation capability, that is, the color filter substrate CF is provided with a black matrix BM with high thermal conductivity or / and a second heat dissipation metal layer MBL.

[0091] In other embodiments of this disclosure, see [link to relevant documentation]. Figure 19 and Figure 20 The array substrate ARR of the liquid crystal display panel PNL is an array substrate ARR with high heat dissipation capability, and the color filter substrate CF of the liquid crystal display panel PNL is a color filter substrate CF with high heat dissipation capability.

[0092] Furthermore, the liquid crystal display panel PNL also has a third metal heat dissipation structure MCS, which connects the common voltage line CL and the second heat dissipation metal layer MBL. This makes the first heat dissipation metal layer MAL and the second heat dissipation metal layer MBL a whole heat dissipation structure, further improving the heat dissipation speed, reducing the temperature of the liquid crystal display panel PNL, and avoiding problems such as image distortion, black screen, and ghosting caused by excessive temperature of the liquid crystal display panel PNL.

[0093] Optionally, the material of the third metal heat dissipation structure MCS is a thermally conductive paste, such as silver paste.

[0094] For example, see Figure 13 and Figure 19 The array substrate ARR is provided with a first heat dissipation metal layer MAL, which is connected to the first heat dissipation metal layer MAL through a first metal pillar MAS1 located in a first via TGV1. The array substrate ARR also has a transition pad TRP located on the side of the common voltage line CL away from the first substrate BPA in its peripheral region BB. This transition pad TRP can be located in one or more of the source / drain metal layers SD, pixel electrode layers, common electrode layers, etc., and is exposed on the surface of the array substrate ARR (e.g., not covered by the alignment layer). Furthermore, the transition pad TRP is located near the edge of the first substrate BPA. The color filter substrate CF is provided with a second heat dissipation metal layer MBL. The liquid crystal display panel PNL also includes a third metal heat dissipation structure MCS formed of silver paste, which connects the edges of the transition pad TRP and the second heat dissipation metal layer MBL. This allows for more efficient heat flow between the array substrate ARR and the color filter substrate CF, improving the heat dissipation capability of the liquid crystal display panel PNL.

[0095] For another example, in Figure 20In the example, the array substrate ARR has a first heat-dissipating metal layer MAL, and a transition pad TRP is provided in the peripheral area BB. The transition pad TRP can be located in one of the source / drain metal layers SD, pixel electrode layer, common electrode layer, or other film layers, and the transition pad TRP is exposed on the surface of the array substrate ARR (e.g., not covered by the alignment layer). The array substrate ARR has a first metal connection line MAS2 on its side, which connects the transition pad TRP to the first heat-dissipating metal layer MAL. This allows heat collected by the common voltage line CL to be transferred to the first heat-dissipating metal layer MAL through the transition pad TRP and the first metal connection line MAS2, facilitating heat dissipation of the array substrate ARR. The color filter substrate CF has a second heat-dissipating metal layer MBL; the liquid crystal display panel PNL also includes a third metal heat dissipation structure MCS formed by silver paste, which connects the edges of the transition pad TRP and the second heat-dissipating metal layer MBL. In this way, more efficient heat flow can occur between the array substrate (ARR) and the color filter substrate (CF), improving the heat dissipation capability of the liquid crystal display panel (PNL).

[0096] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the appended claims.

Claims

1. A liquid crystal display panel, characterized in that, The array substrate and the color filter substrate are arranged in a cell, and a liquid crystal layer is disposed between the array substrate and the color filter substrate; wherein, The array substrate includes a first heat dissipation metal layer, a first substrate, and a driving layer that are stacked sequentially. The driving layer is provided with a common voltage line for loading a common voltage; The orthographic projection of the first heat-dissipating metal layer on the first substrate is located within the orthographic projection of the metal structure in the driving layer on the first substrate; the first heat-dissipating metal layer is connected to the common voltage line through a first metal connection structure. The color filter substrate includes a second substrate, a black matrix, and a color filter layer stacked sequentially; wherein the material of the black matrix is ​​a metal material; or, the black matrix includes a first black matrix layer and a second black matrix layer covering the surface of the first black matrix layer, wherein the thermal conductivity of the second black matrix layer is greater than that of the first black matrix layer.

2. The liquid crystal display panel according to claim 1, characterized in that, The first substrate is provided with a first through hole, and the first metal connection structure includes a first metal pillar located in the first through hole.

3. The liquid crystal display panel according to claim 2, characterized in that, The driving layer has an array of pixel electrodes; At least a portion of the first metal pillar is located in the gap between the pixel electrodes.

4. The liquid crystal display panel according to claim 1, characterized in that, The first metal connection structure includes a first metal connection line, which connects the common voltage line to the first heat dissipation metal layer through the edge of the first substrate.

5. The liquid crystal display panel according to claim 4, characterized in that, The driving layer also includes an adapter pad, which is connected to the common voltage line through a via; the first heat dissipation metal layer and the adapter pad are connected through the first metal connection line.

6. The liquid crystal display panel according to any one of claims 1 to 4, characterized in that, The driving layer includes a gate layer and source / drain metal layers; The pattern of the first heat dissipation metal layer is the same as the pattern of the gate layer or the source / drain metal layer.

7. The liquid crystal display panel according to claim 1, characterized in that, The color filter substrate further includes a second heat-dissipating metal layer located on the side of the second substrate away from the black matrix; the second heat-dissipating metal layer is connected to the black matrix through a second metal connection structure; the orthographic projection of the second heat-dissipating metal layer on the second substrate does not exceed the orthographic projection of the black matrix on the second substrate.

8. The liquid crystal display panel according to claim 7, characterized in that, The second substrate is provided with a second through hole, and the second metal connection structure includes a second metal pillar located in the second through hole.

9. The liquid crystal display panel according to claim 7, characterized in that, The second metal connection structure includes a second metal connection line disposed at the edge of the second substrate.

10. The liquid crystal display panel according to claim 7, characterized in that, The orthographic projection of the second heat dissipation metal layer on the second substrate coincides with the orthographic projection of the black matrix on the second substrate.

11. The liquid crystal display panel according to any one of claims 7 to 10, characterized in that, The liquid crystal display panel also has a third metal heat dissipation structure, which connects the common voltage line and the second heat dissipation metal layer.

12. The liquid crystal display panel according to claim 11, characterized in that, The drive layer surface of the array substrate is provided with an adapter pad, which is connected to the common voltage line through a via; the second heat dissipation metal layer and the adapter pad are connected through the third metal heat dissipation structure.

13. A display device comprising a liquid crystal display panel as described in any one of claims 1 to 12.

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