Hash table operation management method, system and electronic device
By employing multi-threaded collaborative expansion and lock-free operation management methods, the problem of low performance of hash tables in PM memory architecture is solved, the expansion efficiency and parallel performance are improved, and the impact of DCPMM read latency is reduced.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- HUAZHONG UNIV OF SCI & TECH
- Filing Date
- 2023-05-26
- Publication Date
- 2026-05-15
AI Technical Summary
Existing hash tables suffer from low overall performance in PM-based memory architectures, especially during scaling, which consumes a lot of computational overhead, reducing multi-core resource utilization and concurrency performance.
A context-aware, multi-threaded collaborative resizing approach is adopted, in which multiple threads collaboratively migrate the main bucket chain to the new hash table. During the resizing process, read threads are allowed to execute concurrently, and lock-free insertion, search, and deletion methods are used to reduce lock overhead and the impact of high read latency in DCPMM.
It improves the resizing efficiency and parallel performance of hash tables, reduces the impact of high read latency of DCPMM on overall performance, and enhances read and write access performance.
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Figure CN116737073B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of computer storage, and more specifically, relates to a method, system, and electronic device for operating and managing hash tables. Background Technology
[0002] Dynamic Random Access Memory (DRAM) has been widely used in computer storage architectures for decades. However, DRAM faces high power consumption during dynamic refresh and density expansion bottlenecks, gradually making it unable to meet the memory demands of computer systems. In recent years, the emergence of new non-volatile memory (NVM) or persistent memory (PM) technologies, such as 3DXpoint, Phase Change Memory (PCM), Resistive Random Access Memory (RRAM), and Intel Optane DC Persistent Memory Module (DCPMM), has provided more possibilities for new memory architectures by combining the access performance of DRAM with the non-volatility of disks. Compared to DRAM, PM offers lower static power consumption, larger capacity, and non-volatility, making it a focus of attention in academia and industry. However, PM has limited durability, requiring lifespan assurance to prevent rapid wear and tear. Furthermore, the non-volatile nature of PMs, meaning data is not lost even when power is off, necessitates ensuring data consistency during system failures. PMs directly loaded onto the memory bus allow applications to access data directly via high-speed memory instructions such as load and store, avoiding the traditional and inefficient I / O operations of reading data from secondary storage disks. Currently, DCPMMs are mounted onto the memory bus in Application Direct Mode to maximize their utilization and improve application read / write performance.
[0003] In recent years, hash tables based on cache-friendly mechanisms (PMs) have been extensively studied, such as P-CLHT, Level_hashing, CCEH, and Clevel. Cache-friendly hash tables can significantly improve cache hit rates and maximize read performance. However, hash tables encounter numerous problems when resizing in a lock-based, single-threaded manner, such as high computational overhead, long processing times, and ineffective utilization of multi-core resources. The high overhead of locking and unlocking, coupled with the single-threaded resizing method, significantly reduces resizing parallelism and blocks other read / write threads, resulting in a substantial decrease in overall hash table performance. For insertion and deletion operations, while bucket-lock-based mechanisms offer significantly improved parallelism compared to full-table-lock-based mechanisms, there is still room for further improvement. Furthermore, since the read latency of real-world DCPMM devices is 2 to 3 times that of DRAM, while the write latency is comparable to DRAM, researchers need to consider how to mitigate the overall performance degradation caused by the high read latency of DCPMM. Summary of the Invention
[0004] In view of the shortcomings of the prior art, the purpose of this invention is to provide a method, system and electronic device for operating and managing hash tables, which aims to solve the problem of low overall performance of existing hash tables.
[0005] To achieve the above objectives, in a first aspect, the present invention provides a method for managing hash tables, comprising the following steps:
[0006] Determine the hash table for non-volatile memory;
[0007] If the hash table capacity reaches a preset threshold, a context-aware multi-threaded collaborative expansion method is used to expand the hash table, resulting in a new hash table, and the space of the original hash table is released. This multi-threaded collaborative expansion involves multiple threads collaboratively migrating the main bucket chains in the original hash table to the allocated new hash table space. The new hash table has a capacity greater than the original hash table. During the expansion process, insertion and deletion threads other than those required for expansion are blocked, while read threads are allowed to execute concurrently. During this multi-threaded collaborative expansion process, if a thread completes the migration, the data corresponding to all the migrated main bucket chains is persisted to non-volatile memory.
[0008] In an optional example, the method of expanding the hash table using a context-aware, multi-threaded collaborative expansion approach to obtain a new hash table is as follows:
[0009] Determine the number of primary buckets and the number of threads for coordinated expansion of the hash tables to be migrated;
[0010] Divide the number of main buckets by the number of threads, and round up the result to get the number of main buckets that each thread needs to migrate.
[0011] Each thread is assigned a corresponding main bucket according to the order of the main buckets in the hash table to be migrated and the number of main buckets each thread needs to migrate, so that it can perform the migration; however, a main bucket can only be migrated by one thread.
[0012] Set a flag array for each thread to indicate whether the master buckets under that thread have completed the migration;
[0013] When the flag array of a certain thread indicates that all primary buckets under that thread have completed migration, the data of the corresponding primary bucket is persisted to non-volatile memory.
[0014] In an optional example, the method also includes the step of inserting new data into the hash table without locking.
[0015] In an optional example, the method further includes the step of performing a lock-free lookup when searching in the hash table.
[0016] In an optional example, the method further includes the following steps: if data needs to be deleted from a main bucket chain, determine whether the hash table where the main bucket chain is located is being expanded. If it is being expanded, block and wait until the expansion is completed, and then delete the data in the main bucket chain without locking. If the hash table is not being expanded, delete the data in the main bucket chain directly without locking.
[0017] In an optional example, the lock-free insertion, lock-free search, and lock-free deletion refer to inserting, searching, or deleting using atomic instructions.
[0018] In an optional example, the method further includes the following steps:
[0019] During the hash table expansion process, if a main bucket chain fails to migrate, all threads other than the thread corresponding to the failed main bucket chain are blocked, and the failed main bucket chain is restored based on context awareness.
[0020] In a second aspect, the present invention provides an electronic device comprising: at least one memory for storing a program; and at least one processor for executing the program stored in the memory, wherein when the program stored in the memory is executed, the processor is configured to perform the method described in the first aspect or any alternative example of the first aspect.
[0021] Thirdly, the present invention provides a computer-readable storage medium storing a computer program that, when run on a processor, causes the processor to perform the method described in the first aspect or any alternative example of the first aspect.
[0022] Fourthly, the present invention provides a computer program product that, when run on a processor, causes the processor to perform the method described in the first aspect or any alternative example of the first aspect.
[0023] In summary, the technical solutions conceived by this invention have the following beneficial effects compared with the prior art:
[0024] This invention provides a method, system, and electronic device for managing hash tables. When a hash table reaches its capacity threshold and needs to be expanded, a new hash table with a capacity N times larger than the original hash table is first generated. During this process, multi-threaded collaborative rehashing is used to migrate key-value entries from the original hash table to the new hash table in parallel, which significantly reduces the migration completion time. Lock-free methods such as atomic instructions avoid high lock overhead, which greatly improves multi-threaded scalability in read-heavy, write-light scenarios. The relatively high read latency of DCPMM can be mitigated by using fingerprinting instead of scanning the entire key to speed up key-value entry matching, effectively reducing the impact of high read latency in PM and improving read performance. Attached Figure Description
[0025] Figure 1 This is a flowchart of the hash table operation management method provided in the embodiments of the present invention;
[0026] Figure 2 This is a flowchart of lock-free insertion and multi-threaded expansion of a hash table provided in an embodiment of the present invention;
[0027] Figure 3 This is a flowchart of a context-aware multi-threaded collaborative rehashing process provided in an embodiment of the present invention;
[0028] Figure 4 This is a flowchart of the hash table lock-free lookup process provided in an embodiment of the present invention;
[0029] Figure 5 This is a flowchart of the hash table lock-free deletion process provided in an embodiment of the present invention. Detailed Implementation
[0030] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.
[0031] In embodiments of the present invention, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design described as "exemplary" or "for example" in embodiments of the present invention should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.
[0032] In the description of the embodiments of the present invention, unless otherwise stated, "a plurality of" means two or more.
[0033] First, the technical terms involved in the embodiments of the present invention will be introduced.
[0034] A hash table, also known as a hash map, is a data structure that allows direct access to a specific value based on a given key. In other words, it maps a key to a location in a table for direct access to the record, thus speeding up the process. Typically, we call this key the Key and the corresponding record the Value; therefore, it can be described as accessing a mapping table through the Key to obtain the address of the Value. This mapping table uses a hash function to quickly locate records, and the array storing these records is called a hash table.
[0035] Next, the technical solutions provided in the embodiments of the present invention will be introduced.
[0036] In view of the shortcomings of existing technologies and the need for improvement, the purpose of this invention is to improve the parallel expansion efficiency of persistent cache row hashes, accelerate the parallel performance of insertion and deletion, and reduce the impact of high read latency in DCPMM.
[0037] Figure 1 This is a flowchart of the hash table operation management method provided in an embodiment of the present invention; for example... Figure 1 As shown, it includes the following steps:
[0038] S101, determine the hash table of non-volatile memory;
[0039] S102, determine whether the hash table capacity has reached a preset threshold. If it has, expand the hash table using a context-aware multi-threaded collaborative expansion method to obtain a new hash table and release the space of the original hash table. The multi-threaded collaborative expansion involves multiple threads collaboratively migrating the main bucket chains in the original hash table to the allocated new hash table space. The capacity of the new hash table is greater than the capacity of the original hash table. During the expansion process, insertion and deletion threads other than the threads required for expansion are blocked, while read threads are allowed to execute concurrently. During the multi-threaded collaborative expansion process, if a thread completes the migration, the data corresponding to all the main bucket chains it migrated is persisted to non-volatile memory.
[0040] like Figure 2 As shown, the embodiment of the present invention provides a hash table lock-free insertion and multi-threaded expansion process including the following steps:
[0041] (I1) Insert new data into the DCPMM-based persistent cache line friendly hash table without locking using atomic instructions such as compare-and-swap (CAS). Determine whether the hash table has reached the cache line expansion threshold. If so, perform concurrent expansion operation (I2); otherwise, proceed to (I3).
[0042] (I2) The hash table is multiplied, using a lock-based multi-threaded collaborative expansion method to generate a new hash table ht, while retaining the hash table ht-multiply used for expansion. The expansion flag is_resizing is set to true. Other insertion and deletion operations are blocked, while read threads are allowed to perform concurrent operations until expansion is complete. Go to (I4).
[0043] (I3) The data is persisted to DCPMM using the ordered persistence function persist provided by PMDK, ensuring data consistency. Proceed to (I5).
[0044] (I4) Insert new data into hash table ht without locking.
[0045] (I5) The insertion operation is complete.
[0046] Here, `ht` refers to the currently most valid hash table; `ht_multiply` refers to the hash table used to perform the resizing operation. The `persist` function provided by PMDK encapsulates cacheline flush (`clflush`) and memory fence (`mfence`) instructions, effectively ensuring data consistency persisted to DCPMM. The flag `is_resizing` indicates whether the hash table is currently being resized; a value of `true` indicates resizing, and a value of `false` indicates it is not being resized.
[0047] In one example, see Figure 3 The context-aware, multi-threaded collaborative rehashing process is as follows:
[0048] (1) Assume that the number of threads used for collaborative rehashing is N. R (Numbers from 0 to N) R -1), the number of main buckets in the hash table ht that needs to be migrated is N. B Their numbers range from 0 to N. B -1, then each collaborative rehashing thread needs to migrate S main bucket chains, i.e., S = (N B %N R ==0), (N B / N R ):(N B / N R +1), which means rounding up.
[0049] (2) Set an N R A bitmap[N] flag array R The initial values are all 0; bitmap[i] = 0 indicates that the rehashing thread with thread number i has not completed the migration of the corresponding main bucket number range; bitmap[i] = 1 indicates that the rehashing thread with thread number i has completed the migration of the corresponding main bucket number range.
[0050] (3) Check if all members of the bitmap array are 1. If they are, it means that the main bucket chain to be migrated has been migrated and then proceed to (6). If not, continue the migration until it is completed.
[0051] (4)N R Several rehashing threads perform rehashing in parallel. Let the thread number be an integer i (i is from 0 to N). R If the integer is less than or equal to 2, then the range of the main bucket number for each rehashing thread is [i*S, (i+1)*S-1], and the numbering is N. R -1 rehashing thread, responsible for a main bucket number range of [(N R -1)*S,N B -1].
[0052] (5)N R Each rehashing thread migrates the corresponding non-overlapping range of main bucket numbers in parallel, rehashing the key-value pairs of the corresponding bucket numbers into a new hash table ht_multiply that is twice the size of the original hash table ht. The rehashing thread numbered i that has completed the migration sets bitmap[i] to 1 and persists it to non-volatile memory.
[0053] (6) Use atomic transactions to generate a new empty temporary table Table_tmp that is twice the size of ht_multiply, and release and reclaim the space of ht. Then, atomically modify the metadata ht = ht_multiply, ht_multiply = &Table_tmp, and persist ht and ht_multiply to non-volatile memory.
[0054] (7) Multi-threaded collaborative rehashing is completed.
[0055] In one example, see Figure 4 The lock-free search method uses fingerprinting to reduce the impact of high read latency in DCPMM. The specific steps are as follows:
[0056] (S1) Search for a specific key-value pair (KV) item in the current valid ht, calculate the 2-byte fingerprint Fingerprint and the corresponding bucket number based on the key;
[0057] (S2) Find the corresponding KV item from the corresponding bucket. First, compare the fingerprints of the two keys. If they are equal, proceed to (S3); otherwise, proceed to (S4).
[0058] (S3) Compare the full keys to determine if they are equal. If they are equal, proceed to (S5); otherwise, continue to execute step (S4).
[0059] (S4) Determine if the search is complete. If yes, proceed to (S6); otherwise, continue execution (S2).
[0060] (S5) Search successful, return the found value;
[0061] (S6) If the search fails, return a null value.
[0062] In a specific example, see Figure 5 The specific steps for unlocked deletion (Delete) are as follows:
[0063] (D1) Determine if the current hash table is being resized, i.e., is_resizing == true. If they are equal, block and wait until the resizing is complete; otherwise, proceed to (D2).
[0064] (D2) Search for a specific KV item in the current valid ht, calculate the 2-byte fingerprint Fingerprint based on the Key, and the corresponding bucket number;
[0065] (D3) Find the corresponding KV item from the corresponding bucket. First, compare the fingerprints of the two keys. If they are equal, proceed to (D4); otherwise, proceed to (D5).
[0066] (D4) Compare all keys to determine if they are equal. If they are equal, proceed to (D6); otherwise, proceed to (D3).
[0067] (D5) Take the next KV term for comparison;
[0068] (D6) Use the atomic exchange instruction CAS to set this entry to empty;
[0069] (D7) It is necessary to check again whether the hash table is resizing == true. If it is, start executing (D1) from the beginning; otherwise, execute (D8).
[0070] (D8) The deletion operation was successful, and the result of successful deletion was returned.
[0071] In one example, the data recovery steps are as follows:
[0072] (1) During recovery, if is_resizing is true, scan ht and migrate all valid entries that failed to migrate to ht_multiply;
[0073] (2) Block all other multi-threaded operations and use a context-aware multi-threaded collaborative rehashing module for recovery until recovery is successful.
[0074] Based on the methods described in the above embodiments, this invention provides an electronic device. The device may include at least one memory for storing a program and at least one processor for executing the program stored in the memory. When the program stored in the memory is executed, the processor performs the methods described in the above embodiments.
[0075] Based on the methods in the above embodiments, this embodiment of the invention provides a computer-readable storage medium storing a computer program that, when run on a processor, causes the processor to execute the methods in the above embodiments.
[0076] Based on the methods in the above embodiments, this embodiment of the invention provides a computer program product that, when run on a processor, causes the processor to execute the methods in the above embodiments.
[0077] It is understood that the processor in the embodiments of the present invention can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. The general-purpose processor can be a microprocessor or any conventional processor.
[0078] The method steps in the embodiments of the present invention can be implemented in hardware or by a processor executing software instructions. The software instructions can consist of corresponding software modules, which can be stored in random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, portable hard disks, CD-ROMs, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and the storage medium can reside in an ASIC.
[0079] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially as a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present invention are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted through the computer-readable storage medium. The computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid-state disk (SSD)).
[0080] It is understood that the various numerical designations used in the embodiments of the present invention are merely for descriptive convenience and are not intended to limit the scope of the embodiments of the present invention.
[0081] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.
Claims
1. A method for managing hash tables, characterized in that, Includes the following steps: Determine the hash table for non-volatile memory; If the hash table capacity reaches a preset threshold, and if so, a context-aware multi-threaded collaborative expansion method is used to expand the hash table, resulting in a new hash table, and the space of the original hash table is released. This multi-threaded collaborative expansion involves multiple threads collaboratively migrating the main bucket chains in the original hash table to the allocated new hash table space. The new hash table has a capacity greater than the original hash table. During the expansion process, insertion and deletion threads other than those required for expansion are blocked, while read threads are allowed to execute concurrently. During this multi-threaded collaborative expansion process, if a thread completes the migration, the data corresponding to all the migrated main bucket chains is persisted to non-volatile memory. The method of expanding the hash table using a context-aware, multi-threaded collaborative expansion approach to obtain a new hash table is as follows: Determine the number of primary buckets and the number of threads for coordinated expansion of the hash tables to be migrated; Divide the number of main buckets by the number of threads, and round up the result to get the number of main buckets that each thread needs to migrate. Each thread is assigned a corresponding main bucket according to the order of the main buckets in the hash table to be migrated and the number of main buckets each thread needs to migrate, so that it can perform the migration; however, a main bucket can only be migrated by one thread. Set a flag array for each thread to indicate whether the master buckets under that thread have completed the migration; When the flag array of a certain thread indicates that all primary buckets under that thread have completed migration, the data of the corresponding primary bucket is persisted to non-volatile memory.
2. The method according to claim 1, characterized in that, It also includes the following steps: Insert new data into the hash table without locking.
3. The method according to claim 1, characterized in that, It also includes the following steps: When performing a lookup in a hash table, a lock-free lookup method is used.
4. The method according to claim 1, characterized in that, It also includes the following steps: If data needs to be deleted from a main bucket chain, it is determined whether the hash table containing the main bucket chain is being expanded. If it is being expanded, it is blocked and waited until the expansion is completed. Then, the data in the main bucket chain is deleted without lock. If the hash table is not being expanded, the data in the main bucket chain is deleted without lock directly.
5. The method according to any one of claims 2 to 4, characterized in that, The lock-free insertion, lock-free search, and lock-free deletion refer to inserting, searching, or deleting using atomic instructions.
6. The method according to claim 1, characterized in that, It also includes the following steps: During the hash table expansion process, if a main bucket chain fails to migrate, all threads other than the thread corresponding to the failed main bucket chain are blocked, and the failed main bucket chain is restored based on context awareness.
7. An electronic device, characterized in that, include: At least one memory for storing programs; At least one processor is configured to execute a program stored in the memory, wherein when the program stored in the memory is executed, the processor is configured to perform the method as described in any one of claims 1-6.
8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when run on a processor, causes the processor to perform the method as described in any one of claims 1-6.
9. A computer program product, characterized in that, When the computer program product is run on a processor, the processor causes the processor to perform the method as described in any one of claims 1-6.