A multi-channel pulsed imaging lidar receiver analog front-end integrated circuit

Abstract

The application discloses a kind of multi-channel pulse imaging laser radar receiver analog front end integrated circuits, including n channel transimpedance preamplifier circuit, n selected 1 multiplexing circuit, post-stage amplification circuit, multi-threshold generation circuit, n bit switch control signal generation circuit and multi-channel time discriminator;Wherein, the first input end and the second input end of n selected 1 multiplexing circuit are connected respectively n channel transimpedance preamplifier circuit output and n bit switch control signal generation circuit, and its output end is connected the first input end of post-stage amplification circuit, the second input end of post-stage amplification circuit is connected the first output end of multi-threshold generation circuit;Threshold value generation circuit second output end connects the first input end of multi-channel time discriminator;The second input end of multi-channel time discriminator is connected the output end of post-stage amplification circuit.The circuit simplifies mechanical scanning mechanism, realizes electronic scanning mode, and the matching between pixel front-end circuit is good, and detection sensitivity is higher.

Description

Technical Field

[0001] This invention belongs to the field of lidar technology, specifically relating to an analog front-end integrated circuit for a multi-channel pulse imaging lidar receiver. Background Technology

[0002] LiDAR (LiDAR) is a non-contact, long-range target measurement device. With the increasing maturity of laser and photodetector technologies, LiDAR is widely used in aerospace, military, industrial, and civilian fields. Imaging LiDAR is a type of LiDAR used to acquire image information of targets or scenes. Imaging LiDAR mainly consists of a laser transmitter, an echo receiver, a back-end information processing system, and a display module. The laser transmitter's main function is to emit a laser beam to illuminate the target or scene being measured. After the laser beam is reflected by the target or scene, the echo signal is optically processed by the optics in the echo receiver and projected onto the photosensitive surface of the photodetector. The photodetector converts the received echo optical signal into an electrical signal and processes it. The processed electrical signal is sent to the back-end signal processing system to extract useful information about the target or scene. The display system is used to visually reproduce the useful information about the target or scene.

[0003] The imaging lidar echo receiver mainly consists of a photodetector and an analog front-end photoelectric signal processing circuit. The photodetector is used to detect the laser echo and convert the optical signal into a current signal, while the front-end photoelectric signal processing circuit is used to preprocess the photocurrent.

[0004] In imaging lidar sensors, traditional photodetectors often employ single-channel two-dimensional scanning imaging. Their front-end analog circuits typically use discrete component designs, resulting in low imaging rates and requiring complex optomechanical scanning mechanisms that are difficult to miniaturize. This presents numerous challenges in imaging lidar applications, limiting their applicability. Furthermore, as the number of pixels in the array increases, using existing discrete components to design the analog front-end circuit leads to problems such as excessive power consumption, difficulty in reducing circuit noise, and large dispersion of electrical parameters between discrete components. This results in high system thermal design costs, low detection sensitivity, and poor matching between pixel front-end circuits. Summary of the Invention

[0005] To address the aforementioned problems in the prior art, this invention provides an analog front-end integrated circuit for a multi-channel pulse imaging lidar receiver. The technical problem to be solved by this invention is achieved through the following technical solution:

[0006] An analog front-end integrated circuit for a multi-channel pulse imaging lidar receiver includes an n-channel transimpedance pre-amplifier circuit, an n-to-1 multiplexer circuit, a post-amplifier circuit, a multi-threshold generation circuit, an n-bit switch control signal generation circuit, and a multi-channel timing discriminator; wherein...

[0007] The n input terminals of the n-channel transimpedance pre-amplifier circuit are respectively connected to the output terminals of n external photodetectors, and are used to process the electrical signals I output by the corresponding photodetectors. APD,i The signal is processed and output as an n-channel pulse voltage signal V. PreTIA,OUT Where i = 1, ..., n;

[0008] The first input terminal of the n-to-1 multiplexer circuit is connected to the output terminal of the n-channel transimpedance pre-amplifier circuit. The second input terminal of the n-to-1 multiplexer circuit is connected to the n-bit switch control signal generation circuit. The output terminal of the n-to-1 multiplexer circuit is connected to the first input terminal of the subsequent amplifier circuit. The second input terminal of the subsequent amplifier circuit is connected to the first output terminal of the multi-threshold generation circuit. During the detection period, under the excitation of the clock CLK, the n-bit switch control signal generation circuit generates a corresponding switch control signal SEL. i To control the n-to-1 multiplexer circuit to turn on in a preset sequence, thereby achieving electronic scanning operation mode, and thus converting the pulse voltage signal V of the i-th channel... PreTIA,OUT Feed into the subsequent amplifier circuit;

[0009] The second output terminal of the multi-threshold generation circuit is connected to the first input terminal of the multi-channel time discriminator, and is used to output multiple threshold voltage signals V. THj Where j is a positive integer;

[0010] The second input terminal of the multi-channel timing discriminator is connected to the output terminal of the subsequent amplifier circuit, and is used to determine the output signal V of the subsequent amplifier circuit. TIA,out and the plurality of threshold voltage signals V THj Output multiple time signals T STOPj .

[0011] The beneficial effects of this invention are:

[0012] 1. The analog front-end integrated circuit of the multi-channel pulse imaging lidar receiver provided by this invention adopts an electronic scanning method to process the optical pulse signals reflected from the target surface in a preset order, which simplifies the mechanical scanning mechanism and is conducive to system miniaturization. On the other hand, it adopts a multi-threshold time discrimination method, and multiple time information is conducive to improving the echo detection accuracy and also to improving the dynamic range of target distance detection. Compared with the traditional discrete design scheme, this circuit has better matching between pixel front-end circuits, higher detection sensitivity, and no need for system thermal design, thus reducing design costs.

[0013] 2. The analog front-end signal processing method used in this invention for photocurrent has high real-time discrimination accuracy, is simple and reliable, and simplifies the back-end signal processing of imaging lidar.

[0014] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0015] Figure 1 A schematic diagram of the structure of an analog front-end integrated circuit for a multi-channel pulse imaging lidar receiver provided in an embodiment of the present invention;

[0016] Figure 2 This is a schematic diagram of the structure of an n-channel transimpedance preamplifier circuit provided in an embodiment of the present invention;

[0017] Figure 3 This is a schematic diagram of an n-to-1 multiplexer circuit provided in an embodiment of the present invention;

[0018] Figure 4 This is a schematic diagram of a post-amplifier circuit provided in an embodiment of the present invention;

[0019] Figure 5 This is a schematic diagram of a multi-threshold generation circuit provided in an embodiment of the present invention;

[0020] Figure 6 This is a schematic diagram of the structure of an n-bit switch control signal generation circuit provided in an embodiment of the present invention;

[0021] Figure 7 for Figure 6 The timing diagram shown is for the n-bit switch control signal generation circuit that generates an octal counter.

[0022] Figure 8 This is a block diagram illustrating the structural principle of a multi-channel timing discriminator provided in an embodiment of the present invention. Detailed Implementation

[0023] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0024] Example 1

[0025] Please see Figure 1 , Figure 1 This invention provides a schematic diagram of the analog front-end integrated circuit for a multi-channel pulse imaging lidar receiver. The circuit includes: an n-channel transimpedance pre-amplifier circuit 110, an n-to-1 multiplexer circuit 120, a post-amplifier circuit 130, a multi-threshold generation circuit 140, an n-bit switch control signal generation circuit 150, and a multi-channel timing discriminator 160.

[0026] The n input terminals of the n-channel transimpedance preamplifier circuit 110 are respectively connected to the output terminals of n external photodetectors, and are used to process the electrical signals I output by the corresponding photodetectors. APD,i The signal is processed and output as an n-channel pulse voltage signal V. APD,i Where i = 1, ..., n;

[0027] The first input of the n-to-1 multiplexer circuit 120 is connected to the output of the n-channel transimpedance preamplifier circuit 110. The second input of the n-to-1 multiplexer circuit 120 is connected to the n-bit switch control signal generation circuit 150. The output of the n-to-1 multiplexer circuit 120 is connected to the first input of the subsequent amplifier circuit 130. The second input of the subsequent amplifier circuit 130 is connected to the first output of the multi-threshold generation circuit 140. During the detection period, under the excitation of the clock CLK, the n-bit switch control signal generation circuit 150 generates the corresponding switch control signal SEL. i The control circuit 120 (n-to-1 multiplexer) is activated in a preset sequence to achieve electronic scanning operation mode, thereby controlling the pulse voltage signal V of the i-th channel. APD,i Feed into the subsequent amplifier circuit 130;

[0028] The second output terminal of the multi-threshold generation circuit 140 is connected to the first input terminal of the multi-channel timing discriminator 160, and is used to output multiple threshold voltage signals V. THj Where j is a positive integer;

[0029] The second input terminal of the multi-channel timing discriminator 160 is connected to the output terminal of the subsequent amplifier circuit 130, and is used to determine the output signal V of the subsequent amplifier circuit 130. TIA,out and multiple threshold voltage signals V THj Output multiple time signals T STOPj .

[0030] In this embodiment, the lidar receiver is based on a multi-line photodetector and employs an electronic scanning method, simplifying the two-dimensional scanning mechanical structure required by traditional single-point lidar to acquire a three-dimensional image of the target. Preferably, this embodiment uses an avalanche photodiode as the photoelectric detection device, which can meet the sensitivity requirements for weak electrical signals and has a long detection range.

[0031] Furthermore, as one implementation method, such as Figure 2 As shown, Figure 2 This is a schematic diagram of an n-channel transimpedance preamplifier circuit provided in an embodiment of the present invention, which includes n transimpedance preamplifiers 1111 to 111. n ; where the i-th transimpedance preamplifier 111 i Includes a feedforward amplifier 112 i and a feedback element 113 i ;

[0032] Feedforward amplifier 112 i The input terminal is connected to the electrical signal I output by the corresponding photodetector. APD,i The output terminal serves as the transimpedance preamplifier 111. i The output terminal outputs a pulse voltage signal V APD,i Feedback element 113 i And connected to feedforward amplifier 112 i Between the input and output terminals.

[0033] The working principle of the n-channel transimpedance pre-amplifier circuit provided in this embodiment is as follows:

[0034] In an n-channel transimpedance preamplifier circuit, each channel is independent. For the i-th transimpedance preamplifier 111... i In terms of its feedforward amplifier 112 i High input resistance, high input current I APD,i Flow through feedback element 113 i Converted to output voltage V APD,i .

[0035] For further details, please see Figure 3 , Figure 3 This is a schematic diagram of an n-to-1 multiplexer circuit provided in an embodiment of the present invention, which includes n three-terminal switching devices 1211 to 121. n ;in,

[0036] The i-th three-terminal switching device 121 i It has three terminals: an input terminal, an output terminal, and a strobe terminal; the i-th three-terminal switching device 121 i The input terminal is used as the first input terminal of the n-to-1 multiplexer circuit 120 and is correspondingly connected to the i-th transimpedance preamplifier 111. i The output terminal of the i-th three-terminal switching device 121 i The selection terminal serves as the second input terminal of the n-to-1 multiplexer circuit 120, which is correspondingly connected to the n output terminals of the n-bit switch control signal generation circuit 150.

[0037] n-channel three-terminal switching devices 1211~121 n The output terminals are connected together as the output terminals of the n-to-1 multiplexer circuit 120.

[0038] It is understandable that the n three-terminal switching devices 1211 to 121n in the n-to-1 multiplexer circuit 120 can be programmed to turn on only one at a time in a preset sequence to achieve electronic scanning. The specific working principle is as follows:

[0039] The three-terminal switching circuits 1211 to 121 in the n-to-1 multiplexer circuit. n These are independent of each other. Under the excitation of clock CLK, the n-bit switch control signal generation circuit 150 generates the corresponding switch control signal SEL. i The i-th switch of the controllable n-to-1 multiplexer circuit 120 is closed, at which time the pulse voltage signal V of the i-th channel is... APD,i The output voltage V of the n-to-1 multiplexer circuit 120 MUX,out It is fed into the subsequent amplifier circuit 130.

[0040] Alternatively, as one implementation method, such as Figure 4 As shown, Figure 4 A schematic diagram of a post-amplifier circuit provided in an embodiment of the present invention includes: a first field-effect transistor 131, a capacitor 132, a first resistor 133, a second resistor 134, and an internal voltage amplifier 135; wherein,

[0041] Capacitor 132 and first resistor 133 form a high-pass filter; wherein, the first end of capacitor 132 is connected to the output of n-to-1 multiplexer circuit 120 as the first input of the subsequent amplifier circuit 130, the first end of first resistor 133 is connected to the second end of capacitor 132, and the second end of first resistor 133 is connected to the first output of multi-threshold generation circuit 140 as the second input of the subsequent amplifier circuit 130.

[0042] The gate of the first field-effect transistor 131 is connected to the common terminal of the capacitor 132 and the first resistor 133, the source is grounded, and the drain is connected to the second resistor 134.

[0043] The input terminal of the internal voltage amplifier 135 is connected to the drain of the first field-effect transistor 131, and the output terminal of the internal voltage amplifier 135 is connected to the second input terminal of the multi-channel timing discriminator 160 as the output terminal of the subsequent amplifier circuit 130.

[0044] The working principle of the power amplifier circuit provided in this embodiment is as follows:

[0045] The pulse voltage signal V selected by the n-to-1 multiplexer circuit 120 APD,i The input voltage V of the subsequent amplifier circuit MUX,out The capacitor 132 and the first resistor 133 form a high-pass filter, and the pulse voltage signal V PreTIA,OUT The voltage is amplified by a high-pass filter, a first field-effect transistor 131, and an internal voltage amplifier 135, and then the output signal V is generated. TIA,ou .

[0046] Alternatively, as one implementation method, such as Figure 5 As shown, Figure 5 This is a schematic diagram of a multi-threshold generation circuit provided in an embodiment of the present invention. It includes a common-mode voltage generation circuit 141, an amplifier 142, a second field-effect transistor 143, and a third resistor 144, a fourth resistor 145, a fifth resistor 146, and a sixth resistor 147; wherein,

[0047] The output of the common-mode voltage generation circuit 141 is connected to the first input of the amplifier 142, and at the same time, it serves as the first output of the multi-threshold generation circuit 140 and is connected to the second input of the subsequent amplifier circuit 130.

[0048] The second input terminal of amplifier 142 is connected to the common terminal of the fifth resistor 146 and the sixth resistor 147, and the output terminal of amplifier 142 is connected to the gate of the second field-effect transistor 143.

[0049] The source of the second field-effect transistor 143 is connected to the power supply terminal V. DD The drain is connected to the first terminal of the third resistor 144;

[0050] The second end of the third resistor 144 is connected in series with the fourth resistor 145, the fifth resistor 146, and the sixth resistor 147.

[0051] The drain of the second field-effect transistor 143 and the common terminal of the third resistor 144, the common terminal of the third resistor 144 and the fourth resistor 145, and the common terminal of the fourth resistor 145 and the fifth resistor 146 serve as multiple second output terminals of the multi-threshold generation circuit 140, respectively outputting the first threshold voltage signal V. TH1 Second threshold voltage signal V TH2 The third threshold voltage signal V TH3 The first input of the multi-channel time discriminator 160.

[0052] In this embodiment, the first threshold voltage signal V TH1 Second threshold voltage signal V TH2 and the third threshold voltage signal V TH3 The size relationship satisfies V TH1 <V TH2 <V TH3 .

[0053] The working principle of the multi-threshold generation circuit provided in this embodiment is as follows:

[0054] In the threshold generation circuit, the second field-effect transistor 143 is the adjustment transistor, and the third resistor 144, the fourth resistor 145, the fifth resistor 146, and the sixth resistor 147 are all voltage divider resistors. The common-mode voltage generation circuit 141 is mainly used to generate the common-mode voltage V. COM The voltage divider resistors feed the output voltage back to the input of the transconductance amplifier, forming negative feedback. Because the transconductance amplifier has extremely high gain, according to the principle of negative feedback, V... FB ≈V COM Therefore, the three threshold voltages are as follows:

[0055] V TH1 ≈R 52 +R 51 / R 51 ×V COM ;

[0056] V TH2 ≈R 53 +R 52 +R 51 / R 51 ×V COM ;

[0057] V TH3 ≈R 54 +R 53 +R 52 +R 51 / R 51 ×V COM ;

[0058] At this point, three threshold voltage signals are generated.

[0059] Alternatively, as one implementation method, such as Figure 6 As shown, Figure 6 This is a schematic diagram of an n-bit switch control signal generation circuit provided in an embodiment of the present invention, which includes an n-ary counter 151 and a 2 logn -1 bit decoding circuit 152; where,

[0060] The input of the n-ary counter 151 is connected to an external clock signal CLK, and the multiplexed output of the n-ary counter 151 is connected to 2... logn -1 bit decoder circuit 152 input terminal;

[0061] 2 logn The output of the -1 bit decoding circuit 152 is connected to the second input of the n-to-1 multiplexer circuit 120 as the n outputs of the n-bit switch control signal generation circuit 150.

[0062] Specifically, to facilitate the description of the working principle, the working principle of the n-bit switch control signal generation circuit provided in this embodiment will be introduced using the generation of an 8-bit switch control signal as an example.

[0063] First, the clock CLK is divided using an octal counter to generate COUT. <0> COUT <1> COUT <2> Three-digit signals, such as Figure 7 As shown in the figure; then the above 3 digital bits are converted into 8-bit control signals using a decoding circuit. The relationship between the input digital signals and the output digital bits (i.e., the switch control signals) is shown in Table 1 below.

[0064] Table 1

[0065] COUT<2> COUT<1> COUT < 0 SEL<7:0> 0 0 0 0000 0001 0 0 1 0000 0010 0 1 0 0000 0100 0 1 1 0000 1000 1 0 0 0001 0000 1 0 1 0010 0000 1 1 0 0100 0000 1 1 1 1000 0000

[0066] For further details, please see Figure 8 , Figure 8 A structural principle block diagram of a multi-channel timing discriminator provided in an embodiment of the present invention includes a first comparator 161, a second comparator 162, a third comparator 163, a first logic circuit 164, a second logic circuit 165, and a third logic circuit 166; wherein,

[0067] The first input terminal of the first comparator 161, the first input terminal of the second comparator 162, and the first input terminal of the third comparator 163 serve as multiple first input terminals of the entire multi-channel timing discriminator 160, which are correspondingly connected to multiple second output terminals of the multi-threshold generation circuit 140.

[0068] The second input terminals of the first comparator 161, the second input terminal of the second comparator 162, and the second input terminal of the third comparator 163 are connected together and serve as the second input terminal of the entire multi-channel timing discriminator 160, which is then connected to the output terminal of the subsequent amplifier circuit 150.

[0069] The output terminals of the first comparator 161, the second comparator 162, and the third comparator 163 are respectively connected to the first input terminal of the first logic circuit 164, the first input terminal of the second logic circuit 165, and the first input terminal of the third logic circuit 166.

[0070] The second input terminals of the first logic circuit 164, the second input terminal of the second logic circuit 165, and the second input terminal of the third logic circuit 166 are all connected to the reset signal RESET;

[0071] The outputs of the first logic circuit 164, the second logic circuit 165, and the third logic circuit 166 serve as the outputs of the entire multi-channel time discriminator 160, respectively outputting the first time signal T. STOP1 Second time signal T STOP2 and the third time signal T STOP3 .

[0072] The working principle of the multi-channel timing discriminator provided in this embodiment is as follows:

[0073] The multi-channel timing discriminator consists of three timing comparators and three logic circuits. First, the reset signal RESET sets the outputs of the three logic circuits to zero; then, when the transimpedance amplifier output voltage V... TIA,out The pulse amplitude is greater than the first threshold voltage V TH1 At the first moment, the comparator outputs a high level, triggering the output of the first logic circuit 164 to be high. Similarly, when the transimpedance amplifier output voltage V... TIA,out The pulse amplitude is greater than the second threshold voltage V TH2 At the second moment, the comparator outputs a high level, triggering the output of the second logic circuit 165 to go high; and when the transimpedance amplifier output voltage V... TIA,out The pulse amplitude is greater than the third threshold voltage V TH3 At the third moment, the comparator outputs a high level, triggering the output of the third logic circuit 166 to be high.

[0074] The working process of the analog front-end integrated circuit for the multi-channel pulse imaging lidar receiver provided by this invention is as follows:

[0075] First, the switch control signal generation circuit enables one switch in the multiplexer circuit. For ease of description, let's assume the i-th switch is turned on. When the photoelectric detector detects the pulse echo signal reflected from the target or scene, the photoelectric detector outputs a pulsed photocurrent I. APD,i The pulse current is converted into a pulse voltage V by the transimpedance preamplifier circuit. APD,i The pulse voltage is fed into the subsequent voltage amplifier circuit through the i-th switch for further amplification, and outputs a voltage V. TIA,out The output voltage of the subsequent voltage amplifier is compared with the time comparator in the 3-channel time discriminator. If the pulse signal amplitude is greater than the threshold voltage V of each time comparator... TH1 V TH2 V TH3 Output the corresponding time signal T respectively. STOP1 T STOP2 T STOP3 The threshold voltage is generated by a multi-threshold generation circuit, and the time signal T is... STOP1 T STOP2 T STOP3 It was used to calculate pulse flight time and to compensate for walking errors.

[0076] The multi-channel pulse imaging lidar receiver analog front-end integrated circuit provided by this invention employs an electronic scanning method to process the optical pulse signals reflected from the target surface in a preset order. This electronically scanned pulse imaging lidar receiver analog front-end integrated circuit can detect the optical power intensity of any illuminated pixel in the linear array, digitize the illumination pixel's timing information, and output three digital timing signals based on the pulse echo shape, simplifying the mechanical scanning mechanism and facilitating system miniaturization. Furthermore, it utilizes a multi-threshold timing discrimination method; multiple timing information points improve echo detection accuracy and enhance the dynamic range of target distance detection. Compared to traditional discrete designs, this circuit exhibits better matching between pixel front-end circuits, higher detection sensitivity, and eliminates the need for system thermal design, reducing design costs. In addition, the analog front-end signal processing method used in this invention for photocurrent provides high timing discrimination accuracy, is simple and reliable, and simplifies the back-end signal processing of the imaging lidar.

[0077] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A multi-channel pulse imaging lidar receiver analog front-end integrated circuit, characterized in that, It includes an n-channel transimpedance preamplifier circuit (110), an n-to-1 multiplexer circuit (120), a post-amplifier circuit (130), a multi-threshold generation circuit (140), an n-bit switch control signal generation circuit (150), and a multi-channel timing discriminator (160); among which, The n input terminals of the n-channel transimpedance preamplifier circuit (110) are respectively connected to the output terminals of n external photodetectors, and are used to process the electrical signals output by the corresponding photodetectors. I APD,i Process the signal and output n-channel pulse voltage signals. V APD,i Where i = 1, ..., n; The first input terminal of the n-to-1 multiplexer circuit (120) is connected to the output terminal of the n-channel transimpedance preamplifier circuit (110). The second input terminal of the n-to-1 multiplexer circuit (120) is connected to the n-bit switch control signal generation circuit (150). The output terminal of the n-to-1 multiplexer circuit (120) is connected to the first input terminal of the subsequent amplifier circuit (130). The second input terminal of the subsequent amplifier circuit (130) is connected to the first output terminal of the multi-threshold generation circuit (140). During the detection period, under the excitation of the clock CLK, the n-bit switch control signal generation circuit (150) generates a corresponding switch control signal SEL. i The n-to-1 multiplexer circuit (120) is controlled to turn on in a preset sequence to achieve electronic scanning operation mode, thereby transmitting the pulse voltage signal of the i-th channel. V APD,i Feed into the subsequent amplifier circuit (130); The second output terminal of the multi-threshold generation circuit (140) is connected to the first input terminal of the multi-channel time discriminator (160) for outputting multiple threshold voltage signals. V THj Where j is a positive integer; The second input terminal of the multi-channel timing discriminator (160) is connected to the output terminal of the subsequent amplifier circuit (130), and is used to determine the output signal of the subsequent amplifier circuit (130). V TIA,out and the plurality of threshold voltage signals V THj Output multiple time signals T STOPj .

2. The analog front-end integrated circuit for a multi-channel pulse imaging lidar receiver according to claim 1, characterized in that, The n-channel transimpedance preamplifier circuit (110) includes n transimpedance preamplifiers (1111~111). n ); Among them, the i-th transimpedance preamplifier (111) i ) includes a feedforward amplifier (112) i ) and a feedback element (113) i ); The feedforward amplifier (112) i The input terminal is connected to the electrical signal output by the corresponding photodetector. I APD,i The output terminal serves as the transimpedance preamplifier (111). i The output terminal outputs a pulse voltage signal. V APD,i The feedback element (113) i ) and connected to the feedforward amplifier (112) i Between the input and output terminals of ).

3. The analog front-end integrated circuit for the multi-channel pulse imaging lidar receiver according to claim 2, characterized in that, The n-to-1 multiplexer circuit (120) includes n three-terminal switching devices (1211~121). n );in, The i-th three-terminal switching device (121) i It has three terminals: an input terminal, an output terminal, and a strobe terminal; the i-th three-terminal switching device (121) i The input terminal of ) is used as the first input terminal of the n-to-1 multiplexer circuit (120) and is correspondingly connected to the i-th transimpedance preamplifier (111). i The output terminal of the i-th three-terminal switching device (121) i The selection terminal of the circuit is used as the second input terminal of the n-to-1 multiplexer circuit (120) and is connected to the n output terminals of the n-bit switch control signal generation circuit (150). The n-channel three-terminal switching devices (1211~121) n The output terminals of the circuit are connected together as the output terminals of the n-to-1 multiplexer circuit (120).

4. The analog front-end integrated circuit for the multi-channel pulse imaging lidar receiver according to claim 3, characterized in that, The n three-terminal switching devices (1211~121) in the n-to-1 multiplexing circuit (120) n Electronic scanning can be achieved by activating only one channel at a time in a preset sequence.

5. The analog front-end integrated circuit for a multi-channel pulse imaging lidar receiver according to claim 1, characterized in that, The subsequent amplifier circuit (130) includes a first field-effect transistor (131), a capacitor (132), a first resistor (133), a second resistor (134), and an internal voltage amplifier (135); wherein, The capacitor (132) and the first resistor (133) form a high-pass filter; wherein, the first end of the capacitor (132) is connected to the output end of the n-to-1 multiplexer circuit (120) as the first input end of the subsequent amplifier circuit (130), the first end of the first resistor (133) is connected to the second end of the capacitor (132), and the second end of the first resistor (133) is connected to the first output end of the multi-threshold generation circuit (140) as the second input end of the subsequent amplifier circuit (130). The gate of the first field-effect transistor (131) is connected to the common terminal of the capacitor (132) and the first resistor (133), the source is grounded, and the drain is connected to the second resistor (134); The input terminal of the internal voltage amplifier (135) is connected to the drain of the first field-effect transistor (131), and the output terminal of the internal voltage amplifier (135) is connected to the second input terminal of the multi-channel timing discriminator (160) as the output terminal of the subsequent amplifier circuit (130).

6. The analog front-end integrated circuit for a multi-channel pulse imaging lidar receiver according to claim 1, characterized in that, The multi-threshold generation circuit (140) includes a common-mode voltage generation circuit (141), an amplifier (142), a second field-effect transistor (143), and a third resistor (144), a fourth resistor (145), a fifth resistor (146), and a sixth resistor (147); wherein, The output terminal of the common-mode voltage generating circuit (141) is connected to the first input terminal of the amplifier (142), and at the same time, it serves as the first output terminal of the multi-threshold generating circuit (140) and is connected to the second input terminal of the subsequent amplifier circuit (130). The second input terminal of the amplifier (142) is connected to the common terminal of the fifth resistor (146) and the sixth resistor (147), and the output terminal of the amplifier (142) is connected to the gate of the second field-effect transistor (143). The source of the second field-effect transistor (143) is connected to the power supply terminal. V DD The drain is connected to the first terminal of the third resistor (144); The second end of the third resistor (144) is connected in series with the fourth resistor (145), the fifth resistor (146), and the sixth resistor (147); The drain of the second field-effect transistor (143) and the common terminal of the third resistor (144), the common terminal of the third resistor (144) and the fourth resistor (145), and the common terminal of the fourth resistor (145) and the fifth resistor (146) serve as multiple second output terminals of the multi-threshold generation circuit (140) to output the first threshold voltage signal respectively. V TH1 Second threshold voltage signal V TH2 Third threshold voltage signal V TH3 To the first input terminal of the multi-channel time discriminator (160).

7. The analog front-end integrated circuit for the multi-channel pulse imaging lidar receiver according to claim 6, characterized in that, First threshold voltage signal V TH1 The second threshold voltage signal V TH2 and the third threshold voltage signal V TH3 The size relationship satisfies V TH1 < V TH2 < V TH3 .

8. The analog front-end integrated circuit for a multi-channel pulse imaging lidar receiver according to claim 1, characterized in that, The n-bit switch control signal generation circuit (150) includes n 2-base counter (151) and 2 logn - 1-bit decoding circuit (152); where, The n The input of the base counter (151) is connected to an external clock signal CLK. n The multiple output terminals of the base counter (151) are connected to the 2 logn - The input terminal of the 1-bit decoder circuit (152); The 2 logn - The output of the 1-bit decoding circuit (152) is connected to the second input of the n-to-1 multiplexer circuit (120) as the n outputs of the n-bit switch control signal generation circuit (150).

9. The analog front-end integrated circuit for a multi-channel pulse imaging lidar receiver according to claim 1, characterized in that, The multi-channel timing discriminator (160) includes a first comparator (161), a second comparator (162), a third comparator (163), a first logic circuit (164), a second logic circuit (165), and a third logic circuit (166); wherein, The first input terminal of the first comparator (161), the first input terminal of the second comparator (162), and the first input terminal of the third comparator (163) are connected to the multiple second output terminals of the multi-threshold generation circuit (140) as multiple first input terminals of the entire multi-channel time discriminator (160). The second input terminal of the first comparator (161), the second input terminal of the second comparator (162), and the second input terminal of the third comparator (163) are connected together and serve as the second input terminal of the entire multi-channel timing discriminator (160), which is connected to the output terminal of the subsequent amplifier circuit (130). The output terminals of the first comparator (161), the second comparator (162), and the third comparator (163) are respectively connected to the first input terminal of the first logic circuit (164), the first input terminal of the second logic circuit (165), and the first input terminal of the third logic circuit (166). The second input terminal of the first logic circuit (164), the second input terminal of the second logic circuit (165), and the second input terminal of the third logic circuit (166) are all connected to the reset signal RESET; The output terminals of the first logic circuit (164), the second logic circuit (165), and the third logic circuit (166) serve as the output terminals of the entire multi-channel timing discriminator (160), respectively outputting the first timing signal. T STOP1 Second time signal T STOP2 and the third time signal T STOP3 .

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