Construction method and circuit design of a high-dimensional digital domain chaotic system

Abstract

The present invention relates to the field of information security. More specifically, it relates to a construction method and circuit design of a high-dimensional digital domain chaotic system. The key points of its technical solution are as follows: draw a strongly connected state transition diagram with 2m state points; use the first formula and the strongly connected state transition diagram to inversely deduce the logical function formula corresponding to the m-dimensional digital domain chaotic system with precision N = 1, and use the logical function formula to complete the solution of the logical expression. The advantage of the present invention is that it proposes a general construction method of a high-dimensional digital domain chaotic system, which solves the defect that the prior art cannot efficiently construct a high-dimensional digital domain chaotic system under the condition of limited computing resources.

Description

Technical Field

[0001] The present invention relates to the field of information security, and more specifically, it relates to a method for constructing a high-dimensional digital domain chaotic system and its circuit design. Background Art

[0002] Currently, the existing methods for constructing digital domain chaotic systems, including the trial-and-error method and the screening method, both adopt the forward deduction method, that is, starting from the iterative function F to judge whether the corresponding state transition diagram is strongly connected. However, these methods have limitations and involve large amounts of calculations. In terms of applications, although the inventor has completed the circuit implementation of a one-dimensional integer domain chaotic system, in the circuit design thereof, the chaos generation strategy is realized by maintaining a sampling circuit and a decoder circuit, thereby converting a uniform noise signal into a random sequence. The disadvantage is that the output of the noise signal cannot be controlled, and its application in the field of information security will be restricted. Summary of the Invention

[0003] Aiming at the deficiencies of the existing technology, the purpose of the present invention is to provide a method for constructing a high-dimensional digital domain chaotic system and its circuit design, which can efficiently construct a high-dimensional digital domain chaotic system that meets security requirements, and the completed circuit model can output chaotic sequences to provide technical support for fields such as digital image encryption.

[0004] The above technical purpose of the present invention is achieved through the following technical solutions: A method for constructing a high-dimensional digital domain chaotic system includes the following steps:

[0005] Draw a strongly connected state transition diagram with 2 m state points ;

[0006] Use the first formula and the strongly connected state transition diagram to inversely deduce the logical function formula corresponding to the m-dimensional digital domain chaotic system with precision N = 1, and use the logical function formula to complete the solution of the logical expression;

[0007] In one embodiment, the first formula is for an m-dimensional digital domain chaotic system introducing m one-sided infinite random sequences s1, s2, ···, s m , which is expressed as:

[0008]

[0009] where, "·" represents bitwise AND, "+" represents bitwise OR, and "-" represents bitwise negation.

[0010] In one embodiment, the construction steps of the strongly connected state transition diagram further include:

[0011] Based on the m-dimensional digital domain chaotic system with precision N = 1 having 2m state points, connecting state points v1 to through directed edges to form a path of length 2 m to complete the initialization of the state path;

[0012] Starting from the state point select a random number of state points for backtracking until returning to the state point v1, thereby ensuring a circuit that passes through each vertex at least once to create a circuit structure;

[0013] After obtaining the circuit structure, randomly add directed edges to the graph. The directed edges can point from any state point to other state points to increase the complexity and randomness of the state transition graph. After completing the addition of the directed edges, a strongly connected state transition graph with a complex structure is finally obtained.

[0014] In one embodiment, the generation steps of the logic function formula include:

[0015] Encode the state points v i (i = 1, 2, L, 2 m ) in the state transition graph;

[0016] Fill in the state transition table according to the information of the state points and edges in the state transition graph;

[0017] Based on the situation of the state transition table, use the second formula to process, and the value of the logic expression can be obtained, and the corresponding truth table can be written.

[0018] Find the combinations of input variable values that make the value of the logic function expression equal to 1, and correspond a product term to each combination of input variable values. Among them, the input variable value of 1 is written as the original variable, and the value of 0 is written as the inverse variable;

[0019] Add the product terms to obtain the logic expression.

[0020] In one embodiment, the second formula is:

[0021]

[0022] The circuit design of a high-dimensional digital domain chaotic system includes: a chaos generator, a voltage conversion circuit, a comparator circuit, a sample and hold circuit, and an iterative function circuit;

[0023] Among them, the chaos signal generator uses a Chua's circuit, the iterative function circuit is a sequential logic circuit, the comparator circuit is used to output a signal with a level of 0 or 1, the sequential logic circuit is composed of basic gate elements and D flip-flops, and the sample and hold circuit is consistent with the clock frequency.

[0024] The above method for constructing a high-dimensional digital domain chaotic system and the circuit design have the advantages that starting directly from the structure of an m-dimensional digital domain chaotic system with a precision of N = 1 (P = 1, Q = 0), an iterative function F containing only AND, OR, and NOT operations is inversely deduced through a strongly connected state transition graph, extended to higher precision cases, and a general method for constructing a high-dimensional digital domain chaotic system is proposed, solving the drawback that the prior art cannot efficiently construct a high-dimensional digital domain chaotic system under limited computing resources. And the circuit implementation of the high-dimensional digital domain chaotic system is completed, improving the applicability of the high-dimensional digital domain chaotic system in the field of information security. Description of the Drawings

[0025] Figure 1 It is a schematic diagram for constructing a strongly connected directed graph in this embodiment;

[0026] Figure 2 It is the state transition graph of the two-dimensional system in this embodiment;

[0027] Figure 3 It is the flowchart for constructing the high-dimensional digital domain chaotic system in this embodiment;

[0028] Figure 4 It is the circuit diagram of the chaotic signal generator in this embodiment;

[0029] Figure 5 It is the circuit diagram of the voltage conversion circuit and the sample and hold circuit in this embodiment;

[0030] Figure 6 It is the circuit diagram of the iterative function circuit (sequential logic circuit) in this embodiment;

[0031] Figure 7 It is the circuit diagram of the high-dimensional digital domain chaotic system in this embodiment. Detailed Embodiments

[0032] The present invention will be described in detail below with reference to the drawings and embodiments.

[0033] In the description of the present invention, it should be understood that the orientation or positional relationships indicated by the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. are based on the orientation or positional relationships shown in the drawings, and are only for the convenience of describing the present invention, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation of the present invention.

[0034] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality of" means at least two, unless otherwise specifically defined.

[0035] In the present invention, unless otherwise clearly defined and limited, the terms "mounted", "connected", "connected to", "fixed", etc. should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or integrated; it may be a mechanical connection, an electrical connection, or communicable with each other; it may be directly connected, or indirectly connected through an intermediate medium, and may be the communication inside two elements or the interaction relationship between two elements, unless otherwise clearly limited. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0036] In the present invention, unless otherwise clearly defined and limited, the first feature being "on" or "under" the second feature may be that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, the first feature being "above", "over" and "on top of" the second feature may be that the first feature is directly above or obliquely above the second feature, or merely indicates that the first feature is at a higher level than the second feature in terms of horizontal height. The first feature being "under", "beneath" and "underneath" the second feature may be that the first feature is directly below or obliquely below the second feature, or merely indicates that the first feature is at a lower level than the second feature in terms of horizontal height.

[0037] A construction method of a high-dimensional digital domain chaotic system, as Figure 1 shown, includes the following steps:

[0038] 1. Draw a strongly connected state transition diagram with 2 m state points ;

[0039] Specifically, the construction steps of the strongly connected state transition diagram further include:

[0040] Based on the fact that an m-dimensional digital domain chaotic system with precision N = 1 has 2 m state points, connect the state points v1 to the state points through directed edges to form a path with a length of 2 m to complete the initialization state path;

[0041] Starting from the state point , select a random number of previous state points for backtracking until returning to the state point v1, so as to ensure a loop that passes through each vertex at least once to create a loop structure;

[0042] After obtaining the loop structure, randomly add some directed edges to the graph. The directed edges can point from any state point to other state points to increase the complexity and randomness of the state transition graph. After completing the addition of the directed edges, a strongly connected state transition graph with a complex structure is finally obtained.

[0043] Deduce the corresponding iterative function F of the m-dimensional digital domain chaotic system with precision N = 1 from the strongly connected state transition graph i (x1, x2, ···, x m )(i = 1, 2, K, m);

[0044] Specifically, generating the logical function formula further includes the following steps:

[0045] Encode the state points v i (i = 1, 2, L, 2 m ) in the state transition graph;

[0046] Fill in the state transition table according to the information of the state points and edges in the state transition graph;

[0047] The further state transition table is usually a two-dimensional table, where the first column of the table represents the current state and the second column represents the next state to which it transitions;

[0048] Based on the situation of the state transition table, use the second formula to process, and the value of the logical expression can be obtained, and the corresponding truth table can be written.

[0049] Based on this step, in an example, by substituting into the second formula:

[0050]

[0051] The value of F i (x1, x2, ···, x m )(i = 1, 2, L, m) can be obtained;

[0052] Find the combination of the input variable values that make the value of the logical function expression equal to 1, and for each combination of the input variable values, there is a product term. Among them, the input variable value of 1 is written as the original variable, and the value of 0 is written as the inverse variable;

[0053] Add the product terms to obtain the logical expression F i (x1, x2, ···, x m )(i = 1, 2, L, m).

[0054] Use the first formula and the strongly connected state transition graph to deduce the corresponding logical function formula of the m-dimensional digital domain chaotic system with precision N = 1, and use the logical function formula to complete the solution of the logical expression.

[0055] Based on the above steps, the corresponding logical function F can be obtained. i (x1, x2, ···, x m )(i = 1, 2, ···, m).

[0056] The first formula is a chaotic system in an m-dimensional digital domain that introduces m one-sided infinite random sequences s1, s2, ···, s m and is expressed as:

[0057]

[0058] where, "·" represents bitwise AND, "+" represents bitwise OR, and "-" represents bitwise negation.

[0059] Based on the above design, its advantage is that the entire system is bitwise operation, and any precision N of the first formula obtained by the design can meet the Devaney chaos definition.

[0060] In a specific application example:

[0061] As Figure 1 shown, a simple example is presented, demonstrating the process of constructing a strongly connected state transition graph.

[0062] Figure 1 a connects the state points v1 to v4 with directed edges to form a path of length 4 to complete the initialization state path, while Figure 1 only one-way paths in a connect all the nodes but do not form a loop. To ensure strong connectivity, Figure 1 b forms a loop through random backtracking (the dotted arrow is the random backtracking path), enabling reaching all other nodes from any one node through directed edges. To increase the complexity of the graph, Figure 1 c randomly adds more directed edges (arrows with a smaller line width in pounds) to the strongly connected state transition graph. This operation does not affect the strong connectivity of the graph but increases the diversity of the graph.

[0063] First, encode the state points. Different encodings of the state points will result in different final iterative functions. In this example, taking (v1, v2, v3, v4) = (10, 11, 00, 01) as an example, the encoded state transition graph is as Figure 2 shown, and the state transition table obtained from the state transition graph is as shown in Table 1 below;

[0064] Table 1 State Transition Graph of a Two-Dimensional System

[0065]

[0066] As can be seen from the second row of Table 1, for there is no (that is, there is no case), then according to the second formula, F1(0, 0) = 0. For there is case (that is, in case), then according to the second formula, F2(0, 0) = 1, that is:

[0067]

[0068] Similarly, through the second formula, it can be obtained:

[0069]

[0070]

[0071]

[0072] Thus, the truth table of the iterative function F as shown in Table 2 is obtained:

[0073] Table 2 Truth Table of Iterative Function F

[0074] <![CDATA[x1x2]]> <![CDATA[F1(x1,x2)]]> <![CDATA[F2(x1,x2)]]> 00 0 1 01 1 1 10 1 1 11 0 0

[0075] Find the input variable values x1x2 = 01 and x1x2 = 10 that make F1(x1, x2) = 1. Each combination of input variable values corresponds to a product term. The combination of input variable values x1x2 = 01 corresponds to the product term (because x1 = 0 is written as the inverse variable x2 = 1 is written as the original variable x2), and the combination of input variable values x1x2 = 10 corresponds to the product term (because x1 = 1 is written as the original variable x1, x2 = 0 is written as the inverse variable ), then Similarly, the logical expression of the logical function F2(x1, x2) can be obtained, that is:

[0076]

[0077] According to the first formula, the 2D digital domain chaotic system controlled by introducing two one-sided infinite random sequences s1, s2 can be expressed as:

[0078]

[0079] The present invention also relates to a circuit design of a high-dimensional digital domain chaotic system, which includes: a chaos generator, a voltage conversion circuit, a comparator circuit, a sample and hold circuit, and an iterative function circuit;

[0080] Among them, the chaotic signal generator uses the Chua's circuit, the iterative function circuit is a sequential logic circuit, the comparator circuit is used to output signals with levels of 0 or 1, the sequential logic circuit consists of basic gate elements and D flip-flops, the sample and hold circuit is consistent with the clock frequency, and after giving and the initial values of, under the action of the random sequences s1 and s2, a digital-domain chaotic sequence is output, and the overall circuit diagram is as shown in Figure 7 shown.

[0081] The chaotic signal generator is as shown in Figure 4 shown. In information security encryption, in order to ensure that the input random sequence is controllable, the traditional Chua's circuit is adopted. This circuit is mainly composed of resistors, capacitors, inductors and amplifiers. The component selection is as shown in Figure 4 shown. Finally, two chaotic signals with outputs from -5 to 5V are selected as the input signals of the voltage conversion circuit.

[0082] As shown in Figure 5 shown, the voltage conversion circuit is mainly composed of resistors and amplifiers. The voltage conversion circuit has an input interface for receiving the input signal to be converted. The resistance values of the resistors are all 10kΩ. The amplifier is used to amplify the amplitude of the input signal and adjust it to the required output level range of 0 to 5V. According to Figure 5 , the logical relationship between the comparator input and output is

[0083]

[0084] Among them, U i is set to 4.2V. After being processed by the comparator, two signals s and u with levels of 0V and 1V are output.

[0085] In the sample and hold circuit, the 74HC74D flip-flop is used to implement the signal sampling and holding functions. By appropriately controlling the triggering timing of the clock signal, the input signal can be sampled at a specific moment. Once the flip-flop captures the value of the input signal, it will hold this value at the output terminal and is not affected by the change of the input signal. Even if the input signal changes, the signal can be held and stored, enabling the sample and hold circuit to provide a stable output value. The set clock frequency is 1kHz.

[0086] The iterative function circuit is a sequential logic circuit designed based on the specific iterative function obtained in step 2. The sequential logic circuit consists of basic gate elements and 74HC74D flip-flops, and the clock frequency is consistent with the clock frequency of the above sample and hold circuit. After giving the initial values of, under the random sequences s1, s2, ···, s mUnder the action of (the original random sequence is generated by a traditional Chua's circuit), the output sequence can provide support for fields such as digital image encryption.

[0087] Based on this design, the advantage is that the random sequence input to the iterative function circuit is controllable. Through the voltage conversion circuit and the sample and hold circuit, the random sequence can be restricted within the required range. By setting the clock signal and D flip-flop, it can be ensured that the random sequence input to the iterative function circuit has timing.

[0088] In summary, for the construction method and circuit design of a high-dimensional digital domain chaotic system proposed by the present invention, starting directly from the structure of an m-dimensional digital domain chaotic system with a precision of N = 1 (P = 1, Q = 0), the iterative function F containing only AND, OR, and NOT operations is deduced inversely through a strongly connected state transition diagram, extended to higher precision cases, and a general construction method of a high-dimensional digital domain chaotic system is proposed, solving the drawback that the prior art cannot efficiently construct a high-dimensional digital domain chaotic system under limited computing resources. And the circuit implementation of the high-dimensional digital domain chaotic system is completed, improving the applicability of the high-dimensional digital domain chaotic system in the field of information security.

[0089] The above embodiments only represent several implementation manners of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the patent of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, several deformations and improvements can still be made, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention should be subject to the appended claims.

Claims

1. A construction method of a high-dimensional digital domain chaotic system, characterized in that, It includes the following steps: Draw a strongly connected state transition diagram with 2 m state points ; Using the first formula and the strongly connected state transition graph to inversely deduce the logical function formula corresponding to the m-dimensional digital domain chaotic system with precision N = 1, and using the logical function formula to complete the solution of the logical expression; The first formula is an m-dimensional digital domain chaotic system that introduces m one-sided infinite random sequences s1, s2, ···, s m , which is expressed as: Among them, "·" represents bitwise AND, "+" represents bitwise OR, and "-" represents bitwise inversion; The construction steps of the strongly connected state transition graph further include: The m-dimensional digital domain chaotic system based on the precision N = 1 has 2 m state points. Connect the state points v1 to the state point through directed edges to form a path of length 2 m to complete the initialization state path; Starting from the state point Begin, select a random number of state points for backtracking until returning to the state point v1, thereby ensuring a loop that passes through each vertex at least once to create a loop structure; After obtaining the loop structure, randomly add directed edges to the graph. The directed edges can point from any state point to other state points to increase the complexity and randomness of the state transition graph. After completing the addition of the directed edges, finally obtain a strongly connected state transition graph with a complex structure; The generation steps of the logical function formula further include: For state point v in the state transition diagram i (i = 1, 2, …, 2 m ) is encoded; Fill in the state transition table according to the information of the state points and edges in the state transition graph; Based on the situation of the state transition table, use the second formula to process, and the value of the logical expression can be obtained, and the corresponding truth table is written; Find the combinations of the input variable values that make the value of the logical function expression equal to 1, and there is a product term corresponding to each combination of the input variable values. Among them, the input variable value of 1 is written as the original variable, and the value of 0 is written as the inverse variable; Add the product terms to obtain the logical expression.

2. The construction method of a high-dimensional digital domain chaotic system according to claim 1, characterized in that, The second formula is:

3. Circuit design of a high-dimensional digital domain chaotic system, characterized in that, Implement a construction method of a high-dimensional digital domain chaotic system according to any one of claims 1-2, including: a chaotic generator, a voltage conversion circuit, a comparator circuit, a sample and hold circuit, and an iterative function circuit; Among them, the chaotic generator uses a Chua's circuit, the iterative function circuit is a sequential logic circuit, the comparator circuit is used to output a signal with a level of 0 or 1, the sequential logic circuit is composed of basic gate elements and D flip-flops, and the sample and hold circuit is consistent with the clock frequency.

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