A partial power converter based common bus motor testing system and method
By using a partial power converter and multiple switching state combinations in the common bus motor test system, the problems of limited voltage operating range and excessive inductor current ripple were solved, thereby improving current testing capability and optimizing system performance.
Patent Information
- Application Number
- CN202310830787.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-07-07
- Publication Date
- 2026-01-09
- Estimated Expiration
- 2043-07-07
AI Technical Summary
Existing motor simulators with a common DC bus topology suffer from limited voltage operating range and excessive inductor current ripple, resulting in high system complexity and high hardware costs.
A common bus motor test system based on a partial power converter is adopted. By connecting the inverter under test and the auxiliary inverter, an isolated full-bridge DC/DC power converter is used to boost or buck the high-voltage bus power supply, expand the voltage operating range, and suppress inductor current ripple through multiple switching state combinations.
It expands the voltage operating range, improves current testing capabilities, suppresses inductor current ripple, reduces system complexity and hardware costs, and enhances the performance of the motor simulator.
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Figure CN116859099B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of motor controller, and particularly relates to a common bus motor test system and method based on partial power converter. BACKGROUND
[0002] With the increasing popularity of new energy electric vehicles, the reliability test requirements of motor controllers are gradually improved. Compared with the traditional motor dynamic loading platform, the power hardware-in-the-loop system (i.e. motor simulator) has the advantages of high cost performance, high flexibility, safety and short design cycle.
[0003] Among them, the motor simulator constructed by two three-phase six-switch two-level converters with common DC bus topology has the following advantages: 1. low cost for building a drag system; 2. bus power cycle, low system energy consumption; 3. simple control current scheme. However, the common DC bus has the problem of limited operation condition following the switching state scheme, and the fundamental reason is that the limited range of inductance voltage on both sides caused by the common DC bus voltage of the tested and tested inverters.
[0004] The prior art often uses an isolated bus topology, which cannot achieve current control through a simple phase shift strategy, and the system architecture is complex and the hardware implementation cost is high. SUMMARY
[0005] In order to overcome the above technical defects, the purpose of the present application is to provide a common bus motor test system and method based on partial power converter which expands the voltage operating range while suppressing the inductance current ripple.
[0006] The present application discloses a common bus motor test system based on partial power converter, comprising a tested inverter and a tested inverter connected to the same high-voltage bus power supply, the tested inverter and the tested inverter are connected through a three-phase inductor; a partial power converter is provided between the high-voltage bus power supply and the tested inverter, the partial power converter is used to step up or step down the voltage of the high-voltage bus power supply to obtain a transformed voltage potential, thereby increasing the range of the input voltage of the tested inverter; the partial power converter is an isolated full-bridge DC / DC power converter.
[0007] Preferably, the partial power converter comprises an isolation transformer for isolating a full-bridge, the isolation transformer comprises a primary inductor and a secondary inductor; the two ends of the primary inductor are connected to the two ends of the DC bus power supply through two switch tubes respectively, and the two ends of the secondary inductor are connected to the two ends of the tested inverter through two switch tubes respectively.
[0008] Preferably, the input port of the partial power converter is connected with the high-voltage bus power supply, the input port includes A1 port with potential V1 and B1 port with potential 0; the output port of the partial power converter includes a first output port without voltage transformation by the isolation transformer and a second output port with voltage transformation by the isolation transformer; the first output port includes A2 port with potential V1 and C2 port with potential -V2, and the second output port includes B1 port with potential 0 and C1 port with potential -V2; the first output port is connected with the auxiliary inverter, so that the input voltage of the auxiliary inverter is V1+V2 which is greater than V1.
[0009] Preferably, the input port of the partial power converter is connected with the high-voltage bus power supply, the input port includes A1 port with potential V1 and B1 port with potential 0; the output port of the partial power converter includes a first output port without voltage transformation by the isolation transformer and a second output port with voltage transformation by the isolation transformer; the first output port includes A2 port with potential V1+V2 and C2 port with potential 0, and the second output port includes A1 port with potential V1 and C1 port with potential V1+V2; the first output port is connected with the auxiliary inverter, so that the input voltage of the auxiliary inverter is V1+V2 which is greater than V1.
[0010] Preferably, the partial power converter comprises a front-stage partial power converter and a rear-stage partial power converter; the input port of the front-stage partial power converter is connected with the high-voltage bus power supply, and the input port of the front-stage partial power converter comprises an A1 port with a potential of V1 and a B1 port with a potential of 0; the output port of the partial power converter comprises a first output port without voltage conversion by the isolation transformer and a second output port with voltage conversion by the isolation transformer; the first output port comprises an A2 port with a potential of V1 and a C2 port with a potential of -V2, and the second output port comprises a B1 port with a potential of 0 and a C1 port with a potential of -V2; the first output port is connected with the input port of the rear-stage partial power converter, so that the input voltage of the rear-stage partial power converter is V1+V2 which is greater than V1; the input port of the rear-stage partial power converter comprises an A1 port with a potential of V1 and a B1 port with a potential of -V2; the output port of the partial power converter comprises a third output port without voltage conversion by the isolation transformer and a fourth output port with voltage conversion by the isolation transformer; the third output port comprises an A2 port with a potential of V1+V3 and a C2 port with a potential of -V2, and the fourth output port comprises an A1 port with a potential of V1 and a C1 port with a potential of V1+V3; the third output port is connected with the auxiliary inverter, so that the input voltage of the auxiliary inverter is V1+V2+V3 which is greater than V1.
[0011] Preferably, the to-be-tested inverter is connected with one phase of the three-phase inductor through a first switch tube and a second switch tube, and the auxiliary inverter is connected with the phase through a third switch tube and a fourth switch tube; when the first switch tube and the third switch tube are turned on and the second switch tube and the fourth switch tube are turned off, the load voltage U of the phase is -V3; when the first switch tube and the fourth switch tube are turned on and the second switch tube and the third switch tube are turned off, the load voltage U of the phase is V1+V2; when the second switch tube and the third switch tube are turned on and the first switch tube and the fourth switch tube are turned off, the load voltage U of the phase is -V1-V3; and when the second switch tube and the fourth switch tube are turned on and the first switch tube and the third switch tube are turned off, the load voltage U of the phase is V2.
[0012] Preferably, the value of V2 is (V1+V2) / 5 to (V1+V2) / 4, and the value of V3 is (V1+V3) / 5 to (V1+V3) / 4.
[0013] The present invention also discloses a common bus motor testing method based on a partial power converter. Based on the above-mentioned common bus motor testing system, the method includes: gradually loading the potential of the C1 and C2 ports of the first output port to -V2; or gradually loading the potential of the C1 and A2 ports of the first output port to V1+V3; or first gradually loading the potential of the C1 and C2 ports of the first output port to -V2, and then gradually loading the potential of the C1 and A2 ports of the third output port to V1+V3.
[0014] Preferably, the inverter under test is connected to one phase of the three-phase inductor through a first switch and a second switch, and the auxiliary inverter is connected to that phase of the three-phase inductor through a third switch and a fourth switch. The common bus motor test method further includes: turning on the first switch and the fourth switch, and turning off the second switch and the third switch for t1, so that the load voltage U of that phase is V1+V2; turning on the first switch and the third switch, and turning off the second switch and the fourth switch for t2, so that the load voltage U of that phase is -V3; turning on the second switch and the fourth switch, and turning off the first switch and the third switch for t3, so that the load voltage U of that phase is V2; turning on the second switch and the third switch, and turning off the first switch and the fourth switch for t4, so that the load voltage U of that phase is -V1-V3.
[0015] Preferably, for any one of the three-phase inductors, the common bus motor testing method further includes: obtaining the current switching cycle T of the inverter under test. S Pulse duty cycle signal D S1 Based on the set operating conditions, obtain the target current value I of the current inductor. L-ref And the actual inductor current I L According to the formula Obtain the target value U of the inductor voltage L According to U L T S D S1 V1, V2, and V3 are calculated over time t1-t4; based on time t1-t4, the pulse duty cycle signal D corresponding to the inverter under test is generated. S2 This enables the testing of the inverter under test using the accompanying inverter.
[0016] Compared with existing technologies, the above technical solution has the following advantages:
[0017] 1. Based on two-stage partial power converter, the voltage operating range of the test platform is expanded, the current test capability is improved, and various working conditions can be tested, avoiding the problems of limited voltage operating range and incomplete test working conditions under the original common DC bus scheme of the prior art; and avoiding the hardware cost of high-power voltage conversion;
[0018] 2. Based on the new switching state combination after voltage expansion, multi-level is realized, thereby suppressing the inductance current ripple and obtaining better current harmonic performance, solving the problem of excessive inductance current ripple under the original common DC bus scheme of the prior art, thereby balancing the contradiction between current ripple and motor simulator operating range, and improving the performance of the motor simulator platform;
[0019] 3. Allow the application of switching following control strategy, system complexity is reduced, dynamic performance is improved. BRIEF DESCRIPTION OF DRAWINGS
[0020] Figure 1 The structure schematic diagram of the first preferred embodiment of the common bus motor test system provided by the present application is provided.
[0021] Figure 2 The topology structure diagram of the partial power converter of the first preferred embodiment (the front-stage partial power converter of the third preferred embodiment) provided by the present application is provided.
[0022] Figure 3 The topology structure diagram of the partial power converter of the second preferred embodiment provided by the present application is provided.
[0023] Figure 4 The topology structure diagram of the rear-stage partial power converter of the third preferred embodiment provided by the present application is provided.
[0024] Figure 5 The structure schematic diagram of the third preferred embodiment of the common bus motor test system provided by the present application is provided.
[0025] Figure 6 The switching combination structure schematic diagram of the common bus motor test system provided by the present application is provided.
[0026] Figure 7 The switching combination structure schematic diagram of the U-phase inductance of the common bus motor test system provided by the present application is provided.
[0027] Figure 8 The schematic diagram of the change of the load voltage U output value with time of the load voltage U over time provided by the present application is provided. DETAILED DESCRIPTION
[0028] The advantages of the present application are further described below in combination with the drawings and specific embodiments.
[0029] The exemplary embodiments will be described in detail herein with reference to the attached drawings. In the following description, like reference numerals refer to like elements throughout the description. The following exemplary embodiments are described in the context of implementations described herein. These implementations are not intended to represent all implementations consistent with the present disclosure. Instead, they are merely examples consistent with some aspects of the present disclosure as detailed in the appended claims.
[0030] The terminology used in the description of the present disclosure herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present disclosure. As used in the description of the present disclosure and the appended claims, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It also will be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.
[0031] It will be understood that, although the terms first, second, third, etc. can be used herein to describe various information, these terms are not intended to denote a particular order or hierarchy. These terms are used merely for the purpose of distinguishing between two or more information. For example, without departing from the scope of the present disclosure, a first information can be termed a second information, and similarly, a second information can be termed a first information. The word "if" as used herein means "when" or "upon" or "in response to the determination" depending on the context.
[0032] In the description of the present disclosure, it should be understood that the terms "longitudinal", "lateral", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, indicate the orientation or positional relationship based on the orientation or position shown in the drawings, and are only used to facilitate the description of the present disclosure and simplify the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present disclosure.
[0033] In the description of the present disclosure, unless otherwise specified and limited, it should be noted that the terms "mounting", "connecting", "connection" should be understood broadly, for example, it can be a mechanical connection or an electrical connection, or a communication between two elements, or a direct connection, or an indirect connection through an intermediate medium, and the specific meaning of the above terms can be understood by those skilled in the art according to the specific circumstances.
[0034] In the following description, the suffixes used to represent elements such as "module", "part", or "unit" are used only to facilitate the description of the present disclosure, and do not have a specific meaning by themselves. Therefore, "module" and "part" can be used interchangeably.
[0035] See the attached Figure 1 The application discloses a common bus motor test system based on a partial power converter, comprising a to-be-tested inverter and an accompanying inverter connected to a same high-voltage bus power supply, and the to-be-tested inverter and the accompanying inverter are connected through U, V and W three-phase inductors. A partial power converter (different from a full power converter) is arranged between the high-voltage bus power supply and the accompanying inverter, and the partial power converter is used for boosting or reducing the voltage of the high-voltage bus power supply to obtain a converted voltage potential, so that the range of the input voltage of the accompanying inverter is increased. The partial power converter of the application adopts an isolated full-bridge DC / DC power converter.
[0036] Specifically, when only one partial power converter (first preferred embodiment) is arranged, see the attached Figure 2 A preferred topology structure, the input port of the partial power converter is connected with the high-voltage bus power supply, and the input port comprises an A1 port with a potential of V1 and a B1 port with a potential of 0. The output port of the partial power converter comprises a first output port without voltage conversion through an isolated transformer and a second output port with voltage conversion through an isolated transformer. The first output port comprises an A2 port with a potential of V1 and a C2 port with a potential of -V2, and the second output port comprises a B1 port with a potential of 0 and a C1 port with a potential of -V2. The first output port is connected with the accompanying inverter, so that the input voltage of the accompanying inverter is V1+V2 which is greater than V1. In actual operation, the voltage is gradually applied to the C2 port (namely the C1 port), so that the potential gradually changes from 0 to -V2.
[0037] A reference example, the potential of the input port of the partial power converter is (B1 port) 0 and (A1 port) 400V, the potential of the first output port is (A2 port) 400V and (C2 port) -100V, and the potential of the second output port is (B1 port) 0V and (C1 port) -100V. The working principle of the partial power converter is that the high-voltage bus voltage 400V is input from the port A1-B1 and output from the port A2-C2. The partial power converter adjusts the voltage, so that the potential of the C1 port and the C2 port decreases from 0V to -100V, and is output from the port B1-C1. At this time, the voltages of the port B1-C1 and the port A2-C2 are adjusted equally, and finally the input port A1-B1 is 0V-400V with a 400V voltage, and the output port A2-C2 is -100V-400V to 500V voltage, so that the high-voltage range is expanded.
[0038] There is another scheme (second preferred embodiment) in which only one partial power converter is arranged, see the attached Figure 3In a preferred topology, the input ports of a portion of the power converter are connected to the high-voltage bus power supply. The input ports include port A1 with a potential of V1 and port B1 with a potential of 0. The output ports of the portion of the power converter include a first output port (without voltage transformation by the isolation transformer) and a second output port (with voltage transformation by the isolation transformer). The first output port includes port A2 with a potential of V1+V2 and port C2 with a potential of 0. The second output port includes port A1 with a potential of V1 and port C1 with a potential of V1+V2. The first output port is connected to a test inverter, so the input voltage of the test inverter is V1+V2, which is greater than V1. In actual operation, a voltage is gradually applied to port A2 (i.e., port C1), gradually lowering it from a potential of 0 to a potential of -V2.
[0039] In one example, the input ports of a partial power converter have potentials of 0V (port B1) and 400V (port A1), the first output port has potentials of 500V (port A2) and 0V (port C2), and the second output port has potentials of 400V (port A1) and 500V (port C1). The partial power converter operates as follows: a high-voltage bus voltage of 400V is input from ports A1-B1 and output from ports A2-C2; the partial power converter regulates the voltage, raising the potentials of ports A2 and C1 from 400V to 500V, and outputting from ports A1-C1; at this time, the voltages of ports A1-C1 and A2-C2 are adjusted equally, ultimately achieving an input voltage of 400V (0V-400V) at ports A1-B1 and an output voltage of 500V (0V-500V) at ports A2-C2, thus expanding the high-voltage range.
[0040] The two embodiments described above are for extending the voltage range by using only a partial power converter. Further details can be found in the appendix. Figure 5 The present invention also provides a scheme for setting a two-stage partial power converter (third preferred embodiment), including a front-stage partial power converter and a rear-stage partial power converter. See also the appendix. Figure 2 Appendix Figure 4 The preferred topology of the partial power converter differs from the above-mentioned single partial power converter setup in that the input port of the front-stage partial power converter is connected to the high-voltage bus power supply, and the output port is connected to the input port of the rear-stage partial power converter; the output port of the rear-stage partial power converter is connected to the auxiliary inverter.
[0041] Specifically, the input port of the front-stage partial power converter is connected with the high-voltage bus power supply, the input port of the front-stage partial power converter includes an A1 port with a potential of V1 and a B1 port with a potential of 0; the output port of the partial power converter includes a first output port without voltage conversion by an isolation transformer and a second output port with voltage conversion by an isolation transformer. The first output port includes an A2 port with a potential of V1 and a C2 port with a potential of -V2, and the second output port includes a B1 port with a potential of 0 and a C1 port with a potential of -V2. The first output port is connected with the input port of the rear-stage partial power converter, specifically, the C2 port of the front-stage partial power converter is connected with the B1 port of the rear-stage partial power converter, so that the input voltage of the rear-stage partial power converter is V1+V2 which is greater than V1.
[0042] The input port of the rear-stage partial power converter includes an A1 port with a potential of V1 and a B1 port with a potential of -V2, the B1 port of the rear-stage partial power converter is connected with the C2 port of the front-stage partial power converter, and the A1 port of the rear-stage partial power converter is connected with the high-voltage bus power supply (which can also be regarded as being connected with the A1 port of the front-stage partial power converter). The output port of the partial power converter includes a third output port without voltage conversion by an isolation transformer and a fourth output port with voltage conversion by an isolation transformer. The third output port includes an A2 port with a potential of V1+V3 and a C2 port with a potential of -V2, and the fourth output port includes an A1 port with a potential of V1 and a C1 port with a potential of V1+V3; the third output port is connected with the auxiliary measurement inverter, so that the input voltage of the auxiliary measurement inverter is V1+V2+V3 which is greater than V1.
[0043] A reference example is provided, the front-stage partial power converter is the same as the topology (the first preferred embodiment) shown in the above Figure 2 and has the same principle, which will not be described here. Finally, the second output port A2-C2 outputs a 500V voltage of -100V-400V to the rear-stage partial power converter, so that the high-voltage range of the first stage is expanded.
[0044] The input port of the rear-stage partial power converter has a potential of (B1 port) -100V and (A1 port) 400V, the first output port has a potential of (A2 port) 500V and (C2 port) -100V, and the second output port has a potential of (A1 port) 400V and (C1 port) 500V. The working principle of the partial power converter is as follows: the high-voltage bus voltage 400V is input from the port A1-B1 and output from the port A2-C2; the partial power converter is regulated to make the potentials of the A2 port and the C1 port increase from 400V to 500V and output from the port A1-C1; at this time, the voltages of the port A1-C1 and the port A2-C2 are adjusted equally, and finally the input port A1-B1 has a voltage of 500V in the range of -100V-400V and the output port A2-C2 has a voltage in the range of -100V-500V to 600V, thereby realizing the expansion of the high-voltage range of the second stage.
[0045] Preferably, the voltage regulating range of the present application is as follows: the value of V2 is (V1+V2) / 5 to (V1+V2) / 4; and the value of V3 is (V1+V3) / 5 to (V1+V3) / 4, for example, V2 and V3 are both 100V.
[0046] For the topology structure of the partial power converter, the present application provides a preferred structure, which comprises an isolation transformer for isolating the full-bridge, and the isolation transformer comprises a primary inductor and a secondary inductor. For the structure in which only one partial power converter is arranged, the two ends of the primary inductor are connected to the two ends of the DC bus power supply through two switch tubes respectively, and the two ends of the secondary inductor are connected to the two ends of the auxiliary inverter through two switch tubes respectively. For the structure in which the front-stage and rear-stage partial power converters are arranged, the two ends of the primary inductor of the front-stage partial power converter are connected to the two ends of the DC bus power supply through two switch tubes respectively, the two ends of the secondary inductor of the front-stage partial power converter are connected to the auxiliary inverter and the rear-stage partial power converter through two switch tubes respectively; the two ends of the primary inductor of the rear-stage partial power converter are connected to the DC bus power supply and the front-stage partial power converter through two switch tubes respectively, and the two ends of the secondary inductor of the rear-stage partial power converter are connected to the two ends of the auxiliary inverter through two switch tubes respectively.
[0047] In other embodiments, other topologies of the partial power converter can also be used, which are not limited herein.
[0048] In the case of expanding the voltage operating range, by arranging multiple switch state combinations, a multi-level can be realized, thereby suppressing the inductance current ripple.
[0049] Specifically, based on the scheme of the third preferred embodiment (two-stage partial power converter) described above, referring to FIG. 4, the partial power converter is arranged in the form of a full-bridge, and the auxiliary inverter is arranged in the form of a half-bridge. Figures 6-7For example, the U phase, the to-be-tested inverter is connected with the U phase inductor through the first switch tube and the second switch tube, and the auxiliary inverter is connected with the U phase inductor through the third switch tube and the fourth switch tube. When the first switch tube and the third switch tube are turned on and the second switch tube and the fourth switch tube are turned off, the load voltage U of the phase is-V3; when the first switch tube and the fourth switch tube are turned on and the second switch tube and the third switch tube are turned off, the load voltage U of the phase is V1+V2; when the second switch tube and the third switch tube are turned on and the first switch tube and the fourth switch tube are turned off, the load voltage U of the phase is-V1-V3; and when the second switch tube and the fourth switch tube are turned on and the first switch tube and the third switch tube are turned off, the load voltage U of the phase is V2. Referring to a schematic diagram of the change of the load voltage U output value of the U phase with time, it can be seen that, based on the test platform of the application, four different levels can be output, so that the current ripple can be reduced. Figure 8
[0050] The application further discloses a common bus motor test method based on a partial power converter. The common bus motor test system based on the first preferred embodiment is used to gradually load the potentials of the C1 port and the C2 port of the first output port to-V2. The common bus motor test system based on the second preferred embodiment is used to gradually load the potentials of the C1 port and the A2 port of the first output port to V1+V3. The common bus motor test system based on the third preferred embodiment is used to first gradually load the potentials of the C1 port and the C2 port of the first output port to-V2, and then gradually load the potentials of the C1 port and the A2 port of the third output port to V1+V3.
[0051] The common bus motor test method based on the third preferred embodiment (two-stage partial power converter) is used to turn on the first switch tube and the fourth switch tube, turn off the second switch tube and the third switch tube, and keep the state for t1, so that the load voltage U of the phase is V1+V2; turn on the first switch tube and the third switch tube, turn off the second switch tube and the fourth switch tube, and keep the state for t2, so that the load voltage U of the phase is-V3; turn on the second switch tube and the fourth switch tube, turn off the first switch tube and the third switch tube, and keep the state for t3, so that the load voltage U of the phase is V2; and turn on the second switch tube and the third switch tube, turn off the first switch tube and the fourth switch tube, and keep the state for t4, so that the load voltage U of the phase is-V1-V3.
[0052] Further, for any one phase inductor in the three-phase inductor, the common bus motor test method further comprises the following steps.
[0053] S100, acquiring a current switching period T of a to-be-tested inverter S , a pulse duty cycle signal D S1 ;
[0054] S200, according to the set working condition, the current target value I of the current inductance is obtained L-ref , and the current I of the actual inductance L ;
[0055] S300, according to the formula , the inductance voltage target value U is obtained L ;
[0056] S400, according to U L , T S , D S1 , V1, V2, V3, the time t1-t4 is calculated
[0057] S500, according to the time t1-t4, the pulse duty cycle signal D corresponding to the test inverter is generated S2 , so as to realize the test of the to-be-tested inverter by using the test inverter.
[0058] Among them, in step S400, the simultaneous equations t1+t2+t3+t4=T S ; t1+t3=t2+t4; V2·(t3+t2)=(V1+V2)·(t1-t4)=U; t1+t2=D S1 ·T S are solved to obtain U L , T S , D S1 .
[0059] It should be noted that the embodiments of the present application have better implementation, and do not limit the present application in any form, and any skilled person in the art can change or modify the above disclosed technical content into equivalent effective embodiments, as long as it does not deviate from the technical scheme of the present application, and any modification or equivalent change and modification of the above embodiments according to the technical essence of the present application, still belongs to the scope of the technical scheme of the present application.
Claims
1. A partial power inverter based common bus motor testing system, characterized in that, The test inverter and the test inverter connected with the same high-voltage bus power supply, the test inverter and the test inverter are connected through three-phase inductance; The high-voltage bus power supply is provided with a partial power converter between the test inverter and the test inverter, the partial power converter is used for boosting or reducing the voltage of the high-voltage bus power supply to obtain a transformed voltage potential, thereby increasing the range of the input voltage of the test inverter; The partial power converter is an isolated full-bridge DC / DC power converter; The partial power converter includes an isolation transformer for the isolated full-bridge, the isolation transformer includes a primary inductor and a secondary inductor, the two ends of the primary inductor are connected with the DC bus power supply through the switch tube respectively, and the two ends of the secondary inductor are connected with the two ends of the test inverter through two switch tubes respectively.
2. The common bus motor testing system of claim 1, wherein, The input port of the partial power converter is connected with the high-voltage bus power supply, and the input port includes an A1 port with a potential of V1 and a B1 port with a potential of 0; The output port of the partial power converter includes a first output port after the voltage is transformed through the isolation transformer and a second output port without the voltage being transformed through the isolation transformer; the first output port includes an A2 port with a potential of V1 and a C2 port with a potential of-V2, and the second output port includes a B1 port with a potential of 0 and a C1 port with a potential of-V2; The first output port is connected with the test inverter, so that the input voltage of the test inverter is V1+V2 which is greater than V1.
3. The common bus motor testing system of claim 1, wherein, The input port of the partial power converter is connected with the high-voltage bus power supply, and the input port includes an A1 port with a potential of V1 and a B1 port with a potential of 0; The output port of the partial power converter includes a first output port after the voltage is transformed through the isolation transformer and a second output port without the voltage being transformed through the isolation transformer; the first output port includes an A2 port with a potential of V1+V2 and a C2 port with a potential of 0, and the second output port includes an A1 port with a potential of V1 and a C1 port with a potential of V1+V2; The first output port is connected with the test inverter, so that the input voltage of the test inverter is V1+V2 which is greater than V1.
4. The common bus motor testing system of claim 1, wherein, The partial power converter includes a front-stage partial power converter and a rear-stage partial power converter; The input port of the front-stage partial power converter is connected with the high-voltage bus power supply, and the input port of the front-stage partial power converter includes an A1 port with a potential of V1 and a B1 port with a potential of 0; the output port of the partial power converter includes a first output port after the voltage is transformed through the isolation transformer and a second output port without the voltage being transformed through the isolation transformer; the first output port includes an A2 port with a potential of V1 and a C2 port with a potential of-V2, and the second output port includes a B1 port with a potential of 0 and a C1 port with a potential of-V2; the first output port is connected with the input port of the rear-stage partial power converter, so that the input voltage of the rear-stage partial power converter is V1+V2 which is greater than V1. The input port of the rear-stage partial power converter comprises an A1 port with a potential of V1 and a B1 port with a potential of -V2; the output port of the partial power converter comprises a third output port without voltage conversion by the isolation transformer and a fourth output port with voltage conversion by the isolation transformer; the third output port comprises an A2 port with a potential of V1+V3 and a C2 port with a potential of -V2, and the fourth output port comprises an A1 port with a potential of V1 and a C1 port with a potential of V1+V3; the third output port is connected with the auxiliary inverter, so that the input voltage of the auxiliary inverter is V1+V2+V3 which is greater than V1.
5. The common bus motor testing system of claim 4, wherein, The to-be-tested inverter is connected with one phase of the three-phase inductor through a first switch tube and a second switch tube, and the auxiliary inverter is connected with the phase through a third switch tube and a fourth switch tube. When the first switch tube and the third switch tube are turned on and the second switch tube and the fourth switch tube are turned off, the load voltage U of the phase is -V3. When the first switch tube and the fourth switch tube are turned on and the second switch tube and the third switch tube are turned off, the load voltage U of the phase is V1+V2. When the second switch tube and the third switch tube are turned on and the first switch tube and the fourth switch tube are turned off, the load voltage U of the phase is -V1-V3. When the second switch tube and the fourth switch tube are turned on and the first switch tube and the third switch tube are turned off, the load voltage U of the phase is V2.
6. A method of testing a common bus motor based on partial power converter, characterized in that, The common-bus motor test system of claim 4 comprises: The potentials of the C1 port and the C2 port of the first output port are gradually loaded to -V2. Or the potentials of the C1 port and the A2 port of the first output port are gradually loaded to V1+V3. Or the potentials of the C1 port and the C2 port of the first output port are gradually loaded to -V2 first, and then the potentials of the C1 port and the A2 port of the third output port are gradually loaded to V1+V3.
7. The common bus motor testing method of claim 6, wherein, The to-be-tested inverter is connected with one phase of the three-phase inductor through a first switch tube and a second switch tube, and the auxiliary inverter is connected with the phase through a third switch tube and a fourth switch tube; the common-bus motor test method further comprises: The first switch tube and the fourth switch tube are turned on, the second switch tube and the third switch tube are turned off and kept for t1, so that the load voltage U of the phase is V1+V2. The first switch tube and the third switch tube are turned on, the second switch tube and the fourth switch tube are turned off and kept for t2, so that the load voltage U output of the phase is -V3. The second switch tube and the fourth switch tube are turned on, the first switch tube and the third switch tube are turned off and kept for t3, so that the load voltage U of the phase is V2. The second switch tube and the third switch tube are turned on, the first switch tube and the fourth switch tube are turned off and kept for t4, so that the load voltage U of the phase is -V1-V3.
8. The common bus motor testing method of claim 6, wherein, For any one phase of the three-phase inductor, the common-bus motor test method further comprises: acquiring a current switching period of the to-be-tested inverter , a pulse duty cycle signal ; According to the set working condition, the current target value of the current of the current inductor is obtained , and the current of the actual inductor ; According to the formula Obtaining the inductance voltage target value ; According to , , , V1, V2, V3, the calculation time t1-t4; According to the t1-t4 time, a pulse duty cycle signal corresponding to the test inverse converter is generated , and the test of the to-be-tested inverse converter by the test inverse converter is realized.
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