A three-level power module dynamic test circuit and test method

Abstract

A kind of three-level power module dynamic test circuit, including energy storage capacitor C1, load inductance L1, and four for connecting three-level power module terminal and five switching switches for testing, four terminals are respectively positive terminal P, intermediate terminal M, negative terminal N and AC terminal AC, five switching switches are respectively SW1, SW2, SW3, SW4, SW5;The positive pole of energy storage capacitor C1 is connected between negative pole by SW1, SW2 in turn in series connection;Node A is provided in the connecting line between SW1 and SW2, node A is connected between intermediate terminal M by SW3, node A is connected between the AC terminal AC by SW4, load inductance L1 is connected in parallel with the SW4;The positive pole of energy storage capacitor C1 is connected positive terminal P by SW5, the negative pole of energy storage capacitor C1 is connected negative terminal N by SW6.The method can be applied to the test of three-level power module in laboratory, also can be used for three-level power module large-scale production in dynamic test screening.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power module testing, in particular to a three-level power module dynamic testing circuit. BACKGROUND

[0002] IGBT power module is a mainstream semiconductor switching device widely used in modern medium and high power converters. Its dynamic characteristics determine the switching loss, power density, device stress and electromagnetic compatibility of the device, and directly affect the performance of the converter. Therefore, accurately measuring the dynamic performance of power switching elements has extremely important practical significance.

[0003] The power module dynamic testing system is an important testing link of semiconductor testing in high-end application field. According to the power supply mode of the power module, it can be divided into two levels and three levels. The DC terminal of the two-level power module has only two terminals, which are connected to the positive and negative terminals of the DC source respectively. The two-level power module usually contains only two units, and the structure is quite simple. The DC terminal of the three-level power module has three terminals, in addition to the positive and negative terminals of the DC source, there is also a terminal connected to the intermediate level. The three-level half-bridge power module usually contains 4-8 units, and the structure is relatively complex.

[0004] The existing power module dynamic testing equipment on the market can only be used for traditional two-level power modules. There is currently no corresponding testing equipment and testing method for three-level power modules. SUMMARY

[0005] Therefore, the present application provides a three-level power module dynamic testing circuit and testing method to solve the technical problem that the prior art lacks effective dynamic testing equipment and testing methods for three-level power modules.

[0006] To achieve the above purpose, the present application provides a three-level power module dynamic testing circuit, which comprises an energy storage capacitor C1, a load inductor L1, and four connection terminals for connecting the three-level power module and five switching switches for testing. The four connection terminals are positive terminal P, intermediate terminal M, negative terminal N and alternating current terminal AC respectively. The five switching switches are SW1, SW2, SW3, SW4 and SW5 respectively.

[0007] The positive terminal of the energy storage capacitor C1 is connected to the negative terminal through SW1 and SW2 connected in series.

[0008] A node A is arranged in the connection line between SW1 and SW2, the node A is connected to the intermediate terminal M through SW3, the node A is connected to the alternating current terminal AC through SW4, and the load inductor L1 is connected in parallel with the SW4.

[0009] The positive pole of the energy storage capacitor C1 is connected to the positive terminal P through SW5, and the negative pole of the energy storage capacitor C1 is connected to the negative terminal N through SW6.

[0010] As a further preferred technical solution of the present application, a high-voltage power supply switch SW0 is connected in series in the connection line between the positive pole of the energy storage capacitor C1 and the SW5.

[0011] As a further preferred technical solution of the present application, the energy storage capacitor C1 is 100-3000uf, and the load inductor L1 is 1-1000uH.

[0012] As a further preferred technical solution of the present application, the energy storage capacitor C1 is an electrolytic capacitor or a film capacitor.

[0013] As a further preferred technical solution of the present application, the load inductor L1 is a hollow inductor.

[0014] According to another aspect of the present application, the present application also provides a test method of a three-level power module dynamic test circuit, the three-level power module comprising two diodes and five controllable switching devices, four of the controllable switching devices being T1, T2, T3, and T4 respectively, and the two diodes being D5 and D6 respectively, the controllable switching devices being IGBT or MOS tube, wherein:

[0015] The C pole of T1 is connected to the positive terminal P, the E pole of T1 is connected to the C pole of T2, the E pole of T2 is connected to the C pole of T3, the E pole of T3 is connected to the negative terminal N, the diodes connected to T1, T2, T3, and T4 are D1, D2, D3, and D4 respectively, the anodes of D5 and D6 are both connected to the middle terminal M, the cathode of D5 is connected to the E pole of T1 and the C pole of T2, the cathode of D6 is connected to the E pole of T3 and the C pole of T4, and the AC terminal is connected to the E pole of T2 and the C pole of T3.

[0016] The method for dynamically testing the three-level power module comprises the following steps:

[0017] S1, switching characteristic test:

[0018] SW1 is opened, SW2 is closed, SW3 is opened, SW4 is opened, SW5 is closed, and SW6 is closed, then T3 and T4 are controlled to be closed, T2 is always open, the switching characteristic of T1 is tested by controlling the T1 switch.

[0019] SW1 is opened, SW2 is closed, SW3 is opened, SW4 is opened, SW5 is closed, and SW6 is closed, then T3 and T4 are controlled to be closed, T1 is always open, the switching characteristic of T2 is tested by controlling the T2 switch.

[0020] Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T1, T2 to close, T4 to always open, through controlling T3 switch, realize the switch characteristic test of T3;

[0021] Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T1, T2 to close, T3 to always open, through controlling T4 switch, realize the switch characteristic test of T4;

[0022] S2, reverse recovery test:

[0023] Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T1 to close, T2, T4 to always open, through controlling T3 switch, realize the reverse recovery characteristic test of D1;

[0024] Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T2 to close, T1, T4 to always open, through controlling T3 switch, realize the reverse recovery characteristic test of D2;

[0025] Open SW1, close SW2, open SW3, open SW4, close SW5, close SW6, then control T3 to close, T2, T4 to always open, through controlling T1 switch, realize the reverse recovery characteristic test of D3;

[0026] Open SW1, close SW2, open SW3, open SW4, close SW5, close SW6, then control T4 to close, T2, T3 to always open, through controlling T1 switch, realize the reverse recovery characteristic test of D4;

[0027] Open SW1, close SW2, close SW3, open SW4, close SW5, open SW6, then control T3, T4 to close, T2 to always open, through controlling T1 switch, realize the reverse recovery characteristic test of D5;

[0028] Close SW1, open SW2, close SW3, open SW4, open SW5, close SW6, then control T1, T2 to close, T3 to always open, through controlling T4 switch, realize the reverse recovery characteristic test of D6;

[0029] S3, short circuit test:

[0030] Open SW1, close SW2, open SW3, close SW4, close SW5, close SW6, then control T3, T4 to close, T2 to always open, through controlling T1 switch, realize the short circuit characteristic test of T1;

[0031] SW1 is disconnected, SW2 is closed, SW3 is disconnected, SW4 is closed, SW5 is closed, SW6 is closed, and then T1, T2 are controlled to be closed, T4 is always open, and the short circuit characteristic test of T3 is realized by controlling T3 switch.

[0032] SW1 is closed, SW2 is disconnected, SW3 is disconnected, SW4 is closed, SW5 is closed, SW6 is closed, and then T1, T2 are controlled to be closed, T3 is always open, and the short circuit characteristic test of T3 is realized by controlling T4 switch.

[0033] SW1 is closed, SW2 is disconnected, SW3 is disconnected, SW4 is closed, SW5 is closed, SW6 is closed, and then T1, T2 are controlled to be closed, T3 is always open, and the short circuit characteristic test of T3 is realized by controlling T4 switch.

[0034] According to another aspect of the present application, the present application also provides a test method of a three-level power module dynamic test circuit, the three-level power module comprising two diodes and five controllable switching devices, the three-level power module comprising two diodes and six controllable switching devices, the six controllable switching devices being T1, T2, T3, T4, T1.1 and T4.1 respectively, the two diodes being D5 and D6 respectively, and the controllable switching device being IGBT or MOS tube, wherein:

[0035] The C pole of T1 is connected to the positive terminal P, the E pole of T1 is connected to the C pole of T2, the E pole of T2 is connected to the C pole of T3, the E pole of T3 is connected to the negative terminal N, the diodes connected to T1, T2, T3 and T4 are D1, D2, D3 and D4 respectively, the anodes of D5 and D6 are connected to the middle terminal M, the cathode of D5 is connected to the E pole of T1 and the C pole of T2, the cathode of D6 is connected to the E pole of T3 and the C pole of T4, the AC terminal is connected to the E pole of T2 and the C pole of T3, the C pole of T1.1 is connected to the C pole of T1, the E pole of T1.1 is connected to the E pole of T1, the C pole of T4.1 is connected to the C pole of T4, and the E pole of T4.1 is connected to the E pole of T4;

[0036] The method for dynamically testing the three-level power module comprises the following steps:

[0037] S1, switch characteristic test:

[0038] SW1 is disconnected, SW2 is closed, SW3 is disconnected, SW4 is disconnected, SW5 is closed, SW6 is closed, and then T1.1, T3, T4, T4.1 are controlled to be closed, T2 is always open, and the switch characteristic test of T1 is realized by controlling T1 switch.

[0039] Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T1.1, T2, T4.1 to be closed, T1, T4 to be opened, through controlling T3 switch, the reverse recovery characteristic test of D2 is realized;

[0040] Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T1.1, T2, T4.1 to be closed, T1, T4 to be opened, through controlling T3 switch, the reverse recovery characteristic test of D2 is realized;

[0041] Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T1.1, T2, T4.1 to be closed, T1, T4 to be opened, through controlling T3 switch, the reverse recovery characteristic test of D2 is realized;

[0042] Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T1.1, T2, T4.1 to be closed, T1, T4 to be opened, through controlling T3 switch, the reverse recovery characteristic test of D2 is realized;

[0043] Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T1.1, T2, T4.1 to be closed, T1, T4 to be opened, through controlling T3 switch, the reverse recovery characteristic test of D2 is realized;

[0044] S2, reverse recovery test:

[0045] Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T1.1, T2, T4.1 to be closed, T1, T4 to be opened, through controlling T3 switch, the reverse recovery characteristic test of D2 is realized;

[0046] Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T1.1, T2, T4.1 to be closed, T1, T4 to be opened, through controlling T3 switch, the reverse recovery characteristic test of D2 is realized;

[0047] Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T1.1, T2, T4.1 to be closed, T1, T4 to be opened, through controlling T3 switch, the reverse recovery characteristic test of D2 is realized;

[0048] Close SW1, open SW2, open SW3, open SW4, open SW5, open SW6, control T1.1, T3, T4, T4.1 to be closed, T2 to be always open, and realize the reverse recovery characteristic test of D5 by controlling T1 switch;

[0049] Close SW1, open SW2, open SW3, open SW4, open SW5, open SW6, control T1.1, T3, T4, T4.1 to be closed, T2 to be always open, and realize the reverse recovery characteristic test of D5 by controlling T1 switch;

[0050] Close SW1, open SW2, open SW3, open SW4, open SW5, open SW6, control T1.1, T3, T4, T4.1 to be closed, T2 to be always open, and realize the reverse recovery characteristic test of D5 by controlling T1 switch;

[0051] S3, short circuit test:

[0052] Close SW1, open SW2, open SW3, open SW4, open SW5, open SW6, control T1.1, T3, T4, T4.1 to be closed, T2 to be always open, and realize the reverse recovery characteristic test of D5 by controlling T1 switch;

[0053] Close SW1, open SW2, open SW3, open SW4, open SW5, open SW6, control T1.1, T3, T4, T4.1 to be closed, T2 to be always open, and realize the reverse recovery characteristic test of D5 by controlling T1 switch;

[0054] Close SW1, open SW2, open SW3, open SW4, open SW5, open SW6, control T1.1, T3, T4, T4.1 to be closed, T2 to be always open, and realize the reverse recovery characteristic test of D5 by controlling T1 switch;

[0055] Close SW1, open SW2, open SW3, open SW4, open SW5, open SW6, control T1.1, T3, T4, T4.1 to be closed, T2 to be always open, and realize the reverse recovery characteristic test of D5 by controlling T1 switch;

[0056] Close SW1, open SW2, open SW3, open SW4, open SW5, open SW6, control T1.1, T3, T4, T4.1 to be closed, T2 to be always open, and realize the reverse recovery characteristic test of D5 by controlling T1 switch;

[0057] Close SW1, open SW2, open SW3, close SW4, close SW5, close SW6, control T1, T1.1, T2, T4 to be closed, T3 to be open, and realize the short circuit characteristic test of T4.1 by controlling T4.1 switch.

[0058] The three-level power module dynamic test circuit of the application can realize dynamic test of two kinds of three-level power modules, and the test items include switch test, reverse recovery test and short circuit test. BRIEF DESCRIPTION OF DRAWINGS

[0059] The application will be further described in detail below in combination with the drawings and specific embodiments.

[0060] Figure 1 It is a circuit schematic diagram of three-level power module dynamic test circuit;

[0061] Figure 2 It is a circuit diagram for the test method of embodiment 1;

[0062] Figure 3 It is a circuit diagram for the test method of embodiment 2.

[0063] The purpose realization, functional features and advantages of the application will be further described in combination with embodiments and with reference to the drawings. DETAILED DESCRIPTION

[0064] The application will be further described below in combination with the drawings and specific embodiments. The terms such as "upper", "lower", "left", "right", "middle" and "one" used in the preferred embodiments are only for the convenience of clear description, and are not used to limit the scope of the application. The change or adjustment of the relative relationship without substantial change of the technical content is also regarded as the scope of the application.

[0065] As shown in Figure 1 The application provides a three-level power module dynamic test circuit, which comprises an energy storage capacitor C1 which is an electrolytic capacitor or a film capacitor, a load inductor L1 which is a hollow inductor, and four wiring terminals for connecting a three-level power module and five switching switches for test, wherein the four wiring terminals are respectively a positive terminal P, a middle terminal M, a negative terminal N and an alternating current terminal AC, and the five switching switches are respectively SW1, SW2, SW3, SW4 and SW5.

[0066] The positive terminal of the energy storage capacitor C1 is connected to the negative terminal through SW1 and SW2 which are connected in series.

[0067] The connection line between SW1 and SW2 includes a node A. Node A is connected to the intermediate terminal M via SW3, and node A is connected to the AC terminal AC via SW4. The load inductor L1 is connected in parallel with SW4.

[0068] The positive terminal of the energy storage capacitor C1 is connected to the positive terminal P via SW5, and the negative terminal of the energy storage capacitor C1 is connected to the negative terminal N via SW6.

[0069] The energy storage capacitor C1 is the power supply device for the entire circuit. Preferably, a high-voltage power supply switch SW0 is connected in series in the connection line between the positive terminal of the energy storage capacitor C1 and SW5, that is, SW0 serves as the main switch of the power supply circuit.

[0070] Preferably, the energy storage capacitor C1 is 100-3000uF and the load inductance L1 is 1-1000uH.

[0071] To enable those skilled in the art to better understand and implement the technical solutions of the present invention, the present invention will be further described in detail below through specific embodiments.

[0072] Example 1

[0073] This embodiment uses the aforementioned three-level power module dynamic test circuit to perform tests such as... Figure 2 The three-level power module with the configuration shown in the dashed box was tested. This three-level power module includes two diodes and five controllable switching devices. The four controllable switching devices are T1, T2, T3, and T4, and the two diodes are D5 and D6. The controllable switching devices are either IGBTs or MOSFETs.

[0074] The collector (C) of T1 is connected to the positive terminal P, the emitter (E) of T1 is connected to the collector (C) of T2, the emitter (E) of T2 is connected to the collector (C) of T3, and the emitter (E) of T3 is connected to the negative terminal N. The diodes connected to T1, T2, T3, and T4 are D1, D2, D3, and D4, respectively. The anodes of D5 and D6 are both connected to the middle terminal M. The cathode of D5 is connected to the emitter (E) of T1 and the collector (C) of T2. The cathode of D6 is connected to the emitter (E) of T3 and the collector (C) of T4. The AC terminal AC is connected to the emitter (E) of T2 and the collector (C) of T3.

[0075] Different dynamic test items of the three-level power module need to be realized by different controls of the three-level power module dynamic test circuit and module cooperation. In the test process, the power module dynamic test circuit is used as the peripheral circuit of the test power module, and the G pole and E pole of the controllable switching devices T1, T2, T3 and T4 in the power module need to be connected to the external control circuit to control T1, T2, T3 and T4 to switch. It should be noted that how the controllable switching devices such as IGBT or MOS tube are controlled by the external control circuit, which belongs to the conventional technology in the art and will not be described in detail. The specific test method includes the following steps:

[0076] S1, switch characteristic test:

[0077] SW0 is closed, SW1 is opened, SW2 is closed, SW3 is opened, SW4 is opened, SW5 is closed, and SW6 is closed, and then T3 and T4 are controlled to be closed, T2 is always opened, and the switch characteristic test of T1 is realized by controlling T1 switch.

[0078] SW0 is closed, SW1 is opened, SW2 is closed, SW3 is opened, SW4 is opened, SW5 is closed, and SW6 is closed, and then T3 and T4 are controlled to be closed, T1 is always opened, and the switch characteristic test of T2 is realized by controlling T2 switch.

[0079] SW0 is closed, SW1 is closed, SW2 is opened, SW3 is opened, SW4 is opened, SW5 is closed, and SW6 is closed, and then T1 and T2 are controlled to be closed, T4 is always opened, and the switch characteristic test of T3 is realized by controlling T3 switch.

[0080] SW0 is closed, SW1 is closed, SW2 is opened, SW3 is opened, SW4 is opened, SW5 is closed, and SW6 is closed, and then T1 and T2 are controlled to be closed, T3 is always opened, and the switch characteristic test of T4 is realized by controlling T4 switch.

[0081] S2, reverse recovery test:

[0082] SW0 is closed, SW1 is closed, SW2 is opened, SW3 is opened, SW4 is opened, SW5 is closed, and SW6 is closed, and then T1 is controlled to be closed, T2 and T4 are always opened, and the reverse recovery characteristic test of D1 is realized by controlling T3 switch.

[0083] SW0 is closed, SW1 is closed, SW2 is opened, SW3 is opened, SW4 is opened, SW5 is closed, and SW6 is closed, and then T2 is controlled to be closed, T1 and T4 are always opened, and the reverse recovery characteristic test of D2 is realized by controlling T3 switch.

[0084] Close SW0, open SW1, close SW2, open SW3, open SW4, close SW5, close SW6, and then control T3 to be closed, T2 and T4 to be always open, and control T1 switch to realize the reverse recovery characteristic test of D3;

[0085] Close SW0, open SW1, close SW2, open SW3, open SW4, close SW5, close SW6, and then control T4 to be closed, T2 and T3 to be always open, and control T1 switch to realize the reverse recovery characteristic test of D4;

[0086] Close SW0, open SW1, close SW2, close SW3, open SW4, close SW5, open SW6, and then control T3 and T4 to be closed, T2 to be always open, and control T1 switch to realize the reverse recovery characteristic test of D5;

[0087] Close SW0, open SW1, close SW2, open SW3, open SW4, open SW5, close SW6, and then control T1 and T2 to be closed, T3 to be always open, and control T4 switch to realize the reverse recovery characteristic test of D6;

[0088] S3, short circuit test:

[0089] Close SW0, open SW1, close SW2, open SW3, close SW4, close SW5, close SW6, and then control T3 and T4 to be closed, T2 to be always open, and control T1 switch to realize the short circuit characteristic test of T1;

[0090] Close SW0, open SW1, close SW2, open SW3, close SW4, close SW5, close SW6, and then control T3 and T4 to be closed, T1 to be always open, and control T2 switch to realize the short circuit characteristic test of T2;

[0091] Close SW0, open SW1, close SW2, open SW3, close SW4, close SW5, close SW6, and then control T1 and T2 to be closed, T4 to be always open, and control T3 switch to realize the short circuit characteristic test of T3;

[0092] Close SW0, open SW1, close SW2, open SW3, close SW4, close SW5, close SW6, and then control T1 and T2 to be closed, T3 to be always open, and control T4 switch to realize the short circuit characteristic test of T3.

[0093] It should be noted that the steps of the above test process are not in any particular order, and each step of the test can be repeated multiple times as needed.

[0094] Example 2

[0095] The difference between this embodiment and Embodiment 1 lies in the configuration of the three-level power module under test.

[0096] Using the above-described three-level power module dynamic test circuit, for example... Figure 3 The three-level power module with the configuration shown in the dashed box was tested. This three-level power module includes two diodes and five controllable switching devices. The six controllable switching devices are designated T1, T2, T3, T4, T1.1, and T4.1. The two diodes are designated D5 and D6. The controllable switching devices are either IGBTs or MOSFETs.

[0097] The collector (C) of T1 is connected to the positive terminal P, the emitter (E) of T1 is connected to the collector (C) of T2, the emitter (E) of T2 is connected to the collector (C) of T3, and the emitter (E) of T3 is connected to the negative terminal N. The diodes connected to T1, T2, T3, and T4 are D1, D2, D3, and D4, respectively. The anodes of D5 and D6 are both connected to the middle terminal M. The cathode of D5 is connected to the emitter (E) of T1 and the collector (C) of T2. The cathode of D6 is connected to the emitter (E) of T3 and the collector (C) of T4. The AC terminal AC is connected to the emitter (E) of T2 and the collector (C) of T3. The collector (C) of T1.1 is connected to the collector (C) of T1, the emitter (E) of T1.1 is connected to the emitter (E) of T1, the collector (C) of T4.1 is connected to the collector (C) of T4, and the emitter (E) of T4.1 is connected to the emitter (E) of T4.

[0098] Different dynamic tests on this three-level power module require different controls implemented through a dynamic test circuit and the module itself. During testing, the dynamic test circuit serves as the peripheral circuit for the power module. The gate (G) and emitter (E) terminals of the controllable switching devices T1, T2, T3, T4, T1.1, and T4.1 within the power module need to be connected to an external control circuit. This external control circuit controls the switching actions of T1, T2, T3, T4, T1.1, and T4.1. It should be noted that how controllable switching devices such as IGBTs or MOSFETs are controlled by an external control circuit is standard technology and will not be described in detail here. The specific test method includes the following steps:

[0099] S1. Switching characteristic test:

[0100] Close SW0, open SW1, close SW2, open SW3, open SW4, close SW5, close SW6, and then control T1.1, T3, T4, and T4.1 to close, while T2 remains normally open. By controlling switch T1, the switching characteristics of T1 can be tested.

[0101] Close SW0, open SW1, close SW2, open SW3, open SW4, close SW5, close SW6, and control T1, T3, T4, T4.1 to be closed and T2 to be always open, and then control the T1.1 switch to realize the switch characteristic test of T1.1;

[0102] Close SW0, open SW1, close SW2, open SW3, open SW4, close SW5, close SW6, and control T1.1, T3, T4, T4.1 to be closed and T1 to be always open, and then control the T2 switch to realize the switch characteristic test of T2;

[0103] Close SW0, close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, and control T1, T1.1, T2, T4.1 to be closed and T4 to be always open, and then control the T3 switch to realize the switch characteristic test of T3;

[0104] Close SW0, close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, and control T1, T1.1, T2, T4.1 to be closed and T3 to be always open, and then control the T4 switch to realize the switch characteristic test of T4;

[0105] Close SW0, close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, and control T1, T1.1, T2, T4 to be closed and T3 to be always open, and then control the T4.1 switch to realize the switch characteristic test of T4.1;

[0106] S2, reverse recovery test:

[0107] Close SW0, close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, and control T1, T1.1, T4.1 to be closed and T2, T4 to be always open, and then control the T3 switch to realize the reverse recovery characteristic test of D1;

[0108] Close SW0, close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, and control T1.1, T2, T4.1 to be closed and T1, T4 to be always open, and then control the T3 switch to realize the reverse recovery characteristic test of D2;

[0109] Close SW0, open SW1, close SW2, open SW3, open SW4, close SW5, close SW6, and control T1.1, T3, T4.1 to be closed and T2, T4 to be always open, and then control the T1 switch to realize the reverse recovery characteristic test of D3;

[0110] Close SW0, open SW1, close SW2, open SW3, open SW4, close SW5, close SW6, and then control T1.1, T3, T4, T4.1 to be closed and T2 to be always open, and then control the T1 switch to realize the reverse recovery characteristic test of D5 by controlling the T1 switch;

[0111] Close SW0, open SW1, close SW2, close SW3, open SW4, close SW5, open SW6, and then control T1.1, T3, T4, T4.1 to be closed and T2 to be always open, and then control the T1 switch to realize the reverse recovery characteristic test of D5 by controlling the T1 switch;

[0112] Close SW0, open SW1, close SW2, close SW3, open SW4, close SW5, open SW6, and then control T1.1, T3, T4, T4.1 to be closed and T2 to be always open, and then control the T1 switch to realize the reverse recovery characteristic test of D5 by controlling the T1 switch;

[0113] S3, short circuit test:

[0114] Close SW0, open SW1, close SW2, open SW3, close SW4, close SW5, close SW6, and then control T1.1, T3, T4, T4.1 to be closed and T2 to be always open, and then control the T1 switch to realize the short circuit characteristic test of T1 by controlling the T1 switch;

[0115] Close SW0, open SW1, close SW2, open SW3, close SW4, close SW5, close SW6, and then control T1.1, T3, T4, T4.1 to be closed and T2 to be always open, and then control the T1 switch to realize the short circuit characteristic test of T1 by controlling the T1 switch;

[0116] Close SW0, open SW1, close SW2, open SW3, close SW4, close SW5, close SW6, and then control T1.1, T3, T4, T4.1 to be closed and T2 to be always open, and then control the T1 switch to realize the short circuit characteristic test of T1 by controlling the T1 switch;

[0117] Close SW0, open SW1, close SW2, open SW3, close SW4, close SW5, close SW6, and then control T1.1, T3, T4, T4.1 to be closed and T2 to be always open, and then control the T1 switch to realize the short circuit characteristic test of T1 by controlling the T1 switch;

[0118] Close SW0, open SW1, close SW2, open SW3, close SW4, close SW5, close SW6, and then control T1.1, T3, T4, T4.1 to be closed and T2 to be always open, and then control the T1 switch to realize the short circuit characteristic test of T1 by controlling the T1 switch;

[0119] Close SW0, close SW1, open SW2, open SW3, close SW4, close SW5, close SW6, control T1, T1.1, T2, T4 to be closed, T3 to be always open, and control T4.1 switch to realize short circuit characteristic test of T4.1.

[0120] Although the specific embodiments of the present application are described above, those skilled in the art should understand that these are only examples, and various changes or modifications can be made to the embodiments without departing from the principles and essence of the present application, and the protection scope of the present application is only defined by the appended claims.

Claims

1. A dynamic testing circuit for a three-level power module, characterized in that, It includes an energy storage capacitor C1, a load inductor L1, four terminals for connecting a three-level power module, and five test switches. The four terminals are the positive terminal P, the middle terminal M, the negative terminal N, and the AC terminal AC. The five switches are SW1, SW2, SW3, SW4, and SW5. The positive and negative terminals of the energy storage capacitor C1 are connected in series via SW1 and SW2. The connection line between SW1 and SW2 includes a node A. Node A is connected to the intermediate terminal M via SW3, and node A is connected to the AC terminal AC via SW4. The load inductor L1 is connected in parallel with SW4. The positive terminal of the energy storage capacitor C1 is connected to the positive terminal P via SW5, and the negative terminal of the energy storage capacitor C1 is connected to the negative terminal N via SW6.

2. The three-level power module dynamic test circuit according to claim 1, characterized in that, A high-voltage power supply switch SW0 is connected in series in the connection line between the positive terminal of the energy storage capacitor C1 and the SW5.

3. The three-level power module dynamic test circuit according to claim 1, characterized in that, The energy storage capacitor C1 is 100-3000uH, and the load inductance L1 is 1-1000uH.

4. The three-level power module dynamic test circuit according to claim 1, characterized in that, The energy storage capacitor C1 is an electrolytic capacitor or a film capacitor.

5. The three-level power module dynamic test circuit according to claim 1, characterized in that, The load inductor L1 is an air-core inductor.

6. A test method for a three-level power module dynamic test circuit according to any one of claims 1-5, characterized in that, This three-level power module includes two diodes and five controllable switching devices. The four controllable switching devices are T1, T2, T3, and T4, and the two diodes are D5 and D6. The controllable switching devices are IGBTs or MOSFETs. The collector (C) of T1 is connected to the positive terminal P, the emitter (E) of T1 is connected to the collector (C) of T2, the emitter (E) of T2 is connected to the collector (C) of T3, and the emitter (E) of T3 is connected to the negative terminal N. The diodes connected to T1, T2, T3, and T4 are D1, D2, D3, and D4, respectively. The anodes of D5 and D6 are both connected to the middle terminal M. The cathode of D5 is connected to the emitter (E) of T1 and the collector (C) of T2. The cathode of D6 is connected to the emitter (E) of T3 and the collector (C) of T4. The AC terminal AC is connected to the emitter (E) of T2 and the collector (C) of T3. The method for performing dynamic performance testing on this three-level power module includes the following steps: S1. Switching characteristic test: Disconnect SW1, close SW2, disconnect SW3, disconnect SW4, close SW5, and close SW6. Then control T3 and T4 to close, and keep T2 normally open. By controlling switch T1, the switching characteristics of T1 can be tested. Disconnect SW1, close SW2, disconnect SW3, disconnect SW4, close SW5, and close SW6. Then control T3 and T4 to close, and keep T1 normally open. By controlling switch T2, the switching characteristics of T2 can be tested. Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T1 and T2 to close, and T4 to be normally open. By controlling switch T3, the switching characteristics of T3 can be tested. Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T1 and T2 to close, and T3 to be normally open. By controlling switch T4, the switching characteristics of T4 can be tested. S2, Reverse Recovery Test: Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T1 to close and T2 and T4 to be normally open. By controlling switch T3, the reverse recovery characteristics of D1 can be tested. Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T2 to close and T1 and T4 to be normally open. By controlling switch T3, the reverse recovery characteristics of D2 can be tested. With SW1 disconnected, SW2 closed, SW3 disconnected, SW4 disconnected, SW5 closed, and SW6 closed, T3 is then closed while T2 and T4 are normally open. By controlling switch T1, the reverse recovery characteristics of D3 can be tested. Disconnect SW1, close SW2, disconnect SW3, disconnect SW4, close SW5, and close SW6. Then control T4 to close and T2 and T3 to remain normally open. By controlling switch T1, the reverse recovery characteristics of D4 can be tested. With SW1 disconnected, SW2 closed, SW3 closed, SW4 disconnected, SW5 closed, and SW6 disconnected, T3 and T4 closed and T2 normally open are controlled. By controlling switch T1, the reverse recovery characteristics of D5 can be tested. Close SW1, open SW2, close SW3, open SW4, open SW5, close SW6, then control T1 and T2 to close and T3 to be normally open. By controlling switch T4, the reverse recovery characteristic of D6 can be tested. S3, Short Circuit Test: Disconnect SW1, close SW2, disconnect SW3, close SW4, close SW5, and close SW6. Then control T3 and T4 to close, and keep T2 normally open. By controlling switch T1, the short-circuit characteristics of T1 can be tested. Disconnect SW1, close SW2, disconnect SW3, close SW4, close SW5, and close SW6. Then control T3 and T4 to close, and keep T1 normally open. By controlling switch T2, the short-circuit characteristics of T2 can be tested. Close SW1, open SW2, open SW3, close SW4, close SW5, close SW6, then control T1 and T2 to close, and keep T4 normally open. By controlling switch T3, the short-circuit characteristics of T3 can be tested. Close SW1, open SW2, open SW3, close SW4, close SW5, close SW6, then control T1 and T2 to close, and keep T3 normally open. By controlling switch T4, the short-circuit characteristics of T3 can be tested.

7. A test method for a three-level power module dynamic test circuit according to any one of claims 1-5, characterized in that, This three-level power module includes two diodes and five controllable switching devices. The six controllable switching devices are designated T1, T2, T3, T4, T1.1, and T4.

1. The two diodes are designated D5 and D6. The controllable switching devices are either IGBTs or MOSFETs. The collector (C) of T1 is connected to the positive terminal P, the emitter (E) of T1 is connected to the collector (C) of T2, the emitter (E) of T2 is connected to the collector (C) of T3, and the emitter (E) of T3 is connected to the negative terminal N. The diodes connected to T1, T2, T3, and T4 are D1, D2, D3, and D4, respectively. The anodes of D5 and D6 are both connected to the middle terminal M. The cathode of D5 is connected to the emitter (E) of T1 and the collector (C) of T2. The cathode of D6 is connected to the emitter (E) of T3 and the collector (C) of T4. The AC terminal AC is connected to the emitter (E) of T2 and the collector (C) of T3. The collector (C) of T1.1 is connected to the collector (C) of T1, the emitter (E) of T1.1 is connected to the emitter (E) of T1, the collector (C) of T4.1 is connected to the collector (C) of T4, and the emitter (E) of T4.1 is connected to the emitter (E) of T4. The method for performing dynamic performance testing on this three-level power module includes the following steps: S1. Switching characteristic test: With SW1 disconnected, SW2 closed, SW3 disconnected, SW4 disconnected, SW5 closed, and SW6 closed, T1.1, T3, T4, and T4.1 are then closed, while T2 remains normally open. By controlling switch T1, the switching characteristics of T1 can be tested. With SW1 disconnected, SW2 closed, SW3 disconnected, SW4 disconnected, SW5 closed, and SW6 closed, T1, T3, T4, and T4.1 are then closed, while T2 remains normally open. By controlling switch T1.1, the switching characteristics of T1.1 can be tested. With SW1 disconnected, SW2 closed, SW3 disconnected, SW4 disconnected, SW5 closed, and SW6 closed, T1.1, T3, T4, and T4.1 are then closed, while T1 remains normally open. By controlling switch T2, the switching characteristics of T2 can be tested. Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T1, T1.1, T2, and T4.1 to close, and keep T4 normally open. By controlling switch T3, the switching characteristics of T3 can be tested. Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T1, T1.1, T2, and T4.1 to close, and keep T3 normally open. By controlling switch T4, the switching characteristics of T4 can be tested. Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T1, T1.1, T2, and T4 to close, and keep T3 normally open. By controlling switch T4.1, the switching characteristics of T4.1 can be tested. S2, Reverse Recovery Test: Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T1, T1.1, and T4.1 to close, and T2 and T4 to be normally open. By controlling switch T3, the reverse recovery characteristic of D1 can be tested. Close SW1, open SW2, open SW3, open SW4, close SW5, close SW6, then control T1.1, T2, and T4.1 to close, and T1 and T4 to remain normally open. By controlling switch T3, the reverse recovery characteristics of D2 can be tested. With SW1 disconnected, SW2 closed, SW3 disconnected, SW4 disconnected, SW5 closed, and SW6 closed, T1.1, T3, and T4.1 are closed, while T2 and T4 are normally open. By controlling switch T1, the reverse recovery characteristics of D3 can be tested. With SW1 disconnected, SW2 closed, SW3 disconnected, SW4 disconnected, SW5 closed, and SW6 closed, T1.1, T4, and T4.1 closed, and T2 and T3 normally open, the reverse recovery characteristic of D4 can be tested by controlling switch T1. With SW1 disconnected, SW2 closed, SW3 closed, SW4 disconnected, SW5 closed, and SW6 disconnected, and then T1.1, T3, T4, and T4.1 closed, and T2 normally open, the reverse recovery characteristic of D5 can be tested by controlling switch T1. Close SW1, open SW2, close SW3, open SW4, open SW5, close SW6, then control T1.1, T1, T2, T4.1 to close and T3 to be normally open. By controlling switch T4, the reverse recovery characteristic of D6 can be tested. S3, Short Circuit Test: With SW1 disconnected, SW2 closed, SW3 disconnected, SW4 closed, SW5 closed, and SW6 closed, T1.1, T3, T4, and T4.1 closed, and T2 normally open, the short-circuit characteristics of T1 can be tested by controlling switch T1. With SW1 disconnected, SW2 closed, SW3 disconnected, SW4 closed, SW5 closed, and SW6 closed, T1, T3, T4, and T4.1 are then closed, while T2 remains normally open. By controlling switch T1.1, the short-circuit characteristics of T1.1 can be tested. With SW1 disconnected, SW2 closed, SW3 disconnected, SW4 closed, SW5 closed, and SW6 closed, T3, T4, and T4.1 are then controlled to close, while T1 and T1.1 are normally open. By controlling switch T2 on the control board, the short-circuit characteristics of T2 can be tested. Close SW1, open SW2, open SW3, close SW4, close SW5, close SW6, then control T1, T1.1, and T2 to close, and T4 and T4.1 to be normally open. By controlling switch T3, the short-circuit characteristic of T3 can be tested. Close SW1, open SW2, open SW3, close SW4, close SW5, close SW6, then control T1, T1.1, T2, and T4.1 to close, and keep T3 normally open. By controlling switch T4, the short-circuit characteristics of T4 can be tested. Close SW1, open SW2, open SW3, close SW4, close SW5, close SW6, then control T1, T1.1, T2, and T4 to close, and keep T3 normally open. By controlling switch T4.1, the short-circuit characteristic of T4.1 can be tested.

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