Gamma voltage generator, source driver and display device

Abstract

Gamma voltage generators, source drivers, and display devices are provided. A gamma voltage generator includes a gamma voltage generation circuit having a plurality of voltage input terminals and a plurality of voltage output terminals that output a predetermined number of gamma voltages based on input voltages from the plurality of voltage input terminals, and a plurality of buffers, an input of each buffer receiving a corresponding gamma reference voltage and an output of each buffer connected to a corresponding voltage input terminal, wherein the gamma voltage generation circuit includes a plurality of resistor units in series, and a connection node of adjacent resistor units is connected as or to one voltage output terminal, each resistor unit configured to have a second resistance value when operating in a second mode that is less than a first resistance value when operating in a first mode.

Description

[0001] This application claims priority and benefit to U.S. Provisional Application No. 63 / 325,152, filed March 30, 2022, which is incorporated herein by reference for all purposes as if fully set forth herein. Technical Field

[0002] This application relates generally to the field of display technology, and more specifically to gamma voltage generators, source drivers including gamma voltage generators, and display devices. Background Technology

[0003] The display device includes a display panel and a driver. The display panel includes scan lines, data lines, and pixels. The driver may include a gate driver and a source driver. Each pixel can emit light with a brightness corresponding to a data voltage provided through a corresponding data line in response to a gate signal provided through a corresponding gate line. A gamma voltage generator in the source driver (e.g., included in the source driver integrated circuit IC) can generate multiple gamma voltages corresponding to multiple grayscale values ​​based on a gamma reference voltage, and can use the individual gamma voltages to convert the grayscale values ​​of the display data into data voltages, so that each pixel is displayed based on the corresponding data voltage.

[0004] Therefore, quickly establishing and stabilizing the individual gamma voltages used to generate the data voltage is crucial for ensuring display quality. Summary of the Invention

[0005] According to one aspect of this application, a gamma voltage generator is provided, connected to the gamma voltage generator and used to output a predetermined number of gamma voltages, wherein each channel circuit selects at least one gamma voltage to generate a corresponding data voltage based on input display data, wherein the gamma voltage generator includes: a gamma voltage generation circuit having a plurality of first voltage input terminals, a plurality of second voltage input terminals, and a plurality of voltage output terminals; a plurality of basic buffers, each basic buffer receiving a corresponding gamma reference voltage at its input terminal and having its output terminal connected to a corresponding first voltage input terminal; and a plurality of dynamic buffers, each dynamic buffer receiving a corresponding gamma reference voltage at its input terminal and having its output terminal connected to a corresponding second voltage input terminal, and configured to operate in a first mode or a second mode, wherein each dynamic buffer does not output a buffer voltage in the first mode and outputs a buffer voltage to the connected second voltage input terminal in the second mode, wherein at least a portion of the plurality of dynamic buffers switches from the first mode to the second mode based on updates or changes to the display data.

[0006] According to another aspect of this application, a gamma voltage generator is also provided, comprising: a gamma voltage generating circuit having a plurality of voltage input terminals and a plurality of voltage output terminals, the plurality of voltage output terminals outputting a predetermined number of gamma voltages based on input voltages from the plurality of voltage input terminals; and a plurality of buffers electrically connected to the plurality of voltage input terminals, wherein the gamma voltage generating circuit includes a plurality of resistor units connected in series, and the connection node of adjacent resistor units is connected to a voltage output terminal, and each resistor unit is configured such that a second resistance value when operating in a second mode is less than a first resistance value when operating in a first mode.

[0007] According to another aspect of this application, a source driver is also provided, comprising: a gamma voltage generator as described above; and a plurality of channel circuits connected to the gamma voltage generator for generating respective data voltages corresponding to input display data using the gamma voltage output by the gamma voltage generator.

[0008] According to another aspect of this application, a display device is also provided, comprising: a display panel; and a source driver as described above for driving the display panel.

[0009] The gamma voltage generator according to embodiments of this application, by introducing a dynamic buffer and / or a variable resistor unit, can reduce the offset of the generated gamma voltage relative to the desired gamma voltage when it is necessary to re-establish and stabilize the gamma voltage (e.g., when display data is updated or changed), and improve the driving capability of the gamma voltage output by the gamma voltage generation circuit, while accelerating the process of establishing and stabilizing the gamma voltage, thereby ensuring display quality. Furthermore, by changing the operating mode of the dynamic buffer only when display data changes, total power consumption can be saved. Moreover, in the case where multiple source driver circuits drive the same display panel, using the gamma voltage generator of embodiments of this application for all source driver circuits can reduce color difference and thus improve display quality. Attached Figure Description

[0010] The accompanying drawings are included to provide a further understanding of this disclosure, and are incorporated in and form a part of this specification. The drawings illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the disclosure.

[0011] Figure 1A-1B A schematic block diagram of a display device according to an embodiment of the present disclosure is shown.

[0012] Figure 2 Is included Figure 1A-1B An exemplary block diagram of a source driver in a display device.

[0013] Figures 3A-3B Is included Figure 2 An exemplary circuit diagram of a gamma voltage generator in a source driver.

[0014] Figure 4 This is an exemplary circuit diagram of a gamma voltage generator according to an embodiment of this application.

[0015] Figure 5 A timing diagram of mode switching based on changes in display data, according to an embodiment of this application, is shown.

[0016] Figure 6 A timing diagram of mode switching based on updated display data according to an embodiment of this application is shown.

[0017] Figure 7 Another mode switching timing diagram based on the update of display data according to an embodiment of this application is shown.

[0018] Figure 8-11 An example structure of a dynamic buffer according to an embodiment of this application is shown.

[0019] Figure 12A A schematic diagram of another gamma voltage generator according to an embodiment of this application is shown.

[0020] Figure 12B An example circuit structure for a resistor unit is shown.

[0021] Figure 13 A schematic diagram of another gamma voltage generator according to an embodiment of this application is shown.

[0022] Figure 14-15 A schematic diagram of a source driver including two source driver circuits according to an embodiment of this application is shown. Detailed Implementation

[0023] It should be understood that other embodiments may be utilized and structural changes may be made without departing from the scope of this disclosure. Furthermore, it should be understood that the wording and terminology used herein are for descriptive purposes and should not be considered limiting. The use of “comprising,” “including,” or “having,” and variations thereof, is intended to cover the items listed thereafter and their equivalents, as well as additional items. Unless otherwise limited, the term “connection” and its variations herein are used broadly and cover both direct and indirect connections, and may include electrical or physical connections.

[0024] Figure 1A-1B A schematic block diagram of a display device according to an embodiment of the present disclosure is shown. (Refer to...) Figure 1AThe display device 10 according to an exemplary embodiment of the present invention may include a display driving device 20 and a display panel 30. In some embodiments of the present disclosure, the display panel 30 may be a liquid crystal display (LCD) panel or an organic light-emitting diode (OLED) panel, but the display panel 30 is not limited to any specific type of display panel.

[0025] like Figure 1B As shown, the display driving device 20 may include: a gate driver 21 and a source driver 22 for inputting display data received from an external processor, etc., to the display panel 30; and a timing controller 23 for controlling the gate driver and the source driver. The timing controller 23 can control the gate driver and the source driver according to a vertical synchronization signal and a horizontal synchronization signal. The display panel 30 may include a plurality of pixels PX arranged along a plurality of gate lines G1 to Gm and a plurality of data lines S1 to Sn.

[0026] Display device 10 can display images in frames. The time required to display one frame is called the vertical period, and the vertical period can be determined by the frame rate of display device 10. During one vertical period, gate driver 21 can sequentially scan multiple gate lines G1 to Gm. The time for gate driver 21 to scan each of the multiple gate lines G1 to Gm is called the horizontal period. During one horizontal period (the pulse interval between two horizontal synchronization signals (Hsync), source driver 22 can input data voltage to pixels PX on each data line S1 to Sn. The data voltage can be the voltage output by source driver 22 based on display data, and the brightness of each pixel PX can be determined by its corresponding data voltage.

[0027] The processor used to send display data to the display driver 20 may be an application processor (AP) in the case of a mobile device, or a central processing unit (CPU) or system-on-a-chip (SoC) in the case of a desktop computer, laptop computer, television, etc. Specifically, a processor can be understood as a processing device with arithmetic functions. The processor can generate display data to be displayed by the display device 10, or receive display data from memory, communication modules, etc., and send the display data to the display driver 20.

[0028] Figure 2 Is included Figure 1A-1B An exemplary block diagram of a source driver in a display device.

[0029] Reference Figure 2The source driver 22 may include a gamma voltage generator 201 and multiple channel circuits CH. Each channel circuit CH includes a shift register 210, a latch circuit 220, a digital-to-analog converter DAC 230, a source buffer BF 240, etc. Each component included in the source driver 22 is not limited to... Figure 2 The embodiments shown are subject to various modifications in other embodiments.

[0030] Gamma voltage generator 201 generates multiple gamma voltages VG and provides these multiple gamma voltages VG to each channel circuit CH. The number of gamma voltages VG can be determined based on the number of bits in the displayed data. For example, when the displayed data is 8 bits, the number of gamma voltages VG can be 256 or less, and when the displayed data is 10 bits, the number of gamma voltages VG can be 1024 or less. In other words, when the displayed data has n bits, the number of gamma voltages VG can have a maximum of 2... n Several different voltage values. It should be understood that the specific values ​​of the multiple gamma voltages VG can be selected according to the actual situation.

[0031] After the shift register 210 receives the corresponding display data RGB and fetches it according to the timing sequence, the latch circuit 220 can sample and hold the display data according to the shift order of the shift register 210. The latch circuit 220 can output the latched display data RGB to the digital-to-analog converter DAC 230.

[0032] The digital-to-analog converter (DAC) 230 in each channel circuit CH can generate a data voltage Vdata from multiple gamma voltages VG. The DAC 230 can select at least one of the multiple gamma voltages VG in response to latched display data RGB from a latching circuit, and can output the selected voltage as the data voltage Vdata. The DAC 230 may include multiple switching elements for selecting at least one of the multiple gamma voltages. For example, the DAC 230 can output the data voltage Vdata corresponding to a grayscale value by using a separate lookup table defining the relationship between grayscale values ​​and multiple gamma voltages, or by performing logical processing on the grayscale values. For example, the data voltage Vdata may have 256 voltage levels corresponding to 8-bit grayscale values. The data voltage Vdata corresponding to each grayscale value may lie on a gamma curve. More specifically, the DAC 230 can output the data voltage Vdata corresponding to a gamma curve by linear logical processing of multiple gamma voltages. Alternatively, in some cases, the data voltage can be generated based on two or more selected gamma voltages.

[0033] The source buffer 240 in each channel circuit CH can be connected to a corresponding data line provided in the display panel. The source buffer 240 can receive and amplify the data voltage Vdata from the digital-to-analog converter DAC 230, and can apply the amplified data voltage Vdata to the corresponding data line. The data voltage Vdata mentioned below refers to the amplified data voltage Vdata.

[0034] Figure 3A Is included Figure 2 An exemplary circuit diagram of a gamma voltage generator in source driver 22. The source driver may include a source driver circuit, such as an integrated circuit (IC).

[0035] like Figure 3A As shown, the source driver's gamma voltage generator 201 includes multiple buffers 311 and a gamma voltage generation circuit 312, and the source driver 22 may also include a gamma reference voltage circuit 310. The gamma reference voltage circuit 310 may be internal or external to the gamma voltage generator 201.

[0036] The gamma reference voltage circuit 310 provides multiple gamma reference voltages for generating gamma voltages. Each buffer receives one gamma reference voltage at its input and outputs a buffered voltage to the gamma voltage generation circuit 312. The gamma voltage generation circuit 312 generates multiple gamma voltages based on the multiple buffered voltages output by the multiple buffers. Each buffer can be implemented using an operational amplifier (OP), for example, with one input of the operational amplifier connected to its output and the other input connected to the gamma reference voltage circuit 310 to receive the corresponding gamma reference voltage.

[0037] As an example, the gamma reference voltage circuit 310 can take the form of a resistor string (which can be called a source resistor string) consisting of multiple resistors connected in series, to divide the input voltage input to the two ends of the resistor string to obtain the multiple gamma reference voltages. Similarly, the gamma voltage generation circuit 312 can also take the form of a resistor string (which can be called a gamma resistor string), to divide the input voltage input to the two ends of the resistor string to generate multiple gamma voltages. Multiple buffer voltages output by multiple buffers are respectively provided to partial connection nodes between adjacent resistors of the gamma resistor string, and at least some connection nodes of the gamma resistor string can be connected to or serve as output terminals (also called output nodes or nodes, etc., for connection) of the gamma voltage generation circuit 312. It should be noted that one resistor symbol shown in the figure can represent multiple resistors.

[0038] As mentioned earlier, quickly establishing and stabilizing each gamma voltage is crucial for ensuring display quality, thus requiring appropriate solutions. For example, in high frame rate display operations, the display time allocated to each frame is relatively short, therefore, the requirement for gamma voltage establishment time is high, and stable gamma voltages also facilitate the generation of accurate data voltages.

[0039] Furthermore, as display panel sizes increase, it may be necessary to use two or more source driver circuits (e.g., source driver integrated circuits, ICs) to drive the same display panel. However, due to limitations in manufacturing and design processes, the gamma voltages generated by the gamma voltage generators included in the two or more source driver circuits driving the same display panel may differ, potentially causing non-uniformity in the display panel's display. For example, there may be significant color differences between display areas controlled by different source driver circuits.

[0040] In response, Figure 3B The diagram illustrates an example where two source driver circuits (e.g., each source driver circuit can be integrated into a single IC) are included in the source driver, allowing these two source driver circuits to drive the same display panel together. Of course, a source driver can include more than two source driver circuits.

[0041] like Figure 3B As shown, the first source driver circuit 31 (IC1) and the second source driver circuit 32 (IC2) have the same circuit structure, and their respective gamma voltage generators 201 include multiple buffers (311; 321) and gamma voltage generation circuits (312; 322). Each source driver circuit (31; 32) may also include a gamma reference voltage circuit (310; 320), such as a source resistor string, for providing the required gamma reference voltage to the gamma voltage generator 201, respectively.

[0042] At least one power transmission terminal P of the first source driver circuit 31 (IC1) is electrically connected to at least one corresponding power transmission terminal P' of the second source driver circuit 32 (IC2) to form an electrical connection between the source driver circuit 31 (IC1) and the source driver circuit 32 (IC2). The number of electrical connections between the power transmission terminals of the first source driver circuit 31 (IC1) and the second source driver circuit 32 (IC2) is determined according to design requirements, and this disclosure is not limited to a specific number.

[0043] According to an embodiment of this disclosure, the first source driver circuit 31 (IC1) serves as the master circuit, and the second source driver circuit 32 (IC2) serves as the slave circuit. All buffers in the second source driver circuit 32 (IC2) may be turned off, or, depending on the circuit structure (e.g., the connection method of the source resistor string and the gamma resistor string), all buffers except the buffer that provides the maximum gamma reference voltage and the minimum gamma reference voltage (which are the same as the maximum gamma reference voltage and the minimum gamma reference voltage in the first source driver) may be turned off. In this case, the at least one power transmission terminal P included in the first source driver circuit 31 (IC1) can provide a buffered voltage output from the output terminal of at least one buffer inside the first source driver circuit 31 (IC1) to the at least one power transmission terminal P', which is the input terminal of the second source driver circuit 32 (IC2), via the electrical connection between the power transmission terminals of the first source driver circuit 31 (IC1) and the second source driver circuit 32 (IC2), so as to provide these buffered voltages to the gamma voltage generator inside the second source driver circuit 32 (IC2); and vice versa.

[0044] like Figure 3B As shown, gray indicates a deactivated buffer, and white indicates a activated buffer. In the second source driver circuit 32, only the top and bottom two buffers are enabled, while the others are deactivated. Thus, through the electrical connection between the power transmission terminals of the two source driver circuits, multiple buffer voltages from the multiple buffers in the first source driver circuit are also provided to the gamma voltage generation circuit of the second source driver circuit (or more source driver circuits, if any). Therefore, this method can reduce the voltage difference between the gamma reference voltages used by the two source driver circuits and the voltage difference between the generated gamma voltages, because the second source driver circuit can use the same multiple buffer voltages, maximum gamma reference voltage, and minimum gamma reference voltage as the first source driver circuit to generate multiple gamma voltages. This can improve display uniformity to some extent when two or more source driver integrated circuits (ICs) drive the same display panel, thereby improving the display effect.

[0045] Because in Figures 3A-3BIn a gamma voltage generator, multiple buffered voltages from multiple buffers are used to establish and stabilize the gamma voltage at some output endpoints of the gamma resistor string. Since the gamma voltage at these output endpoints is provided by the buffered voltages from these buffers, when dividing the input voltage across the gamma resistor string, the voltage at each voltage divider node can be obtained quickly. This allows for the rapid establishment and stabilization of the gamma voltage at all output endpoints, improving the driving capability of the generated gamma voltage. However, the number of gamma voltages required to be generated is generally large, such as 256, 512, or 1024, depending on the number of grayscale bits, while the number of buffers is much smaller (because buffer mismatches can also lead to gamma voltage errors, so too many buffers will result in large gamma voltage errors). Therefore, the establishment and stabilization time of the gamma voltage is still relatively long, which may no longer meet current requirements, especially under high frame rate display operations. Furthermore, even... Figure 3B In the process, the voltage difference between the gamma reference voltages used by the two source driver circuits and the voltage difference between the generated gamma voltages can be reduced. However, due to the parasitic resistance of the wires connected between the power transmission terminals of the two source driver circuits, the transmission of voltage signals takes time. Therefore, the setup and stabilization time of the gamma voltage in the circuit is slower than that of the main circuit. This may also lead to color difference problems in the displayed image, especially under high frame rate display operations where the setup and stabilization time requirements are more stringent.

[0046] Therefore, a gamma voltage generator capable of rapidly establishing and stabilizing gamma voltage is needed to ensure the display effect of the display panel. Furthermore, it is desirable that such a gamma voltage generator can guarantee a uniform display effect even when two or more source driver circuits (corresponding to two or more gamma voltage generators) drive the same display panel.

[0047] Figure 4 A schematic diagram of a gamma voltage generator according to an embodiment of this application is shown.

[0048] like Figure 4 As shown, the gamma voltage generator 400 includes a gamma voltage generation circuit 410, multiple basic buffers (420-IN1 / IN2, 420-1, 420-2, ..., 420-N1, hereinafter collectively referred to as 420) and multiple dynamic buffers (430-1, 430-2, ..., 430-N2, hereinafter collectively referred to as 430). This gamma voltage generator 400 can be included in a source driver circuit (IC), such as... Figure 3B In IC1 or IC2 shown.

[0049] The gamma voltage generation circuit 410 has multiple first voltage input terminals IN1, multiple second voltage input terminals IN2, and multiple voltage output terminals O. These multiple voltage output terminals are used to output a predetermined number of gamma voltages. Optionally, the gamma voltage generation circuit 410 can be a gamma resistor string composed of multiple resistors connected in series. Each connection node between the resistors in the gamma resistor string can serve as or be connected to a voltage output terminal. Furthermore, each of the multiple first voltage input terminals IN1 and the multiple second voltage input terminals IN2 can be connected to a corresponding voltage output terminal O, thereby outputting a buffered voltage from the corresponding voltage output terminal O (and each buffered voltage can serve as a gamma voltage). Figure 4 For illustrative purposes, the plurality of first voltage input terminals IN1 and the plurality of second voltage input terminals IN2 are shown separately from their corresponding voltage output terminals O. However, it should be understood that each voltage input terminal and its corresponding voltage output terminal can be the same terminal, for example, a connection node between adjacent resistors in a gamma resistor string. Furthermore, Figure 4 The resistor symbol shown between a pair of adjacent voltage input terminals is merely for illustration; it may actually include multiple resistors (e.g., in series) and is not limited to the number shown, to output a gamma voltage at the respective connection nodes of the multiple resistors (connected to or serving as multiple voltage output terminals).

[0050] Each basic buffer 420 receives a corresponding gamma reference voltage at its input (e.g., connected to a corresponding output node of a gamma reference voltage circuit), and its output is connected to a corresponding first voltage input endpoint among the plurality of first voltage input endpoints; and each dynamic buffer 430 receives a corresponding gamma reference voltage at its input (e.g., connected to a corresponding output node of a gamma reference voltage circuit), and its output is connected to a corresponding second voltage input endpoint among the plurality of second voltage input endpoints, and is configured to operate in either a first mode or a second mode. In the first mode, each dynamic buffer does not output a buffered voltage, and in the second mode, it outputs a buffered voltage to the connected second voltage input endpoint.

[0051] For example, regarding dynamic buffer 430-1, in the first mode, dynamic buffer 430-1 is turned off, and the voltage at its input terminal is not output to the output terminal. Therefore, its output terminal does not provide a buffered voltage to the connected second voltage input terminal IN2. In the second mode, dynamic buffer 430-1 is turned on, and the voltage at its input terminal is output to the output terminal. Therefore, its output terminal provides a buffered voltage to the connected second voltage input terminal IN2. Other dynamic buffers also operate synchronously with dynamic buffer 430-1, so in the first mode, the dynamic buffers can be considered as not working.

[0052] Thus, when the gamma voltage generator 400 is not connected to other gamma voltage generators, or when the gamma voltage generator 400 needs to output buffered voltages to other gamma voltage generators (as a master circuit in the case of two or more source driver circuits described later), the gamma voltage generator 400 can output multiple gamma voltages VGM at multiple voltage output terminals O based on the buffered voltages of multiple basic buffers and optionally multiple dynamic buffers. Furthermore, when the gamma voltage generator 400 is connected to other gamma voltage generators but does not need to output buffered voltages to other gamma voltage generators (as a slave circuit in the case of two or more source driver circuits described later), the multiple basic buffers are not enabled, or only the two basic buffers providing the maximum and minimum gamma reference voltages can be enabled.

[0053] For example, the first mode is a standby mode, and the second mode is a boost mode. The boost mode is applicable to the period before the predetermined number of gamma voltages generated stabilizes (i.e., multiple buffer voltages are needed to establish and stabilize the multiple gamma voltages at the output terminals of the gamma voltage generator), and the standby mode is applicable to the period after the predetermined number of gamma voltages generated stabilizes.

[0054] Therefore, based on Figure 4 The gamma voltage generator 400 shown can enable multiple dynamic buffers to operate in a second mode when it is necessary to establish and stabilize the gamma voltage, so that multiple basic buffers and multiple dynamic buffers provide buffer voltage to the gamma voltage generation circuit 410, thereby improving the speed of gamma voltage establishment and stabilization. After the gamma voltage is established and stabilized, the multiple dynamic buffers are then enabled to operate in the first mode to avoid introducing unwanted gamma voltage errors due to excessive buffers.

[0055] Furthermore, in some embodiments, when it is necessary to establish and stabilize the gamma voltage, only a portion of the multiple dynamic buffers may operate in the second mode, rather than all dynamic buffers operating in the second mode. For example, in one embodiment, for a specific image mode, only the dynamic buffer that outputs a lower gamma voltage is enabled. Additionally, although in Figure 4The diagram illustrates an alternating arrangement of dynamic and basic buffers, but this is merely exemplary. No dynamic buffer may be placed between any two basic buffers, or one or more dynamic buffers may be placed such that at least one second voltage input endpoint exists between each pair of adjacent first voltage input endpoints of the plurality of first voltage input endpoints of the gamma voltage generation circuit, or no second voltage input endpoint exists. The deployment of the dynamic buffers and the number of dynamic buffers required to operate in the second mode can be determined appropriately according to system requirements.

[0056] For reference Figure 2 The described gamma voltage generator is connected to multiple channel circuits. Each channel circuit selects at least one gamma voltage from multiple gamma voltages output by the gamma voltage generator to generate a data voltage based on the display data (called pixel data) currently applied to that channel circuit for a particular pixel. Each channel circuit is used to provide data voltages sequentially to a column of pixels on a data line in row-scan order. For example, for writing data to the first row of pixels, multiple channel circuits need to output Vdata1, Vdata2, ... to their respective data lines. Thus, for example, to generate Vdata1, the first channel circuit needs to select at least one gamma voltage based on the display data (e.g., grayscale value or data code, also called pixel data) for the first row, first column pixel (pixel PX(1,1)), thereby obtaining the corresponding data voltage Vdata1; to generate Vdata2, the second channel circuit needs to select at least one gamma voltage based on the display data (pixel data) for the first row, second column pixel (pixel PX(1,2)), thereby obtaining the corresponding data voltage Vdata2. The operation of the other channel circuits for the first row of pixels is similar. The operation of multiple channel circuits is similar when writing data to pixels in other rows.

[0057] Therefore, in the context of this application, the updating or changing of display data can refer to the updating or changing of pixel data loaded into one or more channel circuits. For example, after the scan cycle of the current row of pixels ends, display data for the next row of pixels is loaded into the plurality of channel circuits to output a plurality of data voltages (the number being the same as the number of channel circuits) to the next row of pixels on the panel. For each channel circuit, the display data (i.e., pixel data) loaded into that channel circuit for pixels is updated (the value of the pixel data may also change). That is, updating the display data can refer to switching between two pixel data for two adjacent pixels in the same column loaded into any channel circuit, regardless of whether the two pixel data have changed; and changing the display data can refer to switching between two pixel data for two adjacent pixels in the same column loaded into any channel circuit, and the two pixel data have changed, for example, the two grayscale values ​​corresponding to the two pixel data have changed.

[0058] During display, if the displayed data changes, the data voltage output by one or more channel circuits will change. Since multiple channel circuits are connected to the voltage output terminals of the gamma voltage generator, the multiple gamma voltages output by the gamma voltage generator will be affected by the change in data voltage. For example, the channel circuits need to draw current from the gamma resistor string that generates these multiple gamma voltages, so these multiple gamma voltages will be disturbed. However, if the displayed data is updated but does not change, the multiple gamma voltages output by the gamma voltage generator may not be affected.

[0059] In other words, when the display data changes—that is, when the pixel data applied to any channel circuit changes (causing a change in data voltage, thus interfering with the multiple gamma voltages)—it is necessary to quickly re-establish and stabilize the multiple gamma voltages output by the gamma voltage generator. Therefore, for Figure 4 The gamma voltage generator shown can, when the displayed data changes, cause at least a portion of a plurality of dynamic buffers to operate in a second mode, so that the at least a portion of the plurality of dynamic buffers can also provide a buffered voltage to the gamma voltage generation circuit 410. This can be combined with the buffered voltage output by a plurality of basic buffers (including those within the same gamma voltage generator or other gamma voltage generators), thereby improving the speed at which the plurality of gamma voltages output by the gamma voltage generator are established and stabilized. After the plurality of gamma voltages are established and stabilized (for example, after a predetermined period of time, which can be determined according to the structure of the gamma voltage generation circuit and empirical values, as long as the plurality of gamma voltages are allowed to be established and stabilized), the at least a portion of the plurality of dynamic buffers is returned to the first mode operation to avoid excessive buffers introducing unwanted gamma voltage errors.

[0060] Figure 5 A timing diagram of mode switching based on changes in displayed data is shown.

[0061] like Figure 5 As shown, if the updated display data (e.g., pixel data) is the same as the value of its previous display data, for example, the display data D2 for the pixel in the first column of the i-th row (i is an integer greater than or equal to 1) (pixel PX(i,1)) is the same as the display data D3 for the pixel in the first column of the (i+1)-th row (pixel PX(i+1,1)), that is, the display data has not changed, then the multiple dynamic buffers can remain in the first mode (i.e., no buffer voltage is output) instead of switching from the first mode to the second mode.

[0062] For example, this implementation is very advantageous for Always-On Display (AOD) mode, in which only a small portion of the screen displays the AOD image. The pixels in the remaining areas where no image is displayed can be considered as having no change between the two display data for two adjacent pixels in the same column of that area when data is written. Therefore, the multiple dynamic buffers can remain in operation in the first mode during the scan cycle corresponding to these pixels in that area, which can save total power consumption.

[0063] Therefore, the dynamic buffer can operate in the second mode to output a buffer voltage only when the displayed data changes, which saves total power consumption because the dynamic buffer operates in the first mode and does not output a buffer voltage when the displayed data does not change (e.g., a large area of ​​black image).

[0064] Furthermore, in some cases, even if the displayed data changes, the multiple gamma voltages output by the gamma voltage generator may be minimally affected, and it may not be necessary to re-establish and stabilize these multiple gamma voltages. In these cases, the need for multiple dynamic buffers to operate in the second mode can be determined based on the difference between the actual and expected values ​​of some gamma voltages. For example, since the gamma reference voltage circuit can provide accurate voltage values ​​(expected values) at the inputs of the multiple buffers, at least some of the multiple dynamic buffers can be configured to switch to the second mode in response to a difference between the voltage at the input of any one dynamic buffer and the voltage at the connected second voltage input terminal IN2 (which is also an actual gamma voltage output at a voltage output node), and switch to the first mode after a predetermined period of time, or in response to a difference between the voltage at the inputs of the multiple dynamic buffers and the voltage at the second voltage input terminal IN2.

[0065] Furthermore, in other embodiments, to more easily control the mode switching of multiple dynamic buffers, the multiple dynamic buffers can switch from a first mode to a second mode based on updates to the display data. That is, the multiple dynamic buffers (or a portion thereof) can switch modes whenever the display data is updated, even if it hasn't changed. The update of the display data is synchronized with the shift of the horizontal synchronization signal (Hsync) or the scan signal; that is, the update period of the display data is the same as the scan period.

[0066] Figure 6 A timing diagram of mode switching based on updated display data according to an embodiment of this application is shown.

[0067] like Figure 6 As shown, the switch from the first mode (standby mode) to the second mode (trigger mode) is synchronized with the update of the display data. That is, when the display data is updated, for example, from display data D1 to display data D2, or from display data D2 to display data D3, or from display data D3 to display data D4, multiple dynamic buffers can enter the second mode, and then exit the second mode and enter the first mode after a period of time. This period of time can have a predetermined duration, which is configured to allow multiple gamma voltages output by the gamma voltage generation circuit to be established and stabilized in the second mode.

[0068] In this case, since the update of the display data is synchronized with the shift of the horizontal synchronization signal (Hsync) or the scan signal, the mode switching of the multiple dynamic buffers can be controlled according to the horizontal synchronization signal (Hsync) or the scan signal.

[0069] Figure 7 Another mode switching timing diagram based on the update of display data according to an embodiment of this application is shown.

[0070] In this embodiment, the switch from the first mode (standby mode) to the second mode (trigger mode) is completed before the update of the display data, in order to establish and stabilize the required multiple gamma voltages in advance. It should be noted that since updating the display data may involve changes in the value of the display data, which will cause a data voltage transition, and this data voltage transition has a significant impact on the multiple gamma voltages, the predetermined duration of the second mode preferably overlaps with the time for the data voltage transition corresponding to the update or change of the display data; that is, the predetermined duration of the second mode lasts at least until the data voltage transition time is completed.

[0071] exist Figure 7In the illustrated embodiment, the system switches from the first mode to the second mode at a predetermined time point before the displayed data update. Because the source driver handles the timing of the displayed data update, the mode switching can be well controlled, and the duration of the second mode can be fixed, or it can be controlled based on whether the data voltage conversion is complete (the duration of the second mode is not fixed). For example, as described above, the completion of the data voltage conversion can be determined by detecting the voltage difference between the input and output terminals of the dynamic buffer, because after the data voltage conversion is complete, the gamma voltage will be minimally affected, i.e., the detected voltage difference will be small.

[0072] The following combination Figure 8-11 Several example structures for dynamic buffers are introduced.

[0073] In some implementations, each dynamic buffer includes a buffer and a switching module, and the components of the same dynamic buffer can be considered to correspond to each other. Each switching module is configured to disable the corresponding buffer output buffer voltage in a first mode and enable the corresponding buffer output buffer voltage in a second mode.

[0074] Optionally, the dynamic buffer may include a buffer with the same structure as a general buffer or a basic buffer, such as being composed of an operational amplifier, but is not limited thereto.

[0075] exist Figure 8 In this configuration, each switching module includes a switch SW, and the first terminal of the switch SW is connected to the output terminal of the corresponding operational amplifier (OP), and the second terminal is connected to the corresponding second voltage input terminal connected to the output terminal of the dynamic buffer including the operational amplifier. The switch SW is turned off in the first mode so that the dynamic buffer does not output a buffer voltage, and is turned on in the second mode so that the dynamic buffer outputs a buffer voltage.

[0076] exist Figure 9In this configuration, each switching module includes a first switch SW1, a second switch SW2, and a third switch SW3. The first terminal of the first switch SW1 is connected to the output of the corresponding operational amplifier, and the second terminal is connected to the corresponding second voltage input terminal of the corresponding dynamic buffer that includes the operational amplifier. The first terminals of the second switch SW2 and the third switch SW3 are both connected to one input terminal of the corresponding operational amplifier. The second terminal of the second switch SW2 is connected to the output of the corresponding operational amplifier, and the second terminal of the third switch SW3 is connected to the corresponding second voltage input terminal (the other input terminal of the corresponding operational amplifier is used to receive a gamma reference voltage). In the first mode, both the first switch SW1 and the third switch SW3 are simultaneously turned off, so the dynamic buffer does not output a buffered voltage (the second switch SW2 can be either turned on or off). In the second mode, both the first switch SW1 and the third switch SW3 are simultaneously turned on, and the second switch SW2 is turned off, so the dynamic buffer outputs a buffered voltage. In this implementation, the feedback control of the dynamic buffer (formed by the connection loop between the input and output terminals of the operational amplifier) ​​is unaffected by the parasitic resistance of the switch SW1 connected between the output terminal of the operational amplifier and the gamma voltage generation circuit, thereby allowing the gamma voltage to be established and stabilized more accurately and quickly.

[0077] exist Figure 10 In this configuration, each dynamic buffer includes a buffer that switches between enabled and disabled states based on an enable signal, thereby switching the dynamic buffer between a first mode and a second mode. For example, an operational amplifier can be enabled or disabled in response to an enable signal EN from, for example, a controller, MCU, microprocessor, etc. within an IC, so that the dynamic buffer outputs or does not output a buffered voltage.

[0078] Additionally, as mentioned above, in cases where the dynamic buffer can switch from a first mode to a second mode in response to a difference between the voltage at the input terminal of any dynamic buffer and the voltage at the connected second voltage input terminal (i.e., a voltage output terminal), the dynamic buffer may include a voltage difference detection module in addition to the buffer (e.g., an operational amplifier) ​​and the switching module. Optionally, the voltage difference detection module may include a comparator.

[0079] like Figure 11 As shown, the first detection terminal of each voltage difference detection module DET is connected to the first input terminal of the corresponding operational amplifier, the second detection terminal is connected to the second voltage input terminal of the corresponding dynamic buffer, and the output terminal of each voltage difference detection module outputs a switching control signal.

[0080] Each switching module is configured to, based on the switching control signal of the corresponding voltage difference detection module or the switching control signal of another voltage difference detection module, allow or disable the output of the corresponding operational amplifier to output a buffered voltage to a second voltage input terminal connected to the corresponding dynamic buffer in the second mode or in the first mode.

[0081] For example, if the voltage difference detection module in any one or more dynamic buffers detects that the input voltages at its two input terminals are not the same, for example, the voltage difference exceeds a predetermined threshold (0 or other values), it indicates that the multiple gamma voltages generated by the gamma voltage generation circuit may be inaccurate. At this time, it is necessary to re-establish and stabilize the gamma voltage. Therefore, the voltage difference detection module can output a switching control signal to control these dynamic buffers or a portion thereof to work together in the second mode to re-establish and stabilize the gamma voltage.

[0082] exist Figure 11 In this context, the switching module for the dynamic buffer can also adopt the approach described in the previous reference. Figure 8-10 The structure of the switching module shown, for example, an implementation with one switch, three switches, and an implementation with a dynamic buffer responding to an enable signal, is as follows: Figure 8-10 As shown.

[0083] Thus, the voltage difference detection module controls the mode switching of the dynamic buffer by detecting the difference between the actual gamma voltage and the desired gamma voltage. Therefore, the duration of the second mode (e.g., Figure 8 The on-time of the switch SW in the circuit can be adjusted based on the stable performance of the individual gamma voltages output by the gamma voltage generator. For example, if the data voltage varies at larger levels, causing more current to be drawn from the resistor string of the gamma voltage generation circuit, and thus resulting in a greater deviation of the actual gamma voltage from the desired gamma voltage, it may be necessary to control the dynamic buffer to operate for a longer duration in the second mode to provide higher drive capability so that the actual gamma voltage is the same as the desired gamma voltage.

[0084] Optionally, while in many cases the structure of each dynamic buffer in each source driver circuit is identical, this is not necessary in other cases, as long as these dynamic buffers can switch modes synchronously. For example, it is not necessary to include a voltage difference detection module in every dynamic buffer; some dynamic buffers can adopt, for example... Figure 8-10 The aforementioned structure.

[0085] The above is for reference only. Figure 4 as well as Figure 5-11The described gamma voltage generator, by introducing a dynamic buffer, improves the driving capability of the gamma voltage output by the gamma voltage generation circuit and the speed of gamma voltage establishment and stabilization when the gamma voltage needs to be re-established and stabilized. Furthermore, after the gamma voltage is established and stabilized, the dynamic buffer stops outputting the buffer voltage to avoid introducing unwanted errors in the gamma voltage. Additionally, by changing the operating mode of the dynamic buffer only when the displayed data changes (i.e., switching from a first mode to a second mode), and not changing the operating mode when the displayed data remains unchanged, overall power consumption can be saved.

[0086] The above-described embodiments of introducing a dynamic buffer can be considered as increasing the driving capability of the gamma voltage output by the gamma voltage generation circuit. In other embodiments where the gamma voltage generation circuit includes a resistor string, this can also be achieved equivalently by reducing the resistance value of the resistor string.

[0087] Figure 12A A schematic diagram of another gamma voltage generator according to an embodiment of this application is shown.

[0088] like Figure 12A As shown, the gamma voltage generator 1200 (can be...) Figure 2 The gamma voltage generator 1200 includes a gamma voltage generation circuit 1210 and multiple buffers (1220-1, 1220-2, ..., 1220-N, hereinafter collectively referred to as 1220). The gamma voltage generator 1200 can be included in an integrated circuit (IC) of a source driver.

[0089] The gamma voltage generation circuit 1210 has multiple voltage input terminals IN and multiple voltage output terminals O, which are used to output a predetermined number of gamma voltages based on the input voltages from the multiple voltage input terminals IN. In some embodiments where the gamma voltage generation circuit is a gamma resistor string (multiple resistor units connected in series in this embodiment), each voltage input terminal can be connected to a corresponding voltage output terminal, and each voltage input terminal and its corresponding voltage output terminal can be the same terminal, for example, a connection node between adjacent resistor units in the gamma resistor string.

[0090] Multiple buffers 1220 (1220-1, 1220-2, ..., 1220-N) are electrically connected to the multiple voltage input terminals IN. Thus, when the gamma voltage generator 1200 is not connected to other gamma voltage generators, or when the gamma voltage generator 1200 needs to output buffered voltages to other gamma voltage generators (such as in the case of two or more source driver circuits described later, acting as a master circuit), the gamma voltage generator 1200 can output multiple gamma voltages at multiple voltage output terminals O based on the buffered voltages of the multiple buffers. Furthermore, when the gamma voltage generator 1200 is connected to other gamma voltage generators but does not need to output buffered voltages to other gamma voltage generators (such as in the case of two or more source driver circuits described later, acting as a slave circuit), the multiple buffers can be disabled or only the two buffers providing the maximum and minimum reference voltages can be enabled.

[0091] To improve the driving capability of the gamma voltage, the gamma voltage generation circuit includes multiple resistor units RVA connected in series. The connection node of adjacent resistor units RVA is connected to or serves as a voltage output terminal. Each resistor unit is configured to have a first resistance value in a first mode and a second resistance value in a second mode, where the second resistance value is less than the first resistance value. The figure schematically illustrates a combination of multiple resistor units RVA represented by a single resistor symbol RS. The number of series-connected resistor units RVA represented by each resistor symbol RS can be determined based on the required output gamma voltage and is not limited to the number shown.

[0092] Thus, the first duration required for the gamma voltage generation circuit to output the predetermined number of gamma voltages when each resistor unit RVA has a first resistance value is greater than the second duration required to output the predetermined number of gamma voltages when each resistor unit RVA has a second resistance value.

[0093] Corresponding to the first and second modes of the dynamic buffer mentioned above, the first mode of the resistor unit in this embodiment is also a standby mode, and the second mode is a trigger mode. For example, when it is necessary to rebuild and stabilize the gamma voltage output by the gamma voltage generator, the resistor unit operates in the trigger mode, and after the gamma voltage output by the gamma voltage generator is built up and stabilized, that is, when it is no longer necessary to build up and stabilize the gamma voltage, the resistor unit operates in the standby mode.

[0094] Thus, in the trigger mode (second mode), each resistor unit RVA in the gamma voltage generation circuit can be configured to have a smaller resistance value, allowing more current to flow quickly through the multiple resistor units connected in series, thereby establishing and stabilizing the gamma voltage more rapidly. In the standby mode (first mode), each resistor unit RVA can be configured to have a larger resistance value, thus reducing overall power consumption.

[0095] Optionally, Figure 12B An example circuit structure for a resistor unit is shown. Optionally, all resistor units in the gamma voltage generation circuit have the same resistance value in the first mode and the same resistance value in the second mode; for example, all resistor units can have the same circuit structure.

[0096] like Figure 12B As shown, the resistor unit may include a bypass switch SWB and a plurality of resistors connected in series. The bypass switch SWB is connected in parallel with at least one of the plurality of resistors (two are shown in the figure). The bypass switch is configured to be on in the second mode and off in the first mode. Therefore, in the second mode, the resistance value of the resistor connected in series in the resistor unit (the second resistance value) is less than the resistance value of the resistor connected in series in the resistor unit in the first mode (the first resistance value).

[0097] Optionally, refer to the preceding reference Figure 4-11 Similarly, switching from the first mode to the second mode can also be controlled based on updates or changes in the displayed data.

[0098] For example, when the display data input to the multi-channel circuit is updated, the series-connected resistor units can switch to operate in the second mode to quickly re-establish and stabilize the gamma voltage, and after a predetermined period of time, the series-connected resistor units return to operate in the first mode.

[0099] Alternatively, as described above, the display data input to the multiple channel circuits is updated periodically (e.g., based on a horizontal synchronization signal Hsync or a scan signal). Therefore, at a predetermined time point before the start of each update cycle, the multiple resistor units connected in series can switch to operate in the second mode to quickly re-establish and stabilize the gamma voltage, and after a predetermined time period, the multiple resistor units connected in series return to operate in the first mode.

[0100] Alternatively, as described above, when the display data input to the multiple channel circuits changes, the multiple resistor units switch to operate in the second mode, and after a predetermined period of time, the multiple resistor units return to operate in the first mode. This can further reduce overall power consumption. In some embodiments, a processor within the source driver can determine the changes between the display data.

[0101] Therefore, in reference Figure 12A-12B In the described gamma voltage generator, by making the resistance value of the resistor unit in the first mode greater than that in the second mode, more current can flow quickly through the multiple resistor units connected in series in the second mode, so as to build up and stabilize the gamma voltage more quickly. After the gamma voltage is built up and stabilized, it returns to the first mode to reduce the overall power consumption.

[0102] According to other embodiments, multiple dynamic buffers as described above and multiple resistor units with variable resistance values ​​can be combined into the same gamma voltage generator, for example, as... Figure 13 As shown, the gamma voltage generator 1200 includes not only multiple dynamic buffers (shown in gray) and multiple basic buffers (shown in white), but also a gamma circuit generation circuit 1210 comprising multiple resistor units RVA (with variable resistance values) connected in series. The operating timing and specific structure of the dynamic buffers and resistor units have been described in detail above, and therefore will not be repeated here.

[0103] Therefore, in the second mode, the multiple dynamic buffers can be connected together with the basic buffer to the gamma voltage generation circuit 1210 (which includes multiple resistor units connected in series), and the multiple resistor units included in the gamma voltage generation circuit 1210 can have small resistance values ​​(e.g., a bypass switch is turned on). This combination of dynamic buffers and resistor units with variable resistance values ​​can further reduce the gamma voltage build-up and settling time and improve the driving capability of the gamma voltage output by the gamma voltage generator. This implementation allows the display device to operate at ultra-high frame rates.

[0104] According to another aspect of this application, a source driver is provided, which may include a gamma voltage generator as described above (e.g., reference...). Figure 4-13 For example, the gamma voltage generator can be integrated into a source driver circuit (IC).

[0105] Additionally, in other applications, such as foldable phones with flexible displays, the screen size is increasing, so the source driver can include two or more source driver circuits (each including a gamma voltage generator) to drive the same display panel, for example... Figure 3B As shown.

[0106] When a source driver may include two or more source driver circuits, the gamma voltage generator in at least one of the source drivers may employ a method as described in the reference. Figure 4 The structure of the gamma voltage generator is described, and correspondingly, it can be utilized using references. Figure 5-11 The description includes the mode switching timing and switching method, etc. A source driver circuit that provides buffered voltage to other source driver circuits via the wires between the power transmission terminals of the source driver circuit can be regarded as the master circuit, while the other source driver circuits can be regarded as slave circuits.

[0107] For example, in schemes based on dynamic buffers, such as Figure 14 As shown, the source driver 1400 may include a first source driver circuit (IC1) and a second source driver circuit (IC2). The first source driver circuit can be regarded as a master circuit, and the second source driver circuit can be regarded as a slave circuit.

[0108] At least one of the gamma voltage generator 1400-1 (first gamma voltage generator) included in the first source driver circuit (IC1) and the second gamma voltage generator 1400-2 included in the second source driver (IC2) can be adopted using reference Figure 4 The structure of the described gamma voltage generator 400.

[0109] exist Figure 14 The first gamma voltage generator 1400-1 is illustrated in the example, employing a reference... Figure 4 The structure of the described gamma voltage generator 400 is shown, and the second gamma voltage generator 1400-2 can be adopted using the reference. Figure 4 The described gamma voltage generator 201 may employ other structures (e.g., structures where all buffers are basic buffers, as in related art). However, it should be understood that in other embodiments, the second gamma voltage generator 1400-2 may also employ the reference... Figure 4 The structure of the described gamma voltage generator 201 is shown, while the first gamma voltage generator 1400-1 adopts the reference. Figure 4The described gamma voltage generator 201 may have a different structure or other structure. According to embodiments of this disclosure, two gamma voltage generators may have different structures, but the number and value of the gamma voltages they output should be the same. Optionally, the source driver circuit, acting as a slave circuit, can receive a buffered voltage from the source driver circuit, acting as a master circuit, and may not even include a basic buffer (or only include two basic buffers that provide the maximum and minimum gamma reference voltages to the gamma voltage generation circuit it includes). Considering that the gamma voltage generators in the two source driver circuits have different structures, the setup and settling times of the gamma voltages output by the gamma voltage generators in the two source driver circuits may be inconsistent, which may lead to color difference problems in the displayed image; furthermore, considering production costs and design complexity, the gamma voltage generators in the various source driver circuits included in the same source driver generally adopt the same structure. Therefore, the first gamma voltage generator 1400-1 and the second gamma voltage generator 1400-2 can adopt the same gamma voltage generator structure.

[0110] Therefore, as an example, both the first gamma voltage generator 1400-1 and the second gamma voltage generator 1400-2 employ a reference. Figure 4 In describing the structure of the gamma voltage generator, the first gamma voltage generator 1400-1 includes a plurality of basic buffers that can output a first set of buffered voltages to corresponding first voltage input terminals and pass them to the second gamma voltage generator 1400-2. The second gamma voltage generator 1400-2 can then be configured to receive the first set of buffered voltages from the first gamma voltage generator 1400-1 (e.g., via an electrical connection between power transmission terminals P-P' as described above) for outputting a second predetermined number of gamma voltages. Since the plurality of basic buffers included in the first gamma voltage generator 1400-1 maintain the output of the first set of buffered voltages, this first set of buffered voltages can be continuously supplied to the second gamma voltage generator 1400-2. It should be noted that each power transmission terminal P (as an output terminal) of the first source driver circuit (IC1) is connected to the corresponding voltage output terminal of the gamma voltage generation circuit 1411 and the corresponding first voltage input node, thereby receiving a buffered voltage from a corresponding basic buffer and using this buffered voltage as the output voltage at that power transmission terminal P.

[0111] The second gamma voltage generator 1400-2 has the same structure as the first gamma voltage generator 1400-1, including: a second gamma voltage generation circuit 1412, multiple basic buffers (i.e., basic buffers of the second set), and multiple dynamic buffers (i.e., dynamic buffers of the second set). The second gamma voltage generation circuit 1412 has a first voltage input terminal, a second voltage input terminal, and a voltage output terminal of the second set. The input terminals of the basic buffers of the second set respectively receive corresponding gamma reference voltages, and their output terminals are respectively connected to the first voltage input terminal of the second set. The input terminals of the dynamic buffers of the second set respectively receive corresponding gamma reference voltages, and their output terminals are respectively connected to the second voltage input terminal of the second set. They are configured to operate synchronously with the multiple dynamic buffers in the first gamma voltage generator 1400-1 in a first mode or a second mode. It should be noted that the use of the term "certain elements of the second set" in this application is to distinguish it from the use of the term "certain elements of the first set" (i.e., multiple corresponding elements included in the first gamma voltage generation circuit 1411).

[0112] The second gamma voltage generator 1400-2 includes a second gamma voltage generation circuit 1412. The first voltage input terminal of the second set of the second set receives the first set of buffered voltages from the first gamma voltage generator 1400-1. The dynamic buffer of the second set outputs a second set of buffered voltages to the second voltage input terminal of the second set of the second set in the second mode, and does not output the second set of buffered voltages in the first mode. The second gamma voltage generation circuit 1412 outputs the second predetermined number of gamma voltages at the voltage output terminal of the second set of the second set of the second gamma voltage generator 1400-2 based on the first set of buffered voltages and the second set of buffered voltages (in the second mode) or based on the first set of buffered voltages (in the first mode).

[0113] In other words, when it is necessary to re-establish and stabilize the gamma voltage, the dynamic buffers (all or part, depending on system requirements) in the first gamma voltage generator 1400-1 and the second gamma voltage generator 1400-2 operate in the second mode to output a buffer voltage. The first set of buffer voltages output by the basic buffer of the first gamma voltage generator 1400-1 is provided to the second gamma voltage generator 1400-2, so that the second gamma voltage generator 1400-2 can generate a gamma voltage based on the second set of buffer voltages output by its own dynamic buffer and the first set of buffer voltages from the first gamma voltage generator 1400-1. Therefore, compared to the case where it is based solely on the first set of buffer voltages from the first gamma voltage generator 1400-1, the second gamma voltage generator 1400-2 can accelerate the establishment and stabilization speed of the gamma voltage to a certain extent. Thus, the establishment and stabilization time of the gamma voltages in the two source driver circuits can be close, thereby reducing the display color difference and improving the display effect.

[0114] For example, in a scheme based on a resistor unit with a variable resistance value, at least one of the gamma voltage generator 1500-1 (first gamma voltage generator) included in the first source driver circuit (IC1) and the second gamma voltage generator 1500-2 included in the second source driver (IC2) can be referenced. Figure 12A-12B The structure of the gamma voltage generator 201 is described, and correspondingly, references can be used. Figure 5-11 The description includes the mode switching timing and switching method, etc. A source driver circuit that provides buffered voltage to other source driver circuits via the wires between the power transmission terminals of the source driver circuit can be regarded as the master circuit, while the other source driver circuits can be regarded as slave circuits.

[0115] exist Figure 15 The first gamma voltage generator 1500-1 is illustrated in the example, employing a reference... Figure 12A-12B The structure of the described gamma voltage generator 1200 is shown, and the second gamma voltage generator 1500-2 can be adopted using the reference. Figure 12A-12B The described gamma voltage generator 1200 may employ a different structure. However, it should be understood that in other embodiments, the second gamma voltage generator 1500-2 may adopt the structure described in the reference document. Figure 12A-12B The structure of the described gamma voltage generator 1200 is shown, while the first gamma voltage generator 1500-1 adopts the reference. Figure 12A-12BThe described gamma voltage generator 1200 may have a structure or other structure (e.g., a resistor string structure as used in related art). Two gamma voltage generators may have different structures, but they should output the same amount and value of gamma voltage. Optionally, the source driver circuit, acting as a slave circuit, may not even include a buffer (or may only include two buffers that provide the maximum and minimum gamma reference voltages to the included gamma voltage generation circuit) because it can receive a buffered voltage from the source driver circuit, acting as a master circuit.

[0116] Similarly, as mentioned above, for the sake of display effect, production cost and design complexity, the first gamma voltage generator 1500-1 and the second gamma voltage generator 1500-2 can adopt the same gamma voltage generator structure.

[0117] Therefore, as an example, both the first gamma voltage generator 1500-1 and the second gamma voltage generator 1500-2 employ a reference. Figure 12A-12B When describing the structure of the gamma voltage generator, the first gamma voltage generator 1500-1 includes multiple buffers that can output a first set of buffered voltages to corresponding multiple voltage input terminals. Then, the second gamma voltage generator 1500-2 can be configured to receive the first set of buffered voltages from the first gamma voltage generator 1500-1 for outputting a second predetermined number of gamma voltages.

[0118] The second gamma voltage generator 1500-2 has the same structure as the first gamma voltage generator 1500-1, including: a second gamma voltage generating circuit and a second set of buffers, wherein the second gamma voltage generating circuit has a second set of voltage input terminals and a second set of voltage output terminals; the input terminals of the second set of buffers respectively receive corresponding gamma reference voltages, and the output terminals are respectively connected to the second set of voltage input terminals; the second set of voltage input terminals receives the buffered voltage from the first gamma voltage generator 1500-1, and wherein the second gamma voltage generating circuit 1500-2 includes a second set of resistor units connected in series, and the connection nodes of adjacent resistor units are connected to or serve as a voltage output terminal, and each resistor unit is configured to switch between a first mode and a second mode synchronously with the resistor units in the first gamma voltage generator 1500-1.

[0119] In other words, when it is necessary to re-establish and stabilize the gamma voltage, the resistor unit in the second gamma voltage generator 1500-2 operates in the second mode to generate a gamma voltage based on the buffer voltage from the first gamma voltage generator 1500-1 with a smaller resistance value. Thus, compared to the case where no resistor unit with a variable resistance value is provided, the second gamma voltage generator 1500-2 can speed up the establishment and stabilization of the gamma voltage to a certain extent. Therefore, the establishment and stabilization time of the gamma voltage in the two source driver circuits can be close, thereby reducing the color difference of the display, making the display more uniform, and thus improving the display effect.

[0120] In addition, it should be noted that although in Figure 14-15 The text describes by way of example that when a source driver may include two source driver circuits, at least one of the source driver circuits employs a dynamic buffer-based scheme or a variable resistor-based scheme. However, it should be understood that a source driver may include more source driver circuits, and at least one of the source driver circuits may employ a dynamic buffer-based scheme or a variable resistor-based scheme. Furthermore, the at least one source driver circuit may employ both a dynamic buffer-based scheme and a variable resistor-based scheme; for example, the at least one source driver circuit may include... Figure 13 The gamma voltage generator shown.

[0121] Furthermore, if the gamma voltage generator within each source driver circuit is fast enough to build up and stabilize the gamma voltage, the difference in the time between the gamma voltage generators in the source driver circuits is also small and can be considered consistent. Therefore, when the source driver can include at least two source driver circuits, each source driver circuit can be randomly configured using a scheme based on a dynamic buffer (e.g., Figure 4 Schemes based on variable resistor units (e.g., Figure 12) and schemes based on dynamic buffers and variable resistor units (e.g.) Figure 13 Any one of them.

[0122] It should be understood that the source driver may further include other circuitry configured to cooperate with the gamma voltage generator of each source driver circuit in the source driver to generate a gamma voltage and drive the display panel. Those skilled in the art will understand that... Figures 2 to 15 The structure and operation of the other circuits shown are omitted here.

[0123] Accordingly, another aspect of this application also provides a display device, which may be the display device shown in FIG1, and includes a display panel and a source driver, wherein the source driver may include, as referenced... Figure 4-13 The description includes a gamma voltage generator, or comprises at least two gamma voltage generators, wherein at least one of the at least two gamma voltage generators is as referenced. Figure 4-13 The described gamma voltage generator is as shown in the reference. Figure 4-13 Described gamma voltage generator.

[0124] Those skilled in the art will understand that various modifications and variations can be made to the structure of the disclosed embodiments without departing from the scope or spirit of this disclosure. In view of the foregoing, it is intended that this disclosure cover modifications and variations that fall within the scope of the appended claims and their equivalents.

Claims

1. A gamma voltage generator, comprising: A gamma voltage generation circuit has multiple voltage input terminals and multiple voltage output terminals, the multiple voltage output terminals outputting a predetermined number of gamma voltages based on the input voltages from the multiple voltage input terminals; as well as Multiple buffers, each receiving a corresponding gamma reference voltage at its input and having its output connected to the corresponding voltage input terminal. The gamma voltage generation circuit includes multiple resistor units connected in series, and the connection node of adjacent resistor units serves as or is connected to a voltage output terminal. Each resistor unit is configured such that its second resistance value in the second mode is less than its first resistance value in the first mode. The first mode is a standby mode, and the second mode is a trigger mode. The trigger mode is applicable to the period before the predetermined number of gamma voltages generated stabilizes, and the standby mode is applicable to the period after the predetermined number of gamma voltages generated stabilizes.

2. The gamma voltage generator according to claim 1, wherein, Each resistor unit includes a bypass switch and a plurality of resistors connected in series, the bypass switch being connected in parallel with at least one of the plurality of resistors. The bypass switch is configured to be turned on in the second mode and turned off in the first mode.

3. The gamma voltage generator according to claim 1, wherein, The gamma voltage generation circuit is connected to multiple channel circuits, each channel circuit being used to select at least one of the predetermined number of gamma voltages to generate a corresponding data voltage based on the input display data.

4. The gamma voltage generator according to claim 3, wherein, When the display data input to the plurality of channel circuits is updated, the plurality of resistor units switch to operate in the second mode, and switch back to operate in the first mode after a predetermined period of time.

5. The gamma voltage generator according to claim 3, wherein, The display data input to the multiple channel circuits is updated periodically. The plurality of resistor units switch to the second mode at a predetermined time point before the start of each update cycle, and switch back to the first mode after a predetermined period of time.

6. The gamma voltage generator according to claim 3, wherein, The plurality of resistor units switch to the second mode when the display data input to the plurality of channel circuits changes, and switch back to the first mode after a predetermined period of time.

7. The gamma voltage generator according to claim 1, wherein, The gamma voltage generation circuit includes a plurality of resistor units that switch synchronously between the first mode and the second mode.

8. The gamma voltage generator according to claim 1, wherein, The gamma voltage generation circuit also has multiple second voltage input terminals; The gamma voltage generator also includes: Multiple dynamic buffers, each receiving a corresponding gamma reference voltage at its input and having its output connected to a corresponding second voltage input terminal, wherein each dynamic buffer does not output a buffer voltage when the plurality of resistor units operate in a first mode, and outputs a buffer voltage to the connected second voltage input terminal when the plurality of resistor units operate in a second mode.

9. The gamma voltage generator according to claim 8, wherein, Each dynamic buffer includes a buffer and a switching module. The switching module of each dynamic buffer is configured to disable the plurality of resistor units when operating in the first mode and allow the buffer included in the dynamic buffer to output a buffered voltage to the second voltage input terminal to which the dynamic buffer is connected when the plurality of resistor units operate in the second mode.

10. The gamma voltage generator according to claim 8, wherein, Each dynamic buffer includes a buffer, a switching module, and a voltage difference detection module. The first detection terminal of the voltage difference detection module of each dynamic buffer is connected to the first input terminal of the buffer included in the dynamic buffer, the second detection terminal is connected to the second voltage input terminal of the dynamic buffer, and the output terminal outputs a switching control signal. as well as Each dynamic buffer's switching module is configured to, based on a switching control signal from a voltage difference detection module or other voltage difference detection module included in the dynamic buffer, either allow or disable the output of a buffered voltage from the buffer included in the dynamic buffer to the second voltage input terminal to which the dynamic buffer is connected when the plurality of resistor units operate in the second mode, or when the plurality of resistor units operate in the first mode. The plurality of resistor units switch between a second mode and a first mode in response to a switching control signal from the voltage difference detection module of each dynamic buffer.

11. The gamma voltage generator of claim 8, wherein each dynamic buffer includes a buffer, wherein, The buffer switches between enabled and disabled states according to an enable signal to output or not output a buffer voltage to the second voltage input terminal to which the dynamic buffer is connected.

12. A source driver, comprising: The gamma voltage generator according to claim 1; as well as Multiple channel circuits are connected to the gamma voltage generator to generate various data voltages corresponding to the input display data using the gamma voltage output by the gamma voltage generator.

13. A display device, comprising: Display panel; The source driver as described in claim 12 is used to drive the display panel.

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