Ultra shallow junction deep low energy electron detector
By employing an ultra-shallow junction depth structure and a grid-like electrode in the PIN photodetector, the problem of detecting low-energy electrons has been solved, achieving efficient detection of electrons below 500 eV and improving detector performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHANGHAI IND U TECH RES INST
- Filing Date
- 2022-04-19
- Publication Date
- 2026-04-17
AI Technical Summary
Existing PIN photodetectors have difficulty effectively detecting low-energy electrons, especially those below 500 eV. Furthermore, low-energy electrons are easily absorbed in traditional doped and oxide layers and cannot be detected.
By employing an ultra-shallow junction structure, P-type and N-type doped layers with ultra-shallow junction depths are formed on the surface of a silicon substrate, and a grid-like electrode is formed on the P-type doped layer. Combined with a barrier layer and a guard ring structure, the detection region is defined, enabling efficient detection of low-energy electrons.
It achieves effective detection of low-energy electrons below 500eV, improves detection efficiency, and reduces series resistance through gridded electrodes, thereby improving the detector's response speed and bandwidth.
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Figure CN116960209B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor integrated circuit design and manufacturing, and in particular relates to an ultra-shallow junction deep low-energy electronic detector. Background Technology
[0002] PIN photodetectors have the ability to detect photons and electrons, converting the energy of incident photons and electrons into electrical signals. Their main parameters include bias voltage, dark current, cutoff frequency, and capacitance.
[0003] A typical PIN photodetector cross-sectional structure consists of P-type and N-type silicon, an oxide layer, and a metal on an intrinsic silicon substrate. The intrinsic silicon substrate absorbs incident photons and electrons at a designed thickness, acting as a carrier for the bias voltage to form a bias electric field and generate electron-hole pairs (with a relatively long carrier diffusion length). The P-type silicon acts as a channel for carriers from the incident surface to the front electrode. The N-type silicon forms a guard ring or acts as a channel for carriers from the back electrode to the back electrode. The metal forms the front and back electrodes, guiding the electrical signal. The oxide layer protects the detector surface, provides passivation, and acts as insulation.
[0004] When a PIN photodetector is working, a bias voltage is applied through the electrodes to form a bias voltage in the PIN junction. For example, the voltage of the front electrode is 0V and the voltage of the back electrode is 60V. At this time, the silicon substrate is in a completely depleted state. Incident photons and electrons excite electron-hole pairs in the silicon substrate. Under the action of the bias electric field, the electron-hole pairs flow rapidly and directionally and are collected by the electrodes to generate current.
[0005] The detection energy limit of an electron detector depends on the shallowest point within the detector where low-energy incident electrons generate an electrical signal sufficient to achieve a certain response level; that is, the distance between the boundary of the total depletion region and the incident surface of the detector. Doping processes using conventional ion implantation and thermal annealing typically have a node depth of around 1 micrometer, which is insufficient for detecting electrons with energies below 1 keV, especially below 500 eV, because low-energy electrons are easily absorbed by the doped layer and the native oxide layer above it, making them undetectable. However, in biological samples or some semiconductor materials dominated by light elements, using high-energy electrons can damage the sample. Therefore, using low-energy electrons for electron-based imaging detection, especially in biological samples, such as SEM, is essential.
[0006] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this application. Summary of the Invention
[0007] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide an ultra-shallow junction deep low-energy electron detector to solve the problem that detectors in the prior art are difficult to detect low-energy electrons.
[0008] To achieve the above and other related objectives, the present invention provides an ultra-shallow junction low-energy electron detector, comprising: a silicon substrate having opposing first and second surfaces; an ultra-shallow junction P-type doped layer formed on the first surface of the silicon substrate by thermal diffusion after forming a boron elemental layer on the surface of the silicon substrate, the thickness of the P-type doped layer being between 3 and 10 nm; an N-type doped layer formed on the second surface of the silicon substrate; a guard ring structure extending from the P-type doped layer toward the silicon substrate; a barrier layer formed on the P-type doped layer, the barrier layer having a window defining the detection area of the electron detector; and a grid-like electrode formed on the P-type doped layer in the detection area.
[0009] Optionally, the thickness of the boron elemental layer is between 2 nm and 3 nm.
[0010] Optionally, the doping concentration of the P-type doped layer is between 1 × 10⁻⁶. 18 cm -3 ~1×10 20 cm -3 between.
[0011] Optionally, the thickness of the silicon substrate is between 300 μm and 500 μm.
[0012] Optionally, the shape of the detection area includes one of the following: rectangle, circle, ellipse, trapezoid, pentagon, hexagon, and octagon.
[0013] Optionally, the material of the mesh electrode includes one of copper, aluminum, titanium, gold, silver and tungsten, and the mesh electrode and the P-type doped layer are in ohmic contact.
[0014] Optionally, the grid-like electrode includes a plurality of first electrode lines arranged in a cross pattern in rows and a plurality of second electrode lines arranged in a plurality of columns.
[0015] Optionally, the mesh-like electrode includes a plurality of annular electrode lines with radial dimensions increasing sequentially, and connecting electrode lines connecting the plurality of annular electrode lines.
[0016] Optionally, the width of the plurality of ring electrode lines gradually increases from the inside to the outside.
[0017] Optionally, it further includes a back electrode formed on the surface of the N-type doped layer.
[0018] As described above, the ultra-shallow junction deep low-energy electron detector of the present invention has the following beneficial effects:
[0019] This invention utilizes a diffusion process of elemental boron to form a P-type doped layer, resulting in a highly concentrated, ultra-shallow junction P-type doped layer that enables the detection of low-energy electrons below 500 eV. This invention effectively solves the problem of low-energy electron detection in electron detectors, significantly improving their detection efficiency.
[0020] This invention solves the problem of excessively high detector series resistance caused by shallow doping by performing a meshing process on the upper electrode. This invention can effectively reduce the series resistance, thereby improving the detector response speed and increasing the detector bandwidth. Attached Figure Description
[0021] The accompanying drawings, which form part of this specification, are used to provide a further understanding of the embodiments of this application and to illustrate the implementation of this application, together with the textual description, to explain the principles of this application. Obviously, the drawings described below are merely some embodiments of this application.
[0022] Figures 1-15 The diagram shows the structural schematics of each step in the ultra-shallow junction deep low-energy electron detector according to an embodiment of the present invention. Figure 12 The diagram shown is a structural schematic of an ultra-shallow junction deep low-energy electron detector according to an embodiment of the present invention.
[0023] Component designation explanation
[0024] 101 silicon substrate
[0025] 102 Boron monolayer
[0026] 103 P-type doped layer
[0027] 104 N-type doped layer
[0028] 105 Hard mask layers
[0029] 106 Protective Ring Structure
[0030] 107 Barrier Layer
[0031] 108 metal layer
[0032] 109 Back Electrode
[0033] 110 Detection Area
[0034] 111 Mesh Electrode
[0035] 1111 First electrode line
[0036] 1112 Second electrode wire
[0037] 1113 Circular electrode wire
[0038] 1114 Connecting electrode wires Detailed Implementation
[0039] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
[0040] It should be emphasized that the term "including / comprises" as used herein refers to the presence of a feature, whole, step, or component, but does not exclude the presence or addition of one or more other features, wholes, steps, or components.
[0041] Features described and / or illustrated for one embodiment may be used in the same or similar manner in one or more other embodiments, combined with features in other embodiments, or substituted for features in other embodiments.
[0042] In the detailed description of embodiments of the present invention, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged and not to scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. In actual fabrication, the three-dimensional spatial dimensions of length, width, and depth should be included.
[0043] For ease of description, spatial relation terms such as “below,” “under,” “lower than,” “below,” “above,” and “upper” may be used herein to describe the relationship between one element or feature shown in the accompanying drawings and other elements or features. It will be understood that these spatial relation terms are intended to include directions other than those depicted in the drawings for devices in use or operation. Furthermore, when a layer is referred to as being “between” two layers, it may be the only layer between the two layers, or there may be one or more layers in between.
[0044] In the context of this application, the structure described above the first feature may include embodiments in which the first and second features are formed in direct contact, or embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.
[0045] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.
[0046] like Figures 1-15 As shown, this embodiment provides an ultra-shallow junction deep low-energy electron detector, the fabrication method of which includes the following steps:
[0047] like Figures 1-2 As shown, step 1) is performed first, a silicon substrate 101 is provided, which includes a first side and a second side opposite to each other. Borane and a reducing gas are introduced into the first side of the silicon substrate 101, and the borane and reducing gas are thermally decomposed on the first side of the silicon substrate 101 through a thermal decomposition process to form a boron elemental layer 102.
[0048] In one embodiment, step 1) further includes thinning and chemical mechanical polishing (CMP) of the silicon substrate 101, wherein the thickness of the thinned silicon substrate 101 is between 300 μm and 500 μm. In this embodiment, the silicon substrate 101 is an intrinsic silicon substrate 101.
[0049] In one embodiment, in step 1), the borane comprises B₂H₆, with a flow rate between 100 sccm and 900 sccm. The temperature of the thermal decomposition process is between 400°C and 1000°C, the gas pressure is between 300 Torr and 1000 Torr, and the time is between 5 min and 100 min. The aforementioned B₂H₆ and a reducing gas are introduced together into the surface of the silicon substrate 101. Through a thermal decomposition reaction, B₂H₆ decomposes into elemental boron, which is deposited on the surface of the silicon substrate 101 to form a boron elemental layer 102. In a specific embodiment, the borane is B₂H₆, the flow rate is 300 sccm, the temperature of the thermal decomposition process is 900°C, the gas pressure is 300 Torr, the time is 30 min, and the thickness of the formed boron elemental layer 102 is between 2 nm and 3 nm.
[0050] like Figures 3-4 As shown, step 2) is then performed, involving a thermal diffusion process to diffuse the boron elemental layer 102 into the silicon substrate 101 to form an ultra-shallow junction P-type doped layer 103 on the first surface of the silicon substrate 101. This invention forms the P-type doped layer 103 through a boron diffusion process, achieving a high concentration of ultra-shallow junction P-type doped layer 103, thereby enabling the detection of low-energy electrons below 500 eV. This invention effectively solves the problem of low-energy electron detection in electron detectors and significantly improves the detection efficiency of low-energy electrons.
[0051] In one embodiment, in step 2), the doping concentration of the P-type doped layer 103 formed by the thermal diffusion process is between 1 × 10⁻⁶. 18 cm -3 ~1×10 20 cm -3 The thickness of the P-type doped layer 103 is between 3 and 10 nm. In one specific implementation, the doping concentration of the P-type doped layer 103 formed by the thermal diffusion process is 2 × 10⁻⁶. 19 cm -3 The thickness of the P-type doped layer 103 is 5 nm.
[0052] like Figure 5 As shown, then step 3) is performed to form an N-type doped layer 104 on the second side of the silicon substrate 101.
[0053] In one embodiment, an N-type doped layer 104 can be formed on the second side of the silicon substrate 101 by an ion implantation process and an annealing activation process, wherein the implanted ions can be, for example, phosphorus.
[0054] like Figures 6-8 As shown, then step 4) is performed to form a protective ring structure 106 extending from the P-type doped layer 103 toward the silicon substrate 101.
[0055] In one embodiment, step 4) includes:
[0056] Step 4-1): A hard mask layer 105 is formed on the P-type doped layer 103 by a deposition process. The hard mask layer 105 can be, for example, a silicon dioxide layer, a silicon nitride layer, or a stack thereof. Figure 6 As shown.
[0057] Step 4-2), an injection window is formed on the hard mask layer 105 using photolithography and etching processes, such as... Figure 7 As shown;
[0058] Step 4-3): An N-type doped guard ring structure 106 is formed in the silicon substrate 101 through ion implantation and annealing activation processes. The depth of the guard ring structure 106 is greater than the depth of the P-type doped layer 103 and less than the thickness of the silicon substrate 101. Figure 8 As shown. The protective ring structure 106 can improve the withstand voltage performance of the device on the one hand, and prevent electrons absorbed in the silicon substrate 101 from leaking to areas outside the protective ring structure 106 on the other hand, thereby improving the sensitivity of the device.
[0059] like Figure 9As shown, then step 5) is performed, after removing the hard mask layer 105 from step 4), a barrier layer 107 is formed on the P-type doped layer 103, and a window is formed in the barrier layer 107, through which the detection area 110 of the electronic detector is defined.
[0060] In one embodiment, the barrier layer 107 may be made of silicon dioxide.
[0061] In one embodiment, the shape of the detection area 110 includes one of the following: rectangle, circle, ellipse, trapezoid, pentagon, hexagon, and octagon.
[0062] like Figure 13 and Figure 14 As shown, in one embodiment, the detection area 110 is rectangular in shape.
[0063] like Figure 15 As shown, in another embodiment, the detection area 110 is circular in shape.
[0064] like Figures 10-15 As shown, step 6) is performed last, in which a metal layer 108 is formed on the P-type doped layer 103 in the detection region 110, and the metal layer 108 is patterned to form a grid-like electrode 111 in the detection region 110.
[0065] In one embodiment, a metal layer 108 can be formed on the P-type doped layer 103 in the detection region 110 by a sputtering process. The metal layer 108 can be copper, aluminum, titanium, gold, silver, tungsten, etc. In this embodiment, the metal layer 108 is an aluminum layer.
[0066] In one embodiment, for a rectangular detection area 110, the grid-like electrode 111 includes a plurality of first electrode lines 1111 arranged in rows and a plurality of second electrode lines 1112 arranged in columns. In this embodiment, the first electrode lines 1111 and the second electrode lines 1112 intersect perpendicularly, as shown below. Figure 13 As shown.
[0067] In another embodiment, for a rectangular or circular detection area 110, the grid-like electrode 111 includes a plurality of annular electrode lines 1113 with successively increasing radial dimensions and connecting electrode lines 1114 connecting the plurality of annular electrode lines 1113. In this embodiment, the width of the plurality of annular electrode lines 1113 gradually increases from the inside to the outside, so that the resistance distribution of each annular electrode line 1113 is more uniform, such as... Figure 14 and Figure 15As shown, in this embodiment, the number of connecting electrode lines 1114 can be, for example, 4 or 8, and the spacing between any two adjacent connecting electrode lines 1114 is equal.
[0068] Because the electron detector detection region 110 of this embodiment has a very shallow junction, its resistivity is relatively high. In addition to being affected by the thickness of the absorption region, the applied electric field, and the electron mobility in the material, the detector's response frequency is also affected by the applied series resistance. The larger the series resistance, the higher the detector's response speed, i.e., the cutoff frequency. Therefore, by meshing the electrodes and dividing and paralleling the resistance of the P-type doped layer 103, the detector's series resistance can be significantly reduced, thereby improving the detector's response speed and increasing its bandwidth.
[0069] like Figure 11 and Figure 12 As shown, the fabrication method further includes the step of forming a back electrode 109 on the surface of the N-type doped layer 104. Applying a voltage to the detector through the mesh electrode 111 and the back electrode 109, for example, with an absolute voltage difference of 60V, can induce a complete depletion state in the silicon substrate 101. Incident photons and electrons excite electron-hole pairs in the silicon substrate 101. These electron-hole pairs flow rapidly and directionally under the influence of a bias electric field, are collected by the electrodes to generate a current, thereby achieving the detection function.
[0070] like Figures 12-15 As shown, this embodiment also provides an ultra-shallow junction low-energy electron detector, the electron detector comprising: a silicon substrate 101 having opposing first and second surfaces; an ultra-shallow junction P-type doped layer 103 formed on the first surface of the silicon substrate 101 by thermal diffusion after forming a boron elemental layer 102 on the surface of the silicon substrate 101, the thickness of the P-type doped layer 103 being between 3 and 10 nm; an N-type doped layer 104 formed on the second surface of the silicon substrate 101; a guard ring structure 106 extending from the P-type doped layer 103 toward the silicon substrate 101; a barrier layer 107 formed on the P-type doped layer 103, the barrier layer 107 having a window that defines the detection region 110 of the electron detector; and a grid-like electrode 111 formed on the P-type doped layer 103 in the detection region 110.
[0071] In one embodiment, the thickness of the boron elemental layer 102 is between 2 nm and 3 nm.
[0072] In one embodiment, the doping concentration of the p-type doped layer 103 is between 1 × 10⁻⁶. 18 cm -3 ~1×10 20 cm -3between.
[0073] In one embodiment, the thickness of the silicon substrate 101 is between 300 μm and 500 μm.
[0074] In one embodiment, the shape of the detection area 110 includes one of the following: rectangle, circle, ellipse, trapezoid, pentagon, hexagon, and octagon.
[0075] In one embodiment, the material of the mesh electrode 111 includes one of copper, aluminum, titanium, gold, silver and tungsten, and the mesh electrode 111 and the P-type doped layer 103 are in ohmic contact to further reduce contact resistance.
[0076] In one embodiment, the grid-like electrode 111 includes a plurality of first electrode lines 1111 arranged in a cross pattern and a plurality of second electrode lines 1112 arranged in a plurality of columns.
[0077] In one embodiment, the mesh-like electrode 111 includes a plurality of annular electrode lines 1113 with sequentially increasing radial dimensions and connecting electrode lines 1114 connecting the plurality of annular electrode lines 1113. In this embodiment, the width of the plurality of annular electrode lines 1113 gradually increases from the inside to the outside, so that the resistance distribution of each annular electrode line 1113 is more uniform.
[0078] The detector region 110 of this embodiment has a relatively high resistivity due to the very shallow junction implantation. For example, when the intrinsic layer thickness is 10 nm and the P+ layer thickness is 10 nm, the sheet resistance of the film after thermal annealing is about 20 kΩ / □, and the resistivity is as high as 1000 Ω·cm. In contrast, the sheet resistance of the 1 μm deep doped layer formed by ion implantation is 20-30 Ω / □. The detector response frequency is affected not only by the absorption region thickness, the applied electric field, and the electron mobility in the material, but also by the applied effective series resistance. The formula for calculating the detector response frequency is shown in equation (1). Where f is the detector response frequency, C is the detector capacitance, and R is the detector effective series resistance. It can be seen that the larger the effective series resistance, the smaller the detector response speed, i.e., the cutoff frequency. By dividing and paralleling the resistance of the P-type doped layer 103, the effective series resistance of the detector can be significantly reduced, as shown in equation (2). Where R is the detector effective series resistance, R total Here, is the resistance of the p-type doped layer 103, and N is the equivalent parallel number of the gridded electrodes. Therefore, by gridding the electrodes, the detector's response speed and bandwidth can be improved.
[0079]
[0080]
[0081] In one embodiment, a back electrode 109 is further included, which is formed on the surface of the N-type doped layer 104. Applying a voltage, for example, a voltage difference of 60V, to the detector through the mesh-like electrode 111 and the back electrode 109 can induce a complete depletion state in the silicon substrate 101. Incident photons and electrons excite electron-hole pairs in the silicon substrate 101. These electron-hole pairs flow rapidly and directionally under the influence of a bias electric field, are collected by the electrodes to generate a current, thereby achieving the detection function.
[0082] As described above, the ultra-shallow junction deep low-energy electron detector of the present invention has the following beneficial effects:
[0083] This invention utilizes a diffusion process of elemental boron to form a P-type doped layer 103, resulting in a highly concentrated, ultra-shallow junction depth P-type doped layer 103, thereby enabling the detection of low-energy electrons below 500 eV. This invention effectively solves the problem of low-energy electron detection in electron detectors and significantly improves the detection efficiency for low-energy electrons.
[0084] This invention solves the problem of excessively high detector series resistance caused by shallow doping by performing a meshing process on the upper electrode. This invention can effectively reduce the series resistance, thereby improving the detector response speed and increasing the detector bandwidth.
[0085] Therefore, this invention effectively overcomes the various shortcomings of the prior art and has high industrial application value.
[0086] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.
Claims
1. An ultra-shallow junction deep low-energy electron detector, characterized by, The electronic detector includes: A silicon substrate comprising opposing first and second surfaces; An ultra-shallow junction deep P-type doped layer is formed on the first side of the silicon substrate by thermal diffusion after forming a boron elemental layer on the surface of the silicon substrate. The thickness of the P-type doped layer is between 3 and 10 nm. An N-type doped layer is formed on the second side of the silicon substrate; A protective ring structure extends from the P-type doped layer toward the silicon substrate; A barrier layer is formed on the p-type doped layer, and a window is formed in the barrier layer to define the detection area of the electron detector; A grid-like electrode is formed on a P-type doped layer in the detection region.
2. The ultra-shallow junction, low-energy electron detector of claim 1, wherein: The thickness of the boron elemental layer is between 2 nm and 3 nm.
3. The ultra-shallow junction, low-energy electron detector of claim 1, wherein: The P-type doped layer has a doping concentration between 1 x 10 18 cm -3 and 1 x 10 20 cm -3 .
4. The ultra-shallow junction deep low-energy electron detector according to claim 1, characterized in that: The thickness of the silicon substrate is between 300 μm and 500 μm.
5. The ultra-shallow junction deep low-energy electron detector according to claim 1, characterized in that: The shape of the detection area includes one of the following: rectangle, circle, ellipse, trapezoid, pentagon, hexagon, and octagon.
6. The ultra-shallow junction deep low-energy electron detector according to claim 1, characterized in that: The material of the mesh electrode includes one of copper, aluminum, titanium, gold, silver and tungsten, and the mesh electrode and the P-type doped layer are in ohmic contact.
7. The ultra-shallow junction deep low-energy electron detector according to claim 1, characterized in that: The grid-like electrode includes multiple rows of first electrode lines arranged in a cross pattern and multiple columns of second electrode lines arranged in a cross pattern.
8. The ultra-shallow junction deep low-energy electron detector according to claim 1, characterized in that: The mesh-like electrode includes a plurality of annular electrode lines with radial dimensions increasing sequentially, and connecting electrode lines that connect the plurality of annular electrode lines.
9. The ultra-shallow junction deep low-energy electron detector according to claim 8, characterized in that: The width of the plurality of ring electrode lines gradually increases from the inside to the outside.
10. The ultra-shallow junction deep low-energy electron detector according to claim 1, characterized in that: It also includes a back electrode, which is formed on the surface of the N-type doped layer.
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