A method for calculating longitudinal fault port impedance of a power system and related device

CN116973689BActive Publication Date: 2026-11-03CHINA SOUTHERN POWER GRID COMPANY +1
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Patent Information

Application Number
CN202310974371.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-08-03
Publication Date
2026-11-03
Estimated Expiration
2043-08-03

AI Technical Summary

Technical Problem

Existing technologies rely on augmented node admittance matrices when calculating the fault port impedance of asymmetric longitudinal faults in power systems, resulting in low computational efficiency and failing to meet the computational efficiency requirements of real-time simulation systems.

Method used

The Thevenin equivalent impedance of the target fault port is calculated using the current injection method based on the preset node admittance matrix and preset node impedance matrix. The system ground admittance and system equivalent impedance are solved based on the equivalent circuit before the fault and the Thevenin equivalent impedance. The equivalent circuit during the fault is simplified, and the impedance of the target fault port is calculated.

Benefits of technology

It simplifies the calculation process, reduces the dependence on the node admittance matrix, improves calculation efficiency, and enables the impedance of the fault port to be calculated quickly and accurately after a fault occurs.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a kind of power system longitudinal fault port impedance calculation method and related device, method includes: using current injection method according to preset node admittance matrix and preset node impedance matrix, the Thevenin equivalent impedance of two adjacent nodes of target fault port is calculated;Based on the equivalent circuit before fault respectively, the system ground admittance and system equivalent impedance of two adjacent nodes are solved;According to system ground admittance and system equivalent impedance, the equivalent circuit is simplified when fault, and system node admittance is obtained, system node admittance includes system simplified admittance, node simplified admittance and fusion admittance;According to system node admittance, system ground admittance and node ground admittance, the impedance of target fault port is calculated, and port impedance is obtained.The application can solve the technical problems that the calculation dependence of prior art on augmented node admittance matrix is too strong, resulting in low calculation efficiency, and cannot meet the actual calculation demand.
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Description

Technical Field

[0001] This application relates to the field of power system fault analysis technology, and in particular to a method and related apparatus for calculating the impedance of a longitudinal fault port in a power system. Background Technology

[0002] Short circuits in power systems are typically referred to as transverse faults, which occur when there is an abnormal connection between phases or between a phase and neutral at nodes in the network, leading to an asymmetrical operating state in a symmetrical system. Asymmetrical longitudinal faults, on the other hand, refer to an abnormal disconnection or unequal three-phase impedances between two adjacent nodes. The two adjacent nodes where an asymmetrical longitudinal fault occurs constitute the fault port.

[0003] Since asymmetric longitudinal faults can affect the normal operation of the power grid system if they persist, it is necessary to analyze the faults. The primary task in analyzing asymmetric longitudinal faults is to calculate the equivalent impedance of the fault port accurately and reliably. However, current calculation methods require recalculating the augmented node admittance matrix after a line break fault occurs before proceeding with subsequent analysis calculations. Obviously, this process will reduce computational efficiency, and it will also be inefficient on actual computers due to the large amount of memory required, failing to meet the computational efficiency requirements of real-time simulation systems. Summary of the Invention

[0004] This application provides a method and related apparatus for calculating the longitudinal fault port impedance of a power system, which solves the technical problem that the existing technology relies too heavily on the calculation of the augmented node admittance matrix, resulting in low calculation efficiency and failing to meet actual calculation needs.

[0005] In view of this, the first aspect of this application provides a method for calculating the impedance of a longitudinal fault port in a power system, comprising:

[0006] The Thevenin equivalent impedance of two adjacent nodes at the target fault port is calculated using the current injection method based on the preset node admittance matrix and preset node impedance matrix.

[0007] The system-to-ground admittance and system-equivalent impedance of the two adjacent nodes are solved based on the pre-fault equivalent circuit and the Thevenin equivalent impedance, respectively.

[0008] Based on the system ground admittance and the system equivalent impedance, the equivalent circuit under fault conditions is simplified to obtain the system node admittance, which includes system simplified admittance, node simplified admittance and fusion admittance.

[0009] The impedance of the target fault port is calculated based on the system node admittance, system-to-ground admittance, and node-to-ground admittance to obtain the port impedance.

[0010] Preferably, the step of calculating the Thevenin equivalent impedance of two adjacent nodes at the target fault port using the current injection method based on the preset node admittance matrix and preset node impedance matrix further includes:

[0011] Calculate the preset node admittance matrix of the power grid system before a node disconnection fault occurs;

[0012] The preset node admittance matrix is ​​inverted to obtain the preset node impedance matrix.

[0013] Preferably, the step of solving for the system-to-ground admittance and system equivalent impedance of the two adjacent nodes based on the pre-fault equivalent circuit and the Thevenin equivalent impedance includes:

[0014] Before a node disconnection fault, an equivalent circuit before the fault is constructed based on the topology of the two adjacent nodes of the target fault port and other power grid systems.

[0015] Obtain the node-to-ground admittance of the two adjacent nodes in the pre-fault equivalent circuit;

[0016] The system-to-ground admittance and system-equivalent impedance of the two adjacent nodes are calculated based on the node-to-ground admittance, the Thevenin equivalent impedance, and the pre-fault mutual impedance of the two adjacent nodes.

[0017] Preferably, the circuit simplification of the equivalent circuit under fault conditions based on the system ground admittance and the system equivalent impedance to obtain the system node admittance includes system simplified admittance, node simplified admittance, and fused admittance, including:

[0018] When a node disconnects, the faulty node is used as a reference, and the equivalent circuit during the fault is constructed based on the equivalent circuit before the fault.

[0019] The system equivalent impedance and the mutual impedance before the fault in the equivalent circuit before the fault are converted into system simplified admittance and node simplified admittance.

[0020] Eliminate the non-faulty nodes in the equivalent circuit before the fault, and fuse the system-to-ground admittance and the node-to-ground admittance adjacent to the non-faulty nodes to obtain the fused admittance.

[0021] A second aspect of this application provides a device for calculating the impedance of a longitudinal fault port in a power system, comprising:

[0022] Impedance equivalent unit, used to calculate the Thevenin equivalent impedance of two adjacent nodes at the target fault port using the current injection method based on the preset node admittance matrix and preset node impedance matrix;

[0023] The circuit solving unit is used to solve for the system-to-ground admittance and system-equivalent impedance of the two adjacent nodes based on the pre-fault equivalent circuit and the Thevenin equivalent impedance, respectively.

[0024] The circuit simplification unit is used to simplify the equivalent circuit under fault conditions based on the system ground admittance and the system equivalent impedance to obtain the system node admittance, which includes system simplified admittance, node simplified admittance and fusion admittance.

[0025] The impedance calculation unit is used to calculate the impedance of the target fault port based on the system node admittance, system-to-ground admittance, and node-to-ground admittance, and obtain the port impedance.

[0026] Preferably, it further includes:

[0027] The admittance matrix calculation unit is used to calculate the preset node admittance matrix of the power grid system before a node disconnection fault occurs.

[0028] The impedance matrix calculation unit is used to invert the preset node admittance matrix to obtain the preset node impedance matrix.

[0029] Preferably, the circuit solving unit is specifically used for:

[0030] Before a node disconnection fault, an equivalent circuit before the fault is constructed based on the topology of the two adjacent nodes of the target fault port and other power grid systems.

[0031] Obtain the node-to-ground admittance of the two adjacent nodes in the pre-fault equivalent circuit;

[0032] The system-to-ground admittance and system-equivalent impedance of the two adjacent nodes are calculated based on the node-to-ground admittance, the Thevenin equivalent impedance, and the pre-fault mutual impedance of the two adjacent nodes.

[0033] Preferably, the circuit simplification unit is specifically used for:

[0034] When a node disconnects, the faulty node is used as a reference, and the equivalent circuit during the fault is constructed based on the equivalent circuit before the fault.

[0035] The system equivalent impedance and the mutual impedance before the fault in the equivalent circuit before the fault are converted into system simplified admittance and node simplified admittance.

[0036] Eliminate the non-faulty nodes in the equivalent circuit before the fault, and fuse the system-to-ground admittance and the node-to-ground admittance adjacent to the non-faulty nodes to obtain the fused admittance.

[0037] A third aspect of this application provides a device for calculating the longitudinal fault port impedance of a power system, the device including a processor and a memory;

[0038] The memory is used to store program code and transmit the program code to the processor;

[0039] The processor is used to execute the power system longitudinal fault port impedance calculation method described in the first aspect according to the instructions in the program code.

[0040] A fourth aspect of this application provides a computer-readable storage medium for storing program code for executing the power system longitudinal fault port impedance calculation method described in the first aspect.

[0041] As can be seen from the above technical solutions, the embodiments of this application have the following advantages:

[0042] This application provides a method for calculating the impedance of a longitudinal fault port in a power system, comprising: calculating the Thevenin equivalent impedance of two adjacent nodes of the target fault port using a current injection method based on a preset node admittance matrix and a preset node impedance matrix; solving for the system-to-ground admittance and system equivalent impedance of the two adjacent nodes based on the equivalent circuit before the fault and the Thevenin equivalent impedance; simplifying the equivalent circuit during the fault based on the system-to-ground admittance and the system equivalent impedance to obtain the system node admittance, which includes the system simplified admittance, the node simplified admittance, and the fused admittance; and calculating the impedance of the target fault port based on the system node admittance, the system-to-ground admittance, and the node-to-ground admittance to obtain the port impedance.

[0043] This application provides a method for calculating the impedance of a longitudinal fault port in a power system. It only requires obtaining the pre-set node admittance matrix and pre-set node impedance matrix of the power system before the fault occurs to calculate the Thevenin equivalent impedance. Subsequent analysis and calculations do not rely on the node admittance matrix at all. Instead, based on the equivalent impedance algorithm, it constructs equivalent circuits before and during the fault, and then calculates the impedance of the target fault port based on these equivalent circuits. The calculation process is simple and easy to execute, with minimal computational redundancy, thus improving computational efficiency to a certain extent. Therefore, this application solves the technical problem of existing technologies that rely too heavily on the calculation of augmented node admittance matrices, resulting in low computational efficiency and failing to meet practical calculation requirements. Attached Figure Description

[0044] Figure 1 A flowchart illustrating a method for calculating the impedance of a longitudinal fault port in a power system, provided as an embodiment of this application;

[0045] Figure 2 A schematic diagram of the structure of a power system longitudinal fault port impedance calculation device provided in this application embodiment;

[0046] Figure 3 This is a schematic diagram of the equivalent circuit structure before the fault provided in the embodiments of this application;

[0047] Figure 4 This is a simplified structural diagram of the equivalent circuit before the fault provided in an embodiment of this application;

[0048] Figure 5 This is a schematic diagram of the equivalent circuit structure during a fault, provided in an embodiment of this application.

[0049] Figure 6 This is a simplified schematic diagram of the equivalent circuit in case of a fault, provided in an embodiment of this application. Detailed Implementation

[0050] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present application.

[0051] For easier understanding, please refer to Figure 1 An embodiment of a method for calculating the impedance of a longitudinal fault port in a power system provided in this application includes:

[0052] Step 101: Calculate the Thevenin equivalent impedance of two adjacent nodes at the target fault port using the current injection method based on the preset node admittance matrix and preset node impedance matrix.

[0053] It should be noted that the preset node admittance matrix and preset node impedance matrix are pre-calculated parameters, which can be expressed as Y and Z, respectively. Furthermore, the target fault port is determined based on two adjacent nodes. If the two adjacent nodes are represented as i and j, then the preset node impedance matrix includes the impedance of node i, the impedance of node j, and the pre-fault mutual impedance Z between node i and node j. ij .

[0054] The Thevenin equivalent impedance of node i can be obtained by performing the Thevenin impedance equivalent calculation based on the current injection method. The specific calculation process is expressed as follows:

[0055] YV = I

[0056] Where V is the i-th row of the preset node impedance matrix Z, i.e., V j That is, Z ijAssuming I = [0...0 1 0...0], where the i-th term is 1 and the rest are 0, solving the equation yields V, which is the Thevenin equivalent impedance sequence at node i. It is understandable that the Thevenin equivalent impedance Z at node i can be calculated based on the above equation. ii Thevenin equivalent impedance Z at node j jj Thevenin equivalent mutual impedance Z between node i and node j ij .

[0057] Furthermore, step 101, preceding the following, also includes:

[0058] Calculate the preset node admittance matrix of the power grid system before a node disconnection fault occurs;

[0059] The preset node admittance matrix is ​​inverted to obtain the preset node impedance matrix.

[0060] It should be noted that in this embodiment, only the node admittance matrix and the node impedance matrix need to be calculated once. That is, before the node disconnection fault, subsequent analysis and calculation operations do not rely on the node impedance matrix at the time of the fault. This can improve the calculation efficiency and reduce redundant calculations to a certain extent.

[0061] Step 102: Based on the pre-fault equivalent circuit and Thevenin equivalent impedance, solve for the system ground admittance and system equivalent impedance of the two adjacent nodes respectively.

[0062] Further, step 102 includes:

[0063] Before a node disconnection fault, an equivalent circuit before the fault is constructed based on the topology of the two adjacent nodes of the target fault port and other power grid systems.

[0064] Obtain the node-to-ground admittance of two adjacent nodes in the equivalent circuit before the fault.

[0065] The system-to-ground admittance and system-equivalent impedance of the two adjacent nodes are calculated based on the node-to-ground admittance, Thevenin equivalent impedance, and the pre-fault mutual impedance of the two adjacent nodes.

[0066] Please see Figure 3 Before a node disconnection fault, the system's circuit structure can be expressed as follows: Figure 3 It includes two adjacent nodes and the rest of the power grid system; there is a mutual impedance Z between the two adjacent nodes. L At this point, the mutual impedance is before the fault, and each of the two nodes has its own admittance to ground, i.e., the node admittance to ground Y. Li Y Lj Please see. Figure 4 If the remaining power grid system is simplified to a π-type equivalent line, then its system equivalent impedance can be described as Z. sSimilarly, the remaining power grid system between the two nodes also has ground admittance, i.e., the system ground admittance Y. si Y sj .

[0067] It should be noted that the node's ground admittance Y Li Y Lj These are parameters that can be directly obtained using existing equivalent techniques, so we can directly obtain the node-to-ground admittance of two adjacent nodes; while the system-to-ground admittance Y si Y sj It is the quantity that needs to be solved.

[0068] Specifically, the Thevenin equivalent impedance used in this embodiment includes the Thevenin equivalent impedance Z of node i. ii Thevenin equivalent impedance Z at node j jj Thevenin equivalent mutual impedance Z between node i and node j ij The pre-fault mutual impedance between two adjacent nodes is the mutual impedance Z between the two nodes before the fault. L The calculation process is as follows:

[0069]

[0070] System ground admittance Y si Let Y be the ground admittance of neighboring node i, and Y be the system ground admittance. sj The ground admittance of neighboring node j; and the system equivalent impedance Z s .

[0071] Step 103: Simplify the equivalent circuit under fault conditions based on the system ground admittance and the system equivalent impedance to obtain the system node admittance. The system node admittance includes the system simplified admittance, the node simplified admittance, and the fusion admittance.

[0072] Further, step 103 includes:

[0073] When a node is disconnected, the faulty node is used as a reference, and the equivalent circuit during the fault is constructed based on the equivalent circuit before the fault.

[0074] The system equivalent impedance and the mutual impedance before the fault in the equivalent circuit before the fault are converted into the system simplified admittance and the node simplified admittance.

[0075] The non-faulty nodes in the equivalent circuit before the fault are eliminated, and the system-to-ground admittance and node-to-ground admittance of the non-faulty nodes are fused to obtain the fused admittance.

[0076] Based on the equivalent circuit before the fault, the equivalent circuit for a node open-circuit fault can be constructed. Please refer to [link / reference]. Figure 5Once a node experiences a disconnection fault, a new node will be added. In this embodiment, node i is used as a reference example. When node i experiences a disconnection fault, a new node i' can be obtained. At this time, the port impedance at the fault location is the system impedance seen into the system from between node i and node i'.

[0077] The solution process begins with simplifying the circuit; please refer to [link / reference]. Figure 6 First, the system equivalent impedance Z s and the mutual impedance Z before the fault L It can be converted into the system simplified admittance Y s And node simplified admittance Y L Secondly, the system's equivalent impedance Z s System ground admittance Y sj Node-to-ground admittance Y Lj It is a star-shaped connection, and node j is eliminated using star-delta transformation; that is, the ground admittance near non-faulty node j can be fused for analysis, and the system ground admittance Y sj and node-to-ground admittance Y Lj After fusion, the fusion admittance Y can be obtained. Ls =Y sj +Y Lj .

[0078] Fusion-based circuits Figure 6 The simplified admittance Y of the system can be solved separately. s Node Simplified Admittance Y L and fusion admittance Y Ls :

[0079]

[0080] Among them, Z Ls This represents the fusion impedance, from which the fusion admittance Y can be calculated. Ls .

[0081] Step 104: Calculate the impedance of the target fault port based on the system node admittance, system-to-ground admittance, and node-to-ground admittance to obtain the port impedance.

[0082] based on Figure 6 Port impedance Z ii' The specific calculation process is as follows:

[0083]

[0084] This application provides a method for calculating the impedance of a longitudinal fault port in a power system. It only requires obtaining the preset node admittance matrix and preset node impedance matrix of the power system before the fault occurs to calculate the Thevenin equivalent impedance. Subsequent analysis and calculations do not rely on the node admittance matrix at all. Instead, based on the equivalent impedance algorithm, it constructs equivalent circuits before and during the fault, and then calculates the impedance of the target fault port based on these equivalent circuits. The calculation process is simple and easy to execute, with minimal computational redundancy, thus improving computational efficiency to a certain extent. Therefore, this application can solve the technical problem of existing technologies that rely too heavily on the calculation of augmented node admittance matrices, resulting in low computational efficiency and failing to meet practical calculation requirements.

[0085] For easier understanding, please refer to Figure 2 This application provides an embodiment of a power system longitudinal fault port impedance calculation device, comprising:

[0086] Impedance equivalent unit 201 is used to calculate the Thevenin equivalent impedance of two adjacent nodes of the target fault port using the current injection method based on the preset node admittance matrix and the preset node impedance matrix.

[0087] The circuit solving unit 202 is used to solve the system ground admittance and system equivalent impedance of two adjacent nodes based on the pre-fault equivalent circuit and Thevenin equivalent impedance, respectively.

[0088] The circuit simplification unit 203 is used to simplify the equivalent circuit under fault conditions based on the system ground admittance and the system equivalent impedance to obtain the system node admittance, which includes system simplification admittance, node simplification admittance and fusion admittance.

[0089] Impedance calculation unit 204 is used to calculate the impedance of the target fault port based on the system node admittance, system-to-ground admittance and node-to-ground admittance, and obtain the port impedance.

[0090] Furthermore, it also includes:

[0091] Admittance matrix calculation unit 205 is used to calculate the preset node admittance matrix of the power grid system before a node disconnection fault occurs.

[0092] Impedance matrix calculation unit 206 is used to invert the preset node admittance matrix to obtain the preset node impedance matrix.

[0093] Furthermore, the circuit solving unit 202 is specifically used for:

[0094] Before a node disconnection fault, an equivalent circuit before the fault is constructed based on the topology of the two adjacent nodes of the target fault port and other power grid systems.

[0095] Obtain the node-to-ground admittance of two adjacent nodes in the equivalent circuit before the fault.

[0096] The system-to-ground admittance and system-equivalent impedance of the two adjacent nodes are calculated based on the node-to-ground admittance, Thevenin equivalent impedance, and the pre-fault mutual impedance of the two adjacent nodes.

[0097] Furthermore, the circuit simplification unit 203 is specifically used for:

[0098] When a node is disconnected, the faulty node is used as a reference, and the equivalent circuit during the fault is constructed based on the equivalent circuit before the fault.

[0099] The system equivalent impedance and the mutual impedance before the fault in the equivalent circuit before the fault are converted into the system simplified admittance and the node simplified admittance.

[0100] The non-faulty nodes in the equivalent circuit before the fault are eliminated, and the system-to-ground admittance and node-to-ground admittance of the non-faulty nodes are fused to obtain the fused admittance.

[0101] This application also provides a device for calculating the longitudinal fault port impedance of a power system, the device including a processor and a memory;

[0102] The memory is used to store program code and transfer the program code to the processor;

[0103] The processor is used to execute the power system longitudinal fault port impedance calculation method in the above method embodiment according to the instructions in the program code.

[0104] This application also provides a computer-readable storage medium for storing program code for executing the power system longitudinal fault port impedance calculation method in the above method embodiments.

[0105] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0106] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0107] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0108] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for executing all or part of the steps of the methods described in the various embodiments of this application through a computer device (which may be a personal computer, server, or network device, etc.). The aforementioned storage medium includes: USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, optical disks, and other media capable of storing program code.

[0109] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A method for calculating the impedance of a longitudinal fault port in a power system, characterized in that, include: The Thevenin equivalent impedance of two adjacent nodes at the target fault port is calculated using the current injection method based on the preset node admittance matrix and preset node impedance matrix. The system-to-ground admittance and system-equivalent impedance of the two adjacent nodes are solved based on the pre-fault equivalent circuit and the Thevenin equivalent impedance, respectively. Based on the system ground admittance and the system equivalent impedance, the equivalent circuit under fault conditions is simplified to obtain the system node admittance, which includes system simplified admittance, node simplified admittance and fusion admittance. The impedance of the target fault port is calculated based on the system node admittance, the system ground admittance, and the node ground admittance to obtain the port impedance; The process of solving for the system-to-ground admittance and system-equivalent impedance of the two adjacent nodes based on the pre-fault equivalent circuit and the Thevenin equivalent impedance includes: Before a node disconnection fault, an equivalent circuit before the fault is constructed based on the topology of the two adjacent nodes of the target fault port and other power grid systems. Obtain the node-to-ground admittance of the two adjacent nodes in the pre-fault equivalent circuit; The system-to-ground admittance and system-equivalent impedance of the two adjacent nodes are calculated based on the node-to-ground admittance, the Thevenin equivalent impedance, and the pre-fault mutual impedance of the two adjacent nodes, respectively. The system simplifies the equivalent circuit during a fault based on the system's ground admittance and the system's equivalent impedance to obtain the system node admittance. The system node admittance includes system simplified admittance, node simplified admittance, and fused admittance, including: When a node disconnects, the faulty node is used as a reference, and the equivalent circuit during the fault is constructed based on the equivalent circuit before the fault. The system equivalent impedance and the mutual impedance before the fault in the equivalent circuit before the fault are converted into system simplified admittance and node simplified admittance. Eliminate the non-faulty nodes in the equivalent circuit before the fault, and fuse the system-to-ground admittance and the node-to-ground admittance adjacent to the non-faulty nodes to obtain the fused admittance.

2. The method for calculating the longitudinal fault port impedance of a power system according to claim 1, characterized in that, The method of calculating the Thevenin equivalent impedance of two adjacent nodes at the target fault port using the current injection method based on the preset node admittance matrix and preset node impedance matrix, previously included: Calculate the preset node admittance matrix of the power grid system before a node disconnection fault occurs; The preset node admittance matrix is ​​inverted to obtain the preset node impedance matrix.

3. A device for calculating the impedance of a longitudinal fault port in a power system, characterized in that, include: Impedance equivalent unit, used to calculate the Thevenin equivalent impedance of two adjacent nodes at the target fault port using the current injection method based on the preset node admittance matrix and preset node impedance matrix; The circuit solving unit is used to solve for the system-to-ground admittance and system-equivalent impedance of the two adjacent nodes based on the pre-fault equivalent circuit and the Thevenin equivalent impedance, respectively. The circuit simplification unit is used to simplify the equivalent circuit under fault conditions based on the system ground admittance and the system equivalent impedance to obtain the system node admittance, which includes system simplified admittance, node simplified admittance and fusion admittance. The impedance calculation unit is used to calculate the impedance of the target fault port based on the system node admittance, the system ground admittance, and the node ground admittance, and obtain the port impedance. The circuit solving unit is specifically used for: Before a node disconnection fault, an equivalent circuit before the fault is constructed based on the topology of the two adjacent nodes of the target fault port and other power grid systems. Obtain the node-to-ground admittance of the two adjacent nodes in the pre-fault equivalent circuit; The system-to-ground admittance and system-equivalent impedance of the two adjacent nodes are calculated based on the node-to-ground admittance, the Thevenin equivalent impedance, and the pre-fault mutual impedance of the two adjacent nodes, respectively. When a node disconnects, the faulty node is used as a reference, and the equivalent circuit during the fault is constructed based on the equivalent circuit before the fault. The system equivalent impedance and the mutual impedance before the fault in the equivalent circuit before the fault are converted into system simplified admittance and node simplified admittance. Eliminate the non-faulty nodes in the equivalent circuit before the fault, and fuse the system-to-ground admittance and the node-to-ground admittance adjacent to the non-faulty nodes to obtain the fused admittance.

4. The power system longitudinal fault port impedance calculation device according to claim 3, characterized in that, Also includes: The admittance matrix calculation unit is used to calculate the preset node admittance matrix of the power grid system before a node disconnection fault occurs. The impedance matrix calculation unit is used to invert the preset node admittance matrix to obtain the preset node impedance matrix.

5. A device for calculating the impedance of a longitudinal fault port in a power system, characterized in that, The device includes a processor and a memory; The memory is used to store program code and transmit the program code to the processor; The processor is used to execute the power system longitudinal fault port impedance calculation method according to any one of claims 1-2 according to the instructions in the program code.

6. A computer-readable storage medium, characterized in that, The computer-readable storage medium is used to store program code for executing the power system longitudinal fault port impedance calculation method according to any one of claims 1-2.

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