Memory emulation method

Abstract

The present disclosure relates to the field of semiconductor circuit testing, and particularly relates to a memory simulation method, comprising: providing a first refresh command and a second refresh command to a memory, and providing a plurality of word line opening commands to the memory between the first refresh command and the second refresh command; wherein the number of word line opening commands is generated based on a random seed, the word line address corresponding to each word line opening command is generated by the corresponding random seed, and the opening time corresponding to each word line opening command is generated by the corresponding random seed; obtaining a preset address required to be refreshed by the memory after different word line addresses are opened based on the plurality of word line opening commands; obtaining a refresh word line address refreshed by the memory based on the second refresh command; and judging whether the preset address+1 and the preset address-1 are located in the refresh word line address or not, so as to test whether the supplementary refresh function of the refresh circuit is normal, thereby ensuring the accuracy of the stored data in each storage area.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor circuit testing, and in particular to a memory simulation method. Background Technology

[0002] Dynamic Random Access Memory (DRAM) stores data through a structure (1T1C) where a transistor is connected to a memory area. The transistor is controlled by a word line (WL). When the WL is turned on, the charge in the memory area is shared with the charge of the bit line (BL) to read data from or write data to the target memory area.

[0003] However, frequent or prolonged activation of word lines can lead to charge loss in adjacent memory areas, a phenomenon known as row hammering in memory. This can cause errors in the data stored in the memory areas. The applicant discovered that additional refresh logic can be added to refresh the data in the memory areas adjacent to frequently activated and long-term activated word lines through a refresh circuit, thereby ensuring the accuracy of the data stored in each memory area.

[0004] How to test the function of the refresh circuit to ensure its normal operation and thus guarantee the accuracy of the stored data in each memory area is a technical problem that urgently needs to be solved. Summary of the Invention

[0005] This disclosure provides a memory simulation method for testing whether the supplementary refresh function of the refresh circuit is normal, thereby ensuring the accuracy of the stored data in each memory area.

[0006] This disclosure provides a memory emulation method applied to a memory. The memory is used to supplement and refresh word line addresses that meet a preset scenario. The word line addresses that meet the preset scenario include: adjacent addresses of word line addresses whose enable time exceeds a preset time, and / or adjacent addresses of word line addresses whose enable count exceeds a preset number of times. The method includes: providing a first refresh command and a second refresh command to the memory, and providing multiple word line enable commands to the memory between the first refresh command and the second refresh command; wherein the number of word line enable commands is generated based on a randomization seed, the word line address corresponding to each word line enable command is generated by a corresponding randomization seed, and the enable time corresponding to each word line enable command is generated by a corresponding randomization seed; obtaining the preset address to be refreshed after the memory enables different word line addresses based on multiple word line enable commands; obtaining the refreshed word line address refreshed by the memory based on the second refresh command; and determining whether the preset address + 1 and the preset address - 1 are located in the refreshed word line address.

[0007] By simulating the normal working environment of the memory, the preset address that conforms to the preset scenario under the current working environment is obtained. Then, the word line address is refreshed by the second refresh command. It is determined whether the preset address + 1 and preset address - 1 have been refreshed to obtain whether the supplementary refresh logic designed for the memory has been executed, thereby realizing the test of the supplementary refresh function of the memory.

[0008] In addition, determining whether preset address +1 and preset address -1 are located in the refresh word line address includes: if preset address +1 and preset address -1 are located in the refresh word line address, then the supplementary refresh function of the memory based on the second refresh command is normal; if preset address +1 and preset address -1 are not located in the refresh word line address, then the supplementary refresh function of the memory based on the second refresh command is abnormal.

[0009] In addition, providing a first refresh command and a second refresh command to the memory includes: providing a plurality of refresh commands to the memory, wherein the number of refresh commands is generated based on a randomization seed, and the interval between adjacent refresh commands is generated based on different randomization seeds; wherein, within the interval between adjacent refresh commands, a refresh command that has been refreshed in the memory is used as the first refresh command, and a refresh command that has not been refreshed in the memory is used as the second refresh command.

[0010] In addition, within the interval of different refresh commands, the number of word line enable commands is generated based on different randomization seeds. The value of the randomization seed corresponding to the enable time of the same word line enable command is different, and the value of the randomization seed corresponding to the word line address enabled by the same word line enable command is different, so as to simulate whether the memory's supplementary refresh function is normal under continuous normal working conditions.

[0011] In addition, within the interval of different refresh commands, the randomization seed value corresponding to the number of word line enable commands is the same, the randomization seed value corresponding to the enable time of the same word line enable command is the same, and the randomization seed value corresponding to the word line address enabled by the same word line enable command is the same. By setting multiple refresh commands with different intervals between different refresh commands, it is possible to determine whether the memory's supplementary refresh function is normal under the difference of refresh interval alone.

[0012] In addition, after determining whether the preset address +1 and preset address -1 are located in the refresh word line address, the process also includes: for different second refresh commands, if the memory's supplementary refresh function based on the second refresh command is normal, then the memory's supplementary refresh function is normal; for different second refresh commands, if there is a problem with the memory's supplementary refresh function based on the second refresh command, then the memory's supplementary refresh function is abnormal.

[0013] In addition, after determining whether preset address +1 and preset address -1 are located in the refresh word line address, the process also includes: adjusting the value of the randomization seed corresponding to the number of refresh commands; adjusting the value of the different randomization seeds corresponding to the interval between every two adjacent refresh commands; adjusting the value of the different randomization seeds corresponding to the number of word line opening commands between every two adjacent refresh commands; adjusting the value of the randomization seed corresponding to the opening time of each word line opening command; adjusting the value of the randomization seed corresponding to the word line address opened by each word line opening command; and determining whether preset address +1 and preset address -1 are located in the refresh word line address again. By repeatedly adjusting the values ​​of each randomization seed, repeated testing is achieved to improve the persuasiveness of the test results.

[0014] In addition, the memory simulation method also includes: storing the acquired preset address in the judgment module; storing the acquired refresh word line address in the judgment module; judging whether the preset address + 1 and preset address - 1 are located in the refresh word line address, which is automatically executed in the judgment module. By implementing test automation, the human resources required for judging test results are saved, and machine judgment is faster and more accurate than manual judgment.

[0015] In addition, the memory simulation method also includes: if it is determined that the preset address +1 and preset address -1 are not in the refresh word line address, output the unrefreshed address, so as to facilitate engineers to improve the supplementary refresh function of the memory.

[0016] In addition, the memory simulation method also includes: if it is determined that the preset address +1 and the preset address -1 are not in the refresh word line address, output the value corresponding to all randomization seeds between the first refresh command and the second refresh command, output the value of the randomization seed, that is, output the corresponding test environment, so as to facilitate engineers to improve the supplementary refresh function of the memory.

[0017] In addition, the preset address is the word line address whose opening time exceeds the preset time, and / or the word line address whose opening count exceeds the preset number of times.

[0018] In addition, the preset time setting value is less than the memory potential flip-on time; the potential flip-on time is: when the memory cell of the adjacent address of the word line address undergoes a potential flip, the opening time of the word line address is less than the memory potential flip-on time, so as to ensure that the memory with normal refresh function under test conditions will still have normal refresh function after being put into use.

[0019] In addition, the preset number of times is set less than the number of times the memory potential flip is enabled; the number of times the potential flip is enabled is: the number of times the word line address is enabled when the memory cell of the adjacent address of the word line address undergoes a potential flip. The preset number of times is set less than the number of times the memory potential flip is enabled, so as to ensure that the memory with normal refresh function under test conditions will still have normal refresh function after being put into use.

[0020] In addition, the number of refresh commands is generated based on a randomized seed, including: pre-setting the number of refresh commands corresponding to each integer within the range of the randomized seed generation, and generating a corresponding number of refresh commands based on the integers generated by the randomized seed; the interval between refresh commands is generated based on a randomized seed, including: pre-setting the time interval between refresh commands corresponding to each integer within the range of the randomized seed generation, and inserting refresh commands according to the corresponding time interval based on the integers generated by the randomized seed.

[0021] In addition, the number of word line enable commands is generated based on a randomization seed, including: pre-setting the number of word line enable commands corresponding to each integer within the randomization seed generation range, and generating a corresponding number of word line enable commands based on the integers generated by the randomization seed; the word line address corresponding to each word line enable command is generated by the randomization seed, including: pre-setting the word line address corresponding to each integer within the randomization seed generation range, and enabling the corresponding word line address based on the integers generated by the randomization seed; the enabling time corresponding to each word line enable command is generated by the corresponding randomization seed, including: pre-setting the enabling time corresponding to each integer within the randomization seed generation range, and providing word line enable commands with corresponding enabling durations based on the integers generated by the randomization seed. Attached Figure Description

[0022] One or more embodiments are illustrated by way of example with corresponding pictures in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Unless otherwise stated, the pictures in the accompanying drawings do not constitute a limitation on scale. In order to more clearly illustrate the technical solutions in the embodiments of this disclosure or in the conventional art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0023] Figure 1 A schematic diagram of the structure of a memory provided in an embodiment of this disclosure;

[0024] Figure 2 A schematic flowchart of a memory emulation method provided in an embodiment of this disclosure;

[0025] Figure 3This is a schematic diagram illustrating the principle of a memory simulation method provided in an embodiment of this disclosure. Detailed Implementation

[0026] Frequent or prolonged activation of word lines can lead to charge loss in adjacent memory areas, a phenomenon known as row hammering in memory. This can cause errors in the data stored in the memory areas. The applicant discovered that additional refresh logic can be added to refresh the data in adjacent memory areas of frequently activated and long-term activated word lines through a refresh circuit, thereby ensuring the accuracy of the data stored in each memory area. How to test the function of the refresh circuit to ensure its normal operation and thus guarantee the accuracy of the data stored in each memory area is a pressing technical problem that needs to be solved.

[0027] One embodiment of this disclosure provides a memory simulation method for testing whether the supplementary refresh function of the refresh circuit is normal, thereby ensuring the accuracy of the stored data in each memory area.

[0028] It will be understood by those skilled in the art that many technical details have been provided in the various embodiments of this disclosure to facilitate a better understanding of the disclosure. However, the technical solutions claimed in this disclosure can be implemented even without these technical details and various variations and modifications based on the following embodiments. The division of the following embodiments is for ease of description and should not constitute any limitation on the specific implementation of this disclosure. The various embodiments can be combined with and referenced by each other without contradiction.

[0029] Figure 1 This is a schematic diagram of the memory structure provided in this embodiment. Figure 2 This is a flowchart illustrating the memory emulation method provided in this embodiment. Figure 3 The diagram below illustrates the principle of the memory simulation method provided in this embodiment. The memory simulation method provided in this embodiment will be further described in detail below with reference to the accompanying drawings:

[0030] For the memory provided in this embodiment, refer to Figure 1 The memory includes:

[0031] The preprocessing module 101 is used to receive the word line enable command Act and the clock signal Clk, and count the clock signal Clk when the word line enable command Act is received. When the count value reaches the preset value, the word line address corresponding to the current word line enable command is output as the word line address signal.

[0032] The word line enable command Act is used to enable word line WL. The specific word line WL that is enabled is controlled by the word line address corresponding to the word line enable command Act. The clock signal Clk is counted when the word line enable command Act is received. That is, when both the word line enable command Act and the clock signal Clk are active, the count is incremented by one. This setting can ensure that more count values ​​can be collected for word lines that have been enabled for a long time, thereby increasing the probability that the word line address Address corresponding to the word line that has been enabled for a long time will be output as the word line address signal.

[0033] Address processing module 102 is connected to preprocessing module 101. It counts the received word line address signals and outputs the word line address signal that appears most frequently as the row hammer address.

[0034] Address processing module 102 is used to output word line address signals that appear multiple times, i.e., word line addresses that are enabled multiple times. In addition, as mentioned above, word line addresses that are enabled for a long time are also likely to be input to address processing module 102. Therefore, the row hammer address output by address processing module 102 takes into account both situations where word line WL is enabled multiple times or enabled for a long time.

[0035] The first processing unit 113 is connected to the address processing module and is used to generate a first supplementary refresh address and a second supplementary refresh address based on the received row hammer address, wherein the word line WL pointed to by the first supplementary refresh address and the second supplementary refresh address is adjacent to the word line WL pointed to by the row hammer address.

[0036] That is, the first supplementary refresh address = the hammer address + 1, the second supplementary refresh address = the hammer address - 1, or the first supplementary refresh address = the hammer address - 1, the second supplementary refresh address = the hammer address + 1.

[0037] The second processing unit 123 is used to generate a regular refresh address based on the refresh command.

[0038] The refresh unit 104 is connected to the first processing unit 113 and the second processing unit 123, and is used to perform a refresh operation according to the acquired address signal.

[0039] The address signal received by the refresh unit 104 each time is one of the regular refresh address, the first supplementary refresh address, and the second supplementary refresh address, wherein the regular refresh address is the refresh address corresponding to the refresh command.

[0040] Control unit 103 is connected to first processing unit 113 and second processing unit 123, and is used to select the output normal refresh address, first supplementary refresh address and second supplementary refresh address, or connected to refresh unit 104, and is used to control refresh unit 104 to select the receiving normal refresh address, first supplementary refresh address or second supplementary refresh address.

[0041] Specifically, the control unit 103 is configured to output the regular refresh address when the second processing unit 123 generates the regular refresh address, and to refresh the first supplementary refresh address and the second supplementary refresh address after the refresh unit 104 completes the refresh of the regular refresh address.

[0042] The preprocessing module 101 counts the clock signal Clk when the word line enable command Act is received, increasing the probability that the word line address Address corresponding to the word line that has been enabled for a long time will be output as the word line address signal. Thus, the address processing module 102 counts the word line address signal that appears most frequently, so that the row hammer address output by the address processing module 102 takes into account both the case of word line WL being enabled multiple times or being enabled for a long time. When a refresh command is received, the control unit 103 controls the input of the regular refresh address to the refresh unit 104 for refreshing the regular refresh address. After the refresh unit 104 has finished refreshing the regular refresh address, the control unit 103 controls the input of the first supplementary refresh address and the second supplementary refresh address to the refresh unit 104. The refresh unit 104 refreshes based on the first supplementary refresh address and the second supplementary refresh address to prevent the loss of charge in adjacent memory areas due to frequent or long-term enabling of word line WL, thus avoiding errors in the data stored in the memory area.

[0043] The memory simulation method is applied to a memory, which is used to refresh word line addresses that meet a preset scenario. The word line addresses that meet the preset scenario include: adjacent addresses of word line addresses whose open time exceeds a preset time, and / or adjacent addresses of word line addresses whose open times exceed a preset number of times. That is, the memory simulation method provided in this disclosure is used to test the refresh function of the above-mentioned memory.

[0044] refer to Figure 2 The memory simulation method includes: step 11, providing a first refresh command, a second refresh command, and multiple word line enable commands.

[0045] For details, please refer to the following: Figure 3 It provides the memory with a first refresh command Ref1 and a second refresh command Ref2, and provides the memory with multiple word line enable commands Active between the first refresh command Ref1 and the second refresh command Ref2.

[0046] In this context, the first refresh command Ref1 is a refresh command that the memory has already processed, and the second refresh command Ref2 is a refresh command that the memory is about to process. That is, the memory operates between the timing of the first refresh command Ref1 and the second refresh command Ref2.

[0047] The number of word line enable commands (Active) is generated based on the randomization seed Number1. The word line address corresponding to each word line enable command (Active) is generated by the corresponding randomization seed, and the enable time corresponding to each word line enable command (Active) is generated by the corresponding randomization seed.

[0048] Specifically, for the x word line enable commands Active generated by randomization seed Number1, for the first word line enable command, the address of the enabled word line is determined by randomization seed A1, and the duration of the enable is determined by randomization seed t1; for the second word line enable command, the address of the enabled word line is determined by randomization seed A2, and the duration of the enable is determined by randomization seed t2; ..., for the seventh word line enable command, the address of the enabled word line is determined by randomization seed A7, and the duration of the enable is determined by randomization seed t7; ..., for the xth word line enable command, the address of the enabled word line is determined by randomization seed Ax, and the duration of the enable is determined by randomization seed tx.

[0049] By using different randomization seeds, the randomness of word line opening between the first refresh command Ref1 and the second refresh command Ref2 is completely simulated, thereby simulating the normal working environment of the memory. By simulating the normal working environment of the memory, the test results are more accurate.

[0050] refer to Figure 2 Step 12: Obtain the preset address to be refreshed.

[0051] Specifically, the preset address to be refreshed is obtained after the memory enables different word line addresses based on multiple word line enable commands.

[0052] The preset address is the word line address whose opening time exceeds a preset time, and / or the word line address whose opening count exceeds a preset number of times; that is, based on the normal working environment of the memory simulated in step 11, the preset address that conforms to the preset scenario under the current working environment is obtained.

[0053] Step 13: Obtain the word line address refreshed by the memory based on the second refresh command.

[0054] Specifically, the refresh word line address of the memory refreshed based on the second refresh command is obtained.

[0055] The memory refreshes word line addresses based on the second refresh command, including the memory's normal refresh function and supplementary refresh function. The normal refresh function is the word line address that needs to be refreshed during the memory refresh operation, while the supplementary refresh function is used to refresh the addresses adjacent to the preset address.

[0056] Step 14: Determine if the refresh function is working properly.

[0057] Specifically, determine whether the preset address +1 and preset address -1 are located in the refresh word line address.

[0058] As is known from the background technology, frequent or prolonged activation of word lines can lead to charge loss in adjacent memory areas. This means that the data stored in memory cells adjacent to the preset address may be erroneous. Preset address +1 and preset address -1 are adjacent addresses of the preset address. The supplementary refresh function is used to refresh preset address +1 and preset address -1. By determining whether preset address +1 and preset address -1 are located at the refresh word line address, it can be determined whether the memory continues to perform supplementary refresh and whether the memory's supplementary refresh function is normal.

[0059] In summary, this embodiment obtains a preset address that conforms to a preset scenario under the current working environment by simulating the normal working environment of the memory, and then refreshes the word line address by using a second refresh command. It then determines whether the preset address + 1 and preset address - 1 have been refreshed to determine whether the supplementary refresh logic designed for the memory has been executed, thereby realizing the test of the supplementary refresh function of the memory.

[0060] Specifically, determining whether preset address +1 and preset address -1 are located in the refresh word line address includes: if preset address +1 and preset address -1 are located in the refresh word line address, then the supplementary refresh function of the memory based on the second refresh command is normal; if preset address +1 and preset address -1 are not located in the refresh word line address, then the supplementary refresh function of the memory based on the second refresh command is abnormal.

[0061] Continue to refer to Figure 3 In some embodiments, providing a first refresh command Ref1 and a second refresh command Ref2 to the memory includes: providing a plurality of refresh commands to the memory, wherein the number of refresh commands is generated based on a randomization seed, and the interval between adjacent refresh commands is generated based on different randomization seeds. Specifically, within the interval between adjacent refresh commands, a refresh command that has already been refreshed in the memory is used as the first refresh command, and a refresh command that has not yet been refreshed in the memory is used as the second refresh command.

[0062] Specifically, the number of refresh commands is determined by the randomization seed Number. Among the multiple refresh commands, the first refresh interval is determined by the randomization seed T1, the second refresh interval by the randomization seed T2, the third refresh interval by the randomization seed T3, the fourth refresh interval by the randomization seed T4, and so on.

[0063] It should be noted that the interval between adjacent refresh commands generated based on different randomization seeds must meet the standards specified by JEDEC.

[0064] In some embodiments, within the interval of different refresh commands, the randomization seed values ​​corresponding to the number of word line enable commands are the same, the randomization seed values ​​corresponding to the enable time of the same word line enable command are the same, and the randomization seed values ​​corresponding to the word line address enabled by the same word line enable command are the same; that is, under the condition that all other conditions are the same, only the interval between refresh commands is changed, so as to obtain whether the supplementary refresh function of the memory is normal under the difference of refresh interval by setting multiple refresh commands and different intervals between different refresh commands.

[0065] In some embodiments, the number of word line enable commands within the interval of different refresh commands is generated based on different randomization seeds.

[0066] Specifically, the number of word line enable commands in the first refresh interval is determined by randomization seed Number1, the number of word line enable commands in the second refresh interval is determined by randomization seed Number2, the number of word line enable commands in the third refresh interval is determined by randomization seed Number3, and the number of word line enable commands in the fourth refresh interval is determined by randomization seed Number4...

[0067] Furthermore, the randomization seed values ​​corresponding to the start times of the same word line enable command are different, and the randomization seed values ​​corresponding to the word line addresses enabled by the same word line enable command are different. That is, for word line enable commands within different refresh intervals, the corresponding refresh addresses and start times are also different, in order to simulate whether the memory's supplementary refresh function is normal under continuous normal working conditions.

[0068] For this scheme, after determining whether the preset address +1 and preset address -1 are located in the refresh word line address, the following steps are taken: for different second refresh commands, if the memory's supplementary refresh function based on the second refresh command is normal, then the memory's supplementary refresh function is normal; for different second refresh commands, if there is a problem with the memory's supplementary refresh function based on the second refresh command, then the memory's supplementary refresh function is abnormal.

[0069] In some embodiments, after determining whether preset address +1 and preset address -1 are located in the refresh word line address, the method further includes: adjusting the value of the randomization seed corresponding to the number of refresh commands; adjusting the value of the different randomization seeds corresponding to the interval between every two adjacent refresh commands; adjusting the value of the different randomization seeds corresponding to the number of word line enable commands between every two adjacent refresh commands; adjusting the value of the randomization seed corresponding to the enable time of each word line enable command; and adjusting the value of the randomization seed corresponding to the word line address enabled by each word line enable command; to determine again whether preset address +1 and preset address -1 are located in the refresh word line address. By repeatedly adjusting the values ​​of each randomization seed, repeated testing is achieved to improve the persuasiveness of the test results.

[0070] In some embodiments, the memory further includes a judgment module, and the memory emulation method further includes: storing the acquired preset address in the judgment module and storing the acquired refresh word line address in the judgment module, that is, storing the corresponding results of steps 12 and 13 in the judgment module. At this time, step 14 is automatically executed in the judgment module, that is, judging whether preset address +1 and preset address -1 are located in the refresh word line address, which is automatically executed in the judgment module. Specifically, after executing step 14, the judgment module stores the preset address and the refresh word line address refreshed by the memory based on the second refresh command. The judgment module compares multiple refresh word line addresses one by one based on preset address +1 to determine whether preset address +1 has been refreshed. Similarly, the judgment module compares multiple refresh word line addresses one by one based on preset address -1 to determine whether preset address -1 has been refreshed.

[0071] By automating testing, we can save the human resources required to judge test results, and machine judgment is faster and more accurate than human judgment.

[0072] Furthermore, in some embodiments, if it is determined that preset address + 1 and preset address - 1 are not in the refresh word line address, the unrefreshed address is output. Outputting the unrefreshed address facilitates engineers in improving the supplementary refresh function of the memory.

[0073] Furthermore, in some embodiments, if it is determined that preset address +1 and preset address -1 are not in the refresh word line address, the values ​​corresponding to all randomization seeds between the first refresh command Ref1 and the second refresh command Ref2 are output. Outputting the values ​​of the randomization seeds, i.e., outputting the corresponding test environment, facilitates engineers in improving the supplementary refresh function of the memory.

[0074] In some embodiments, the preset time setting value is less than the memory potential flip-on time; wherein, the potential flip-on time is: the time when the memory cell of the adjacent address of the word line address undergoes a potential flip.

[0075] In some embodiments, the preset number of times is set less than the number of times the memory potential flip is enabled; wherein, the number of times the potential flip is enabled is: the number of times the word line address is enabled when the memory cell of the adjacent address of the word line address undergoes a potential flip.

[0076] It should be noted that the "potential flip" feature mentioned above refers to the potential change of the data stored in the memory area caused by the row hammer phenomenon of the memory.

[0077] Among them, the potential switching on time and the number of potential switching on are estimated based on the performance of the storage unit. The preset time setting is less than the storage potential switching on time, and the preset number setting is less than the storage potential switching on number, so as to ensure that the supplementary refresh function is normal under test conditions and remains normal after the storage unit is put into use.

[0078] It should be noted that in other embodiments, the preset time setting value can also be set to be equal to the memory potential flip-on time, and the preset number setting value can also be set to be equal to the memory potential flip-on number.

[0079] It should be noted that, for the randomization seed provided in this embodiment, the number of refresh commands is generated based on the randomization seed, including: pre-setting the number of refresh commands corresponding to each integer within the randomization seed generation range, and generating a corresponding number of refresh commands based on the integers generated by the randomization seed; the interval between refresh commands is generated based on the randomization seed, including: pre-setting the time interval between refresh commands corresponding to each integer within the randomization seed generation range, and inserting refresh commands according to the corresponding time interval based on the integers generated by the randomization seed. The number of word line enable commands is generated based on the randomization seed, including: pre-setting the number of word line enable commands corresponding to each integer within the randomization seed generation range, and generating a corresponding number of word line enable commands based on the integers generated by the randomization seed; the word line address corresponding to each word line enable command is generated by the randomization seed, including: pre-setting the word line address corresponding to each integer within the randomization seed generation range, and enabling the corresponding word line address based on the integers generated by the randomization seed; the enabling time corresponding to each word line enable command is generated by the corresponding randomization seed, including: pre-setting the enabling time corresponding to each integer within the randomization seed generation range, and providing word line enable commands with corresponding enabling durations based on the integers generated by the randomization seed.

[0080] This embodiment uses different randomization seeds to completely simulate the randomness of word line opening between the first refresh command Ref1 and the second refresh command Ref2, thereby simulating the normal working environment of the memory. By simulating the normal working environment of the memory, the test results are more accurate.

[0081] All units involved in this embodiment are logical units. In practical applications, a logical unit can be a physical unit, a part of a physical unit, or a combination of multiple physical units. Furthermore, to highlight the innovative aspects of this disclosure, this embodiment does not introduce units that are not closely related to solving the technical problems proposed in this disclosure; however, this does not mean that other units are absent from this embodiment.

[0082] It should be noted that the features disclosed in the memory emulation method provided in the above embodiments can be arbitrarily combined without conflict to obtain new memory emulation method embodiments.

[0083] Those skilled in the art will understand that the above embodiments are specific embodiments for implementing the present disclosure, and in practical applications, various changes in form and detail may be made without departing from the spirit and scope of the present disclosure.

Claims

1. A memory emulation method, applied to a memory, wherein the memory is used to refresh word line addresses that conform to a preset scenario, the word line addresses conforming to the preset scenario including: The adjacent addresses of word line addresses whose activation time exceeds a preset time, and / or adjacent addresses of word line addresses whose activation count exceeds a preset number, characterized in that they include: A first refresh command and a second refresh command are provided to the memory, and between the first refresh command and the second refresh command, a plurality of word line enable commands are provided to the memory; The number of word line enable commands is generated based on a randomization seed. The word line address corresponding to each word line enable command is generated by the corresponding randomization seed, and the enable time corresponding to each word line enable command is generated by the corresponding randomization seed. Obtain the preset address that needs to be refreshed after the memory enables different word line addresses based on multiple word line enable commands; Obtain the refresh word line address of the memory refreshed based on the second refresh command; Determine whether the preset address + 1 and the preset address - 1 are located in the refresh word line address.

2. The memory simulation method according to claim 1, characterized in that, The step of determining whether the preset address + 1 and the preset address - 1 are located within the refresh word line address includes: If the preset address +1 and the preset address -1 are located in the refresh word line address, then the supplementary refresh function of the memory based on the second refresh command is normal; If the preset address +1 and the preset address -1 are not in the refresh word line address, then the supplementary refresh function of the memory based on the second refresh command is abnormal.

3. The memory emulation method according to claim 1, characterized in that, Providing the first refresh command and the second refresh command to the memory includes: Multiple refresh commands are provided to the memory, the number of which is generated based on a randomization seed, and the interval between adjacent refresh commands is generated based on different randomization seeds; Specifically, within the interval between adjacent refresh commands, the refresh command that has already refreshed the memory is used as the first refresh command, and the refresh command that has not yet refreshed the memory is used as the second refresh command.

4. The memory emulation method according to claim 3, characterized in that, Within the interval of different refresh commands, the number of word line enable commands is generated based on different randomization seeds. The value of the randomization seed corresponding to the enable time of the same word line enable command is different, and the value of the randomization seed corresponding to the word line address enabled by the same word line enable command is different.

5. The memory simulation method according to claim 3, characterized in that, Within the intervals of different refresh commands, the randomization seed values ​​corresponding to the number of word line enable commands are the same, the randomization seed values ​​corresponding to the enable time of the same word line enable command are the same, and the randomization seed values ​​corresponding to the word line address enabled by the same word line enable command are the same.

6. The memory emulation method according to any one of claims 3-5, characterized in that, After determining whether the preset address + 1 and the preset address - 1 are located within the refresh word line address, the method further includes: For different second refresh commands, if the supplementary refresh function of the memory based on the second refresh command is normal, then the supplementary refresh function of the memory is normal. If the supplementary refresh function of the memory based on the second refresh command is abnormal for different second refresh commands, then the supplementary refresh function of the memory is abnormal.

7. The memory emulation method according to claim 4 or 5, characterized in that, After determining whether the preset address + 1 and the preset address - 1 are located in the refresh word line address, the method further includes: Adjust the value of the randomization seed corresponding to the number of refresh commands; Adjust the value of the different randomization seeds corresponding to the interval between every two adjacent refresh commands; Adjust the value of the different randomization seeds corresponding to the number of word lines enabled between every two adjacent refresh commands; Adjust the value of the randomization seed corresponding to the activation time of each of the aforementioned word line activation commands; Adjust the value of the randomization seed corresponding to the address of the word line enabled by each of the aforementioned word line enable commands; Determine again whether the preset address +1 and the preset address -1 are located in the refresh word line address.

8. The memory emulation method according to claim 1, characterized in that, Also includes: The obtained preset address is stored in the judgment module; The obtained refresh word line address is stored in the judgment module; The determination of whether the preset address +1 and the preset address -1 are located in the refresh word line address is automatically executed in the determination module.

9. The memory emulation method according to claim 8, characterized in that, Also includes: If the preset address + 1 and the preset address - 1 are not in the refresh word line address, output the address that has not been refreshed.

10. The memory emulation method according to claim 8, characterized in that, Also includes: If the preset address +1 and the preset address -1 are not in the refresh word line address, output the values ​​corresponding to all the randomization seeds between the first refresh command and the second refresh command.

11. The memory emulation method according to claim 1, characterized in that, The preset address is a word line address whose opening time exceeds a preset time, and / or a word line address whose opening count exceeds a preset number of times.

12. The memory emulation method according to claim 11, characterized in that, The preset time setting value is less than the memory potential flip-on time; the potential flip-on time is: the time when the memory cell of the adjacent address of the word line address undergoes a potential flip.

13. The memory emulation method according to claim 11, characterized in that, The preset number of times is less than the number of times the memory potential flip is enabled; the number of times the potential flip is enabled is: the number of times the word line address is enabled when the memory cell of the adjacent address of the word line address undergoes a potential flip.

14. The memory emulation method according to claim 3, characterized in that, include: The number of refresh commands is generated based on a randomized seed, including: pre-setting the number of refresh commands corresponding to each integer within the range of the randomized seed generation, and generating a corresponding number of refresh commands based on the integers generated by the randomized seed; The interval between refresh commands is generated based on a randomized seed, including: pre-setting the time interval between refresh commands corresponding to each integer within the range of the randomized seed generation, and inserting the refresh command according to the corresponding time interval based on the integer generated by the randomized seed.

15. The memory emulation method according to claim 4, characterized in that, include: The number of word line enable commands is generated based on a randomized seed, including: pre-setting the number of word line enable commands corresponding to each integer within the range of the randomized seed generation, and generating a corresponding number of word line enable commands based on the integers generated by the randomized seed; Each word line enable command corresponds to a word line address generated by a randomization seed, including: pre-setting the word line address corresponding to each integer within the range of the randomization seed generation, and enabling the corresponding word line address based on the integer generated by the randomization seed and the word line enable command. The activation time corresponding to each word line activation command is generated by a corresponding randomization seed, including: setting the activation time corresponding to each integer within the range of the randomization seed generation, and providing a word line activation command with a corresponding activation duration based on the integer generated by the randomization seed.

Images