A system of agile frequency components for scatter communication

Abstract

The application discloses a frequency agile assembly system for scatter communication and belongs to the technical field of scatter communication. Both the transmitting channel and the receiving channel adopt a secondary frequency conversion mode, an intermediate frequency circuit utilizes DDS to complete signal hopping, and a fixed local oscillator is used in a radio frequency circuit to generate corresponding radio frequency signals. The application combines existing device resources and process levels, utilizes the high speed and high resolution characteristics of DDS to meet the requirement that the frequency hopping interval of scatter communication is increasingly smaller, and further mixes the fixed local oscillator module with high frequency to solve the defect of low DDS output frequency. Compared with the traditional frequency agile assembly architecture of scatter communication, the application reduces the complexity and cost of the assembly, improves the reliability of the frequency agile assembly, and is suitable for various scene applications.

Description

Technical Field

[0001] This invention relates to the field of scatter communication technology, specifically to a frequency agile component system for scatter communication. It can be used as a design reference for frequency agile components in scatter communication and has advantages such as low cost and high reliability. Background Technology

[0002] With the development of scatter communication technology, scatter communication equipment is evolving towards greater variety, lighter weight, lower cost, and flexible networking capabilities. This places increasingly higher demands on the design of various modules within scatter communication systems. In today's increasingly fierce electronic warfare, communication equipment is required to possess anti-interference and anti-interception capabilities. Therefore, frequency-agile components typically employ frequency-hopping technology to improve their noise immunity and anti-tracking capabilities. As communication systems develop year by year, the requirements for frequency hopping rates and data transmission rates are also becoming increasingly stringent.

[0003] The frequency synthesizer is one of the key components of the frequency agile module. It has a direct impact on the frequency switching rate, which in turn affects the communication quality, stability, and reliability of the entire scatter communication system.

[0004] In the field of scatter communication technology, in order to achieve microsecond (µs) frequency hopping rates, existing frequency agile components often employ ping-pong ring phase-locked loop (PLL) technology, direct digital frequency synthesis (DDS) technology, and hybrid frequency synthesis technology (PLL+DDS).

[0005] like Figure 1 The diagram illustrates a frequency-agile transmit link using ping-pong phase-locked loop (PLL) technology. After the intermediate frequency (IF) signal is input, it is mixed once with a fixed local oscillator to generate an intermediate high-frequency (IF) signal. This IF signal is then mixed with one channel of the ping-pong PLL to generate the required radio frequency (RF) signal, which is then filtered, amplified, and output. At frequency 1, PLL1 is locked, and the corresponding switch is open. When frequency switching is required, PLL2 is already locked at the corresponding frequency; simply opening the corresponding ping-pong switch is sufficient. Because the switching time of the ping-pong switch is only in the nanosecond range (ns), the frequency hopping rate can meet the requirements, but its scalability is poor. Reducing the frequency step or increasing the frequency hopping frequency cannot satisfy the requirements, and there is a high degree of integer boundary spurious emissions.

[0006] Using Direct Digital Synthesis (DDS) technology to provide the local oscillator frequency for agile frequency converters has obvious advantages: high frequency resolution, fast frequency conversion time, good stability and low phase noise. However, the main disadvantage is the low output frequency. If a higher local oscillator frequency is required, frequency conversion or frequency multiplication circuits are needed, which increases the design complexity and introduces more spurious channels, making it difficult to meet user needs.

[0007] To solve the above problems, a method has gradually evolved to adopt, such as Figure 2The link structure shown utilizes DDS for fractional frequency division, which improves frequency resolution while reducing integer boundary spurious signals and achieves fast loop locking with reduced frequency step size. However, this design increases consumables and system complexity. To avoid frequency spurious signals caused by load changes during frequency switching, a buffer or matching network is added before the ping-pong switch, further increasing the complexity of the frequency synthesizer circuit. This undoubtedly increases cost and reduces reliability, especially for lightweight, networked applications. Summary of the Invention

[0008] To address the aforementioned shortcomings in existing technologies, there is an urgent need for a frequency agile component with high frequency resolution, small frequency step size, low spurious emissions, and rapid locking. This invention primarily provides a frequency agile component system for scatter communication, solving the aforementioned problems while also possessing advantages such as simple design, low complexity, controllable cost, and high reliability, making it suitable for various application scenarios.

[0009] The objective of this invention is achieved through the following technical solution:

[0010] A frequency-agile component system for scatter communication includes a radio frequency channel, a processing and control unit, and a reference input;

[0011] In the transmission channel, a first filter, a first mixer, a second filter, a first amplifier, and a first RF switch are connected in sequence. The intermediate frequency (IF) signal from the baseband is filtered by the first filter and then enters the first mixer. The IF signal is mixed with the low local oscillator (LO) signal to obtain an intermediate high frequency (IF) signal, which is then filtered and amplified by the second filter and the first amplifier in sequence, and the IF signal is output to the first RF switch. The first fixed local oscillator (LO) is connected to the input terminal of the DDSI, and the output terminal of the DDSI is connected to the first mixer. The first fixed LO provides a reference signal to the DDSI, enabling the DDS to generate a high-resolution LO signal and output it to the first mixer.

[0012] The high-frequency signal is selected by the first RF switch and mixed with the high-frequency local oscillator signal generated by the second fixed local oscillator in the second mixer or mixed with the high-frequency local oscillator signal generated by the third fixed local oscillator in the third mixer. The second mixer, the third filter, and the second amplifier are connected sequentially, as are the third mixer, the fourth filter, and the third amplifier. The second fixed local oscillator is connected to the second mixer, and the high-frequency local oscillator signal generated by the second fixed local oscillator is mixed in the second mixer. The third fixed local oscillator is connected to the third mixer, and the high-frequency local oscillator signal generated by the third fixed local oscillator is mixed in the third mixer. The two amplified signals are output to the two moving terminals of the third RF switch through the two moving terminals of the second RF switch, respectively. The stationary terminals of the second and third RF switches are connected. The two moving terminals of the third RF switch are connected to the two moving terminals of the fourth RF switch through corresponding fifth and sixth filters, respectively. The stationary terminal of the fourth RF switch is used for RF output.

[0013] In the receiving channel, the radio frequency received at the antenna end is processed by a low-noise amplifier and then enters the fifth RF switch. The two moving terminals of the fifth RF switch are connected to the seventh and eighth filters, respectively. The other ends of the seventh and eighth filters are connected to the two moving terminals of the sixth RF switch, respectively. The stationary terminal of the sixth RF switch is connected to the stationary terminal of the seventh RF switch. The two moving terminals of the seventh RF switch are connected to the ninth and tenth filters, respectively. The ninth filter, the fourth amplifier, and the fourth mixer are connected in sequence, as are the tenth filter, the fifth amplifier, and the fifth mixer. The fourth fixed local oscillator is connected to the fourth mixer, and the fifth fixed local oscillator is connected to the fifth mixer. The fourth and fifth mixers are connected to the two moving terminals of the eighth RF switch, respectively. The stationary terminal of the eighth RF switch, the eleventh filter, the sixth mixer, the twelfth filter, and the sixth amplifier are connected in sequence. The sixth amplifier outputs the intermediate frequency signal to the baseband. The low local oscillator frequency of the DDSII output, which provides the reference frequency from the sixth fixed local oscillator, is mixed in the sixth mixer.

[0014] Each RF switch and DDS is connected to the processing and control unit, and the reference input is used to improve the stability of the reference clock signal for the RF circuit and the intermediate frequency circuit.

[0015] Compared with the prior art, the present invention has the following advantages:

[0016] The intermediate frequency circuit of this invention uses a DDS to provide a low local oscillator frequency and uses a low-cost fixed local oscillator to provide a reference frequency for the DDS. This can provide RF link characteristics with low spurious emissions, small step size, and fast frequency hopping, while improving frequency accuracy. The frequency step size meets the requirement of 0.5MHz after testing.

[0017] The radio frequency circuit of this invention divides the entire signal bandwidth into two sub-bands, uses a low-cost fixed local oscillator module to provide a high local oscillator frequency, and after each branch is converted to a suitable frequency band, the input or output is selected by a radio frequency switch, which improves the reliability of the system to a certain extent. When a single sub-band fails, the other sub-band can be selected for point-frequency communication.

[0018] The frequency agile converter of the present invention adopts a superheterodyne form and completes two frequency conversions using DDS and fixed local oscillator. This avoids the problems caused by using PLL and DDS alone, reduces the complexity and cost requirements of the frequency synthesizer used in combination with PLL and DDS, and avoids the problem of frequency switching load traction in the use of ping-pong ring frequency source. It completes the frequency conversion using a low-cost and reliable fixed local oscillator module, and improves the integration level of the frequency agile converter. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of a frequency-agile transmit link circuit using ping-pong phase-locked loop technology;

[0020] Figure 2 This is a schematic diagram of a frequency-agile transmit link circuit using DDS technology and ping-pong phase-locked loop technology;

[0021] Figure 3 This is a schematic diagram of the circuit architecture of the frequency conversion component of this invention;

[0022] Figure 4 This is a block diagram of the hardware implementation architecture of the variable frequency drive component of this invention. Detailed Implementation

[0023] A frequency-agile component architecture for scatter communication, such as Figure 3 As shown, the system consists of several parts, including an RF channel, a frequency synthesizer, a processing and control unit, a power supply, and a reference input. The RF channel is mainly divided into a transmit channel and a receive channel. For the transmit channel, the RF signal enters through the intermediate frequency (IF) input port, is mixed once with a DDS to generate an intermediate frequency (IF) signal, which is then filtered, amplified, and mixed with a fixed local oscillator (LO) to generate the RF signal. After further filtering and amplification, the signal is output from the RF output port. For the receive channel, the signal enters through the RF input port, is filtered, amplified, and mixed once with a fixed LO to obtain an intermediate frequency (IF) signal. After further filtering, it is mixed twice with a DDS to generate the required IF signal, which is output from the IF output port. The frequency synthesizer uses a DDS to provide a low LO frequency at the IF level and a fixed LO to provide a high LO frequency at the RF level. The reference input uses a multi-channel power divider to provide a reference frequency to each fixed LO. The processing and control unit uses a RAM chip for logic control and is connected to the control lines of the DDS and RF switches to provide monitoring signals. The power supply uses multiple linear regulators of different voltages to power the frequency synthesizer, RF switches, amplifiers, RAM, etc.

[0024] The transmission channel includes an intermediate frequency circuit comprising a first filter, a first mixer, a second filter, a first amplifier, a first radio frequency switch, a first fixed local oscillator, and a DDSI; and a radio frequency circuit comprising a second mixer, a third mixer, a third filter, a fourth filter, a second fixed local oscillator, a third fixed local oscillator, a second amplifier, a third amplifier, a second radio frequency switch, a third radio frequency switch, a fifth filter, a sixth filter, and a fourth radio frequency switch. The intermediate frequency (IF) signal from the baseband is filtered by the first filter and then enters the first mixer. The first fixed local oscillator (LOO) provides a reference signal to the DDSI, enabling the DDS to generate a high-resolution low LO signal, which is output to the first mixer. The IF signal is mixed with the low LO signal to obtain an intermediate high frequency (IF) signal, which is then filtered and amplified by the second filter and the first amplifier, and output to the first RF switch. The second and third fixed LOOs convert the RF band into two sub-bands. The IF signal is selected by the first RF switch and can be mixed with the high LO signal generated by the second fixed LO in the second mixer, or mixed with the high LO signal generated by the third fixed LO in the third mixer. The resulting sub-band RF signal is filtered by the third and fourth filters and amplified by the second and third amplifiers before entering the second and third RF switches. After being filtered by the fifth and sixth filters of different sub-bands, it is output to the power amplifier by the fourth RF switch.

[0025] The receiving channel includes a radio frequency circuit consisting of a fifth radio frequency switch, a seventh filter, an eighth filter, a sixth radio frequency switch, a seventh radio frequency switch, a ninth filter, a tenth filter, a fourth amplifier, a fifth amplifier, a fourth mixer, a fifth mixer, a fourth fixed local oscillator, and a fifth fixed local oscillator; the intermediate frequency circuit includes an eighth radio frequency switch, an eleventh filter, a sixth mixer, a twelfth filter, a sixth amplifier, a sixth fixed local oscillator, and a DDSII. The radio frequency (RF) signal received by the antenna is processed by a low-noise amplifier, then enters two sub-bands through the fifth RF switch. It is then filtered by the seventh and eighth filters, and after passing through the sixth and seventh RF switches, it enters different sub-band channels. After being filtered and amplified by the ninth filter and the fourth amplifier, or the tenth filter and the fifth amplifier, it is output to the fourth and fifth mixers. There, it is mixed with the high local oscillator frequency provided by the fourth or fifth fixed local oscillator, generating an intermediate frequency (IF) signal which is output to the eighth RF switch and enters the intermediate frequency (IF) circuit. The IF signal is then filtered by the eleventh filter and mixed with the low local oscillator frequency output from the DDSII (reference frequency provided by the sixth fixed local oscillator) in the sixth mixer. The resulting IF signal is filtered and amplified by the twelfth filter and the sixth amplifier before being output to the baseband.

[0026] Among them, the intermediate frequency circuit frequency synthesizer uses a fixed local oscillator to provide a lower frequency reference for the DDS output low local oscillator frequency, and the radio frequency circuit frequency synthesizer uses a fixed local oscillator module to provide a higher local oscillator frequency. The fixed local oscillators are all modularly designed, with separate frequency points, excellent phase noise and spurious performance, low cost, and simple and clear control logic.

[0027] The following is a further description of this embodiment.

[0028] Reference Figure 3 The present invention includes an intermediate frequency circuit, a radio frequency circuit, a reference input, a processing and control unit, and a power supply.

[0029] This invention achieves the mutual conversion between radio frequency (RF) and intermediate frequency (IF) signals in the transceiver channel through two frequency conversions. The selected IF frequency is much larger than the operating bandwidth, while the intermediate frequency is close to the signal bandwidth. This improves image frequency suppression while facilitating the extraction of useful channels and suppressing adjacent channel interference. Dividing the RF signal bandwidth into two sub-bands enhances the isolation between the transceiver channels, ensuring spurious suppression of the received signal at the lowest possible communication rate.

[0030] The main function of the radio frequency (RF) circuit in this invention is to up-convert the intermediate frequency (IF) signal output from the intermediate frequency (IF) circuit to the RF band, thus completing the shift from IF to RF frequency; and to perform spectrum separation and down-conversion of the RF signal to an IF signal, which is then sent to the IF circuit, completing the shift from the RF band to the IF band. The main function of the IF circuit is to mix the baseband-input IF signal to an IF band, thus completing the frequency shift from IF to IF; and to down-convert the IF signal to an IF band, which is then sent to the baseband, thus completing the spectrum shift from IF to IF.

[0031] In this invention, such as Figure 4 As shown, the frequency word of the DDS and the closing direction of the switches in the RF channel are configured through the RAM chip to achieve monitoring and management of the transceiver channel. (Reference Input) f REF Provides a stable reference clock signal for RF and IF circuits.

[0032] In this invention, such as Figure 4 As shown, the local oscillator frequency of the intermediate frequency circuit is provided by the DDS. Due to the limitation of Nyquist's law, the maximum output frequency of the DDS cannot exceed 0.4 GHz. f i ( f i(i=1, 2) represents the reference frequency provided by the fixed local oscillator for the DDS. Using a fixed-frequency local oscillator module to provide the reference frequency for the DDS is low-cost, requires no control circuitry, and outputs the reference frequency upon power-up. The frequency hopping function is implemented by the DDS. By configuring the frequency word FTW, phase word POW, amplitude word ASF, and corresponding SPI timing, a frequency stabilization time of less than 2μs can be achieved, enabling small-step frequency hopping with a frequency step of 0.5MHz.

[0033] In this invention, the local oscillator frequency of the radio frequency circuit is provided by a fixed local oscillator, eliminating the need for RAM control; a fixed frequency is output immediately upon power-up. For example... Figure 4 As shown, the fixed local oscillator frequencies corresponding to different RF sub-bands within the transceiver channel are different, namely... f 3 and f 4. The corresponding transceiver channel RF circuit needs to output four fixed local oscillators at two frequency points. When the receiving channel fixed local oscillator outputs... f At 3 o'clock, the launch channel outputs... f 4. When the receiving channel has a fixed local oscillator output f At 4 o'clock, the launch channel output... f 3.

[0034] In this invention, the power supply circuit provides a stable, linear, and reliable power supply to the entire intermediate frequency circuit, radio frequency circuit, local oscillator circuit, and processing control circuit. It linearly regulates and filters the power supplied from the interface circuit, outputting different voltages.

[0035] The working principle of this invention is as follows:

[0036] The frequency-agile component using the architecture of this invention employs a frequency division duplex (FDM) operating mode. Based on frequency information issued by the upper-level monitoring unit, the RAM chip controls multiple RF switches to switch the transmit and receive channels to different sub-frequency bands. Simultaneously, the RAM chip writes frequency control words, phase control words, amplitude control words, and corresponding SPI control words into the corresponding DDSI and DDSII to generate the corresponding frequency hopping frequencies. The RF input signal and intermediate frequency input signal are amplified and filtered through multiple stages to generate the corresponding intermediate frequency signal and RF signal output. The specific circuit structure is as follows:

[0037] In the transmission channel, the intermediate frequency circuit includes a first filter, a first mixer, a second filter, a first amplifier, a first radio frequency switch, a first fixed local oscillator, and a DDSI; the radio frequency circuit includes a second mixer, a third mixer, a third filter, a fourth filter, a second fixed local oscillator, a third fixed local oscillator, a second amplifier, a third amplifier, a second radio frequency switch, a third radio frequency switch, a fifth filter, a sixth filter, and a fourth radio frequency switch. The intermediate frequency (IF) signal from the baseband is filtered by the first filter and then enters the first mixer. The first fixed local oscillator (LOO) provides a reference signal to the DDSI, enabling the DDS to generate a high-resolution low LO signal, which is output to the first mixer. The IF signal is mixed with the low LO signal to obtain an intermediate high frequency (IF) signal, which is then filtered and amplified by the second filter and the first amplifier, and output to the first RF switch. The second and third fixed LOOs convert the RF band into two sub-bands. The IF signal is selected by the first RF switch and can be mixed with the high LO signal generated by the second fixed LO in the second mixer, or mixed with the high LO signal generated by the third fixed LO in the third mixer. The resulting sub-band RF signal is filtered by the third and fourth filters and amplified by the second and third amplifiers before entering the second and third RF switches. After being filtered by the fifth and sixth filters of different sub-bands, it is output to the power amplifier by the fourth RF switch.

[0038] The receiving channel includes a radio frequency circuit consisting of a fifth radio frequency switch, a seventh filter, an eighth filter, a sixth radio frequency switch, a seventh radio frequency switch, a ninth filter, a tenth filter, a fourth amplifier, a fifth amplifier, a fourth mixer, a fifth mixer, a fourth fixed local oscillator, and a fifth fixed local oscillator; the intermediate frequency circuit includes an eighth radio frequency switch, an eleventh filter, a sixth mixer, a twelfth filter, a sixth amplifier, a sixth fixed local oscillator, and a DDSII. The radio frequency (RF) signal received by the antenna is processed by a low-noise amplifier, then enters two sub-bands through the fifth RF switch. It is then filtered by the seventh and eighth filters, and after passing through the sixth and seventh RF switches, it enters different sub-band channels. After being filtered and amplified by the ninth filter and the fourth amplifier, or the tenth filter and the fifth amplifier, it is output to the fourth and fifth mixers. There, it is mixed with the high local oscillator frequency provided by the fourth or fifth fixed local oscillator, generating an intermediate frequency (IF) signal which is output to the eighth RF switch and enters the intermediate frequency (IF) circuit. The IF signal is then filtered by the eleventh filter and mixed with the low local oscillator frequency output from the DDSII (reference frequency provided by the sixth fixed local oscillator) in the sixth mixer. The resulting IF signal is filtered and amplified by the twelfth filter and the sixth amplifier before being output to the baseband.

Claims

1. A frequency agile component system for scatter communication, comprising a radio frequency channel, a processing and control unit and a reference input; characterized in that, in the transmitting channel, a first filter, a first mixer, a second filter, a first amplifier and a first radio frequency switch are connected in sequence, a baseband given intermediate frequency signal is filtered by the first filter and then enters the first mixer, the intermediate frequency signal is mixed with a low local oscillator signal to obtain a high intermediate frequency signal, the high intermediate frequency signal is filtered and amplified in turn by the second filter and the first amplifier, and then is output to the first radio frequency switch; a first fixed local oscillator is connected to the input end of DDSI, the output end of DDSI is connected to the first mixer, and the first fixed local oscillator provides a reference signal for DDSI, so that the DDS generates a high-resolution low local oscillator signal output to the first mixer; the high intermediate frequency signal is selected by the first radio frequency switch, and is mixed with a high local oscillator signal generated by a second fixed local oscillator in a second mixer or with a high local oscillator signal generated by a third fixed local oscillator in a third mixer; wherein the second mixer, a third filter and a second amplifier are connected in sequence, the third mixer, a fourth filter and a third amplifier are connected in sequence; the second fixed local oscillator is connected to the second mixer, and the high local oscillator signal generated by the second fixed local oscillator is mixed in the second mixer; the third fixed local oscillator is connected to the third mixer, and the high local oscillator signal generated by the third fixed local oscillator is mixed in the third mixer; the two amplified signals are respectively output to the two movable ends of a third radio frequency switch through the two movable ends of a second radio frequency switch, wherein the fixed end of the second radio frequency switch is connected to the fixed end of the third radio frequency switch; the two movable ends of the third radio frequency switch are respectively connected to the two movable ends of a fourth radio frequency switch through corresponding fifth and sixth filters, and the fixed end of the fourth radio frequency switch is used for radio frequency output; in the receiving channel, the radio frequency received by the antenna end is processed by a low noise amplifier and then enters a fifth radio frequency switch, the two movable ends of the fifth radio frequency switch are respectively connected to a seventh filter and an eighth filter; the other ends of the seventh filter and the eighth filter are respectively connected to the two movable ends of a sixth radio frequency switch, and the fixed end of the sixth radio frequency switch is connected to the fixed end of the seventh radio frequency switch; the two movable ends of the seventh radio frequency switch are respectively connected to a ninth filter and a tenth filter; wherein the ninth filter, a fourth amplifier and a fourth mixer are connected in sequence, the tenth filter, a fifth amplifier and a fifth mixer are connected in sequence; a fourth fixed local oscillator is connected to the fourth mixer, and a fifth fixed local oscillator is connected to the fifth mixer; the fourth mixer and the fifth mixer are respectively connected to the two movable ends of an eighth radio frequency switch; the fixed end of the eighth radio frequency switch, an eleventh filter, a sixth mixer, a twelfth filter and a sixth amplifier are connected in sequence, and the sixth amplifier outputs an intermediate frequency signal to a baseband; wherein a sixth fixed local oscillator mixes a low local oscillator frequency output by a DDSII providing a reference frequency in the sixth mixer; each radio frequency switch and DDS are connected to the processing and control unit, and the reference input provides a stable reference clock signal for the radio frequency circuit and the intermediate frequency circuit.

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