Bandgap reference voltage source circuit, electronic circuit, and electronic device

Abstract

The application provides a band gap reference voltage source circuit, an electronic circuit and an electronic device. Through a compensation submodule, a first current in a zero temperature condition can be determined according to a zero temperature resistor, a second current can be determined according to a positive temperature current generated in the circuit, and a compensation voltage of the circuit can be determined according to the first current and the second current, so as to reduce the influence of temperature drift on the performance of the circuit by eliminating high-order temperature drift terms. In addition, through a ripple suppression module, the voltage clamping of the compensation submodule is adjusted, the amplitude of the reference voltage is limited, the suppression of signals generated by unnecessary devices in the circuit is realized in a negative feedback manner, the ripple suppression ratio parameter of the circuit is improved, and the comprehensive performance of the circuit is improved.

Description

Technical Field

[0001] This application relates to electronic technology, and more particularly to a bandgap reference voltage source circuit, electronic circuit, and electronic device. Background Technology

[0002] A bandgap voltage reference source utilizes the negative temperature coefficient of the base-emitter junction voltage of a transistor and the positive temperature coefficient of the voltage difference between the two base-emitter junctions under different current densities to compensate for each other, resulting in a low temperature coefficient for the output voltage. In high-precision sampling systems, the overall deviation of the reference source is of concern, among which temperature drift parameters, power supply rejection, and load regulation are important indicators affecting the application of the reference source.

[0003] Traditional bandgap reference voltage sources can achieve a temperature coefficient of 40 ppm / °C. Ultra-low temperature drift bandgap reference voltage sources eliminate high-order temperature terms that cannot be eliminated in traditional schemes through high-order temperature compensation circuits. Theoretically, ultra-low temperature drift reference voltage sources can be obtained with a magnitude of less than 5 ppm / °C, which can be used in relatively high-precision systems.

[0004] However, this compensation method cannot guarantee the circuit's ability to suppress power supply ripple. Therefore, it is necessary to ensure that the bandgap reference voltage source has a high power supply rejection ratio (PSRR) on the basis of achieving temperature compensation in order to improve the overall circuit performance of the bandgap reference voltage source. Summary of the Invention

[0005] This application provides a bandgap reference voltage source circuit, electronic circuit, and electronic device to solve the problems of poor temperature drift performance and poor power supply ripple suppression capability of the bandgap reference voltage source circuit.

[0006] In a first aspect, this application provides a bandgap reference voltage source circuit, the circuit comprising:

[0007] Power supply module and ripple suppression module;

[0008] The power supply module includes a compensation submodule, and the power supply module is connected to the ripple suppression module.

[0009] The compensation submodule is used to determine the compensation voltage based on the first current and the second current. The power supply module is used to output a reference voltage based on the compensation voltage. The ripple suppression module is used to limit the amplitude of the reference voltage by adjusting the voltage clamp of the compensation submodule.

[0010] As an optional implementation, the power supply module includes: a reference current source, a first resistor to a fourth resistor, a first operational amplifier, and a second operational amplifier;

[0011] The compensation submodule includes: a first transistor to a third transistor;

[0012] Wherein, the first end of the first resistor is grounded and connected to the first end of the reference current source, the second end of the reference current source is connected to the non-inverting input of the second operational amplifier, and the second end of the first resistor is connected to the first end of the second resistor and connected to the inverting input of the second operational amplifier;

[0013] In this configuration, the first terminals of the first transistor and the second transistor are interconnected; the second terminal of the first transistor is connected to the second terminal of the second resistor; the second terminal of the second transistor is connected to the first terminal of the second resistor; the third terminal of the first transistor is connected to the first terminal of the third resistor; the third terminal of the second transistor is connected to the first terminal of the fourth resistor; the second terminals of the third resistor and the fourth resistor are connected to the first terminal of the ripple suppression module; the first terminal of the third resistor is connected to the non-inverting input terminal of the first operational amplifier; the first terminal of the fourth resistor is connected to the inverting input terminal of the first operational amplifier; the first terminal of the third transistor is connected to the first terminal of the first transistor and the first terminal of the second transistor; the first terminal of the third transistor is also connected to the output terminal of the first operational amplifier and the third terminal of the third transistor; and the second terminal of the third transistor is connected to the non-inverting input terminal of the second operational amplifier.

[0014] The output terminals of the first operational amplifier and the second operational amplifier are connected together and connected to the third terminal of the ripple suppression module. The non-inverting input terminal of the first operational amplifier is connected to the second terminal of the ripple suppression module.

[0015] As an optional implementation, the compensation submodule further includes: a fourth transistor and a fifth transistor;

[0016] The first terminals of the fourth transistor and the fifth transistor are connected to each other, and the first terminal of the fourth transistor is connected to the third terminal, the first terminal of the fifth transistor is connected to the third terminal, the third terminal of the fourth transistor is connected to the second terminal of the first transistor, the third terminal of the fifth transistor is connected to the second terminal of the second transistor, the second terminal of the fourth transistor is connected to the second terminal of the second resistor, and the second terminal of the fifth transistor is connected to the first terminal of the second resistor.

[0017] As an optional implementation, the compensation submodule further includes a sixth transistor;

[0018] The first terminal of the sixth transistor is connected to the third terminal, the third terminal of the sixth transistor is connected to the second terminal of the third transistor, and the second terminal of the sixth transistor is connected to the non-inverting input terminal of the second operational amplifier.

[0019] As an alternative implementation, the first to sixth transistors include: transistors or field-effect transistors.

[0020] As an optional implementation, the ripple suppression module includes a third operational amplifier and a seventh transistor;

[0021] Wherein, the non-inverting input terminal of the third operational amplifier serves as the second terminal of the ripple suppression module, the inverting input terminal of the third operational amplifier serves as the third terminal of the ripple suppression module, the output terminal of the third operational amplifier is connected to the first terminal of the seventh transistor, the second terminal of the seventh transistor serves as the first terminal of the ripple suppression module, and the third terminal of the seventh transistor is connected to the power supply voltage.

[0022] As an optional implementation, the third operational amplifier includes: a first capacitor, a fifth to a seventh resistor, and a seventh to a fourteenth transistor;

[0023] Wherein, the first terminal of the seventh transistor serves as the non-inverting input terminal of the third operational amplifier, the first terminal of the eighth transistor serves as the inverting input terminal of the third operational amplifier, and the first terminal of the fifth resistor serves as the output terminal of the third operational amplifier;

[0024] Wherein, the third terminal of the seventh transistor is connected to the first terminal of the sixth resistor, the third terminal of the eighth transistor is connected to the first terminal of the seventh resistor, the first and third terminals of the ninth transistor are connected and connected to the first terminal of the tenth transistor, the third terminal of the ninth transistor is connected to the second terminal of the seventh transistor, the third terminal of the tenth transistor is connected to the second terminal of the eighth transistor, and the second terminals of the ninth transistor and the second terminals of the tenth transistor are grounded.

[0025] Wherein, the second end of the fifth resistor is connected to the first end of the first capacitor, the first end of the fifth resistor is connected to the third end of the eleventh transistor, the first end of the eleventh transistor is connected to the third end of the tenth transistor and the second end of the first capacitor, and the second end of the eleventh transistor is grounded.

[0026] Wherein, the second terminal of the twelfth transistor is connected to the third terminal of the eleventh transistor, the first terminal of the twelfth transistor is connected to the first terminal of the thirteenth transistor and the first terminal of the fourteenth transistor, the third terminals of the twelfth transistor, the thirteenth transistor and the fourteenth transistor are connected to the supply voltage, the first terminal and the second terminal of the thirteenth transistor are connected and connected to the bias current, and the second terminal of the fourteenth transistor is connected to the second terminal of the sixth resistor and the second terminal of the seventh resistor.

[0027] As an alternative implementation, the seventh to tenth transistors include transistors, and the eleventh to fourteenth transistors include field-effect transistors.

[0028] In a second aspect, this application provides an electronic circuit, which includes the bandgap reference voltage source circuit as described in the first aspect.

[0029] Thirdly, this application provides an electronic device, which includes the electronic circuitry described in the second aspect.

[0030] The bandgap reference voltage source circuit provided in this application, through a compensation submodule, can determine the first current under zero-temperature conditions based on the zero-temperature resistance, and determine the second current based on the positive temperature current generated in the circuit. Then, based on the first and second currents, the compensation voltage of the circuit is determined. This reduces the impact of temperature drift on circuit performance by eliminating higher-order temperature drift terms. Furthermore, through a ripple suppression module, the voltage clamping of the compensation submodule is adjusted to limit the amplitude of the reference voltage. This negative feedback method suppresses signals generated by unnecessary components in the circuit, improves the ripple suppression ratio parameter of the circuit, and thus improves the overall performance of the circuit. Attached Figure Description

[0031] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0032] Figure 1 This is a schematic diagram of a bandgap reference voltage source circuit disclosed in an embodiment of the present invention;

[0033] Figure 2 This is a schematic diagram of another bandgap reference voltage source circuit disclosed in an embodiment of the present invention;

[0034] Figure 3 This is a schematic diagram of another bandgap reference voltage source circuit disclosed in an embodiment of the present invention.

[0035] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0036] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0037] A bandgap voltage reference source utilizes the negative temperature coefficient of the base-emitter junction voltage of a transistor and the positive temperature coefficient of the voltage difference between the two base-emitter junctions under different current densities to compensate for each other, resulting in a low temperature coefficient for the output voltage. In high-precision sampling systems, the overall deviation of the reference source is of concern, among which temperature drift parameters, power supply rejection, and load regulation are important indicators affecting the application of the reference source.

[0038] Traditional bandgap reference voltage sources can achieve a temperature coefficient of 40 ppm / °C. Ultra-low temperature drift bandgap reference voltage sources eliminate high-order temperature terms that cannot be eliminated in traditional schemes through high-order temperature compensation circuits. Theoretically, ultra-low temperature drift reference voltage sources can be obtained with a magnitude of less than 5 ppm / °C, which can be used in relatively high-precision systems.

[0039] However, this compensation method cannot guarantee the circuit's ability to suppress power supply ripple. Therefore, it is necessary to ensure that the bandgap reference voltage source has a high power supply rejection ratio (PSRR) on the basis of achieving temperature compensation, in order to improve the overall circuit performance of the bandgap reference voltage source. The circuit provided in this application, using Huahong's 0.18µm BCD process, can reduce the voltage source temperature drift and power supply regulation to typical values ​​of 0.7ppm / °C and 1ppm / V, respectively. Under different process angles and random error models, typical values ​​of less than 2ppm / °C and 5ppm / V can be obtained, which represents a significant improvement in corresponding performance compared to existing technologies.

[0040] Example 1

[0041] Please see Figure 1 , Figure 1 This is a schematic diagram of a bandgap reference voltage source circuit disclosed in an embodiment of the present invention. Figure 1 As shown, the circuit includes:

[0042] Power supply module and ripple suppression module;

[0043] The power supply module includes a compensation submodule, and the power supply module is connected to the ripple suppression module.

[0044] The compensation submodule is used to determine the compensation voltage based on the first current and the second current. The power supply module is used to output a reference voltage based on the compensation voltage. The ripple suppression module is used to limit the amplitude of the reference voltage by adjusting the voltage clamp of the compensation submodule.

[0045] Among them, the ripple suppression module can be designed as a negative feedback structure, which is ultimately used to improve the ripple suppression ratio parameter of the circuit.

[0046] The compensation submodule typically consists of multiple transistors. To improve circuit consistency and noise immunity, the transistors in the compensation submodule can usually be bipolar transistors. See descriptions of other implementation methods for details.

[0047] The compensation submodule determines the first current at zero temperature based on the zero-temperature resistance and the second current based on the positive temperature current generated in the circuit. Then, the compensation voltage is determined based on the first and second currents. This eliminates higher-order temperature drift terms, reducing the impact of temperature drift on circuit performance. Furthermore, the ripple suppression module adjusts the voltage clamping of the compensation submodule to limit the amplitude of the reference voltage. This negative feedback suppresses signals generated by unnecessary components in the circuit, improving the ripple rejection ratio and thus enhancing the overall circuit performance.

[0048] Please see Figure 2 , Figure 2 This is a schematic diagram of another bandgap reference voltage source circuit disclosed in an embodiment of the present invention. Figure 2 As shown, in one optional implementation, the power supply module includes: a reference current source, a first resistor to a fourth resistor, a first operational amplifier, and a second operational amplifier;

[0049] The compensation submodule includes: a first transistor to a third transistor;

[0050] Wherein, the first end of the first resistor is grounded and connected to the first end of the reference current source, the second end of the reference current source is connected to the non-inverting input of the second operational amplifier, and the second end of the first resistor is connected to the first end of the second resistor and connected to the inverting input of the second operational amplifier;

[0051] In this configuration, the first terminals of the first transistor and the second transistor are interconnected; the second terminal of the first transistor is connected to the second terminal of the second resistor; the second terminal of the second transistor is connected to the first terminal of the second resistor; the third terminal of the first transistor is connected to the first terminal of the third resistor; the third terminal of the second transistor is connected to the first terminal of the fourth resistor; the second terminals of the third resistor and the fourth resistor are connected to the first terminal of the ripple suppression module; the first terminal of the third resistor is connected to the non-inverting input terminal of the first operational amplifier; the first terminal of the fourth resistor is connected to the inverting input terminal of the first operational amplifier; the first terminal of the third transistor is connected to the first terminal of the first transistor and the first terminal of the second transistor; the first terminal of the third transistor is also connected to the output terminal of the first operational amplifier and the third terminal of the third transistor; and the second terminal of the third transistor is connected to the non-inverting input terminal of the second operational amplifier.

[0052] The output terminals of the first operational amplifier and the second operational amplifier are connected together and connected to the third terminal of the ripple suppression module. The non-inverting input terminal of the first operational amplifier is connected to the second terminal of the ripple suppression module.

[0053] In the figure, A1 and A2 correspond to the first operational amplifier and the second operational amplifier, R1, R2, R4, and R5 correspond to the first to the fourth resistors, and Q2, Q1, and Q3 correspond to the first to the third transistors, respectively.

[0054] The figure shows an example of implementation in conjunction with other implementation methods, so Q1 to Q3 may not be stacked or may be stacked in multiple ways. The figure is only one optional implementation method.

[0055] Q1 and Q2 are transistor pairs in the bandgap voltage source. They should have a preset ratio between their emitter areas, such as N to 1 as shown in the figure, and R4 and R5 can be selected with the same resistance value.

[0056]

[0057] As shown in the above equation, by selecting appropriate ratios of R1 and R2, and the value of N, the first-order temperature coefficient can be eliminated, resulting in a voltage output with low temperature drift. However, the negative temperature coefficient of the BE junction contains higher-order terms, which are highly dependent on process parameters. These terms cannot be eliminated, therefore, other circuit structures are needed to eliminate the higher-order coefficients.

[0058] like Figure 2As shown, for this design, a zero-temperature current can be obtained by dividing the reference voltage source by the zero-temperature resistance. This zero-temperature current then flows into the emitters of NPN transistors Q1 and Q2 via a current mirror. The positive temperature current generated inside the reference source passes through the NPN transistors, providing the required additional BE junction voltage. A resistor R3 (not shown) and a buffer can be connected between the emitter of the internal NPN transistor Q1 and the external emitter through which the zero-temperature current flows. Resistor R3 compensates for the process temperature coefficient, generating a compensation current through the BE voltage difference. This current flows into and out of a resistor with an adjustable positive voltage coefficient, thus achieving the final low-temperature drift voltage source.

[0059] The first to third transistors are used to determine the first current under zero temperature conditions based on the zero-temperature resistance, and the second current based on the positive temperature current generated in the circuit. Then, the compensation voltage of the circuit is generated based on the first and second currents. This reduces the impact of temperature drift on circuit performance by eliminating higher-order temperature drift terms and improves the consistency and noise immunity of the circuit.

[0060] As an optional implementation, the compensation submodule further includes: a fourth transistor and a fifth transistor;

[0061] The first terminals of the fourth transistor and the fifth transistor are connected to each other, and the first terminal of the fourth transistor is connected to the third terminal, the first terminal of the fifth transistor is connected to the third terminal, the third terminal of the fourth transistor is connected to the second terminal of the first transistor, the third terminal of the fifth transistor is connected to the second terminal of the second transistor, the second terminal of the fourth transistor is connected to the second terminal of the second resistor, and the second terminal of the fifth transistor is connected to the first terminal of the second resistor.

[0062] The fourth transistor, Q21, and the fifth transistor, Q11, should also have their emitter areas designed in a specific ratio. Preferably, this ratio can be consistent with the corresponding stacked transistor pairs.

[0063] By stacking transistors, the proportion of the base-emitter junction voltage of the transistor in the circuit output can be increased, the circuit ripple rejection ratio can be improved, and the function of eliminating high-order temperature drift terms and reducing the impact of temperature drift on circuit performance can be achieved, thereby improving the overall performance of the circuit.

[0064] As an optional implementation, the compensation submodule further includes a sixth transistor;

[0065] The first terminal of the sixth transistor is connected to the third terminal, the third terminal of the sixth transistor is connected to the second terminal of the third transistor, and the second terminal of the sixth transistor is connected to the non-inverting input terminal of the second operational amplifier.

[0066] Q31 in the diagram is the sixth transistor.

[0067] As mentioned earlier, the third transistor can also be stacked. It should be noted that the number of stacked transistors should not be limited and can be designed according to the specific application scenario.

[0068] As shown in the figure, in the scheme, a Q11, Q21 and Q31 with their base and emitter shorted are connected in series with the emitters of the original Q1, Q2 and Q3 respectively. At this time, the output VBG contains VBE1 and VBE11, which increases the proportion of VBE in the output voltage. Due to the advantages of the BJT device itself in terms of consistency and noise performance, the influence of other devices can be reduced.

[0069] By stacking transistors, the proportion of the base-emitter junction voltage of the transistor in the circuit output can be increased, the circuit ripple rejection ratio can be improved, and the function of eliminating high-order temperature drift terms and reducing the impact of temperature drift on circuit performance can be achieved, thereby improving the overall performance of the circuit.

[0070] As an alternative implementation, the first to sixth transistors include: transistors or field-effect transistors.

[0071] By determining the types of transistors from the first to the sixth, the consistency and noise immunity of the circuit can be improved, thereby enhancing the overall performance of the circuit.

[0072] like Figure 2 As shown, in one optional implementation, the ripple suppression module includes a third operational amplifier and a seventh transistor;

[0073] Wherein, the non-inverting input terminal of the third operational amplifier serves as the second terminal of the ripple suppression module, the inverting input terminal of the third operational amplifier serves as the third terminal of the ripple suppression module, the output terminal of the third operational amplifier is connected to the first terminal of the seventh transistor, the second terminal of the seventh transistor serves as the first terminal of the ripple suppression module, and the third terminal of the seventh transistor is connected to the power supply voltage.

[0074] Specifically, the improved PSRR circuit shown in the figure is the corresponding ripple suppression module. This circuit consists of a negative feedback loop composed of operational amplifier A3, i.e., the third operational amplifier, and MPO, i.e., the seventh transistor. The seventh transistor can be a field-effect transistor.

[0075] The positive input of A3 is the collector voltage of Q1 and Q2, and the negative input is the final VBG output. Due to the negative feedback loop, the collector voltages of Q1 and Q2 are effectively clamped to the final reference output. The improvement in power supply rejection due to the collector voltages of Q1 and Q2 is ultimately achieved through the negative feedback loop composed of A1, Q1, Q2, and the resistor network, resulting in high power supply rejection.

[0076] By constructing a negative feedback loop using the third operational amplifier and the seventh transistor, negative feedback of the corresponding signal within the power module can be further achieved through this negative feedback loop, thereby improving the circuit's suppression performance and ultimately enhancing the overall performance of the circuit.

[0077] Example 2

[0078] Please see Figure 3 , Figure 3 This is a schematic diagram of another bandgap reference voltage source circuit disclosed in an embodiment of the present invention. Figure 3 As shown, the third operational amplifier includes: a first capacitor, a fifth to a seventh resistor, and a seventh to a fourteenth transistor;

[0079] Wherein, the first terminal of the seventh transistor serves as the non-inverting input terminal of the third operational amplifier, the first terminal of the eighth transistor serves as the inverting input terminal of the third operational amplifier, and the first terminal of the fifth resistor serves as the output terminal of the third operational amplifier;

[0080] Wherein, the third terminal of the seventh transistor is connected to the first terminal of the sixth resistor, the third terminal of the eighth transistor is connected to the first terminal of the seventh resistor, the first and third terminals of the ninth transistor are connected and connected to the first terminal of the tenth transistor, the third terminal of the ninth transistor is connected to the second terminal of the seventh transistor, the third terminal of the tenth transistor is connected to the second terminal of the eighth transistor, and the second terminals of the ninth transistor and the second terminals of the tenth transistor are grounded.

[0081] Wherein, the second end of the fifth resistor is connected to the first end of the first capacitor, the first end of the fifth resistor is connected to the third end of the eleventh transistor, the first end of the eleventh transistor is connected to the third end of the tenth transistor and the second end of the first capacitor, and the second end of the eleventh transistor is grounded.

[0082] Wherein, the second terminal of the twelfth transistor is connected to the third terminal of the eleventh transistor, the first terminal of the twelfth transistor is connected to the first terminal of the thirteenth transistor and the first terminal of the fourteenth transistor, the third terminals of the twelfth transistor, the thirteenth transistor and the fourteenth transistor are connected to the supply voltage, the first terminal and the second terminal of the thirteenth transistor are connected and connected to the bias current, and the second terminal of the fourteenth transistor is connected to the second terminal of the sixth resistor and the second terminal of the seventh resistor.

[0083] The third operational amplifier is designed using a traditional two-stage op-amp structure. Both A3 and A3 have high requirements for input current and voltage offset. To achieve low offset and small offset temperature drift, bipolar junction transistors (BJTs) are used as the input pair. Input current offset and temperature drift also affect the output, so the current amplification factor of the input pair should not be too small during the design.

[0084] By designing a two-stage operational amplifier structure, the circuit performance of the third operational amplifier is improved, thereby achieving high suppression of the circuit and enhancing its overall performance.

[0085] As an alternative implementation, the seventh to tenth transistors include transistors, and the eleventh to fourteenth transistors include field-effect transistors.

[0086] By determining the types of transistors seven through ten and transistors eleven through fourteen respectively, the consistency and noise immunity of the circuit can be improved, thereby enhancing the overall performance of the circuit.

[0087] This application provides an electronic circuit, which includes a bandgap reference voltage source circuit as described in any embodiment.

[0088] This application also provides an electronic device that includes the electronic circuitry described in any embodiment.

[0089] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.

[0090] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.

Claims

1. A bandgap reference voltage source circuit, characterized in that, The circuit includes: Power supply module and ripple suppression module; The power supply module includes a compensation submodule, and the power supply module is connected to the ripple suppression module. The compensation submodule is used to determine the compensation voltage based on the first current and the second current, wherein the compensation voltage is used to eliminate the higher-order temperature term of the reference voltage to reduce the impact of temperature drift on circuit performance. The power supply module is used to output a reference voltage according to the compensation voltage. The ripple suppression module includes a third operational amplifier and a seventh transistor. The third operational amplifier and the seventh transistor are used to build a negative feedback loop. Wherein, the non-inverting input terminal of the third operational amplifier serves as the second terminal of the ripple suppression module, the inverting input terminal of the third operational amplifier serves as the third terminal of the ripple suppression module and is connected to the reference voltage, the output terminal of the third operational amplifier is connected to the first terminal of the seventh transistor, the second terminal of the seventh transistor serves as the first terminal of the ripple suppression module, and the third terminal of the seventh transistor is connected to the power supply voltage. The ripple suppression module is used to adjust the voltage clamp of the compensation submodule through the negative feedback loop to limit the amplitude of the reference voltage, thereby improving the ripple suppression ratio parameter of the circuit.

2. The circuit according to claim 1, characterized in that, The power supply module includes: a reference current source, a first resistor to a fourth resistor, a first operational amplifier, and a second operational amplifier; The compensation submodule includes: a first transistor to a third transistor; Wherein, the first end of the first resistor is grounded and connected to the first end of the reference current source, the second end of the reference current source is connected to the non-inverting input of the second operational amplifier, and the second end of the first resistor is connected to the first end of the second resistor and connected to the inverting input of the second operational amplifier; In this configuration, the first terminals of the first transistor and the second transistor are interconnected; the second terminal of the first transistor is connected to the second terminal of the second resistor; the second terminal of the second transistor is connected to the first terminal of the second resistor; the third terminal of the first transistor is connected to the first terminal of the third resistor; the third terminal of the second transistor is connected to the first terminal of the fourth resistor; the second terminals of the third resistor and the fourth resistor are connected to the first terminal of the ripple suppression module; the first terminal of the third resistor is connected to the non-inverting input terminal of the first operational amplifier; the first terminal of the fourth resistor is connected to the inverting input terminal of the first operational amplifier; the first terminal of the third transistor is connected to the first terminal of the first transistor and the first terminal of the second transistor; the first terminal of the third transistor is also connected to the output terminal of the first operational amplifier and the third terminal of the third transistor; and the second terminal of the third transistor is connected to the non-inverting input terminal of the second operational amplifier. The output terminals of the first operational amplifier and the second operational amplifier are connected together and connected to the third terminal of the ripple suppression module. The non-inverting input terminal of the first operational amplifier is connected to the second terminal of the ripple suppression module.

3. The circuit according to claim 2, characterized in that, The compensation submodule further includes: a fourth transistor and a fifth transistor; The first terminals of the fourth transistor and the fifth transistor are connected to each other, and the first terminal of the fourth transistor is connected to the third terminal, the first terminal of the fifth transistor is connected to the third terminal, the third terminal of the fourth transistor is connected to the second terminal of the first transistor, the third terminal of the fifth transistor is connected to the second terminal of the second transistor, the second terminal of the fourth transistor is connected to the second terminal of the second resistor, and the second terminal of the fifth transistor is connected to the first terminal of the second resistor.

4. The circuit according to claim 3, characterized in that, The compensation submodule also includes a sixth transistor; The first terminal of the sixth transistor is connected to the third terminal, the third terminal of the sixth transistor is connected to the second terminal of the third transistor, and the second terminal of the sixth transistor is connected to the non-inverting input terminal of the second operational amplifier.

5. The circuit according to claim 4, characterized in that, The first to sixth transistors include: bipolar junction transistors or field-effect transistors.

6. The circuit according to claim 1, characterized in that, The third operational amplifier includes: a first capacitor, a fifth to a seventh resistor, and a seventh to a fourteenth transistor; Wherein, the first terminal of the seventh transistor serves as the non-inverting input terminal of the third operational amplifier, the first terminal of the eighth transistor serves as the inverting input terminal of the third operational amplifier, and the first terminal of the fifth resistor serves as the output terminal of the third operational amplifier; Wherein, the third terminal of the seventh transistor is connected to the first terminal of the sixth resistor, the third terminal of the eighth transistor is connected to the first terminal of the seventh resistor, the first and third terminals of the ninth transistor are connected and connected to the first terminal of the tenth transistor, the third terminal of the ninth transistor is connected to the second terminal of the seventh transistor, the third terminal of the tenth transistor is connected to the second terminal of the eighth transistor, and the second terminals of the ninth transistor and the second terminals of the tenth transistor are grounded. Wherein, the second end of the fifth resistor is connected to the first end of the first capacitor, the first end of the fifth resistor is connected to the third end of the eleventh transistor, the first end of the eleventh transistor is connected to the third end of the tenth transistor and the second end of the first capacitor, and the second end of the eleventh transistor is grounded. Wherein, the second terminal of the twelfth transistor is connected to the third terminal of the eleventh transistor, the first terminal of the twelfth transistor is connected to the first terminal of the thirteenth transistor and the first terminal of the fourteenth transistor, the third terminals of the twelfth transistor, the thirteenth transistor and the fourteenth transistor are connected to the supply voltage, the first terminal and the second terminal of the thirteenth transistor are connected and connected to the bias current, and the second terminal of the fourteenth transistor is connected to the second terminal of the sixth resistor and the second terminal of the seventh resistor.

7. The circuit according to claim 6, characterized in that, The seventh to tenth transistors are bipolar transistors, and the eleventh to fourteenth transistors are field-effect transistors.

8. An electronic circuit, characterized in that, The electronic circuit includes a bandgap reference voltage source circuit as described in any one of claims 1-7.

9. An electronic device, characterized in that, The electronic device includes the electronic circuitry as described in claim 8.

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