A reference voltage generation circuit and a temperature compensation method

Abstract

This invention discloses a reference voltage generation circuit and a temperature compensation method, including a bias current generation module, a compensation current circuit module, a current conversion module, a primary voltage superposition module, a secondary voltage superposition module, and a voltage subtraction module. The temperature compensation method includes: acquiring a bias current with a first-order positive temperature coefficient and a bias current with a first-order negative temperature coefficient, and performing current conversion processing; converting the compensated current into the corresponding voltage; and superimposing and subtracting the various voltage data to obtain the reference voltage. This invention, through a dual current conversion method, can achieve compensation performance over a wider temperature range and improve process corner deviation issues. As a reference voltage generation circuit and temperature compensation method, this invention can be widely applied in the field of integrated circuit chip design technology.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit chip design technology, and in particular to a reference voltage generation circuit and a temperature compensation method. Background Technology

[0002] In recent years, with the rapid development of automotive electronics, the performance requirements for power management chips have become increasingly stringent. The reference source is a crucial component of power management chips. A high-performance reference voltage source can provide a stable output voltage that is virtually unaffected by power supply voltage, temperature, and manufacturing processes, and its performance directly impacts the performance of the entire circuit. Automotive-grade chips operate within a temperature range of -40℃ to 125℃. To meet the high-precision performance requirements of automotive-grade electronic products, the accuracy of the reference voltage needs further improvement. Therefore, the voltage variation of the reference voltage across the entire temperature range needs to be further reduced. In a voltage reference, the output reference voltage V... REF The smaller the voltage change across the entire temperature range, the better the temperature characteristics. To improve the temperature performance of the reference voltage, a compensation module needs to be added to the circuit design. Existing methods, such as piecewise linear current conversion, can effectively improve the temperature coefficient of the reference voltage. However, piecewise linear current cannot provide full temperature compensation, leaving an uncompensated region in the middle temperature range, resulting in poor temperature performance of the final voltage reference. Summary of the Invention

[0003] To address the aforementioned technical problems, the present invention aims to provide a reference voltage generation circuit and a temperature compensation method. Through a dual current conversion method, it is possible to achieve compensation performance over a wider temperature range and improve process angle deviation issues.

[0004] The first technical solution adopted in this invention is: a reference voltage generating circuit, comprising a bias current generating module, a compensation current generating module, a current conversion module, a primary voltage superposition module, a secondary voltage superposition module, and a voltage subtraction module. The first output terminal of the bias current generating module is connected to the input terminal of the compensation current generating module. The input terminal of the current conversion module is connected to both the second output terminal of the bias current generating module and the output terminal of the compensation current generating module. The output terminal of the current conversion module is connected to the input terminal of the primary voltage superposition module. The output terminal of the primary voltage superposition module is connected to the input terminal of the secondary voltage superposition module. The output terminal of the secondary voltage superposition module is connected to the input terminal of the voltage subtraction module. Wherein:

[0005] The bias current generation module is used to generate a bias current with a first-order positive temperature coefficient and a bias current with a first-order negative temperature coefficient.

[0006] The compensation current circuit module is used to perform current conversion processing on the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient, and output a piecewise linear current and an inverted V-type current.

[0007] The current conversion module is used to convert the bias current with a first-order positive temperature coefficient, the bias current with a first-order negative temperature coefficient, the piecewise linear current, and the inverted V-type current, and output the bias voltage with a first-order positive temperature coefficient, the bias voltage with a first-order negative temperature coefficient, the piecewise linear voltage, and the inverted V-type voltage.

[0008] The primary voltage superposition module is used to superimpose the bias voltage with a first-order positive temperature coefficient and the bias voltage with a first-order negative temperature coefficient to obtain the initial reference voltage.

[0009] The secondary voltage superposition module is used to superimpose the piecewise linear voltage with the initial reference voltage to obtain an intermediate variable reference voltage;

[0010] The voltage subtraction module is used to subtract the intermediate variable reference voltage from the inverted V-shaped voltage to obtain the final reference voltage.

[0011] Furthermore, the bias current generation module also includes a bias circuit and a current mirror circuit, wherein the output terminal of the bias circuit is connected to the input terminal of the current mirror circuit, wherein:

[0012] The bias circuit is used to generate bias current;

[0013] The current mirror circuit is used to replicate the bias current and generate the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient.

[0014] Furthermore, the current mirror circuit includes transistors Mb1, Mb2, Mb3, Mb4, Mb5, and Mb6. The drain, gate, and gate of transistor Mb4 are all connected to the gate of transistor Mb6 at a first connection point. This first connection point receives the bias current. The source, drain, gate, gate, and gate of transistor Mb2 are connected. The sources of transistors Mb1 and Mb2 are connected to the source of transistor Mb3. The drain of transistor Mb2 is connected to the source of transistor Mb5. The drain of transistor Mb3 is connected to the source of transistor Mb6. The drains of transistors Mb5 and Mb6 output the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient.

[0015] Furthermore, the compensation current circuit module also includes a piecewise linear current generating circuit and an inverted V-shaped current generating circuit. The input terminals of the piecewise linear current generating circuit and the inverted V-shaped current generating circuit are respectively connected to the current mirror circuit in the bias current generating module, wherein:

[0016] The piecewise linear current generating circuit is used to convert the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient into the piecewise linear current.

[0017] The inverted V-shaped current generating circuit is used to convert the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient into the inverted V-shaped current.

[0018] Furthermore, the piecewise linear current generation circuit includes a first current mirror structure circuit and a second current mirror structure circuit. The first current mirror structure circuit further includes transistors M1, M2, M3, and M4, and the second current mirror structure circuit further includes transistors M5, M6, M7, and M8. The gates of transistors M1 and M2 are connected to the drain of transistor M1 at a second connection point, which receives the bias current with a first-order positive temperature coefficient. The sources of transistors M1, M5, and M6 are connected, and the sources of transistors M6 and M7 are connected. The source of transistor M8 and the source of transistor M5 are connected to a third connection point, which is grounded. The drain of transistor M3, the gate of transistor M7, the gate of transistor M8, and the drain of transistor M2 are connected to a fourth connection point, which receives a bias current with a first-order negative temperature. The source of transistor M2 is connected to the drain of transistor M6. The source of transistor M3 is connected to the drain of transistor M7. The gate of transistor M3 and the gate of transistor M4 are connected to a fifth connection point, which is connected to a high level. The source of transistor M4 is connected to the drain of transistor M8. The drain of transistor M4 is connected to current I3.

[0019] Furthermore, the inverted V-shaped current generating circuit includes transistor M9, a third current mirror structure circuit, a fourth current mirror structure circuit, and transistor M13. The third current mirror structure circuit further includes transistors M10 and M11, and the fourth current mirror structure circuit includes transistors M12 and M14. The drain and gate of transistor M9 are connected to a sixth connection point, which is connected to the bias current having a first-order positive temperature coefficient. The source of transistor M9, the drain of transistor M12, the gate of transistor M12, and the gate of transistor M13 are all connected to the bias current. The source of transistor M11 is connected to the gate of transistor M14. The source of transistor M12 and the source of transistor M13 are both connected to the source of transistor M14 at the seventh connection point, which is grounded. The drain of transistor M10 and the gate of transistor M10 are both connected to the gate of transistor M11 at the eighth connection point, which receives the bias current with a first-order negative temperature. The source of transistor M10 is connected to the drain of transistor M13. The source of transistor M11 is connected to the drain of transistor M14. The drain of transistor M11 is connected to current I4.

[0020] The second technical solution adopted in this invention is: a temperature compensation method for a reference voltage generation circuit, comprising the following steps:

[0021] Obtain the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient.

[0022] The bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient are subjected to current conversion processing to obtain the piecewise linear current and the inverted V-shaped current.

[0023] The bias current with a first-order positive temperature coefficient, the bias current with a first-order negative temperature coefficient, the piecewise linear current, and the inverted V-type current are respectively converted to obtain the bias voltage with a first-order positive temperature coefficient, the bias voltage with a first-order negative temperature coefficient, the piecewise linear voltage, and the inverted V-type voltage.

[0024] The initial reference voltage is obtained by superimposing the bias voltage with a first-order positive temperature coefficient and the bias voltage with a first-order negative temperature coefficient.

[0025] The piecewise linear voltage is superimposed with the initial reference voltage to obtain the intermediate variable reference voltage;

[0026] The intermediate variable reference voltage is subtracted from the inverted V-shaped voltage to obtain the final reference voltage.

[0027] Furthermore, the step of performing current conversion processing on the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient to obtain the piecewise linear current and the inverted V-shaped current specifically includes:

[0028] By setting the width-to-length ratio k1 of the first current mirror structure circuit and the width-to-length ratio k2 of the second current mirror structure circuit, the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient are converted to obtain the piecewise linear current.

[0029] By setting the width-to-length ratio k3 of the third current mirror structure circuit and the width-to-length ratio k4 of the fourth current mirror structure circuit, the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient are converted to obtain the inverted V-shaped current.

[0030] Furthermore, the step of converting the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient by setting the width-to-length ratio k1 of the first current mirror structure circuit and the width-to-length ratio k2 of the second current mirror structure circuit to obtain the piecewise linear current specifically includes:

[0031] Set the width-to-length ratio k1 of the first current mirror structure circuit and the width-to-length ratio k2 of the second current mirror structure circuit;

[0032] Based on the first current mirror structure circuit, the current I1 is replicated proportionally, and the proportional current k1I1 is output.

[0033] The proportional current k1I1 and the current I2 are compared;

[0034] If it is determined that the proportional current k1I1 is less than the current I2, then the output current I3 = k2*(I2-k1I1);

[0035] If it is determined that the proportional current k1I1 is greater than the current I2, then the output current I3 = 0;

[0036] By integrating the values ​​of the output current I3 mentioned above, the piecewise linear current is obtained.

[0037] Furthermore, the step of converting the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient to obtain the inverted V-shaped current by setting the width-to-length ratio k3 of the third current mirror structure circuit and the width-to-length ratio k4 of the fourth current mirror structure circuit specifically includes:

[0038] Set the width-to-length ratio k3 of the third current mirror structure circuit and the width-to-length ratio k4 of the fourth current mirror structure circuit;

[0039] Based on the third current mirror structure circuit, the current I2 is replicated proportionally, and the proportional current k3I2 is output.

[0040] Based on the fourth current mirror structure circuit, the current I1 is replicated proportionally, and the proportional current k4I1 is output.

[0041] The inverted V-shaped current is obtained by selecting the minimum value of the proportional current k3I2 and the proportional current k4I1.

[0042] The beneficial effects of the circuit and method of this invention are as follows: This invention performs current conversion processing on bias currents with a first-order positive temperature coefficient and bias currents with a first-order negative temperature coefficient, outputting piecewise linear current and inverted V-shaped current. The piecewise linear current and inverted V-shaped current form a dual compensation current, realizing that the current conversion range covers the entire temperature range. After the dual current conversion, the overall voltage change of the reference voltage is reduced, optimizing the overall temperature performance. Furthermore, the bias currents with a first-order positive temperature coefficient and bias currents with a first-order negative temperature coefficient are converted into corresponding voltages for injection and extraction processing. Through the dual compensation voltage, the changes in process corner deviation can be effectively followed, thus improving the problem of increased voltage offset in the middle temperature range caused by process corner mismatch, thereby improving the temperature performance of the reference voltage under process corner deviation conditions. Attached Figure Description

[0043] Figure 1 This is a structural block diagram of a reference voltage generation circuit according to an embodiment of the present invention;

[0044] Figure 2 This is a flowchart illustrating the steps of a temperature compensation method for a reference voltage generation circuit according to an embodiment of the present invention.

[0045] Figure 3 This is a temperature characteristic diagram of the reference voltage that is affected by the low-temperature offset due to process angle.

[0046] Figure 4 This is a temperature characteristic diagram of the reference voltage that is affected by the high-temperature offset caused by the process angle.

[0047] Figure 5 The reference voltage V, after current conversion, is the embodiment of the present invention. REF Temperature characteristic diagram;

[0048] Figure 6 The reference voltage V in this embodiment of the invention is before and after being affected by the process angle. REF A schematic diagram illustrating the trend of shifting towards lower temperatures;

[0049] Figure 7 The reference voltage V in this embodiment of the invention is before and after being affected by the process angle. REF A schematic diagram illustrating the trend of shift towards higher temperatures;

[0050] Figure 8 This is a schematic diagram of the circuit principle for generating piecewise linear current according to an embodiment of the present invention;

[0051] Figure 9 This is a schematic diagram of the output piecewise linear current curve in an embodiment of the present invention;

[0052] Figure 10 This is a schematic diagram of the circuit principle for generating inverted V-shaped current according to an embodiment of the present invention;

[0053] Figure 11 This is a schematic diagram of the inverted V-shaped current output in an embodiment of the present invention;

[0054] Figure 12 This is a temperature characteristic diagram of the reference voltage using piecewise linear compensation current in an embodiment of the present invention;

[0055] Figure 13 This is a temperature characteristic diagram of the reference voltage using the inverted V compensation current in an embodiment of the present invention;

[0056] Figure 14 This is a schematic diagram of the principle structure of the dual current conversion according to an embodiment of the present invention;

[0057] Figure 15 This is a schematic diagram of the principle structure of a reference voltage generation circuit according to an embodiment of the present invention;

[0058] Figure 16 This is a schematic diagram of a reference voltage generation circuit according to an embodiment of the present invention;

[0059] Figure 17 This is a graph illustrating the temperature characteristic curves of the reference voltage and compensation current in an embodiment of the present invention. Detailed Implementation

[0060] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments. The step numbers in the following embodiments are only for ease of explanation and do not limit the order of the steps. The execution order of each step in the embodiments can be adapted according to the understanding of those skilled in the art.

[0061] Reference Figure 3 and Figure 4 In the voltage reference, the output reference voltage V REF The smaller the voltage change across the entire temperature range, the better the temperature characteristics. To improve the temperature performance of the reference voltage, a compensation module needs to be added to the circuit design. Piecewise linear current conversion can effectively improve the temperature coefficient of the reference voltage. However, piecewise linear current cannot provide full-temperature compensation, resulting in intermediate temperature ranges T. L1 ~T H1 In addition, the piecewise linear current is susceptible to process angles, causing the compensation temperature range to shift, resulting in a shifted intermediate temperature range T'. L1 ~T' H1 Voltage offset ΔV REF As the temperature increases, undercompensation and overcompensation issues occur in the compensation areas at both ends of the temperature band.

[0062] Based on this, the present invention provides a new current conversion method to improve the temperature characteristics of a voltage reference, and proposes a dual current conversion method to achieve compensation performance over a wider temperature range and improve process angle deviation problems.

[0063] Reference Figure 1 This invention provides a reference voltage generation circuit, including a bias current generation module, a compensation current generation module, a current conversion module, a primary voltage superposition module, a secondary voltage superposition module, and a voltage subtraction module. The first output terminal of the bias current generation module is connected to the input terminal of the compensation current generation module. The input terminal of the current conversion module is connected to both the second output terminal of the bias current generation module and the output terminal of the compensation current generation module. The output terminal of the current conversion module is connected to the input terminal of the primary voltage superposition module. The output terminal of the primary voltage superposition module is connected to the input terminal of the secondary voltage superposition module. The output terminal of the secondary voltage superposition module is connected to the input terminal of the voltage subtraction module. Wherein:

[0064] The bias current generation module is used to generate bias currents with a first-order positive temperature coefficient and bias currents with a first-order negative temperature coefficient.

[0065] Specifically, the bias current generation module also includes a bias circuit and a current mirror circuit. The output terminal of the bias circuit is connected to the input terminal of the current mirror circuit. The bias circuit is used to generate a bias current, and the current mirror circuit is used to replicate the bias current and generate a bias current with a first-order positive temperature coefficient and a bias current with a first-order negative temperature coefficient.

[0066] Furthermore, the current mirror circuit includes transistors Mb1, Mb2, Mb3, Mb4, Mb5, and Mb6. The drain, gate, and gate of transistor Mb4 and Mb5 are all connected to the gate of transistor Mb6 at a first connection point. The first connection point receives the bias current. The source, drain, gate, gate, and gate of transistor Mb2 and Mb3 are connected. The sources of transistors Mb1 and Mb2 are connected to the source of transistor Mb3. The drain of transistor Mb2 is connected to the source of transistor Mb5. The drain of transistor Mb3 is connected to the source of transistor Mb6. The drains of transistors Mb5 and Mb6 output bias currents with a first-order positive temperature coefficient and bias currents with a first-order negative temperature coefficient, respectively.

[0067] The compensation current circuit module is used to perform current conversion processing on bias current with a first-order positive temperature coefficient and bias current with a first-order negative temperature coefficient, and output piecewise linear current and inverted V-type current.

[0068] Specifically, the compensation current circuit module also includes a piecewise linear current generation circuit and an inverted V-type current generation circuit. The input terminals of the piecewise linear current generation circuit and the inverted V-type current generation circuit are respectively connected to the current mirror circuit in the bias current generation module. The piecewise linear current generation circuit is used to convert bias currents with a first-order positive temperature coefficient and bias currents with a first-order negative temperature coefficient into piecewise linear currents. The inverted V-type current generation circuit is used to convert bias currents with a first-order positive temperature coefficient and bias currents with a first-order negative temperature coefficient into inverted V-type currents.

[0069] Furthermore, the piecewise linear current generating circuit includes a first current mirror structure circuit and a second current mirror structure circuit. The first current mirror structure circuit further includes transistors M1, M2, M3, and M4, and the second current mirror structure circuit further includes transistors M5, M6, M7, and M8. The gates of transistors M1 and M2 are connected to the drain of transistor M1 at a second connection point, which receives the bias current with a first-order positive temperature coefficient. The source of transistor M1, the drain of transistor M5, the gate of transistor M5, and the gate of transistor M6 are connected. The source of transistor M6... The sources of transistors M7 and M8 are connected to the source of transistor M5 at the third connection point, which is grounded. The drain of transistor M3, the gate of transistor M7, and the gate of transistor M8 are connected to the drain of transistor M2 at the fourth connection point, which receives a bias current with a first-order negative temperature. The source of transistor M2 is connected to the drain of transistor M6, the source of transistor M3 is connected to the drain of transistor M7, and the gate of transistor M3 is connected to the gate of transistor M4 at the fifth connection point, which is connected to a high level. The source of transistor M4 is connected to the drain of transistor M8, and the drain of transistor M4 is connected to current I3.

[0070] The inverted V-shaped current generating circuit includes transistor M9, a third current mirror structure circuit, a fourth current mirror structure circuit, and transistor M13. The third current mirror structure circuit also includes transistors M10 and M11. The fourth current mirror structure circuit includes transistors M12 and M14. The drain and gate of transistor M9 are connected to a sixth connection point, which is connected to a bias current with a first-order positive temperature coefficient. The source, drain, and gate of transistor M12, and transistor M13 are also connected. The gate of transistor M11 is connected to the gate of transistor M14. The sources of transistors M12 and M13 are connected to the source of transistor M14 at the seventh connection point, which is grounded. The drain of transistor M10 and the gate of transistor M10 are connected to the gate of transistor M11 at the eighth connection point, which receives a bias current with a first-order negative temperature. The source of transistor M10 is connected to the drain of transistor M13. The source of transistor M11 is connected to the drain of transistor M14. The drain of transistor M11 is connected to current I4.

[0071] The current conversion module is used to convert bias current with a first-order positive temperature coefficient, bias current with a first-order negative temperature coefficient, piecewise linear current and inverted V-type current, and output bias voltage with a first-order positive temperature coefficient, bias voltage with a first-order negative temperature coefficient, piecewise linear voltage and inverted V-type voltage.

[0072] The primary voltage superposition module is used to superimpose a bias voltage with a first-order positive temperature coefficient and a bias voltage with a first-order negative temperature coefficient to obtain an initial reference voltage.

[0073] The secondary voltage superposition module is used to superimpose the piecewise linear voltage with the initial reference voltage to obtain the intermediate variable reference voltage;

[0074] The voltage subtraction module is used to subtract the intermediate variable reference voltage from the inverted V-type voltage to obtain the final reference voltage.

[0075] Specifically, refer to Figure 14 First, superimpose V with a first-order positive temperature coefficient. PTAT and V at first negative temperature CTAT Generate the initial reference voltage V REF0 Secondly, the piecewise linear compensation current and inverted V-type current are converted into compensation voltage through resistors R1 and R2. Finally, V... REF0 The final reference voltage V is obtained by superimposing and subtracting the compensation voltage. REF2 The total piecewise linear current can be obtained by superimposing multiple piecewise linear currents at different temperature ranges. The inverted V-shaped current can be obtained through... Figure 10The circuit shown can be directly generated, or indirectly obtained by extracting an equivalent V-type current. To ensure that the offset direction of the overall compensation current affected by the process angle is the same, the bias current in the piecewise linear current and the inverted V-current must be generated by mirroring the same bias circuit, and the current mirror matching degree in the circuit must be high. By adjusting the values ​​of resistors R1 and R2, the magnitude of the compensation voltage introduced by the compensation current can be manually set;

[0076] Therefore, the overall circuit diagram proposed in this invention is as follows: Figure 15 As shown. The bias current circuit generates a current I with a first-order positive temperature coefficient. PTAT and the current I with a first-order negative temperature coefficient CTaT I PTAT and I CTAT The injection compensation current circuit generates dual compensation currents: a piecewise linear compensation current and an inverted V-shaped current. The injection and extraction of the compensation current are achieved by controlling the direction of the dual compensation current inflow. The current flow direction is already... Figure 15 The text is incomplete and contains several typographical errors and inconsistencies. A proper translation wouldn't be possible without the full context. PTAT and V CTAT The modules are connected in series to generate a reference voltage V. REF0 Resistors R1 and R2 convert the compensation current into a compensation voltage. This is achieved by superimposing V... REF0 And the compensation voltage, to produce the final reference output voltage V. REF The expression for the reference voltage is:

[0077] V REF =V CTAT +V PTAT +I PTAT *(R1+R2)-I 倒V型 *R1+I 线性 *(R1+R2)=V CTAT +V PTAT1 -I 倒V型 *R1+I 线性 *(R1+R2)=V CTAT +V PTAT1 +V com

[0078] In the above formula, V REF V represents the final reference output voltage. CTAT Voltage with a first-order negative temperature coefficient, V PTAT The voltage represents the voltage with a first-order positive temperature coefficient, R1 and R2 represent resistances, and I represents the voltage. 倒V型 Indicates an inverted V-type current, I 线性 Indicates piecewise linear compensation current;

[0079] in

[0080] V PTAT1 =V PTAT+I PTAT *(R1+R2)

[0081] In the above formula, V com The temperature characteristics of the current are represented by the resistance, which is then converted into a compensating voltage.

[0082] Reference Figure 2 A temperature compensation method for a reference voltage generation circuit includes the following steps:

[0083] S1. Obtain the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient.

[0084] S2. Perform current conversion processing on the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient to obtain piecewise linear current and inverted V-type current.

[0085] Specifically, by setting the width-to-length ratio k1 of the first current mirror structure circuit and the width-to-length ratio k2 of the second current mirror structure circuit, current conversion is performed on the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient to obtain a piecewise linear current.

[0086] Furthermore, the width-to-length ratio k1 of the first current mirror structure circuit and the width-to-length ratio k2 of the second current mirror structure circuit are set. Based on the first current mirror structure circuit, the current I1 is replicated by a current replication ratio, and a proportional current k1I1 is output. The proportional current k1I1 is compared with the current I2. If the proportional current k1I1 is less than the current I2, the output current I3 = k2*(I2-k1I1). If the proportional current k1I1 is greater than the current I2, the output current I3 = 0. The value of the output current I3 is integrated to obtain the piecewise linear current.

[0087] It should be further noted that the output current and I2 have the same temperature polarity. If I1 is a bias current with a first-order negative temperature coefficient and I2 is a bias current with a first-order positive temperature coefficient, then the output current is a positive temperature current. If I1 is a bias current with a first-order positive temperature coefficient and I2 is a bias current with a first-order negative temperature coefficient, then the output current is a negative temperature current.

[0088] In this embodiment, refer to Figure 8 and Figure 9, the bias circuit provides a bias current, and the current mirror structure composed of transistors Mb1 to Mb6 replicates the current to generate I1 and I2, which are injected into the segmented linear current generation circuit. Transistors M1, M2, M5, M6 and M3, M4, M7, M8 respectively form two pairs of current mirror structures, and their aspect ratios are k1 and k2 respectively. k1 and k2 affect the current replication ratio. The current flowing through M2 is mirrored by the current mirror structure composed of transistors M1, M2, M5, M6 to generate k1I1 from I1. The sum of the currents flowing through M2 and M3 is I2. When I2 > k1I1, the current I3 flowing through M3 = k2 * (I2 - k1I1); when I2 < k1I1, the current I3 flowing through M3 = 0. Therefore, by adjusting the aspect ratios k1 and k2, the magnitude of the output current and the turning point T can be changed. H or T L . Therefore, when I1 and I2 are linear currents with positive and negative temperature coefficients, this circuit can generate segmented linear compensation currents in different temperature ranges. If segmented linear compensation currents in multiple different temperature ranges are required, the drain terminals of multiple M4s can be connected in parallel at one point to achieve the current addition effect.

[0089] By setting the aspect ratio k3 of the third current mirror structure circuit and the aspect ratio k4 of the fourth current mirror structure circuit, current conversion is performed on the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient to obtain an inverted V-shaped current.

[0090] Furthermore, set the aspect ratio k3 of the third current mirror structure circuit and the aspect ratio k4 of the fourth current mirror structure circuit. Based on the third current mirror structure circuit, the current replication ratio of the bias current with a first-order positive temperature coefficient is performed, and the proportional current k3I2 is output. Based on the fourth current mirror structure circuit, the current replication ratio of the bias current with a first-order negative temperature coefficient is performed, and the proportional current k4I1 is output. The minimum value of the proportional current k3I2 and the proportional current k4I1 is selected to obtain an inverted V-shaped current.

[0091] In this embodiment, referring to Figure 10 and Figure 11 , the bias circuit provides a bias current, and the current mirror structure composed of transistors Mb1 to Mb6 replicates the current to generate I1 and I2, which are injected into the inverted V-shaped current generation circuit. Transistors M10, M11 and M12, M14 respectively form two pairs of current mirror structures, and their aspect ratios are k3 and k4 respectively to form a current mirror structure. k3 and k4 affect the current replication ratio. I4 is the minimum value of the currents replicated by the current mirror structure of k2I1 and k1I2. Therefore, the output current呈现 an inverted V shape. By adjusting k3 and k4, the magnitude of the output current and the turning point T0 can be changed.

[0092] Referring to Figure 12 and Figure 13To optimize the temperature performance of the reference voltage, the piecewise linear current inflection point T is segmented in the circuit design. L1 and T H1 The temperature inflection point T0 of the inverted V current is chosen at both the low-temperature and high-temperature points with a certain temperature curvature. This inflection point should be at the inflection point T of the piecewise linear current. L1 and T H1 Ideally, the temperature point should be selected in the middle of the reference voltage range with a temperature curvature of 0. The temperature point can be changed by altering the width-to-length ratios k1 and k2, and k3 and k4 of the transistors in the current generation circuit.

[0093] S3. The bias current with a first-order positive temperature coefficient, the bias current with a first-order negative temperature coefficient, the piecewise linear current and the inverted V-type current are converted respectively to obtain the bias voltage with a first-order positive temperature coefficient, the bias voltage with a first-order negative temperature coefficient, the piecewise linear voltage and the inverted V-type voltage.

[0094] S4. The bias voltage with a first-order positive temperature coefficient and the bias voltage with a first-order negative temperature coefficient are superimposed to calculate the initial reference voltage.

[0095] S5. The piecewise linear voltage is superimposed with the initial reference voltage to obtain the intermediate variable reference voltage;

[0096] S6. Subtract the intermediate variable reference voltage from the inverted V-type voltage to obtain the final reference voltage.

[0097] In summary, by using this invention, firstly, the current conversion range covers the entire temperature range, optimizing overall temperature performance, such as... Figure 5 As shown, the reference voltage V after dual current conversion REF2 The overall voltage change is reduced, especially the compensation for T. L1 ~T H1 The voltage in the intermediate temperature range makes the overall voltage change smaller, where V REF0 This represents the initial uncompensated reference voltage, V. REF1 V represents the reference voltage after piecewise linear current conversion. REF2 The blue line represents the reference voltage after dual current conversion. T L1 T H1 T0 and T1 are the temperature inflection points of the piecewise linear current and the inverted V current, respectively.

[0098] Secondly, the overall compensation current is offset in the same direction due to the process angle, avoiding the problem of increased voltage variation in the intermediate temperature range caused by process angle offset. Since process angle deviations exist during actual circuit fabrication, the performance of the compensation circuit is affected. This offset not only causes overcompensation and undercompensation in the compensation areas at both ends of the reference voltage, but also leads to offset in the intermediate temperature range, increasing the voltage variation in this range. Using piecewise linear current conversion alone cannot compensate for this voltage variation in the intermediate temperature range, severely impacting the temperature performance of the reference voltage. The adaptive dual compensation current proposed in this invention can effectively follow the changes in process angle deviation, thus improving the problem of increased voltage offset in the intermediate temperature range caused by process angle mismatch, thereby improving the temperature performance of the reference voltage under process angle deviation conditions. After offset, the V... REF2 In the intermediate temperature range T L1 ~T H1 The offset decreases, and there is some improvement in the overcompensation and undercompensation problems, such as Figure 6 and Figure 7 As shown, taking the high and low temperature linear compensation current of a single segment as an example, I HT and I LT These represent the piecewise linear compensation currents for high and low temperatures, respectively. V REF0 This represents the initial uncompensated reference voltage, V. REF1 V represents the reference voltage after piecewise linear current conversion. REF2 This indicates the reference voltage obtained by simultaneously using piecewise linear current conversion and inverted V-current conversion;

[0099] In addition, the inverted V current in the dual current conversion can improve the undercompensation problem of the two temperature ranges caused by process angle deviation to a certain extent, and reduce the adjustment cost.

[0100] Furthermore, the implementation process of this invention is described using a BJT transistor in conjunction with the voltage superposition module and the subtraction module. In the core circuit, inverted V-current conversion is achieved through current injection, and piecewise linear current conversion is achieved through current extraction. The temperature characteristic of the current is transformed from resistance to compensation voltage V. com Temperature characteristics;

[0101] Specifically, refer to Figure 16 In the core circuit, the voltage difference V between the emitter and base of BJT transistor Q2 is... EB It has a negative temperature coefficient, as V CTAT The operational amplifier (OPA) is used to form feedback, creating a stable negative feedback loop in the core circuit, which makes the input voltage of the OPA tend to be equal. Therefore, the voltages across the two resistors R2 connected in series with BJT transistors Q1 and Q2 are equal, thus ensuring that the current I flowing through BJT transistors Q1 and Q2... PEqual. The ratio of the number of BJT tubes Q1 to Q2 is 1:n. P V of the BJT tube BE The difference ΔV BE Divide by R1 to obtain, therefore I P It exhibits a positive temperature coefficient. The current flow direction is already... Figure 16 The Chinese side indicates;

[0102] In summary, the expression for the reference voltage is as follows:

[0103] V REF =V BE +I P *(R1+R2+2R3+2R4+2R5)+I 线性 *R4-I 倒V型 *R5=V CTAT +V PTAT +I 线性 *R4-I 倒V型 *R5=V CTAT +V PTAT +V com

[0104] In the above formula, V BE V represents the negative temperature coefficient voltage. CTAT I P *(R1+R2+2R3+2R4+2R5) represents the positive temperature coefficient voltage V. PTAT V CTAT and V PTAT The superposition generates an initial reference voltage V with a convex parabolic shape. REF0 I 线性 *R4 and I 倒V型 *R5 is the compensation voltage V com The conversion efficiency between the two current types can be adjusted by changing the ratio of R4 and R5 in the design.

[0105] Furthermore, Figure 17 yes Figure 16 The simulation example diagram shows the temperature characteristic curves of the circuit's reference voltage and compensation current. TC represents the temperature coefficient, in terms of voltage. A lower TC indicates better temperature characteristics. REF0 This indicates the initial uncompensated reference voltage, with TC = 10.8 ppm / ℃; V REF1 This represents the reference voltage after piecewise linear current conversion, with TC = 1.5ppm / ℃; V REF2 This represents the reference voltage obtained by simultaneously using piecewise linear current conversion and inverted V-current conversion, with TC = 1.2 ppm / ℃. The dashed lines delineate the various temperature inflection points of the compensation current.

[0106] Depend on Figure 17 As can be seen, by using dual current conversion, the voltage variation of the voltage reference is very small across the entire temperature range, which can significantly improve the temperature characteristics of the reference voltage. Even when TC is very small, the dual compensation current can further reduce TC and improve the temperature characteristics of the reference voltage.

[0107] The content of the above method embodiments is applicable to this system embodiment. The specific functions implemented in this system embodiment are the same as those in the above method embodiments, and the beneficial effects achieved are also the same as those achieved in the above method embodiments.

[0108] The above is a detailed description of the preferred embodiments of the present invention. However, the present invention is not limited to the embodiments described. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention. All such equivalent modifications or substitutions are included within the scope defined by the claims of this application.

Claims

1. A reference voltage generating circuit, characterized in that, The system includes a bias current generation module, a compensation current circuit module, a current conversion module, a primary voltage superposition module, a secondary voltage superposition module, and a voltage subtraction module. The first output terminal of the bias current generation module is connected to the input terminal of the compensation current circuit module. The input terminal of the current conversion module is connected to both the second output terminal of the bias current generation module and the output terminal of the compensation current circuit module. The output terminal of the current conversion module is connected to the input terminal of the primary voltage superposition module. The output terminal of the primary voltage superposition module is connected to the input terminal of the secondary voltage superposition module. The output terminal of the secondary voltage superposition module is connected to the input terminal of the voltage subtraction module. Wherein: The bias current generation module is used to generate a bias current with a first-order positive temperature coefficient and a bias current with a first-order negative temperature coefficient. The compensation current circuit module is used to perform current conversion processing on the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient, and output a piecewise linear current and an inverted V-type current. The current conversion module is used to convert the bias current with a first-order positive temperature coefficient, the bias current with a first-order negative temperature coefficient, the piecewise linear current, and the inverted V-type current, and output the bias voltage with a first-order positive temperature coefficient, the bias voltage with a first-order negative temperature coefficient, the piecewise linear voltage, and the inverted V-type voltage. The primary voltage superposition module is used to superimpose the bias voltage with a first-order positive temperature coefficient and the bias voltage with a first-order negative temperature coefficient to obtain the initial reference voltage. The secondary voltage superposition module is used to superimpose the piecewise linear voltage with the initial reference voltage to obtain an intermediate variable reference voltage; The voltage subtraction module is used to subtract the intermediate variable reference voltage from the inverted V-shaped voltage to obtain the final reference voltage.

2. The reference voltage generating circuit according to claim 1, characterized in that, The bias current generation module further includes a bias circuit and a current mirror circuit, wherein the output terminal of the bias circuit is connected to the input terminal of the current mirror circuit, and: The bias circuit is used to generate bias current; The current mirror circuit is used to replicate the bias current and generate the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient.

3. The reference voltage generating circuit according to claim 2, characterized in that, The current mirror circuit includes transistors Mb1, Mb2, Mb3, Mb4, Mb5, and Mb6. The drain, gate, and gate of transistor Mb4 are all connected to the gate of transistor Mb6 at a first connection point. This first connection point receives the bias current. The source, drain, gate, gate, and gate of transistor Mb2 are connected. The sources of transistors Mb1 and Mb2 are connected to the source of transistor Mb3. The drain of transistor Mb2 is connected to the source of transistor Mb5. The drain of transistor Mb3 is connected to the source of transistor Mb6. The drains of transistors Mb5 and Mb6 output the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient.

4. A reference voltage generating circuit according to claim 3, characterized in that, The compensation current circuit module further includes a piecewise linear current generating circuit and an inverted V-shaped current generating circuit. The input terminals of the piecewise linear current generating circuit and the inverted V-shaped current generating circuit are respectively connected to the current mirror circuit in the bias current generating module, wherein: The piecewise linear current generating circuit is used to convert the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient into the piecewise linear current. The inverted V-shaped current generating circuit is used to convert the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient into the inverted V-shaped current.

5. A reference voltage generating circuit according to claim 4, characterized in that, The piecewise linear current generation circuit includes a first current mirror structure circuit and a second current mirror structure circuit. The first current mirror structure circuit further includes transistors M1, M2, M3, and M4. The second current mirror structure circuit further includes transistors M5, M6, M7, and M8. The gates of transistors M1 and M2 are connected to the drain of transistor M1 at a second connection point, which receives the bias current with a first-order positive temperature coefficient. The sources of transistors M1, M5, and M6 are connected, and the sources of transistors M6 and M7 are connected. The source of transistor M8 and the source of transistor M5 are both connected to a third connection point, which is grounded. The drain of transistor M3, the gate of transistor M7, the gate of transistor M8, and the drain of transistor M2 are all connected to a fourth connection point, which receives a bias current with a first-order negative temperature. The source of transistor M2 is connected to the drain of transistor M6. The source of transistor M3 is connected to the drain of transistor M7. The gate of transistor M3 and the gate of transistor M4 are both connected to a fifth connection point, which is connected to a high level. The source of transistor M4 is connected to the drain of transistor M8, and the drain of transistor M4 is connected to a current source. .

6. A reference voltage generating circuit according to claim 5, characterized in that, The inverted V-shaped current generating circuit includes transistor M9, a third current mirror structure circuit, a fourth current mirror structure circuit, and transistor M13. The third current mirror structure circuit further includes transistors M10 and M11. The fourth current mirror structure circuit includes transistors M12 and M14. The drain and gate of transistor M9 are connected to a sixth connection point, which is connected to a bias current with a first-order positive temperature coefficient. The source of transistor M9, the drain of transistor M12, the gate of transistor M12, and the gate of transistor M13 are also connected. The gate of transistor M14 is connected to the source of transistor M12. The sources of transistors M13 and M14 are both connected to the source of transistor M14 at a seventh connection point, which is grounded. The drain and gate of transistor M10 are both connected to the gate of transistor M11 at an eighth connection point, which receives the bias current with a first-order negative temperature. The source of transistor M10 is connected to the drain of transistor M13. The source of transistor M11 is connected to the drain of transistor M14. The drain of transistor M11 is connected to the current. .

7. A temperature compensation method for a reference voltage generation circuit as described in claim 6, characterized in that, Includes the following steps: Obtain the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient. The bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient are subjected to current conversion processing to obtain the piecewise linear current and the inverted V-shaped current. The bias current with a first-order positive temperature coefficient, the bias current with a first-order negative temperature coefficient, the piecewise linear current, and the inverted V-type current are respectively converted to obtain the bias voltage with a first-order positive temperature coefficient, the bias voltage with a first-order negative temperature coefficient, the piecewise linear voltage, and the inverted V-type voltage. The initial reference voltage is obtained by superimposing the bias voltage with a first-order positive temperature coefficient and the bias voltage with a first-order negative temperature coefficient. The piecewise linear voltage is superimposed with the initial reference voltage to obtain the intermediate variable reference voltage; The intermediate variable reference voltage is subtracted from the inverted V-shaped voltage to obtain the final reference voltage.

8. The temperature compensation method for a reference voltage generating circuit according to claim 7, characterized in that, The step of performing current conversion processing on the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient to obtain the piecewise linear current and the inverted V-shaped current specifically includes: By setting the aspect ratio of the first current mirror structure circuit The width-to-length ratio of the second current mirror structure circuit The bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient are converted to obtain the piecewise linear current. By setting the aspect ratio of the third current mirror structure circuit The width-to-length ratio of the fourth current mirror structure circuit The bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient are converted to obtain the inverted V-shaped current.

9. The temperature compensation method for a reference voltage generating circuit according to claim 8, characterized in that, The aspect ratio of the first current mirror structure circuit is set. The width-to-length ratio of the second current mirror structure circuit The step of performing current conversion on the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient to obtain the piecewise linear current specifically includes: Set the aspect ratio of the first current mirror structure circuit The width-to-length ratio of the second current mirror structure circuit ; Based on the first current mirror structure circuit, the current... Perform current replication ratio, output proportional current ; The proportional current With current Make a judgment; Determine the proportional current Less than the current Then the output current ; Determine the proportional current Greater than the current Then the output current ; Integrating the above output current The value of is used to obtain the piecewise linear current.

10. The temperature compensation method for a reference voltage generation circuit according to claim 9, characterized in that, The aspect ratio of the third current mirror structure circuit is set. The width-to-length ratio of the fourth current mirror structure circuit The step of converting the bias current with a first-order positive temperature coefficient and the bias current with a first-order negative temperature coefficient to obtain the inverted V-shaped current specifically includes: Set the aspect ratio of the third current mirror structure circuit. The width-to-length ratio of the fourth current mirror structure circuit ; Based on the third current mirror structure circuit, the current... Perform current replication ratio and output proportional current. ; Based on the fourth current mirror structure circuit, the current... Perform current replication ratio, output proportional current ; Select the proportional current and the proportional current The minimum value is used to obtain the inverted V-shaped current.

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