A large capacity waveform data search method of a digital oscilloscope

Abstract

The application discloses a large-capacity waveform data search method of a digital oscilloscope, utilizes FPGA hardware circuit to realize analysis and processing on high-speed parallel waveform data in the oscilloscope, generates corresponding search characteristic pulse and corresponding parallel data position information by setting circuit logic corresponding to various characteristic search modes, counts search data to represent relative position information of the search data in the FPGA, and finally sends the search characteristic pulse as the number information effective signal to the search control module together with the number information and the relative position information to generate final characteristic point position information; then the characteristic point position information is stored and transmitted to an upper computer rapidly through a PCIE board card, is analyzed and calculated by software, and finally search characteristic points are marked and displayed on an oscilloscope interface.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of digital oscilloscope, more specifically, relates to a large-capacity waveform data search method of digital oscilloscope. BACKGROUND

[0002] With the continuous improvement of modern test needs, the amount of data collected and acquired by the digital oscilloscope also increases significantly. In the face of massive collected data in the system, powerful and rich data processing functions are needed to help users quickly and accurately analyze and process the collected data. Only by adjusting the single trigger function in the oscilloscope cannot meet the current observation needs of massive data in the test, and the high speed and accuracy help users quickly search for the waveform signal features they want to observe in the massive waveform data, which is the demand of modern electronic signal test.

[0003] The waveform feature search function can detect specific features in the massive data in the system, quickly search for all the feature signals that the user wants to observe, and mark and display them on the screen, while feeding back how many waveform information in the current sampled waveform data meet the set search conditions.

[0004] At present, the search function of most domestic oscilloscopes is realized by software. When the software runs, the microprocessor traverses and searches for the feature of the waveform data points stored in the waveform buffer area according to the search conditions set by the user. However, due to the characteristics of single thread of the microprocessor and low system working frequency, the software search has the disadvantages of slow speed, low accuracy, and small search range. Although the software search can basically meet the needs of the user when searching for one or a few waveform data, when the user needs to search for large-capacity waveform data, the time required for software search increases significantly, resulting in an increase in the dead time of the oscilloscope. At the same time, in some application cases, the collected data has been processed by decimation and interpolation before being sent to the host computer for software processing, resulting in missing and inaccurate waveform data information for software search. In summary, the slow speed, small range, and low accuracy of software search significantly reduce the efficiency of the oscilloscope and are contrary to the real-time requirement in time domain test.

[0005] In recent years, with the development of FPGA, digital signal processing technology has developed rapidly, and many manufacturers have adopted the method of using hardware parallel processing in FPGA to efficiently realize waveform data search. In the existing hardware search method, the user-set feature points are searched directly from the input waveform, which can only be applied to the case where the input waveform data is small and the sampling rate is not high, and cannot process large-capacity high-speed waveform data. Moreover, the existing waveform feature search method can only search for a few types of signal features, and the existing waveform feature search technology has been difficult to meet the demand of analyzing increasingly complex and variable electronic signals. SUMMARY

[0006] The present application aims at overcoming the deficiencies of the prior art, and provides a large-capacity waveform data search method for a digital oscilloscope, which is based on a parallel processing mode of software and hardware cooperation and further improves the search speed under a large-capacity storage mode.

[0007] To achieve the above-mentioned application purposes, the present application provides a large-capacity waveform data search method for a digital oscilloscope, characterized in that it comprises the following steps:

[0008] (1) initializing the digital oscilloscope;

[0009] (2) setting search parameters and issuing them;

[0010] (2.1) the user opens the search function through the man-machine interface of the digital oscilloscope, then selects the waveform feature search type according to the user's requirements, and configures the corresponding search parameters;

[0011] (2.2) after the search parameter configuration is completed, the search enable signal and the search parameters are issued to the FPGA of the digital oscilloscope;

[0012] (3) the all-digital logic circuit in the hardware FPGA starts searching;

[0013] (3.1) when the FPGA receives the search enable signal, it controls the waveform data stored in the front-stage FIFO to be sent to the feature search module through the multi-channel selector;

[0014] (3.2) the feature search module processes the waveform data at a reduced speed to match the best running speed of the FPGA; at the same time, it issues the data valid enable signal to the data counting module, and the data counting module counts the number of groups of the waveform data after the speed reduction according to the data valid enable signal;

[0015] (3.3) the waveform data after the speed reduction is sent to the feature detection module through the all-digital comparison module by comparing with the two groups of high and low levels in the all-digital comparison module to obtain the parallel digital shaping signal, and then sent to the feature detection module through the multi-channel selector;

[0016] (3.4) the feature detection module detects the parallel digital shaping signal according to the search parameters, generates a search flag signal every time a feature point meeting the conditions is detected, and records the group number and position information of the feature point in the waveform data after the speed reduction; then sends the search flag signal, group number and position information of each feature point to the search control module until the maximum search data volume set by the user is traversed;

[0017] (3.5), the search control module combines the search mark signal, the group number and the position information of each feature point into the position signal of the feature point, then inputs the position signal of each feature point to the rear-stage FIFO for storage, and feeds back a search completion signal to the upper computer after each search is completed;

[0018] (4), the upper computer reads the feature point position signal stored in the rear-stage FIFO through a PCIE board card;

[0019] After the upper computer receives the feedback search completion signal, the upper computer sends a read command of the feature point position signal to the rear-stage FIFO, the rear-stage FIFO receives the read command, uploads all the stored feature point position signals to the upper computer, and then feeds back a read completion signal to the upper computer;

[0020] (5), the upper computer analyzes each feature point position signal, and marks each feature point on a display interface;

[0021] (5.1), the starting address of the actual storage space physical address of the first data of the waveform data input to the feature search module is addr orifin , each address space stores n data points, and the actual physical address of the mth feature point is represented as:

[0022] addr m = addr orifin +(cnt m *L+x) / n

[0023] Wherein, cnt m is the group number of the mth feature point in the waveform data after speed reduction, L is the fixed number of parallel data of each group after speed reduction, and x is the number of the mth feature point in the waveform data after speed reduction.

[0024] (5.2), when the upper computer analyzes each feature point position signal, the corresponding position is marked and displayed on the display interface according to the actual physical address of each feature point, so that the large-capacity waveform data search is completed.

[0025] The purpose of the application is achieved as follows:

[0026] The application discloses a large-capacity waveform data search method of a digital oscilloscope, and utilizes an FPGA hardware circuit to realize analysis and processing on high-speed parallel waveform data in the oscilloscope, generates corresponding search characteristic pulses and corresponding parallel data position information by setting circuit logics corresponding to various characteristic search modes, counts search data to represent relative position information of the search data in the FPGA, and finally sends the search characteristic pulses as channel information effective signals to a search control module together with channel information and relative position information to generate final characteristic point position information; subsequently, the characteristic point position information is stored and rapidly transmitted to an upper computer through a PCIE board card, is analyzed and calculated by software, and finally search characteristic points are marked and displayed on an oscilloscope interface.

[0027] Meanwhile, the large-capacity waveform data search method of the digital oscilloscope also has the following beneficial effects:

[0028] (1) The application improves search speed under a large-capacity storage mode, and simultaneously enhances the identification and analysis display capability of the oscilloscope on special characteristic signals, and meets application requirements in different application environments.

[0029] (2) The method greatly improves the speed and search data range of waveform characteristic search. Compared with traditional software search, the method searches large-capacity storage data, and has a larger search data range. According to the large-capacity storage design in the oscilloscope, 1Gpts sampling points can be searched.

[0030] (3) The method searches sampling data in parallel based on full digital logic, and has a much higher processing speed than single-thread processing of software and a traditional hardware analog circuit comparison shaping method.

[0031] (4) Since traditional microprocessors execute instructions in series, search implemented by pure software increases dead time of the oscilloscope, and thus influences waveform capture rate. The method adopts an FPGA chip to search data characteristics, and is executed in parallel with software processing and display waveform data, and has a faster search speed, so that response time of the oscilloscope is greatly saved, and waveform capture rate of the oscilloscope is reduced. BRIEF DESCRIPTION OF DRAWINGS

[0032] Figure 1 is a hardware circuit schematic diagram of the digital oscilloscope;

[0033] Figure 2 is a large-capacity waveform data search method flowchart of the digital oscilloscope;

[0034] Figure 3 is a parallel digital shaping signal schematic diagram;

[0035] Figure 4 is a characteristic point position signal schematic diagram;

[0036] Figure 5 is a feature point mark and display the schematic. DETAILED DESCRIPTION

[0037] The specific embodiments of the present application are described below in conjunction with the accompanying drawings, so that those skilled in the art can better understand the present application. It needs to be particularly pointed out that in the following description, when the detailed description of the known functions and designs may dilute the main content of the present application, these descriptions will be ignored here.

[0038] Embodiments

[0039] Figure 1 is a hardware circuit schematic diagram of the digital oscilloscope.

[0040] In the present embodiment, as shown in Figure 1 , the hardware circuit of the digital oscilloscope mainly includes a data preprocessing module, a data counting module, a data selector, a feature detection module, a search control module, a feature point position information storage module, and each sub-module needs to be reset before starting the function. During power-on and software startup, the oscilloscope will initialize the above-mentioned modules according to the pre-configuration file, so that they can run in a normal state

[0041] Next, we will combine Figure 1 to describe the large-capacity waveform data search method of the digital oscilloscope in detail, as shown in Figure 2 , which specifically includes the following steps:

[0042] S1, initializing the digital oscilloscope;

[0043] During power-on and software startup, the oscilloscope will initialize the data preprocessing module, data counting module, data selector, feature detection module, search control module, and feature point position information storage module in the FPGA according to the pre-configuration file.

[0044] S2, setting search parameters and issuing;

[0045] S2.1, the user opens the search function through the man-machine interface of the digital oscilloscope, then selects the waveform feature search type according to the user's demand, and configures the corresponding search parameters;

[0046] In the waveform search type setting menu, select the waveform search type; in the present embodiment, take the undershoot search as an example to perform the following operations:

[0047] S2.1.1, set waveform search related parameters in the waveform parameter setting menu, for example: runt polarity: positive; runt width: 92us; threshold level H: 3.3V; threshold level L: 1.5V; comparison condition: < (less than).

[0048] S2.1.2, there are two storage methods for collected data: ordinary FIFO storage and large capacity storage. When designing the waveform feature search scheme, both data sources should be considered. The system is controlled by software to divide the display screen into 10 grids * 10 grids. In the ideal case, the waveform display effect is best when each grid of the screen displays 1k data points. At this time, a total of 10k sampling data points are displayed. In the 40GSPS mode, the interval between adjacent sampling points is 25ps. The software calculates the total data required for display according to the current system time base position. In order to make the waveform display effect best, the acquisition system usually performs decimation or interpolation operation on the collected data according to different time base positions. For example, if the current time base position is 5ns, then the current waveform needs 5ns * 10 grids / 25ps = 2000 data points. At this time, the data quantity can be increased to 10k through 5 times interpolation. If the time base position is 50ns, then 20k data quantity is needed, which can be reduced to 10k through 2 times decimation. The decimation or interpolation operation will affect the accuracy and accuracy of the waveform feature search, so the acquisition system sets the default search data quantity to 10k in a single search, and sets the maximum search data quantity to 10k in this embodiment.

[0049] S2.2, after the search parameter configuration is completed, the search enable signal PC_search_en and the configured search parameters are sent to the FPGA of the digital oscilloscope;

[0050] S3, the all-digital logic circuit in the hardware FPGA starts searching;

[0051] S3.1, after the FPGA receives the search enable signal, the waveform data stored in the front-stage FIFO is sent to the feature search module through the multiplexer;

[0052] S3.2, the feature search module processes the waveform data at a reduced speed, reducing 64 parallel data to 16 parallel data, that is, each group of 16 parallel data, so as to match the best running speed of the FPGA; At the same time, the data valid enable signal is sent to the data counting module, and the data counting module counts the number of groups of the reduced waveform data according to the data valid enable signal;

[0053] S3.3, the reduced waveform data is sent to the runt search module in the feature detection module through the all-digital comparison module, and compared with the two groups of high and low levels H and L set in the all-digital comparison module to obtain parallel digital shaping signals LS_H and LS_L, and then sent to the runt search module in the feature detection module through the multiplexer.

[0054] In the embodiment, the threshold level of the full digital comparison module is H=3.3V and L=1.5V, and the output reshaped digital reshaped signals LS_H and LS_L are as shown in Figure 3 Obviously, the amplitude value of the second pulse width is between the threshold levels 1.5V and 3.3V.

[0055] S3.4, the feature detection module detects the parallel digital reshaped signals according to the search parameters, generates a search flag signal every time a feature point meeting the condition is detected, and records the group number and position information of the feature point in the waveform data after the speed reduction; then sends the search flag signal, group number and position information of each feature point to the search control module until the maximum search data volume set by the user is traversed;

[0056] S3.4.1, no matter whether the positive or negative undershoot, the waveform segment position is between the high and low threshold levels. When the logical condition (LS_H==0&&LS_L==1) is true, the undershoot flag signal is pulled high, and the undershoot flag detection is started.

[0057] S3.4.2, during the undershoot flag detection, if the logical condition changes to false, the undershoot detection is exited, and the positive and negative undershoot flag signals and the undershoot width counter enable are cleared and reset.

[0058] S3.4.3, the positive undershoot flag signal is post_runt_flag, the negative undershoot flag signal is nega_runt_flag, and the undershoot pulse width counter flag is counter_runt, and the corresponding counter value is runt_plus_width. When the user sets the positive undershoot search, the counter enable counter_runt and the positive undershoot flag signal post_runt_flag are pulled high at the rising edge of LS_L. When the user sets the negative undershoot search, the counter enable counter_runt and the negative undershoot flag signal nega_runt_flag are pulled high at the falling edge of LS_H.

[0059] S3.4.4, during the undershoot flag signal, i.e. when the logic (post_runt_flag|nega_runt_flag) is true, if the falling edge of LS_L comes, as shown in Figure 3 A-A1 segment, it indicates that this is a complete positive undershoot waveform segment, and the positive undershoot signal post_runt is pulled high; at the same time, the logical condition (LS_H==0&&LS_L==1) changes to false, and the counter enable counter_runt is pulled low, completing the time width counting of the A-A1 segment. If the rising edge of LS_H comes, as shown in Figure 3If segment B-B1 is reached, it indicates a complete negative underamplitude waveform segment, and the negative underamplitude signal nega_runt is pulled high. Simultaneously, the logic condition (LS_H == 0 && LS_L == 1) becomes false, pulling the counter enable counter_runt low to complete the time width counting for segment B-B1. If the logic (post_runt_flag|nega_runt_flag) becomes false, the positive and negative underamplitude signals are reset.

[0060] S3.4.5 The obtained underrun time width count value is compared with the underrun width (runt_width) set by the user to obtain the flag signal compare_flag corresponding to the comparison condition;

[0061] S3.4.6 Perform a logical AND operation between the comparison result flag signal and the positive and negative under-amplitude flag signals mentioned above to obtain the under-amplitude search flag signal (runt_search_flag) that finally meets the search conditions. At the same time, generate the information value x of which specific path in the parallel data the feature point that meets the search conditions is located in.

[0062] S3.4.5 In this embodiment, as Figure 3 As shown, assuming the search is set to positive under-amplitude search, then post_runt_flag = 1; the under-amplitude search module has an under-amplitude width count value of runt_plus_width = 82us in segment A-A1, which is less than the user-set runt_width = 92us, then compare_flag = 1. The comparison_flag is logically ANDed with the positive under-amplitude flag signal to obtain the under-amplitude search flag signal (runt_search_flag = post_runt_flag && compare_flag = 1);

[0063] S3.5 The search control module combines the search flag signal, group number, and position information of each feature point into a position signal of the feature point. The position signal data is composed as follows: Figure 4 As shown, the position signal of each feature point is then input into the subsequent FIFO for storage. After each search is completed, a search completion signal is sent back to the host computer.

[0064] S4. The host computer reads the feature point position signals stored in the subsequent FIFO through the PCIE board.

[0065] After receiving the feedback search completion signal, the host computer sends a read command for the feature point position signals to the subsequent FIFO. After receiving the read command, the subsequent FIFO uploads all the stored feature point position signals to the host computer and then sends a read completion signal back to the host computer.

[0066] S5, the host computer analyzes each feature point position signal and marks each feature point on the display interface;

[0067] S5.1, the actual storage space physical address of the first data of the waveform data input to the feature search module is set as addr orifin Each address space stores n data points, and the actual physical address of the mth feature point is represented as:

[0068] addr m = addr orifin + (cnt m *L+x) / n

[0069] Wherein, cnt m is the group number of the mth feature point in the waveform data after speed reduction, L is the fixed number of parallel data after speed reduction, and x is the mth feature point in the waveform data after speed reduction.

[0070] S5.1.1 In this embodiment, it is assumed that the starting address of the first data is 10, the data group number of the first feature point is cnt1=2, the fixed number of roads L=16, the position information is x=4, and the number of data points stored in each address space n=8. When the division operation in the formula is performed, if the result has a decimal, the integer part of the operation result is directly taken and the decimal part is discarded, and then addr1=14 is calculated.

[0071] S5.2, when the host computer analyzes each feature point position signal, the corresponding position is marked on the display interface according to the actual physical address of each feature point and displayed as shown in Figure 5 , thereby completing the search of large-capacity waveform data.

[0072] Although the above describes the specific embodiments of the present application in order to facilitate the understanding of the present application by those skilled in the art, it should be clear that the present application is not limited to the scope of the specific embodiments, and for those skilled in the art, as long as various changes are within the spirit and scope of the present application defined and determined by the appended claims, all the inventions utilizing the concept of the present application are included in the protection.

Claims

1. A mass waveform data search method for a digital oscilloscope, characterized by, The method comprises the following steps: (1) initializing the digital oscilloscope; (2) setting search parameters and issuing them; (2.1) a user opens the search function through the man-machine interface of the digital oscilloscope, then selects the waveform feature search type according to the user's demand, and configures the corresponding search parameters; (2.2) after the search parameters are configured, the search enable signal and the search parameters are issued to the FPGA of the digital oscilloscope; (3) the all-digital logic circuit in the hardware FPGA starts searching; (3.1) when the FPGA receives the search enable signal, the waveform data stored in the front-stage FIFO are sent to the feature search module through the multi-way selector; (3.2) the feature search module processes the waveform data at a reduced speed so as to match the best running speed of the FPGA; meanwhile, the data valid enable signal is issued to the data counting module, and the data counting module counts the number of groups of the waveform data processed at the reduced speed according to the data valid enable signal; (3.3) the waveform data processed at the reduced speed are sent to the feature detection module through the all-digital comparison module by being compared with the two groups of high and low levels in the all-digital comparison module to obtain parallel digital shaping signals, and then the parallel digital shaping signals are sent to the feature detection module through the multi-way selector; (3.4) the feature detection module detects the parallel digital shaping signals according to the search parameters, generates a search flag signal every time a feature point meeting the condition is detected, and records the number of groups and the position information of the feature point in the waveform data processed at the reduced speed; then the search flag signal, the number of groups and the position information of each feature point are sent to the search control module until the maximum search data volume set by the user is traversed; (3.5) the search control module combines the search flag signal, the number of groups and the position information of each feature point into the position signal of the feature point, then inputs the position signal of each feature point to the rear-stage FIFO for storage, and feeds back the search completion signal to the host computer after each search is completed; (4) the host computer reads the feature point position signals stored in the rear-stage FIFO through the PCIE board card; after receiving the feedback search completion signal, the host computer sends a reading command of the feature point position signal to the rear-stage FIFO, the rear-stage FIFO uploads all the feature point position signals stored to the host computer after receiving the reading command, and then feeds back a reading completion signal to the host computer; (5) the host computer analyzes each feature point position signal, and marks each feature point on the display interface; (5.2) after the host computer analyzes each feature point position signal, the corresponding positions are marked and displayed on the display interface according to the actual physical addresses of the feature points, so that the search of the large-capacity waveform data is completed. (5.1), the start address of the actual storage space physical address of the first data of the waveform data input to the feature search module is addr orifin Each address space stores n data points, and the actual physical address of the mth feature point is represented as: addr m = addr orifin + (cnt m * L + x) / n wherein, cnt m is the group number where the mth feature point is located in the reduced speed waveform data, L is the fixed number of parallel data of each group after reduction, and x is the number of the parallel where the mth feature point is located in the reduced speed waveform data. ​

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