Data processing method, apparatus, device, and medium

Abstract

The application discloses a data processing method and device, equipment and medium, and relates to the technical field of storage. The method comprises the following steps: a current data page acquisition command is sent to a bottom chip, and a target data page carrying a first check value returned by the bottom chip based on the current data page acquisition command is acquired; wherein the bottom chip is an expander of a high-speed serial computer expansion bus standard; a second check value corresponding to the received target data page is generated; if the first check value is inconsistent with the second check value, the target data page is determined as an abnormal frame, and when the number of recorded abnormal frames reaches a preset threshold, a corresponding abnormal alarm is generated, a control command is sent to the bottom chip to control a target uplink port corresponding to the abnormal frame in the bottom chip to be closed. When the bottom chip is an expander of a high-speed serial computer expansion bus standard, the abnormal frame can be accurately identified and corresponding abnormal processing can be performed, so that the reliability of the storage system is ensured.

Description

Technical Field

[0001] This invention relates to the field of storage technology, and in particular to data processing methods, apparatus, devices and media. Background Technology

[0002] In the era of data explosion, massive amounts of data are generated every day. Specialized storage devices provide the possibility for storing and processing this vast amount of data. Among this massive amount of data, some is extremely important, such as financial data and experimental data. This requires storage devices to not only be functional but also reliable. To ensure reliability, real-time monitoring of the storage hardware is necessary. When hardware problems (motherboard, backplane, fan, power supply, sensors, etc.) occur, timely alerts should be sent to notify users to troubleshoot the issue. The software module responsible for managing this hardware is generally called the Enclosure Management layer (EN). Enclosure management belongs to the software's business processing layer; it interacts with the firmware on the underlying chips to obtain information about this hardware.

[0003] When the underlying chip is a Serial Attached SCSI (SAS) expander, the chassis management layer can communicate with the SAS expander using the standard SCSI Enclosure Services (SES) protocol. When the underlying chip is a PCIe (Peripheral Component Interconnect Express) expander switch, to utilize the powerful SCSI protocol and the Small Computer System Interface (SCSI) protocol, the PCIe switch can be virtualized as a SAS expander at the driver layer. However, a PCIe switch is still a PCIe device. When a hardware failure occurs in the PCIe link, the devices on that link may tamper with the communication between the chassis management layer and the PCIe switch (the tampered content is random), leading to data tampering. This can affect the chassis management layer's judgment after data acquisition, potentially causing false alarms or other unforeseen consequences.

[0004] In summary, accurately identifying abnormal frames and performing corresponding exception handling when the underlying chip is an extender for a high-speed serial computer bus standard, in order to ensure the reliability of the storage system, is a problem that needs to be solved in this field. Summary of the Invention

[0005] In view of this, the purpose of this invention is to provide a data processing method, apparatus, device, and medium that, when the underlying chip is an extender based on a high-speed serial computer expansion bus standard, can accurately identify abnormal frames and perform corresponding abnormal handling to ensure the reliability of the storage system. The specific solution is as follows:

[0006] In a first aspect, this application discloses a data processing method applied to the chassis management layer, comprising:

[0007] The current data page acquisition command is sent to the underlying chip, and the target data page carrying the first check value is obtained by the underlying chip based on the current data page acquisition command; wherein, the underlying chip is an extender of the high-speed serial computer expansion bus standard;

[0008] Generate a second verification value corresponding to the received target data page, and determine whether the first verification value and the second verification value are consistent;

[0009] If the first check value is inconsistent with the second check value, the target data page is determined to be an abnormal frame, and it is determined whether the number of recorded abnormal frames has reached a preset threshold.

[0010] If the number of recorded abnormal frames reaches the preset threshold, a corresponding abnormal alarm is generated, and a control command is sent to the underlying chip to control the target uplink port corresponding to the abnormal frame in the underlying chip to be closed.

[0011] Optionally, the step of sending the current data page acquisition command to the underlying chip and acquiring the target data page carrying the first verification value returned by the underlying chip based on the current data page acquisition command includes:

[0012] The current data page acquisition command is sequentially sent to the underlying chip through the protocol layer, driver layer, and physical link layer, and the target data page carrying the first check value is obtained by the underlying chip based on the current data page acquisition command.

[0013] Optionally, after determining whether the number of recorded abnormal frames has reached a preset threshold, the method further includes:

[0014] If the number of recorded abnormal frames has not reached the preset threshold, the target data page is discarded, and the next data page acquisition command is used as the current data page acquisition command. Then, the process jumps back to the step of sending the current data page acquisition command to the underlying chip.

[0015] Optionally, before generating the corresponding abnormal alarm and sending the control command to the underlying chip, the method further includes:

[0016] The log collection task is sent to the underlying chip so that the underlying chip can collect log information based on the received log collection task;

[0017] The log information returned by the underlying chip is obtained so that the target task can be processed using the log information; the target task is a task that needs to be processed based on the log information.

[0018] Optionally, after generating the corresponding abnormal alarm, the method further includes:

[0019] The abnormal alarm is displayed on a preset graphical user interface so that the user can perform corresponding troubleshooting operations based on the abnormal alarm displayed on the preset graphical user interface.

[0020] Optionally, obtaining the target data page carrying the first checksum returned by the underlying chip based on the current data page acquisition command includes:

[0021] The underlying chip obtains a target data page returned by the current data page acquisition command, which includes the target data page after filling, the first data page length information of the target data page after filling, and a first verification value. The target data page after filling is the data page obtained by the underlying chip after filling the original data page with various hardware information collected based on the current data page acquisition command. The first verification value is a verification value generated by the underlying chip based on the first data page length information of the target data page after filling.

[0022] Accordingly, generating a second verification value corresponding to the received target data page, and determining whether the first verification value and the second verification value are consistent, includes:

[0023] Determine the second data page length information of the current target filled data page in the received target data page;

[0024] Determine whether the length of the second data page is greater than a preset length threshold;

[0025] If the length information of the second data page is not greater than the preset length threshold, then a second verification value corresponding to the currently received target data page is generated according to the length information of the second data page, and it is determined whether the first verification value recorded in the current target data page is consistent with the second verification value.

[0026] If the length of the second data page is greater than the preset length threshold, the currently received target data page is determined to be an abnormal frame, and when the number of recorded abnormal frames reaches the preset threshold, a corresponding abnormal alarm is generated, and a control command is sent to the underlying chip to control the target uplink port corresponding to the abnormal frame in the underlying chip to be closed.

[0027] Optionally, generating a second verification value corresponding to the currently received target data page based on the second data page length information includes:

[0028] Based on the second data page length information and using a cyclic redundancy check algorithm, a second verification value corresponding to the currently received target data page is generated.

[0029] Secondly, this application discloses a data processing method applied to an underlying chip, wherein the underlying chip is an extender of a high-speed serial computer extended bus standard; wherein the method includes:

[0030] Retrieve the current data page retrieval command issued by the chassis management layer;

[0031] Based on the current data page acquisition command, a target data page carrying a first check value is sent to the chassis management layer so that the chassis management layer generates a second check value corresponding to the target data page. If the first check value and the second check value are inconsistent, the target data page is determined to be an abnormal frame. If the number of recorded abnormal frames reaches the preset threshold, a corresponding abnormal alarm is generated and a control command is sent to the underlying chip.

[0032] The target uplink port corresponding to the abnormal frame is closed based on the control command.

[0033] Thirdly, this application discloses a data processing apparatus applied to the chassis management layer, comprising:

[0034] The command sending module is used to send the current data page retrieval command to the underlying chip;

[0035] The data acquisition module is used to acquire the target data page carrying the first verification value returned by the underlying chip based on the current data page acquisition command; wherein, the underlying chip is an extender of the high-speed serial computer expansion bus standard;

[0036] The first judgment module is used to generate a second verification value corresponding to the received target data page, and to determine whether the first verification value and the second verification value are consistent.

[0037] The second judgment module is used to determine the target data page as an abnormal frame if the first verification value is inconsistent with the second verification value, and to determine whether the number of recorded abnormal frames has reached a preset threshold.

[0038] An exception handling module is used to generate a corresponding exception alarm and send a control command to the underlying chip if the number of recorded exception frames reaches the preset threshold, so as to control the target uplink port corresponding to the exception frame in the underlying chip to be closed.

[0039] Fourthly, this application discloses a data processing apparatus applied to a lower-level chip, wherein the lower-level chip is an extender of a high-speed serial computer extended bus standard; wherein the apparatus includes:

[0040] The command acquisition module is used to acquire the current data page acquisition command issued by the chassis management layer;

[0041] The data sending module is used to send a target data page carrying a first check value to the chassis management layer based on the current data page acquisition command, so that the chassis management layer generates a second check value corresponding to the target data page. If the first check value and the second check value are inconsistent, the target data page is determined to be an abnormal frame. If the number of recorded abnormal frames reaches the preset threshold, a corresponding abnormal alarm is generated and a control command is sent to the underlying chip.

[0042] An exception handling module is used to close the target uplink port corresponding to the exception frame based on the control command.

[0043] Fifthly, this application discloses an electronic device, comprising:

[0044] Memory, used to store computer programs;

[0045] A processor is configured to execute the computer program to implement the steps of the aforementioned disclosed data processing method.

[0046] In a sixth aspect, this application discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, it implements the steps of the aforementioned disclosed data processing method.

[0047] The beneficial effects of this application are as follows: the chassis management layer sends a current data page acquisition command to the underlying chip, and acquires the target data page carrying a first check value returned by the underlying chip based on the current data page acquisition command; wherein, the underlying chip is an extender of the high-speed serial computer extended bus standard; a second check value corresponding to the received target data page is generated, and it is determined whether the first check value and the second check value are consistent; if the first check value and the second check value are inconsistent, the target data page is determined to be an abnormal frame, and it is determined whether the number of recorded abnormal frames has reached a preset threshold; if the number of recorded abnormal frames has reached the preset threshold, a corresponding abnormal alarm is generated, and a control command is sent to the underlying chip to control the target uplink port in the underlying chip corresponding to the abnormal frame to close. Therefore, the target data page returned by the underlying chip and obtained by the chassis management layer of this application carries a first check value. After the chassis management layer generates a second check value corresponding to the target data page, it can accurately determine whether the target data page is an abnormal frame based on whether the first check value and the second check value are consistent. If the number of recorded abnormal frames reaches a preset threshold, it indicates that there is a problem with the link that sends the abnormal frame. Therefore, the target uplink port corresponding to the abnormal frame in the underlying chip is closed to prevent the reception of abnormal frames sent by the target uplink port, and a corresponding abnormal alarm is generated so that the user can take appropriate action based on the abnormal alarm, thereby improving the reliability of the system. Attached Figure Description

[0048] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0049] Figure 1 This is a flowchart of a data processing method disclosed in this application;

[0050] Figure 2 This is a specific data processing architecture diagram disclosed in this application;

[0051] Figure 3 This is a specific data page illustration disclosed in this application;

[0052] Figure 4 This application discloses a specific data processing flowchart applied to the chassis management layer;

[0053] Figure 5 This application discloses another specific data processing flowchart applied to the chassis management layer;

[0054] Figure 6 This application discloses a specific data processing flowchart applied to an underlying chip.

[0055] Figure 7 This is a schematic diagram of the structure of a data processing device disclosed in this application;

[0056] Figure 8 This is a schematic diagram of another data processing device structure disclosed in this application;

[0057] Figure 9 This is a structural diagram of an electronic device disclosed in this application. Detailed Implementation

[0058] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0059] When the underlying chip is a computer hub expander, the chassis management layer can communicate with the SAS Expander using the standard polling expander protocol. When the underlying chip is a high-speed serial computer expansion bus standard expander, in order to use the powerful polling expander protocol and SCSI protocol, the PCIe switch can be virtualized as a computer hub expander at the driver layer. However, a PCIe switch is still a PCIe device. When a hardware failure occurs in the PCIe link, the devices on the PCIe link will substitute responses (random responses) for the content of the communication between the chassis management layer and the PCIe switch, resulting in data tampering. This can affect the chassis management layer's judgment after data acquisition, easily leading to false alarms or other unpredictable consequences.

[0060] Therefore, this application provides a data processing scheme that can accurately identify abnormal frames and perform corresponding abnormal processing when the underlying chip is an extender of the high-speed serial computer expansion bus standard, so as to ensure the reliability of the storage system.

[0061] See Figure 1 As shown in the figure, this application discloses a data processing method applied to the chassis management layer, including:

[0062] Step S11: Send the current data page acquisition command to the underlying chip, and acquire the target data page carrying the first check value returned by the underlying chip based on the current data page acquisition command; wherein, the underlying chip is an extender of the high-speed serial computer expansion bus standard.

[0063] In this embodiment, the step of sending the current data page acquisition command to the underlying chip and acquiring the target data page carrying the first checksum returned by the underlying chip based on the current data page acquisition command includes: sending the current data page acquisition command to the underlying chip sequentially through the protocol layer, driver layer, and physical link layer, and acquiring the target data page carrying the first checksum returned by the underlying chip based on the current data page acquisition command. For example Figure 2 The diagram shows a specific data processing architecture. The storage system includes a user interface, a chassis management layer, a protocol layer, a driver layer, underlying chips, and a physical link layer. The physical link layer is the physical channel for communication between the chassis management layer and the underlying chips, while the protocol layer and driver layer are the data channels for communication between the chassis management layer and the underlying chips.

[0064] In this embodiment, obtaining the target data page carrying the first verification value returned by the underlying chip based on the current data page acquisition command includes: obtaining the target data page returned by the underlying chip based on the current data page acquisition command, which includes the target filled data page, the first data page length information of the target filled data page, and the first verification value; the target filled data page is the data page obtained by the underlying chip after filling the original data page with various hardware information collected based on the current data page acquisition command; the first verification value is the verification value generated by the underlying chip based on the first data page length information of the target filled data page. The chassis management layer sends the current data page acquisition command to the underlying chip, and after receiving the current data page acquisition command, the underlying chip will return, for example... Figure 3 The target data page shown carries the first checksum. The specific process of obtaining the target data page is as follows: the underlying chip fills the original data page (i.e., fills it into the blank data page) with the collected hardware information (Disk), thus obtaining the target filled data page. The first data page length information of the target filled data page is determined, and then the first checksum is generated based on the first data page length information. For example, the first checksum is generated based on the first data page length information and using the Cyclic Redundancy Check (CRC) algorithm. In this way, the target data page includes not only the first checksum, but also the target filled data page and the first data page length information of the target filled data page.

[0065] Step S12: Generate a second verification value corresponding to the received target data page, and determine whether the first verification value and the second verification value are consistent.

[0066] In this embodiment, generating a second verification value corresponding to the received target data page and determining whether the first verification value and the second verification value are consistent includes: determining the second data page length information of the current target filled data page in the received target data page; determining whether the second data page length information is greater than a preset length threshold; if the second data page length information is not greater than the preset length threshold, generating a second verification value corresponding to the currently received target data page based on the second data page length information, and determining whether the first verification value recorded in the current target data page is consistent with the second verification value; if the second data page length information is greater than the preset length threshold, determining the currently received target data page as an abnormal frame, and generating a corresponding abnormal alarm when the number of recorded abnormal frames reaches a preset threshold, and sending a control command to the underlying chip to control the target uplink port corresponding to the abnormal frame in the underlying chip to close. Because the current data page acquisition command issued by the chassis management layer includes the maximum data length that the chassis management layer can receive, the first data page length information of the target filled data page generated by the underlying chip based on the current data page acquisition command will not exceed the maximum data length that the chassis management layer can receive. However, during transmission, the target data page may be illegally tampered with or lose data. Therefore, the second data page length information of the current target filled data page received by the chassis management layer may be inconsistent with the first data page length information, or even the second data page length information may exceed the maximum data length that the chassis management layer can receive, that is, exceed the preset length threshold. Therefore, the specific process of generating a second check value corresponding to the received target data page and determining whether the first check value and the second check value are consistent is as follows:

[0067] A101: Verify whether the length information of the second data page is greater than the preset length threshold.

[0068] A102: If the length information of the second data page is not greater than the preset length threshold, then a second verification value corresponding to the currently received target data page is generated based on the length information of the second data page, and it is determined whether the first verification value and the second verification value recorded in the current target data page are consistent. It is understood that even if the length information of the second data page is not greater than the preset length threshold, it cannot prove that the target data page has not changed, and it is necessary to further determine whether the first verification value and the second verification value are consistent.

[0069] A103: If the length of the second data page is greater than the preset length threshold, the target data page has changed during transmission. The currently received target data page can be directly identified as an abnormal frame. When the number of recorded abnormal frames reaches the preset threshold, a corresponding abnormal alarm is generated, and a control command is sent to the underlying chip to control the target uplink port corresponding to the abnormal frame in the underlying chip to close, so as to prevent abnormal frames from being received through the target uplink port again.

[0070] In this embodiment, generating a second verification value corresponding to the currently received target data page based on the second data page length information includes: generating a second verification value corresponding to the currently received target data page based on the second data page length information and using a cyclic redundancy check algorithm. It is understood that if a cyclic redundancy check algorithm was used to generate the first verification value, then the cyclic redundancy check algorithm is also needed to generate the second verification value.

[0071] Step S13: If the first verification value is inconsistent with the second verification value, the target data page is determined to be an abnormal frame, and it is determined whether the number of recorded abnormal frames has reached a preset threshold.

[0072] If the first checksum and the second checksum are inconsistent, it indicates that the target data page has changed during transmission. This target data page can be directly identified as an abnormal frame, and the number of abnormal frames (error_frame_count) should be incremented by 1. It's important to note that the preset threshold F indicates whether the number of recorded abnormal frames within a certain time period T has reached the specified number F. For example, if the preset threshold F is set to 5 abnormal frames between the 10th and 20th seconds, then if the number of abnormal frames within a certain time period T has not reached the preset threshold, the number of abnormal frames (error_frame_count) needs to be reset to zero. This also means that the system can tolerate a small number of abnormal frames within a certain timeframe.

[0073] Step S14: If the number of recorded abnormal frames reaches the preset threshold, a corresponding abnormal alarm is generated, and a control command is sent to the underlying chip to control the target uplink port corresponding to the abnormal frame in the underlying chip to be closed.

[0074] If the number of recorded abnormal frames reaches a preset threshold, it indicates a problem with the physical link sending the target data page. Subsequent received data pages are also likely to be abnormal frames. Therefore, a corresponding abnormal alarm is generated, and a control command is sent to the underlying chip to close the target uplink port corresponding to the abnormal frame. This prevents the reception of abnormal frames through that target uplink port. It's important to note that uplink port closure may fail. Therefore, when a data page is received from that target uplink port, it is directly identified as an abnormal frame. However, since a corresponding abnormal alarm has already been reported, it is not reported again to prevent duplicate alarms.

[0075] In this embodiment, after generating the corresponding abnormal alarm, the method further includes: displaying the abnormal alarm on a preset graphical user interface (GUI) so that the user can perform corresponding troubleshooting operations based on the abnormal alarm displayed on the preset GUI. The abnormal alarm is displayed on the preset GUI, and the underlying chip that sent the abnormal frame is also indicated in the displayed abnormal alarm. The purpose is to allow the user to accurately locate the faulty underlying chip during troubleshooting, and thus find the high-speed serial computer expansion bus standard link where this underlying chip is located.

[0076] The beneficial effects of this application are as follows: the chassis management layer sends a current data page acquisition command to the underlying chip, and acquires the target data page carrying a first check value returned by the underlying chip based on the current data page acquisition command; wherein, the underlying chip is an extender of the high-speed serial computer extended bus standard; a second check value corresponding to the received target data page is generated, and it is determined whether the first check value and the second check value are consistent; if the first check value and the second check value are inconsistent, the target data page is determined to be an abnormal frame, and it is determined whether the number of recorded abnormal frames has reached a preset threshold; if the number of recorded abnormal frames has reached the preset threshold, a corresponding abnormal alarm is generated, and a control command is sent to the underlying chip to control the target uplink port in the underlying chip corresponding to the abnormal frame to close. Therefore, the target data page returned by the underlying chip and obtained by the chassis management layer of this application carries a first check value. After the chassis management layer generates a second check value corresponding to the target data page, it can accurately determine whether the target data page is an abnormal frame based on whether the first check value and the second check value are consistent. If the number of recorded abnormal frames reaches a preset threshold, it indicates that there is a problem with the link that sends the abnormal frame. Therefore, the target uplink port corresponding to the abnormal frame in the underlying chip is closed to prevent the reception of abnormal frames sent by the target uplink port, and a corresponding abnormal alarm is generated so that the user can take appropriate action based on the abnormal alarm, thereby improving the reliability of the system.

[0077] See Figure 4 As shown in the figure, this application discloses a data processing method applied to the chassis management layer, including:

[0078] Step S21: Send the current data page acquisition command to the underlying chip, and acquire the target data page carrying the first check value returned by the underlying chip based on the current data page acquisition command; wherein, the underlying chip is an extender of the high-speed serial computer expansion bus standard.

[0079] In this embodiment, the underlying chip (PCIe switch) is a programmable chip. After being discovered by the driver, the underlying chip is virtualized as an extender of a computer hub. This allows the chassis management layer to communicate with the underlying chip via the query extender protocol. The firmware running on the underlying chip periodically collects hardware information. After information collection is complete, it refreshes its own database. Once the database is refreshed, the firmware can broadcast a query extender protocol event. Upon receiving this event, the chassis management layer initiates a hardware information acquisition (Discovery) process, which involves sending the current data page acquisition command to the underlying chip.

[0080] Step S22: Generate a second verification value corresponding to the received target data page, and determine whether the first verification value and the second verification value are consistent.

[0081] Step S23: If the first verification value is inconsistent with the second verification value, the target data page is determined to be an abnormal frame, and it is determined whether the number of recorded abnormal frames has reached a preset threshold.

[0082] Step S24: If the number of recorded abnormal frames reaches the preset threshold, a corresponding abnormal alarm is generated, and a control command is sent to the underlying chip to control the target uplink port corresponding to the abnormal frame in the underlying chip to be closed.

[0083] Step S25: If the number of recorded abnormal frames has not reached the preset threshold, the target data page is discarded, and the next data page acquisition command is used as the current data page acquisition command. Then, the process jumps back to the step of sending the current data page acquisition command to the underlying chip.

[0084] Understandably, since the system can tolerate a small number of abnormal frames within a certain period of time, if the number of recorded abnormal frames has not reached the preset threshold, the target data page will be discarded (aborted), and the next data page will be obtained. In other words, the command to obtain the next data page will be used as the command to obtain the current data page, and then the process will jump back to the step of sending the command to obtain the current data page to the underlying chip.

[0085] Therefore, this application involves the underlying chip returning a target data page carrying a first check value. The chassis management layer generates a second check value corresponding to the received target data page. The first and second check values ​​are used to determine whether the sent target data page is consistent with the received target data page, that is, whether the target data page has changed during transmission. If they are inconsistent, it means that the target data page has changed, and the target data page is directly judged as an abnormal frame. If the number of abnormal frames reaches a preset threshold, it means that the link transmitting the target data page is unstable and fault isolation is required. That is, the corresponding target uplink port is closed, and a corresponding abnormal alarm is generated, so that the user can perform corresponding troubleshooting operations.

[0086] See Figure 5 As shown in the figure, this application discloses a data processing method applied to the chassis management layer, including:

[0087] Step S31: Send the current data page acquisition command to the underlying chip, and acquire the target data page carrying the first check value returned by the underlying chip based on the current data page acquisition command; wherein, the underlying chip is an extender of the high-speed serial computer expansion bus standard.

[0088] Step S32: Generate a second verification value corresponding to the received target data page, and determine whether the first verification value and the second verification value are consistent.

[0089] Step S33: If the first verification value is inconsistent with the second verification value, the target data page is determined to be an abnormal frame, and it is determined whether the number of recorded abnormal frames has reached a preset threshold.

[0090] Step S34: If the number of recorded abnormal frames reaches the preset threshold, a log collection task is sent to the underlying chip so that the underlying chip can collect log information based on the received log collection task; the log information returned by the underlying chip is obtained so as to process the target task using the log information; the target task is a task that needs to be processed based on the log information.

[0091] In this embodiment, if the number of recorded abnormal frames reaches a preset threshold, it indicates that the link transmitting the target data page is extremely unstable, and the data page obtained next is also highly likely to be an abnormal frame. Therefore, the log information of the underlying chip can be obtained, and the target task can be processed using the log information, specifically:

[0092] B101: The chassis management layer sends log collection tasks to the underlying chips.

[0093] B102: After receiving the log collection task, the underlying chip prepares the log information and notifies the chassis management layer after the log preparation is complete.

[0094] B103: After the chassis management layer obtains the message that the underlying chip log is ready, it receives the log information returned by the underlying chip and uses the log information to process the target task.

[0095] Step S35: Generate a corresponding abnormal alarm and send a control command to the underlying chip to control the target uplink port corresponding to the abnormal frame in the underlying chip to close.

[0096] Therefore, when the number of recorded abnormal frames reaches a preset threshold, this application can complete the required processing tasks through log information. In this way, this application can not only ensure accurate identification of abnormal frames, but also complete the corresponding target tasks using log information when the number of abnormal frames is high, thus ensuring the reliability of the system.

[0097] See Figure 6 As shown in the figure, this application discloses a data processing method applied to an underlying chip, wherein the underlying chip is an extender of the high-speed serial computer expansion bus standard; wherein, the method includes:

[0098] Step S41: Obtain the current data page retrieval command issued by the chassis management layer.

[0099] The underlying chip obtains the current data page retrieval command issued by the chassis management layer. It can be understood that the current data page retrieval command contains the maximum data page length information of the target filled data page that the chassis management layer can receive.

[0100] Step S42: Based on the current data page acquisition command, send a target data page carrying a first check value to the chassis management layer so that the chassis management layer generates a second check value corresponding to the target data page. If the first check value and the second check value are inconsistent, the target data page is determined to be an abnormal frame. If the number of recorded abnormal frames reaches the preset threshold, a corresponding abnormal alarm is generated and a control command is sent to the underlying chip.

[0101] In this embodiment, the underlying chip sends a target data page carrying a first checksum to the chassis management layer based on the current data page acquisition command. The specific process is as follows:

[0102] C101: Collect various hardware information based on the current data page acquisition command, and fill the hardware information into the original data page to obtain the target filled data page. It can be understood that because the current data page acquisition command contains the maximum data page length information of the target filled data page that the chassis management layer can receive, the first data page length information of the target filled data page will not be greater than the first data page length information, that is, the preset length threshold.

[0103] C102: Generate a first verification value based on the first data page length information of the data page after the target is filled in, and obtain the target data page containing the data page after the target is filled in, the first data page length information of the data page after the target is filled in, and the first verification value;

[0104] C103: Sends the target data page to the chassis management layer.

[0105] Although the length of the first data page will not exceed the preset length threshold, the target data page may be tampered with during transmission, causing the data page length information to change. Therefore, the length of the second data page of the currently filled target data page is first determined, and it is judged whether the length of the second data page is greater than the preset length threshold. If it is not greater, a second check value corresponding to the target data page is generated. If it is greater, the currently received target data page is judged as an abnormal frame, and when the number of recorded abnormal frames reaches the preset threshold, a corresponding abnormal alarm is generated, and a control command is sent to the underlying chip to control the target uplink port corresponding to the abnormal frame in the underlying chip to close.

[0106] After the chassis management layer generates a second check value corresponding to the target data page, if the first check value and the second check value are inconsistent, the target data page is determined to be an abnormal frame. Furthermore, if the number of recorded abnormal frames reaches a preset threshold, it indicates that the link transmitting the target data page is extremely unstable. Therefore, a corresponding abnormal alarm is generated, and a control command is sent to the underlying chip.

[0107] Step S43: Close the target uplink port corresponding to the abnormal frame based on the control command.

[0108] After receiving the control command, the underlying chip closes the corresponding target uplink port to prevent the target uplink port from transmitting data pages.

[0109] Therefore, the underlying chip of this application generates a target data page carrying a first check value. The chassis management layer generates a second check value based on the received target data page. The first check value and the second check value are the same to determine whether the target data page is an abnormal frame. If it is an abnormal frame and the number of recorded abnormal frames reaches a preset threshold, it indicates that there is a fault in the link transmitting the target data page. In order to prevent the transmission of abnormal frames, the corresponding target uplink port is closed to ensure the stability of the system.

[0110] See Figure 7 As shown in the figure, this application discloses a data processing device applied to the chassis management layer, including:

[0111] Command sending module 11 is used to send the current data page acquisition command to the underlying chip;

[0112] Data acquisition module 12 is used to acquire the target data page carrying the first verification value returned by the underlying chip based on the current data page acquisition command; wherein, the underlying chip is an extender of the high-speed serial computer expansion bus standard;

[0113] The first judgment module 13 is used to generate a second verification value corresponding to the received target data page, and to determine whether the first verification value and the second verification value are consistent.

[0114] The second judgment module 14 is used to determine the target data page as an abnormal frame if the first verification value is inconsistent with the second verification value, and to determine whether the number of recorded abnormal frames has reached a preset threshold.

[0115] An exception handling module is used to generate a corresponding exception alarm and send a control command to the underlying chip if the number of recorded exception frames reaches the preset threshold, so as to control the target uplink port corresponding to the exception frame in the underlying chip to be closed.

[0116] The beneficial effects of this application are as follows: the chassis management layer sends a current data page acquisition command to the underlying chip, and acquires the target data page carrying a first check value returned by the underlying chip based on the current data page acquisition command; wherein, the underlying chip is an extender of the high-speed serial computer extended bus standard; a second check value corresponding to the received target data page is generated, and it is determined whether the first check value and the second check value are consistent; if the first check value and the second check value are inconsistent, the target data page is determined to be an abnormal frame, and it is determined whether the number of recorded abnormal frames has reached a preset threshold; if the number of recorded abnormal frames has reached the preset threshold, a corresponding abnormal alarm is generated, and a control command is sent to the underlying chip to control the target uplink port in the underlying chip corresponding to the abnormal frame to close. Therefore, the target data page returned by the underlying chip and obtained by the chassis management layer of this application carries a first check value. After the chassis management layer generates a second check value corresponding to the target data page, it can accurately determine whether the target data page is an abnormal frame based on whether the first check value and the second check value are consistent. If the number of recorded abnormal frames reaches a preset threshold, it indicates that there is a problem with the link that sends the abnormal frame. Therefore, the target uplink port corresponding to the abnormal frame in the underlying chip is closed to prevent the reception of abnormal frames sent by the target uplink port, and a corresponding abnormal alarm is generated so that the user can take appropriate action based on the abnormal alarm, thereby improving the reliability of the system.

[0117] See Figure 8 As shown in the figure, this application discloses a data processing device applied to a bottom-level chip, wherein the bottom-level chip is an extender of the high-speed serial computer expansion bus standard; wherein, the device includes:

[0118] Command acquisition module 21 is used to acquire the current data page acquisition command issued by the chassis management layer;

[0119] The data sending module 22 is used to send a target data page carrying a first check value to the chassis management layer based on the current data page acquisition command, so that the chassis management layer generates a second check value corresponding to the target data page. If the first check value and the second check value are inconsistent, the target data page is determined to be an abnormal frame. If the number of recorded abnormal frames reaches the preset threshold, a corresponding abnormal alarm is generated and a control command is sent to the underlying chip.

[0120] The exception handling module 23 is used to close the target uplink port corresponding to the exception frame based on the control command.

[0121] Therefore, the underlying chip of this application generates a target data page carrying a first check value. The chassis management layer generates a second check value based on the received target data page. The first check value and the second check value are the same to determine whether the target data page is an abnormal frame. If it is an abnormal frame and the number of recorded abnormal frames reaches a preset threshold, it indicates that there is a fault in the link transmitting the target data page. In order to prevent the transmission of abnormal frames, the corresponding target uplink port is closed to ensure the stability of the system.

[0122] Furthermore, embodiments of this application also provide an electronic device. Figure 9 This is a structural diagram of an electronic device 20 according to an exemplary embodiment. The content of the diagram should not be construed as limiting the scope of this application.

[0123] Figure 9 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Specifically, it may include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 stores a computer program, which is loaded and executed by the processor 21 to implement the relevant steps in the data processing method performed by the electronic device disclosed in any of the foregoing embodiments.

[0124] In this embodiment, the power supply 23 is used to provide operating voltage for various hardware devices on the electronic device; the communication interface 24 can create a data transmission channel between the electronic device and external devices, and the communication protocol it follows can be any communication protocol applicable to the technical solution of this application, and is not specifically limited here; the input / output interface 25 is used to acquire external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs, and is not specifically limited here.

[0125] The processor 21 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 21 may be implemented using at least one hardware form selected from DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). The processor 21 may also include a main processor and a coprocessor. The main processor, also known as a CPU (Central Processing Unit), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, the processor 21 may integrate a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content to be displayed on the screen. In some embodiments, the processor 21 may also include an AI (Artificial Intelligence) processor, which is used to handle computational operations related to machine learning.

[0126] In addition, the memory 22, as a carrier for resource storage, can be a read-only memory, random access memory, disk or optical disk, etc. The resources stored on it include operating system 221, computer program 222 and data 223, etc., and the storage method can be temporary storage or permanent storage.

[0127] The operating system 221 manages and controls the various hardware devices and computer programs 222 on the electronic device to enable the processor 21 to perform calculations and processing on the massive amounts of data 223 in the memory 22. The operating system can be Windows, Unix, Linux, etc. The computer program 222, in addition to including computer programs capable of performing the data processing methods executed by the electronic device as disclosed in any of the foregoing embodiments, may further include computer programs capable of performing other specific tasks. The data 223 may include data received by the electronic device from external devices, as well as data collected by its own input / output interface 25.

[0128] Furthermore, embodiments of this application also disclose a computer-readable storage medium storing a computer program, which, when loaded and executed by a processor, implements the data processing method steps disclosed in any of the foregoing embodiments.

[0129] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0130] The above provides a detailed description of the data processing method, apparatus, device, and medium provided by the present invention. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A data processing method, characterized in that, Applied to the chassis management layer, including: The current data page acquisition command is sent to the underlying chip, and the target data page carrying the first check value is obtained by the underlying chip based on the current data page acquisition command; wherein, the underlying chip is an extender of the high-speed serial computer expansion bus standard; Generate a second verification value corresponding to the received target data page, and determine whether the first verification value and the second verification value are consistent; If the first check value is inconsistent with the second check value, the target data page is determined to be an abnormal frame, and it is determined whether the number of recorded abnormal frames has reached a preset threshold. If the number of recorded abnormal frames reaches the preset threshold, a corresponding abnormal alarm is generated, and a control command is sent to the underlying chip to control the target uplink port corresponding to the abnormal frame in the underlying chip to be closed; wherein, the algorithm for generating the first check value is the same as the algorithm for generating the second check value; The step of obtaining the target data page carrying the first verification value returned by the underlying chip based on the current data page acquisition command includes: The underlying chip obtains a target data page returned by the current data page acquisition command, which includes the target data page after filling, the first data page length information of the target data page after filling, and a first verification value. The target data page after filling is the data page obtained by the underlying chip after filling the original data page with various hardware information collected based on the current data page acquisition command. The first verification value is a verification value generated by the underlying chip based on the first data page length information of the target data page after filling. Accordingly, generating a second verification value corresponding to the received target data page, and determining whether the first verification value and the second verification value are consistent, includes: Determine the second data page length information of the current target filled data page in the received target data page; Determine whether the length of the second data page is greater than a preset length threshold; the preset length threshold is the maximum length of data that the chassis management layer can receive. If the length information of the second data page is not greater than the preset length threshold, then a second verification value corresponding to the currently received target data page is generated according to the length information of the second data page, and it is determined whether the first verification value recorded in the current target data page is consistent with the second verification value. If the length of the second data page is greater than the preset length threshold, the currently received target data page is determined to be an abnormal frame, and when the number of recorded abnormal frames reaches the preset threshold, a corresponding abnormal alarm is generated, and a control command is sent to the underlying chip to control the target uplink port corresponding to the abnormal frame in the underlying chip to be closed. The step of generating a second verification value corresponding to the currently received target data page based on the second data page length information includes: Based on the second data page length information and using a cyclic redundancy check algorithm, a second verification value corresponding to the currently received target data page is generated.

2. The data processing method according to claim 1, characterized in that, The step of sending the current data page acquisition command to the underlying chip and acquiring the target data page carrying the first verification value returned by the underlying chip based on the current data page acquisition command includes: The current data page acquisition command is sequentially sent to the underlying chip through the protocol layer, driver layer, and physical link layer, and the target data page carrying the first check value is obtained by the underlying chip based on the current data page acquisition command.

3. The data processing method according to claim 1, characterized in that, After determining whether the number of recorded abnormal frames has reached a preset threshold, the method further includes: If the number of recorded abnormal frames has not reached the preset threshold, the target data page is discarded, and the next data page acquisition command is used as the current data page acquisition command. Then, the process jumps back to the step of sending the current data page acquisition command to the underlying chip.

4. The data processing method according to claim 1, characterized in that, Before generating the corresponding abnormal alarm and sending the control command to the underlying chip, the process also includes: The log collection task is sent to the underlying chip so that the underlying chip can collect log information based on the received log collection task; The log information returned by the underlying chip is obtained so that the target task can be processed using the log information; the target task is a task that needs to be processed based on the log information.

5. The data processing method according to claim 1, characterized in that, After generating the corresponding abnormal alarm, the process also includes: The abnormal alarm is displayed on a preset graphical user interface so that the user can perform corresponding troubleshooting operations based on the abnormal alarm displayed on the preset graphical user interface.

6. A data processing method, characterized in that, Applied to an underlying chip, wherein the underlying chip is an extender of the high-speed serial computer expansion bus standard; wherein the method includes: Retrieve the current data page retrieval command issued by the chassis management layer; Based on the current data page acquisition command, a target data page carrying a first check value is sent to the chassis management layer so that the chassis management layer generates a second check value corresponding to the target data page. If the first check value and the second check value are inconsistent, the target data page is determined to be an abnormal frame. If the number of recorded abnormal frames reaches a preset threshold, a corresponding abnormal alarm is generated and a control command is sent to the underlying chip. The target uplink port corresponding to the abnormal frame is closed based on the control command. The process by which the chassis management layer acquires the target data page includes: The underlying chip obtains a target data page returned by the current data page acquisition command, which includes the target data page after filling, the first data page length information of the target data page after filling, and a first verification value. The target data page after filling is the data page obtained by the underlying chip after filling the original data page with various hardware information collected based on the current data page acquisition command. The first verification value is a verification value generated by the underlying chip based on the first data page length information of the target data page after filling. The process of generating the second verification value and determining whether the first verification value and the second verification value are consistent includes: Determine the second data page length information of the current target filled data page in the received target data page; Determine whether the length of the second data page is greater than a preset length threshold; the preset length threshold is the maximum length of data that the chassis management layer can receive. If the length information of the second data page is not greater than the preset length threshold, then a second verification value corresponding to the currently received target data page is generated according to the length information of the second data page, and it is determined whether the first verification value recorded in the current target data page is consistent with the second verification value. If the length of the second data page is greater than the preset length threshold, the currently received target data page is determined to be an abnormal frame, and a corresponding abnormal alarm is generated when the number of recorded abnormal frames reaches the preset threshold. A control command is then sent to the underlying chip to control the target uplink port corresponding to the abnormal frame in the underlying chip to close. The second verification value is the verification value corresponding to the target data page generated based on the second data page length information and using a cyclic redundancy check algorithm.

7. A data processing apparatus, characterized in that, Applied to the chassis management layer, including: The command sending module is used to send the current data page retrieval command to the underlying chip; The data acquisition module is used to acquire the target data page carrying the first verification value returned by the underlying chip based on the current data page acquisition command; wherein, the underlying chip is an extender of the high-speed serial computer expansion bus standard; The first judgment module is used to generate a second verification value corresponding to the received target data page, and to determine whether the first verification value and the second verification value are consistent. The second judgment module is used to determine the target data page as an abnormal frame if the first verification value is inconsistent with the second verification value, and to determine whether the number of recorded abnormal frames has reached a preset threshold. An exception handling module is used to generate a corresponding exception alarm and send a control command to the underlying chip if the number of recorded exception frames reaches the preset threshold, so as to control the target uplink port corresponding to the exception frame in the underlying chip to be closed; wherein, the algorithm for generating the first check value is the same as the algorithm for generating the second check value. The data acquisition module is used to acquire a target data page returned by the underlying chip based on the current data page acquisition command, which includes the target filled data page, the first data page length information of the target filled data page, and a first verification value; the target filled data page is the data page obtained by the underlying chip after filling the original data page with various hardware information collected based on the current data page acquisition command; the first verification value is the verification value generated by the underlying chip based on the first data page length information of the target filled data page. The first judgment module is used to determine the second data page length information of the currently filled target data page in the received target data page; determine whether the second data page length information is greater than a preset length threshold; if the second data page length information is not greater than the preset length threshold, generate a second verification value corresponding to the currently received target data page based on the second data page length information, and determine whether the first verification value recorded in the current target data page is consistent with the second verification value; if the second data page length information is greater than the preset length threshold, determine the currently received target data page as an abnormal frame, and generate a corresponding abnormal alarm when the number of recorded abnormal frames reaches a preset threshold, and send a control command to the underlying chip to control the target uplink port corresponding to the abnormal frame in the underlying chip to close; the preset length threshold is the maximum data length that the chassis management layer can receive; The first judgment module is used to generate a second verification value corresponding to the currently received target data page based on the second data page length information and using a cyclic redundancy check algorithm.

8. A data processing apparatus, characterized in that, Applied to an underlying chip, wherein the underlying chip is an extender of the high-speed serial computer expansion bus standard; wherein the device includes: The command acquisition module is used to acquire the current data page acquisition command issued by the chassis management layer; The data sending module is used to send a target data page carrying a first check value to the chassis management layer based on the current data page acquisition command, so that the chassis management layer generates a second check value corresponding to the target data page. If the first check value and the second check value are inconsistent, the target data page is determined to be an abnormal frame. If the number of recorded abnormal frames reaches a preset threshold, a corresponding abnormal alarm is generated and a control command is sent to the underlying chip. An error handling module is used to close the target uplink port corresponding to the error frame based on the control command. The chassis management layer acquires the target data page through a data acquisition module. The data acquisition module is used to acquire the target data page returned by the underlying chip based on the current data page acquisition command, which includes the target filled data page, the first data page length information of the target filled data page, and a first verification value. The target filled data page is the data page obtained by the underlying chip after filling the original data page with various hardware information collected based on the current data page acquisition command. The first verification value is the verification value generated by the underlying chip based on the first data page length information of the target filled data page. The chassis management layer generates the second verification value through a first judgment module and determines whether the first verification value and the second verification value are consistent. The first judgment module is used to determine the second data page length information of the currently received target data page after filling; determine whether the second data page length information is greater than a preset length threshold; the preset length threshold is the maximum data length that the chassis management layer can receive; if the second data page length information is not greater than the preset length threshold, then a second verification value corresponding to the currently received target data page is generated according to the second data page length information, and it is determined whether the first verification value recorded in the current target data page is consistent with the second verification value; if the second data page length information is greater than the preset length threshold, then the currently received target data page is determined to be an abnormal frame, and when the number of recorded abnormal frames reaches a preset threshold, a corresponding abnormal alarm is generated, and a control command is sent to the underlying chip to control the target uplink port corresponding to the abnormal frame in the underlying chip to close; the second verification value is the verification value corresponding to the target data page generated according to the second data page length information and using a cyclic redundancy check algorithm.

9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the steps of the data processing method as described in any one of claims 1 to 6.

10. A computer-readable storage medium, characterized in that, Used to store a computer program; wherein, when the computer program is executed by a processor, it implements the steps of the data processing method as described in any one of claims 1 to 6.

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