A method for reducing the damage of copper plating to the performance of a solar heterojunction cell PVD deposition

Abstract

The application discloses a method for reducing damage of a solar heterojunction cell caused by copper plating by PVD deposition, and comprises the following steps: double-side texturing is performed on a substrate N-type silicon wafer, and amorphous silicon layers are deposited on the front and back surfaces of the silicon wafer respectively; a transparent TCO conductive film is deposited on the front and back surfaces of the silicon wafer with the amorphous silicon layers by a magnetron sputtering method respectively; a copper metal film layer is deposited on the transparent conductive film layers on the front and back surfaces of the silicon wafer respectively, the copper metal film layer is composed of multiple film layers with different thicknesses, and the film layers are sequentially thin to thick, and the film layer close to the TCO conductive film has the thinnest thickness; metal grid line electrodes are formed on the copper metal film layers on the front and back surfaces of the N-type silicon wafer; and the copper metal film layers outside the metal grid line electrode area are removed. The application can reduce the damage of ITO and amorphous silicon caused by PVD deposition of copper in the metallization process of the heterojunction cell, and improve the thin film photoelectric performance.

Description

Technical Field

[0001] This invention relates to the field of solar cells, and more particularly to a method for reducing the performance damage of solar cells caused by copper plating during PVD deposition in heterojunction solar cells. Background Technology

[0002] Sustainable development of energy and the environment has become a global concern. Photovoltaic power generation possesses unparalleled advantages over traditional energy sources, directly converting solar energy into electricity, making it the most ideal and sustainable green energy source. Therefore, how to fully utilize solar energy, improve the photoelectric conversion efficiency of solar cells, and reduce the cost per kilowatt-hour of solar cells has become the ultimate goal of researchers. In the process of technological innovation in high-efficiency solar cells, heterojunction cells are hailed as the most likely high-efficiency N-type cells to achieve large-scale industrial application in the future, and are expected to achieve grid parity around 2020. However, their currently high cost has kept many companies in a wait-and-see mode. How to reduce the manufacturing cost of solar cells while ensuring high efficiency has become a key research topic for industry research institutions and enterprises. In the process of heterojunction cell fabrication, the cell metallization process is one of the key steps determining the cell efficiency and cost. The metal electrode must have high bonding strength and low contact resistance with the silicon interface, and also provide a high conductivity path for current output. Currently, the fabrication of metal electrodes for commercial crystalline silicon cells mostly adopts screen printing technology; however, whether screen printing technology can meet the market demand for high efficiency and low cost development of future heterojunction cells is highly questionable. Exploring metallization techniques suitable for heterojunction solar cells is one of the effective ways to reduce cell costs and improve photoelectric conversion efficiency. Kaneka Corporation of Japan announced a record-breaking efficiency of 25.1% for its bifacial heterocrystalline silicon solar cells using copper contact metallization, which has been validated by the Fraunhofer Institute for Solar Energy Systems (Fraunhofer ISE) in Germany. They plan to establish a pilot production line using this technology. Copper electroplating technology has excellent characteristics such as simple equipment, low production cost, uniform and dense plating, and good conductivity. During the cell electrode fabrication process, the width and height of the grid lines can be controlled, effectively improving the aspect ratio of the grid lines, reducing shading losses caused by grid line obstruction, and simultaneously reducing the contact resistance between the electrode and the PN junction, the bulk resistance of the electrode itself, and the series resistance of the cell, thereby improving the cell's photoelectric conversion efficiency. Summary of the Invention

[0003] To address the aforementioned problems, this invention provides a method for reducing the performance damage of solar cell cells caused by copper plating during PVD deposition in heterojunction solar cells. This method aims to rapidly improve the damage of deposited copper to amorphous silicon and TCO, thereby enhancing the photoelectric performance of the thin film.

[0004] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is: a method for reducing the damage of copper plating to the performance of solar heterojunction cells by PVD deposition, the method comprising the following steps:

[0005] Double-sided texturing is performed on an N-type silicon substrate, and amorphous silicon layers are deposited on both the front and back sides of the silicon wafer.

[0006] Transparent TCO conductive films were deposited on both sides of a silicon wafer coated with an amorphous silicon layer using magnetron sputtering.

[0007] Copper metal films are deposited on the transparent conductive thin film layers on both sides of the silicon wafer. The copper metal films are composed of multiple films of different thicknesses, which are arranged from thin to thick in sequence, with the film thickness closest to the TCO conductive film being the thinnest.

[0008] Metal gate electrodes are formed on copper metal films on both sides of an N-type silicon wafer;

[0009] Remove the copper metal film layer outside the metal gate electrode region.

[0010] Preferably, the TCO conductive thin film material is composed of indium oxide and tin oxide in a ratio of 95%:5% or 90%:10%.

[0011] Preferably, the thickness of the transparent TCO conductive film deposited on both sides is 100-120 nm.

[0012] Preferably, the power density of the first target copper layer of the copper metal film layer near the TCO conductive film is 1-1.5 W / mm, the power density of the second target copper layer is 3-3.7 W / mm, the power density of the third target copper layer is 5-5.5 W / mm, and the power density of the fourth target copper layer is 6-6.5 W / mm; the thickness of the first target copper layer of the copper metal film layer near the TCO conductive film is... The thickness of the second target copper layer is The thickness of the third target copper layer is The thickness of the fourth target copper layer is .

[0013] Preferably, the chamber pressure of the copper metal film deposition target is controlled within 0.3-0.5 Pa.

[0014] Preferably, the method for forming the metal grid electrode involves covering the front and back of a copper metal film layer with a photosensitive adhesive film, exposing the seed layer copper with ultraviolet light to reveal the grid electrode pattern, and then developing the grid electrode pattern with a developing solution.

[0015] As can be seen from the above description of the present invention, compared with the prior art, the present invention has the following advantages:

[0016] This invention improves the sputtering damage of copper to amorphous silicon and TCO layers by optimizing the PVD deposition process, thereby enhancing the photoelectric properties of the thin film. Attached Figure Description

[0017] The accompanying drawings are only for further understanding of this patent. The illustrative embodiments and descriptions of this patent are used to explain this patent and do not constitute an undue limitation on this patent.

[0018] Figure 1 This is a schematic diagram of the heterojunction solar cell of the present invention. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of this patent clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0020] Reference Appendix Figure 1 As shown, a method for reducing the performance damage of solar heterojunction cells caused by copper plating during PVD deposition is disclosed. The method includes the following steps:

[0021] Step 1: Texturing is performed on both sides of the 1N-type silicon substrate, and amorphous silicon layers 2 are deposited on both sides of the silicon wafer.

[0022] Step 2: A transparent TCO conductive film 3 is deposited on both sides of a silicon wafer coated with an amorphous silicon layer using a magnetron sputtering method;

[0023] Step 3: Deposit copper metal film layers 4 on the transparent conductive film layers on both sides of the silicon wafer. The copper metal film layers are composed of multiple film layers of different thicknesses, which are presented in order from thin to thick, with the film layer closest to the TCO conductive film being the thinnest.

[0024] Step 4: Form metal gate electrodes 5 on the copper metal film layers on both sides of the N-type silicon wafer;

[0025] Step 5: Remove the copper metal film layer outside the metal grid electrode area using an etching solution. The photosensitive adhesive film and the copper metal film layer outside the grid area are then etched away. The etched silicon wafers are cleaned and dried using a cleaning machine, and finally tested and sorted to complete the cell fabrication process.

[0026] The TCO conductive thin film material is composed of indium oxide and tin oxide in a ratio of 95%:5% or 90%:10%.

[0027] The thickness of the transparent TCO conductive film deposited on both sides is 100-120 nm.

[0028] The power density of the copper metal film layer near the target site of the first layer (4-1) close to the TCO conductive film is 1-1.5 W / mm, the power density of the target site of the second layer (4-2) is 3-3.7 W / mm, the power density of the target site of the third layer (4-3) is 5-5.5 W / mm, and the power density of the target site of the fourth layer (4-4) is 6-6.5 W / mm; the thickness of the copper metal film layer near the target site of the first layer (4-1) close to the TCO conductive film is... The thickness of the copper at the second (4-2) target site is The thickness of the copper at the target site in the third layer (4-3) is... The thickness of the copper at the fourth (4-4) target site is The chamber pressure at the copper metal film deposition target is controlled within 0.3-0.5 Pa.

[0029] The method for forming the metal grid line electrode involves covering the front and back of a copper metal film layer with a photosensitive adhesive film, exposing the seed layer copper with ultraviolet light to reveal the grid line electrode pattern, and then using a developing solution to reveal the grid line electrode pattern. Finally, a certain thickness of copper metal is electroplated onto the exposed grid line pattern using an electroplating method.

[0030] The implementation data of this invention are compared with existing technologies. The electrical performance is shown in the table below. The main gains are reflected in Isc and Voc, resulting in an absolute gain of 0.1% in the final conversion efficiency of the solar cell.

[0031] Gain Isc(A) Voc(V) FF% Eta% Example 0.030 0.002 0.07％ 0.1％

[0032] This invention improves the sputtering damage of copper to amorphous silicon and TCO layers by optimizing the PVD deposition process, thereby enhancing the photoelectric properties of the thin film.

[0033] The above description is merely one embodiment of the present invention and is not intended to limit the scope of this patent. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the invention should be included within the scope of protection of this patent.

Claims

1. A method for reducing the performance damage of solar heterojunction cells caused by copper plating during PVD deposition, characterized in that: The method includes the following steps: Double-sided texturing is performed on an N-type silicon substrate, and amorphous silicon layers are deposited on both the front and back sides of the silicon wafer. Transparent TCO conductive films were deposited on both sides of a silicon wafer coated with an amorphous silicon layer using magnetron sputtering. Copper metal films are deposited on the transparent conductive thin film layers on both sides of the silicon wafer. The copper metal films are composed of multiple films of different thicknesses, which are arranged from thin to thick in sequence, with the film thickness closest to the TCO conductive film being the thinnest. The power density of the first target copper layer of the copper metal film layer near the TCO conductive film is 1-1.5 W / mm, the power density of the second target copper layer is 3-3.7 W / mm, the power density of the third target copper layer is 5-5.5 W / mm, and the power density of the fourth target copper layer is 6-6.5 W / mm; the thickness of the first target copper layer of the copper metal film layer near the TCO conductive film is 100-150 Å, the thickness of the second target copper layer is 300-350 Å, the thickness of the third target copper layer is 400-450 Å, and the thickness of the fourth target copper layer is 500-600 Å. Metal gate electrodes are formed on copper metal films on both sides of an N-type silicon wafer; Remove the copper metal film layer outside the metal gate electrode region.

2. The method for reducing the performance damage of solar cell cells caused by copper plating during PVD deposition in a solar heterojunction cell according to claim 1, characterized in that: The TCO conductive thin film material is composed of indium oxide and tin oxide in a ratio of 95%:5% or 90%:10%.

3. The method for reducing the damage to the performance of solar cells caused by copper plating during PVD deposition in a solar heterojunction cell according to claim 1, characterized in that: the thickness of the transparent TCO conductive film deposited on both sides is 100~120nm.

4. The method for reducing the damage to the performance of solar cells caused by copper plating during PVD deposition of a solar heterojunction cell according to claim 1, characterized in that: the chamber pressure of the copper metal film deposition target is controlled within 0.3-0.5 Pa.

5. A method for reducing the damage to the performance of solar cells caused by copper plating during PVD deposition in a solar heterojunction cell according to claim 1, characterized in that: the method for forming metal grid electrodes involves covering the front and back sides of a copper metal film layer with a photosensitive emulsion, exposing the seed layer copper with ultraviolet light to reveal the grid electrode pattern, and then developing the grid electrode pattern with a developing solution.

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