Display substrate, manufacturing method thereof, and display device

Abstract

The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. The display substrate includes a base structure including a substrate, and a light-emitting structure, a pixel definition layer, and a connection structure. At least a portion of the light-emitting structure is located in an opening of the pixel definition layer, and the connection structure is located on a side of the pixel definition layer away from the opening. The light-emitting structure includes a conductive structure layer, a first light-emitting layer, and a first electrode layer. A portion of the first electrode layer and a portion of the first light-emitting layer are located on a side of the pixel definition layer close to the connection structure, and the first electrode layer is electrically connected to the connection structure. The connection structure includes a first conductive layer, a second conductive layer, and a top structure. A footprint of the second conductive layer on the substrate is located inside a footprint of the top structure on the substrate, and the top structure includes a second light-emitting layer. A footprint of the first light-emitting layer on the substrate partially overlaps with a footprint of the second light-emitting layer on the substrate.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to a display substrate, its manufacturing method, and a display device. Background Technology

[0002] Top-gate TFTs (Thin Film Transistors) have a short channel characteristic, so their on-state current Io on This allows for effective improvement, significantly enhancing the display performance of the device and effectively reducing power consumption. Furthermore, the small overlap area between the gate and source / drain of a top-gate TFT results in lower parasitic capacitance, thus reducing the likelihood of malfunctions such as short circuits between the gate and data lines. Due to these significant advantages, top-gate TFTs are attracting increasing attention.

[0003] Top-emitting displays are widely used in automotive and subway displays, as well as in shop window displays in hotels and clothing stores, offering significant advantages such as clear image quality and realistic display effects. However, large-size top-emitting displays often have very thin cathodes to improve transparency, leading to a significant cathode voltage drop (IR drop) problem in most products. Related technologies can effectively overlap the cathode with an auxiliary cathode located on the backplane, thereby mitigating the IR drop issue. Summary of the Invention

[0004] According to one aspect of this disclosure, a display substrate is provided, comprising: a substrate structure including a base substrate; and a light-emitting structure, a pixel definition layer, and a connection structure on one side of the base substrate, wherein at least a portion of the light-emitting structure is located in an opening of the pixel definition layer, and the connection structure is located on a side of the pixel definition layer away from the opening, wherein the light-emitting structure includes: a conductive structure layer on one side of the base substrate; a first light-emitting layer on the conductive structure layer away from the base substrate; and a first electrode layer on the first light-emitting layer away from the base substrate; wherein a portion of the first electrode layer and a portion of the first light-emitting layer are located on the side of the pixel definition layer between the opening and the connection structure, close to the connection structure, and the first electrode layer is electrically connected to the connection structure; the connection structure includes: a first conductive layer on one side of the base substrate; a second conductive layer on the first conductive layer away from the base substrate; and a top structure on the second conductive layer away from the base substrate, wherein the orthographic projection of the second conductive layer on the base substrate is located inside the orthographic projection of the top structure on the base substrate, and the top structure includes a second light-emitting layer; wherein the orthographic projection of the first light-emitting layer on the base substrate and the orthographic projection of the second light-emitting layer on the base substrate partially overlap.

[0005] In some embodiments, the first light-emitting layer includes an extension portion extending from the side of the pixel-defining layer into the gap, the extension portion including a first extension portion and a second extension portion connected to the first extension portion, the second extension portion being on the side of the first extension portion away from the pixel-defining layer, wherein the distance between the second extension portion and the second conductive layer is less than the thickness of the first light-emitting layer in a direction perpendicular to the substrate.

[0006] In some embodiments, the first extension has a first slope angle, which is the angle between the first inclined surface of the first extension and the lower surface of the first extension; the second extension has a second slope angle, which is the angle between the second inclined surface of the second extension and the lower surface of the second extension; wherein the first slope angle and the second slope angle are different.

[0007] In some embodiments, the first slope angle is greater than the second slope angle.

[0008] In some embodiments, the top structure further includes: a third conductive layer between the second conductive layer and the second light-emitting layer; and a fourth conductive layer on the side of the second light-emitting layer away from the substrate; wherein the second light-emitting layer has a third slope angle, the third slope angle being the angle between the side surface of the second light-emitting layer and the bottom surface of the second light-emitting layer.

[0009] In some embodiments, the first slope angle is smaller than the third slope angle.

[0010] In some embodiments, the second slope angle is smaller than the third slope angle.

[0011] In some embodiments, the second conductive layer has a fourth slope angle, which is the angle between the side surface of the second conductive layer and the bottom surface of the second conductive layer.

[0012] In some embodiments, the fourth slope angle is smaller than the third slope angle.

[0013] In some embodiments, the first slope angle is smaller than the fourth slope angle, and the second slope angle is smaller than the fourth slope angle.

[0014] In some embodiments, the distance is greater than the length of the bottom surface of the first extension in the direction from the side surface of the pixel definition layer to the gap.

[0015] In some embodiments, the thickness of the first light-emitting layer is less than the length of the bottom surface of the second extension in the direction from the side surface of the pixel definition layer to the gap.

[0016] In some embodiments, the orthographic projection of the first extension portion on the substrate does not overlap with the orthographic projection of the second light-emitting layer on the substrate.

[0017] In some embodiments, the orthographic projection of the second extension on the substrate is located inside the orthographic projection of the top structure on the substrate.

[0018] In some embodiments, the conductive structure layer includes: a fifth conductive layer on one side of the substrate, the fifth conductive layer being in the same layer as the first conductive layer and isolated from the first conductive layer, and the material of the fifth conductive layer being the same as that of the first conductive layer; a third electrode layer on the side of the fifth conductive layer away from the substrate, the third electrode layer being in the same layer as the second conductive layer and isolated from the second conductive layer, and the material of the third electrode layer being the same as that of the second conductive layer; and a sixth conductive layer on the side of the third electrode layer away from the substrate, the sixth conductive layer being in the same layer as the third conductive layer and isolated from the third conductive layer, and the material of the sixth conductive layer being the same as that of the third conductive layer.

[0019] In some embodiments, the second light-emitting layer is located in the same layer as the first light-emitting layer, and the material of the second light-emitting layer is the same as the material of the first light-emitting layer.

[0020] In some embodiments, the substrate structure further includes: a second electrode layer on one side of the substrate, the second electrode layer being electrically connected to the first conductive layer; and a first insulating layer covering the second electrode layer, wherein the light-emitting structure, the pixel definition layer, and the connection structure are located on the side of the first insulating layer away from the substrate.

[0021] In some embodiments, the substrate structure further includes: a buffer layer between the substrate and the second electrode layer; an active layer on the side of the buffer layer away from the substrate; a second insulating layer on the side of the active layer away from the substrate; a gate on the side of the second insulating layer away from the substrate; an interlayer dielectric layer on the side of the buffer layer away from the substrate, the interlayer dielectric layer covering the active layer, the second insulating layer and the gate; and a fourth electrode layer and a fifth electrode layer on the side of the interlayer dielectric layer away from the substrate, the fourth electrode layer being electrically connected to the active layer through a first conductive via, the fifth electrode layer being electrically connected to the active layer through a second conductive via, the first conductive via and the second conductive via respectively passing through the interlayer dielectric layer, the fourth electrode layer and the fifth electrode layer being in the same layer as the second electrode layer.

[0022] In some embodiments, the first insulating layer includes: a passivation layer covering the second electrode layer, the fourth electrode layer, and the fifth electrode layer, and a planarization layer on the side of the passivation layer away from the substrate; the first conductive layer is electrically connected to the second electrode layer through a third conductive via, the third conductive via passing through the passivation layer and the planarization layer; the conductive structure layer is electrically connected to the fourth electrode layer or the fifth electrode layer through a fourth conductive via, the fourth conductive via passing through the passivation layer and the planarization layer.

[0023] According to another aspect of this disclosure, a display device is provided, comprising: a display substrate as described above.

[0024] According to another aspect of this disclosure, a method for manufacturing a display substrate is provided, comprising: providing a substrate structure, the substrate structure including a substrate; and forming a light-emitting structure, a pixel definition layer, and a connection structure on one side of the substrate, wherein at least a portion of the light-emitting structure is located in an opening of the pixel definition layer, and the connection structure is located on the side of the pixel definition layer away from the opening, wherein the light-emitting structure includes: a conductive structure layer on one side of the substrate; a first light-emitting layer on the conductive structure layer away from the substrate; and a first electrode layer on the first light-emitting layer away from the substrate; wherein a portion of the first electrode layer and a portion of the first light-emitting layer are located on the side of the first light-emitting layer away from the substrate. On the side of the pixel definition layer near the connection structure between the opening and the connection structure, the first electrode layer is electrically connected to the connection structure; the connection structure includes: a first conductive layer on one side of the substrate; a second conductive layer on the side of the first conductive layer away from the substrate; and a top structure on the side of the second conductive layer away from the substrate, wherein the orthographic projection of the second conductive layer on the substrate is located inside the orthographic projection of the top structure on the substrate, and the top structure includes a second light-emitting layer; wherein the orthographic projection of the first light-emitting layer on the substrate and the orthographic projection of the second light-emitting layer on the substrate partially overlap.

[0025] In some embodiments, the first light-emitting layer is formed by a vapor deposition process, and the first electrode layer is formed by a sputtering process.

[0026] Other features and advantages of this disclosure will become clear from the following detailed description of exemplary embodiments with reference to the accompanying drawings. Attached Figure Description

[0027] The accompanying drawings, which form part of this specification, illustrate embodiments of this disclosure and, together with the specification, serve to explain the principles of this disclosure.

[0028] This disclosure will become clearer with reference to the accompanying drawings and the following detailed description, wherein:

[0029] Figure 1 This is a schematic cross-sectional view of a display substrate according to some embodiments of the present disclosure;

[0030] Figure 2 This illustrates a display substrate according to some embodiments of the present disclosure. Figure 1 An enlarged view of the portion within the box at position 50;

[0031] Figure 3 This is a flowchart illustrating a method for manufacturing a display substrate according to some embodiments of the present disclosure;

[0032] Figure 4 This is a cross-sectional schematic diagram showing the structure of a stage in the manufacturing process of a display substrate according to some embodiments of the present disclosure;

[0033] Figure 5 This is a cross-sectional schematic diagram illustrating the structure of another stage in the manufacturing process of a display substrate according to some embodiments of the present disclosure;

[0034] Figure 6 This is a cross-sectional schematic diagram illustrating the structure of another stage in the manufacturing process of a display substrate according to some embodiments of the present disclosure;

[0035] Figure 7 This is a cross-sectional schematic diagram illustrating the structure of another stage in the manufacturing process of a display substrate according to some embodiments of the present disclosure;

[0036] Figure 8 This is a cross-sectional schematic diagram illustrating the structure of another stage in the manufacturing process of a display substrate according to some embodiments of the present disclosure;

[0037] Figure 9 This is a cross-sectional schematic diagram illustrating the structure of another stage in the manufacturing process of a display substrate according to some embodiments of the present disclosure.

[0038] It should be understood that the dimensions of the various parts shown in the accompanying drawings are not necessarily drawn to actual scale. Furthermore, the same or similar reference numerals denote the same or similar components. Detailed Implementation

[0039] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. The descriptions of the exemplary embodiments are merely illustrative and are in no way intended to limit the present disclosure or its application or use. The present disclosure may be implemented in many different forms and is not limited to the embodiments described herein. These embodiments are provided so that the present disclosure will be thorough and complete, and will fully express the scope of the disclosure to those skilled in the art. It should be noted that, unless specifically stated otherwise, the relative arrangement of components and steps, the composition of materials, numerical expressions, and values ​​set forth in these embodiments should be interpreted as exemplary only and not as limiting.

[0040] The terms "first," "second," and similar words used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different parts. Words such as "including" or "contains" mean that the element preceding the word encompasses the element listed after it, and do not exclude the possibility of encompassing other elements as well. Terms such as "above," "below," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, this relative positional relationship may also change accordingly.

[0041] In this disclosure, when a specific device is described as being located between a first device and a second device, an intermediary device may or may not be present between the specific device and the first or second device. When a specific device is described as being connected to other devices, the specific device may be directly connected to the other devices without an intermediary device, or it may be not directly connected to the other devices but have an intermediary device.

[0042] All terms used in this disclosure (including technical or scientific terms) have the same meaning as understood by one of ordinary skill in the art to which this disclosure pertains, unless otherwise specifically defined. It should also be understood that terms defined in a general dictionary, such as a dictionary, should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and not as having an idealized or highly formalized meaning, unless expressly defined herein.

[0043] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0044] One technical problem solved by this disclosure is to provide a display substrate that allows for convenient and sufficient overlap between the main cathode and the auxiliary cathode. The display substrate according to some embodiments of this disclosure is described in detail below with reference to the accompanying drawings.

[0045] Figure 1 This is a schematic cross-sectional view of a display substrate according to some embodiments of the present disclosure. Figure 2 This illustrates a display substrate according to some embodiments of the present disclosure. Figure 1 An enlarged diagram of the portion within box 50 in the image. Below is a related illustration. Figure 1 and Figure 2 A detailed description of a display substrate according to some embodiments of the present disclosure.

[0046] like Figure 1 As shown, the display substrate includes a substrate structure 10. The substrate structure 10 includes a substrate 101.

[0047] like Figure 1 As shown, the display substrate further includes a light-emitting structure 20, a pixel definition layer 30, and a connection structure 40 on one side of the substrate 101. At least a portion of the light-emitting structure 20 is located in an opening 302 of the pixel definition layer 30. The connection structure 40 is located on the side of the pixel definition layer 30 away from the opening 302.

[0048] like Figure 1As shown, the light-emitting structure 20 includes: a conductive structure layer 210 on one side of the substrate 101, a first light-emitting layer 221 on the side of the conductive structure layer 210 away from the substrate 101, and a first electrode layer 222 on the side of the first light-emitting layer 221 away from the substrate 101. For example, the first electrode layer 222 serves as a main cathode layer. For example, the material of the first electrode layer 222 includes conductive materials such as indium zinc oxide (IZO). A portion of the first electrode layer 222 and a portion of the first light-emitting layer 221 are located on the side of the pixel definition layer near the connection structure between the opening 302 and the connection structure 40 (i.e., the side of the pixel definition layer away from the opening, i.e., the outer side of the pixel definition layer). The first electrode layer 222 is electrically connected to the connection structure 40.

[0049] like Figure 1 As shown, the connection structure 40 includes a first conductive layer 401 on one side of the substrate 101. For example, the first conductive layer 401 is electrically connected to the first electrode layer 222. For example, the material of the first conductive layer 401 includes a transparent conductive material such as ITO (Indium Tin Oxide). The connection structure 40 also includes a second conductive layer 402 on the side of the first conductive layer 401 away from the substrate 101. For example, the material of the second conductive layer 402 includes a metal such as copper, silver, aluminum, or an aluminum alloy. The connection structure 40 also includes a top structure 410 on the side of the second conductive layer 402 away from the substrate 101.

[0050] The top structure 410 includes a second light-emitting layer 412. For example, the material of the second light-emitting layer includes an organic light-emitting material. In some embodiments, such as... Figure 2 As shown, the second light-emitting layer 412 has a third slope angle θ3, which is the angle between the side surface and the bottom surface of the second light-emitting layer 412. For example, this angle is acute. For example, the second light-emitting layer 412 and the first light-emitting layer 221 are in the same layer, and the material of the second light-emitting layer is the same as that of the first light-emitting layer. This facilitates the manufacturing of the display substrate.

[0051] In some embodiments, such as Figure 1 and Figure 2 As shown, the top structure 410 also includes a third conductive layer 413 between the second conductive layer 402 and the second light-emitting layer 412. For example, the material of this third conductive layer 413 includes a transparent conductive material such as ITO. The second light-emitting layer 412 is located on the side of the third conductive layer 413 away from the substrate 101. Figure 1 and Figure 2As shown, the top structure 410 also includes a fourth conductive layer 414 on the side of the second light-emitting layer 412 away from the substrate 101. For example, the material of the fourth conductive layer 414 includes conductive materials such as IZO. For example, the fourth conductive layer 414 is in the same layer as the first electrode layer 222.

[0052] It should be noted that "same layer" refers to a layer structure formed by using the same film deposition process to create a specific pattern, and then using the same photomask to pattern this film layer in a single patterning process. Depending on the specific pattern, a single patterning process may include multiple exposure, development, or etching processes, and the specific pattern in the resulting layer structure can be continuous or discontinuous. These specific patterns may also be at different heights or have different thicknesses.

[0053] like Figure 1 and Figure 2 As shown, the orthographic projection of the second conductive layer 402 onto the substrate 101 is located inside the orthographic projection of the top structure 410 onto the substrate 101. The top structure 410 and the pixel definition layer 30 are separated by a gap 430, and the second conductive layer 402 and the pixel definition layer 30 are also separated by a gap 430. The area of ​​the orthographic projection of the second conductive layer 402 onto the substrate 101 is smaller than the area of ​​the orthographic projection of the top structure 410 onto the substrate 101. The orthographic projection of the top structure 410 onto the substrate 101 completely covers the orthographic projection of the second conductive layer 402 onto the substrate 101. The lateral dimension of the second conductive layer 402 (i.e., the length of the second conductive layer in the direction from the side of the pixel definition layer 30 to the gap 430) is smaller than the lateral dimension of the top structure 410.

[0054] like Figure 1 and Figure 2 As shown, the orthographic projection of the first light-emitting layer 221 on the substrate 101 partially overlaps with the orthographic projection of the second light-emitting layer 412 on the substrate 101.

[0055] Thus, a display substrate according to some embodiments of the present disclosure is provided. As described above, the display substrate includes: a substrate structure, the substrate structure including a substrate; and a light-emitting structure, a pixel definition layer, and a connection structure on one side of the substrate, wherein at least a portion of the light-emitting structure is located in an opening of the pixel definition layer, and the connection structure is located on the side of the pixel definition layer away from the opening, wherein the light-emitting structure includes: a conductive structure layer on one side of the substrate; a first light-emitting layer on the conductive structure layer away from the substrate; and a first electrode layer on the first light-emitting layer away from the substrate; wherein a portion of the first electrode layer and a portion of the first light-emitting layer are located on the side of the pixel definition layer between the opening and the connection structure, close to the connection structure, and the first electrode layer is electrically connected to the connection structure; the connection structure includes: a first conductive layer on one side of the substrate; a second conductive layer on the first conductive layer away from the substrate; and a top structure on the second conductive layer away from the substrate, wherein the orthographic projection of the second conductive layer on the substrate is located inside the orthographic projection of the top structure on the substrate, and the top structure includes a second light-emitting layer; wherein the orthographic projection of the first light-emitting layer on the substrate and the orthographic projection of the second light-emitting layer on the substrate partially overlap. The aforementioned connection structure allows for easy cutting of the light-emitting material at the gap, thereby ensuring full electrical connection between the first electrode layer and the connection structure. This effectively reduces voltage drop and improves the display uniformity of the display device.

[0056] In some embodiments, such as Figure 1 As shown, the substrate structure 10 may further include a second electrode layer 121 on one side of the substrate 101. For example, the second electrode layer 121 serves as an auxiliary cathode layer. The second electrode layer 121 is electrically connected to the first conductive layer 401. The substrate structure 10 may further include a first insulating layer 110 covering the second electrode layer 121. The light-emitting structure 20, the pixel defining layer 30, and the connection structure 40 are located on the side of the first insulating layer 110 away from the substrate 101. For example, the first conductive layer 401 is electrically connected to the second electrode layer 121 through conductive vias passing through the first insulating layer 110. In this embodiment, by providing a second electrode layer and electrically connecting it to the first conductive layer, the first electrode layer and the second electrode layer are sufficiently electrically connected, which can more effectively reduce the voltage drop problem and improve the display uniformity of the display device. In some embodiments, such as Figure 2As shown, the first light-emitting layer 221 includes an extension portion extending from the side of the pixel defining layer 30 (i.e., the side of the pixel defining layer located between the opening and the connecting structure, near the connecting structure) into the gap 430. This extension portion includes a first extension portion 2211 and a second extension portion 2212 connected to the first extension portion 2211, the second extension portion 2212 being on the side of the first extension portion 2211 away from the pixel defining layer 30. The distance D between the second extension portion 2212 and the second conductive layer 402 is less than the thickness H of the first light-emitting layer 221 in the direction perpendicular to the substrate. Here, the distance D is the distance between the end of the second extension portion 2212 near the second conductive layer and the end of the second conductive layer 402 near the second extension portion 2212. In this embodiment, because the first light-emitting layer has an extension portion, the first electrode layer on the first light-emitting layer can extend along the extension portion to the first conductive layer and the second conductive layer, thereby minimizing the risk of breakage of the first electrode layer.

[0057] In some embodiments, such as Figure 2 As shown, the orthographic projection of the first extension portion 2211 on the substrate 101 does not overlap with the orthographic projection of the second light-emitting layer 412 on the substrate 101.

[0058] In other embodiments, such as Figure 2 As shown, the orthographic projection of the second extension portion 2212 on the substrate 101 is located inside the orthographic projection of the top structure 40 on the substrate 101.

[0059] like Figure 2 As shown, the first extension 2211 has a first slope angle θ1, which is the angle between the first inclined surface 221b of the first extension 2211 and the lower surface of the first extension (i.e., the lower surface 221a of the extension portion). For example, the first slope angle θ1 is an acute angle. The second extension 2212 has a second slope angle θ2, which is the angle between the second inclined surface 221c of the second extension 2212 and the lower surface of the second extension (i.e., the lower surface 221a of the extension portion). For example, the second slope angle θ2 is an acute angle. The first slope angle θ1 and the second slope angle θ2 are different. For example, the first slope angle θ1 is greater than the second slope angle θ2. This facilitates the smooth entry of the first electrode layer into the gap, thereby electrically connecting it to the second conductive layer and the first conductive layer.

[0060] Additionally, as previously described, the second light-emitting layer 412 has a third slope angle θ3, which is the angle between the side surface and the bottom surface of the second light-emitting layer 412. In some embodiments, the first slope angle θ1 is smaller than the third slope angle θ3. In other embodiments, the second slope angle θ2 is smaller than the third slope angle θ3.

[0061] like Figure 2 As shown, the fourth conductive layer 414 in the top structure can overlap with the sidewall of the third conductive layer 413 below it along the sidewall of the second light-emitting layer 412. The aforementioned third slope angle further facilitates the overlap between the fourth conductive layer 414 and the third conductive layer 413, thereby allowing for a larger overlap area between the first electrode layer and the connecting structure, thus better achieving the electrical connection effect between the first electrode layer and the second electrode layer (auxiliary electrode).

[0062] like Figure 2 As shown, the second conductive layer 402 has a fourth slope angle θ4, which is the angle between the side surface and the bottom surface of the second conductive layer 402. For example, the fourth slope angle θ4 is an acute angle. In some embodiments, the fourth slope angle θ4 is smaller than the third slope angle θ3.

[0063] like Figure 2 As shown, the first electrode layer 222 diffuses along the surface of the first light-emitting layer 221 toward the sidewall of the second conductive layer 402 below the third conductive layer 413, and the deposition thickness is relatively thick, while the portion of the first electrode layer 222 that diffuses onto the first conductive layer 401 is relatively thin. For example, in the deposition... In the case of the first electrode layer 222, the actual thickness of the portion of the first electrode layer 222 that diffuses to the sidewall of the second conductive layer 402 is approximately The thickness of the portion of the first electrode layer 222 that diffuses onto the first conductive layer 401 is approximately This achieves electrical connection between the first electrode layer and the second electrode layer, thereby reducing the voltage drop problem of the first electrode layer.

[0064] Furthermore, the portion of the first electrode layer 222 that diffuses onto the sidewall of the second conductive layer 402 can cover the entire sidewall of the second conductive layer 402, and may even provide some support for the third conductive layer 413 in the top structure. This ensures a sufficiently large overlap area between the first electrode layer and the first / second conductive layer, thereby better achieving the electrical connection between the first electrode layer and the second electrode layer (auxiliary electrode), and also provides some support for the upper third conductive layer, preventing breakage of the portion of the third conductive layer that extends beyond the second conductive layer.

[0065] In some embodiments, the first slope angle θ1 is smaller than the fourth slope angle θ4, and the second slope angle θ2 is smaller than the fourth slope angle θ4. That is, both the first slope angle and the second slope angle are relatively gentle, which allows the first electrode layer on the first light-emitting layer to extend gently to the first conductive layer and the second conductive layer, thereby minimizing the risk of breakage of the first electrode layer.

[0066] In some embodiments, the distance D is greater than the length L1 of the bottom surface of the first extension 2211 in the direction from the side of the pixel definition layer 30 to the gap 430. This allows for sufficient electrical connection between the first electrode layer and the first conductive layer, and consequently, sufficient electrical connection to the second electrode layer.

[0067] In some embodiments, the thickness H of the first light-emitting layer 221 is less than the length L2 of the bottom surface of the second extension 2212 in the direction from the side of the pixel definition layer 30 to the gap 430. This allows the second extension of the first light-emitting layer to extend at a relatively gentle angle, thereby enabling the first electrode layer on the first light-emitting layer to extend smoothly to the first conductive layer and the second conductive layer, thus minimizing the risk of breakage of the first electrode layer.

[0068] In embodiments of this disclosure, the portion of the top structure 410 extending beyond the second conductive layer 402 in different display substrates has the same length (e.g., approximately 0.80 micrometers) and the same thickness (e.g., ...) of the second conductive layer 402. Under these conditions, when using different thicknesses of the first electrode layer 222 (for example, when the thickness of the first electrode layer is...), or (At that time), it can be found that the thickness of the portion of the first electrode layer that diffuses into the portion below the top structure 410 is not much different, and the thickness of the portion of the first electrode layer on the sidewall of the second conductive layer is also not much different.

[0069] In some embodiments, such as Figure 1 As shown, the conductive structure layer 210 includes: on one side of the substrate 101 (e.g., as shown in the figure), Figure 1 As shown, a fifth conductive layer 215 is located on the side of the first insulating layer 110 away from the substrate 101. The fifth conductive layer 215 is on the same layer as the first conductive layer 401, but is separated from it. For example, both the fifth conductive layer 215 and the first conductive layer 401 are on the first insulating layer 110. For example, the material of the fifth conductive layer 215 is the same as the material of the first conductive layer 401. For example, the material of the fifth conductive layer 215 includes a transparent conductive material such as ITO.

[0070] like Figure 1 As shown, the conductive structure layer 210 further includes a third electrode layer 213 on the side of the fifth conductive layer 215 away from the substrate 101. The third electrode layer 213 is in the same layer as the second conductive layer 402, but is isolated from the second conductive layer. For example, the material of the third electrode layer 213 is the same as the material of the second conductive layer 402. For example, the material of the third electrode layer 213 includes metals such as copper, silver, aluminum, or aluminum alloys. This third electrode layer can serve as a reflective anode layer.

[0071] like Figure 1 As shown, the conductive structure layer 210 further includes a sixth conductive layer 216 on the side of the third electrode layer 213 away from the substrate 101. This sixth conductive layer 216 is located in the same layer as the third conductive layer 413, but is isolated from it. For example, the material of the sixth conductive layer 216 is the same as the material of the third conductive layer 413. For example, the material of the sixth conductive layer 216 includes a transparent conductive material such as ITO.

[0072] The following is combined with Figure 1 Describe the structure of the substrate structure 10 in detail.

[0073] In some embodiments, such as Figure 1 As shown, the substrate structure 10 further includes a buffer layer 103 between the substrate 101 and the second electrode layer 121, and an active layer 104 on the side of the buffer layer 103 away from the substrate 101. For example, the material of the buffer layer 103 may include insulating materials such as silicon oxide, silicon nitride, or silicon oxynitride. For example, the material of the active layer 104 may include semiconductor materials (e.g., silicon). The active layer 104 may include a first conductive portion 1041 located at one end of the active layer and a second conductive portion 1042 located at the other end of the active layer. The first conductive portion 1041 and the second conductive portion 1042 facilitate electrical connection with other electrode layers, thereby reducing contact resistance.

[0074] In some embodiments, such as Figure 1 As shown, the substrate structure 10 further includes a light-shielding layer 102 located between the substrate 101 and the buffer layer 103. For example, the material of the light-shielding layer includes metals such as aluminum or molybdenum.

[0075] In some embodiments, such as Figure 1 As shown, the substrate structure 10 further includes a second insulating layer 105 on the side of the active layer 104 away from the substrate 101. This second insulating layer 105 serves as a gate insulating layer. For example, the second insulating layer comprises an insulating material such as silicon dioxide and / or silicon nitride. Figure 1 As shown, the substrate structure 10 further includes a gate 106 on the side of the second insulating layer 105 away from the substrate 101. The substrate structure 10 also includes an interlayer dielectric layer 107 on the side of the buffer layer 103 away from the substrate 101. The interlayer dielectric layer 107 covers the active layer 104, the second insulating layer 105, and the gate 106. For example, the material of the interlayer dielectric layer 107 includes silicon dioxide and / or silicon nitride, etc.

[0076] In some embodiments, such as Figure 1As shown, the substrate structure 10 further includes a fourth electrode layer 108 and a fifth electrode layer 109 on the side of the interlayer dielectric layer 107 away from the substrate 101. The fourth electrode layer 108 is electrically connected to the active layer 104 (e.g., the first conductive portion 1041 of the active layer 104) through a first conductive via 131, and the fifth electrode layer 109 is electrically connected to the active layer 104 (e.g., the second conductive portion 1042 of the active layer 104) through a second conductive via 132. The first conductive via 131 and the second conductive via 132 pass through the interlayer dielectric layer 107, respectively. The fourth electrode layer 108 and the fifth electrode layer 109 are on the same layer as the second electrode layer 121. For example, the fourth electrode layer 108, the fifth electrode layer 109, and the second electrode layer 121 are all located on the interlayer dielectric layer 107. The fifth electrode layer 109 can also be electrically connected to the light-shielding layer 102 through a fifth conductive via 135. The fifth conductive via passes through the interlayer dielectric layer 107 and the buffer layer 103.

[0077] In some embodiments, such as Figure 1 As shown, the first insulating layer 110 includes: a passivation layer 111 covering the second electrode layer 121, the fourth electrode layer 108, and the fifth electrode layer 109, and a planarization layer 112 on the side of the passivation layer 111 away from the substrate 101. For example, the passivation layer may include an inorganic insulating material such as silicon dioxide, and the planarization layer may include an organic insulating material (e.g., polyimide).

[0078] In some embodiments, such as Figure 1 As shown, the first conductive layer 401 is electrically connected to the second electrode layer 121 through the third conductive via 133, which passes through the passivation layer 111 and the planarization layer 112.

[0079] In some embodiments, such as Figure 1 As shown, the conductive structure layer 210 is electrically connected to the fourth electrode layer 108 or the fifth electrode layer 109 through the fourth conductive via 134. For example, Figure 1 The diagram shows that the fifth conductive layer 215 of the conductive structure layer 210 is electrically connected to the fifth electrode layer 109 through a fourth conductive via 134. The fourth conductive via 134 passes through the passivation layer 111 and the planarization layer 112.

[0080] In some embodiments, such as Figure 1As shown, the substrate structure 10 also includes a third insulating layer 141 on the side of the buffer layer 103 away from the substrate 101 and a gate line 142 on the side of the third insulating layer 141 away from the substrate 101. For example, the third insulating layer 141 is in the same layer as the second insulating layer 105, and the material of the third insulating layer 141 is the same as the material of the second insulating layer 105. This facilitates the manufacturing of the display substrate. For example, the gate line 142 is in the same layer as the gate 106, and the material of the gate line 142 is the same as the material of the gate 106. This also facilitates the manufacturing of the display substrate.

[0081] This concludes the detailed description of the substrate structure 10 of the display substrate.

[0082] According to some embodiments of this disclosure, a display device is also provided, which includes the display substrate as described above. For example, the display device can be any product or component with display function, such as a display panel, mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator.

[0083] Figure 3 This is a flowchart illustrating a method for manufacturing a display substrate according to some embodiments of the present disclosure. Figures 4 to 9 This is a cross-sectional schematic diagram illustrating the structure of several stages in the manufacturing process of a display substrate according to some embodiments of the present disclosure. The following is in conjunction with... Figure 3 , Figures 4 to 9 as well as Figure 1 The manufacturing process of a display substrate according to some embodiments of this disclosure is described in detail. For example... Figure 3 As shown, the manufacturing method of the display substrate includes steps S3002 to S3004.

[0084] like Figure 3 As shown, in step S3002, a substrate structure is provided, which includes a substrate.

[0085] The following is combined with Figures 4 to 6 Describe in detail the process of providing the base structure.

[0086] First, such as Figure 4 As shown, optionally, a patterned light-shielding layer 102 is formed on the substrate 101.

[0087] Next, as Figure 4 As shown, for example, a buffer layer 103 is formed on a substrate using a deposition process, which covers the light-shielding layer 102.

[0088] Next, as Figure 4 As shown, a patterned active layer 104 is formed on the side of the buffer layer 103 away from the substrate 101.

[0089] Next, as Figure 4 As shown, a patterned second insulating layer 105 is formed on the side of the active layer 104 away from the substrate, a third insulating layer 141 is formed on the side of the buffer layer 103 away from the substrate, a patterned gate 106 is formed on the side of the second insulating layer 105 away from the substrate, and a patterned gate line 142 is formed on the side of the third insulating layer 141 away from the substrate.

[0090] For example, forming the second insulating layer 105, the third insulating layer 141, the gate 106, and the gate line 142 may include: forming an insulating layer covering the active layer 104 and the buffer layer 103 by a deposition process, then forming a first metal layer on the insulating layer by a deposition process, and then patterning the insulating layer and the first metal layer to form the second insulating layer 105, the third insulating layer 141, the gate 106, and the gate line 142.

[0091] Next, after patterning the gate, a self-aligned conductor formation process can be used on the mask layer (e.g., photoresist, not shown) on the gate 106 to conductor the two ends of the active layer, forming a first conductive portion 1041 and a second conductive portion 1042. This forms the channel region and conductive region of the active layer. For example, conductor formation can be achieved by bombarding the active layer with plasma (e.g., He (helium) plasma). Here, the conductive region is the first and second conductive portions, and the channel region is the area of ​​the active layer between the first and second conductive portions. Then, the mask layer is removed.

[0092] Next, as Figure 4 As shown, an interlayer dielectric layer 107 is formed on the side of the buffer layer 103 away from the substrate 101 by a deposition process. This interlayer dielectric layer 107 covers the active layer 104, the second insulating layer 105, the gate 106, the third insulating layer 141, and the gate line 142. Then, the interlayer dielectric layer 107 and the buffer layer 103 are etched to form a first conductive via 131, a second conductive via 132, and a fifth conductive via 135. The first conductive via 131 exposes the first conductive portion 1041 of the active layer 104, the second conductive via 132 exposes the second conductive portion 1042 of the active layer 104, and the fifth conductive via 135 exposes a portion of the light-shielding layer 102.

[0093] Next, as Figure 4As shown, a fourth electrode layer 108, a fifth electrode layer 109, and a second electrode layer 121 are formed on the interlayer dielectric layer 107 using deposition and patterning processes. The fourth electrode layer 108 is electrically connected to the first conductive portion 1041 of the active layer 104 through a first conductive via 131, and the fifth electrode layer 109 is electrically connected to the second conductive portion 1042 of the active layer 104 through a second conductive via 132. The fifth electrode layer 109 is also electrically connected to a portion of the light-shielding layer 102 through a fifth conductive via 135. Alternatively, power supply voltage lines and sensing lines (not shown in the figure) can also be formed concurrently with the formation of the fourth electrode layer 108, the fifth electrode layer 109, and the second electrode layer 121.

[0094] Next, as Figure 4 As shown, a passivation layer 111 covering the second electrode layer 121, the fourth electrode layer 108, and the fifth electrode layer 109 is formed on the interlayer dielectric layer 107 using a deposition process.

[0095] Next, as Figure 5 As shown, a planarization layer 112 is formed on the side of the passivation layer 111 away from the substrate 101. Thus, a first insulating layer 110 is formed, which includes the passivation layer 111 and the planarization layer 112.

[0096] Next, as Figure 6 As shown, vias 133 and 134 are formed through the planarization layer 112 and the passivation layer 111 using an etching process. Via 133 serves as a third conductive via, and via 134 serves as a fourth conductive via. Via 133 exposes a portion of the second electrode layer 121, and via 134 exposes a portion of the fifth electrode layer 109.

[0097] This completes the formation of the base structure 10.

[0098] Back Figure 3 In step S3004, a light-emitting structure, a pixel definition layer, and a connection structure are formed on one side of the substrate.

[0099] The following is combined with Figures 7 to 9 and Figure 1 Describe in detail the process of forming the light-emitting structure, pixel definition layer, and connection structure.

[0100] like Figure 7 As shown, a fifth conductive layer 215 and a first conductive layer 401 are formed on a planarization layer 112 through a deposition and patterning process. For example, a first transparent conductive layer can be formed by a deposition process, and then the first transparent conductive layer can be patterned to form the fifth conductive layer 215 and the first conductive layer 401.

[0101] Next, as Figure 8As shown, a second metal layer covering the fifth conductive layer 215 and the first conductive layer 401 is formed by a deposition process, and a second transparent conductive layer is formed on the second metal layer by a deposition process. Then, the second metal layer and the second transparent conductive layer are patterned to form a third electrode layer 213, a second conductive layer 402, a sixth conductive layer 216, and a third conductive layer 413. Here, the third electrode layer 213 and the second conductive layer 402 are formed during the patterning of the second metal layer, and the sixth conductive layer 216 and the third conductive layer 413 are formed during the patterning of the second transparent conductive layer.

[0102] Next, as Figure 8 As shown, for example, a dilute acid based on H2SO4 is used to etch the sixth conductive layer 216 and the third conductive layer 413, which are located at the top layer. For example, the composition of the dilute acid based on H2SO4 includes: H2SO4 (5%–14%), HNO3 (2%–9%), CH3COOH (2%–9%), and other trace additives. Then, for example, a concentrated acid based on H3PO4 is used to etch the third electrode layer 213 and the second conductive layer 402 with a large overcut, resulting in a large indentation of the third electrode layer 213 and the second conductive layer 402, thereby causing the sixth conductive layer 216 and the third conductive layer 413 to extend outwards with a long tip. For example, the composition of the concentrated acid based on H3PO4 includes: H3PO4 (63%–72%), HNO3 (2.5%), CH3COOH (4%–13%), and other trace additives.

[0103] In the above steps, a conductive structure layer 210 is formed.

[0104] Next, as Figure 9 As shown, a pixel definition layer 30 is formed by deposition and patterning processes, and the pixel definition layer 30 has an opening 302.

[0105] Next, as Figure 1 As shown, the first light-emitting layer 221 is formed by a vapor deposition process, during which a second light-emitting layer 412 is also formed. Since the diffusion performance of the light-emitting layer formed by the vapor deposition process is relatively poor, the tip of the third conductive layer 413 can cut off the light-emitting layer and prevent the material of the light-emitting layer from depositing below the tip as much as possible.

[0106] Next, as Figure 1As shown, the first electrode layer 222 is formed by a sputtering process, during which a fourth conductive layer 414 is also formed. Because the conductive layer formed by sputtering has good diffusion properties, it can bypass the aforementioned tip and deposit onto the surfaces of the first conductive layer 401 and the second conductive layer 402 below the tip, thereby achieving sufficient electrical connection between the first electrode layer 222 and the second electrode layer 121. Here, a top structure 410 is also formed, which includes a third conductive layer 413, a second light-emitting layer 412, and a fourth conductive layer 414.

[0107] Thus, a light-emitting structure, a pixel definition layer, and a connection structure are formed. At least a portion of the light-emitting structure is located in the opening of the pixel definition layer, and the connection structure is located on the side of the pixel definition layer away from the opening. The light-emitting structure includes: a conductive structure layer on the substrate side; a first light-emitting layer on the conductive structure layer away from the substrate side; and a first electrode layer on the first light-emitting layer away from the substrate side. A portion of the first electrode layer and a portion of the first light-emitting layer are located on the side of the pixel definition layer between the opening and the connection structure, close to the connection structure, and the first electrode layer is electrically connected to the connection structure. The connection structure includes: a first conductive layer on the substrate side; a second conductive layer on the first conductive layer away from the substrate side; and a top structure on the second conductive layer away from the substrate side. The orthographic projection of the second conductive layer on the substrate is located inside the orthographic projection of the top structure on the substrate, and the top structure includes the second light-emitting layer. The orthographic projections of the first light-emitting layer and the second light-emitting layer on the substrate partially overlap.

[0108] Thus, a method for manufacturing a display substrate according to some embodiments of the present disclosure is provided. In this manufacturing method, the connecting structure can conveniently cut off the light-emitting material at the gap, thereby enabling the first electrode layer to be fully electrically connected to the connecting structure (e.g., the first conductive layer). This can effectively reduce the voltage drop problem of the first electrode layer and improve the display uniformity of the display device.

[0109] Furthermore, the first electrode layer is electrically connected to the connecting structure, thereby fully overlapping with the second electrode layer. This can more effectively reduce the voltage drop problem of the first electrode layer and improve the display uniformity of the display device.

[0110] In the above manufacturing method, the second electrode layer can be disposed in the same layer as the fourth / fifth electrode layer, which reduces the process flow. Moreover, the second electrode layer is formed below the light-emitting layer, so it will not affect the performance of the light-emitting device. Furthermore, both the first and second electrode layers will be covered with an inorganic protective layer (e.g., SiNx or SiON), so the product performance can be guaranteed.

[0111] In the above-described scheme disclosed herein, the film structure of the reflective anode is adjusted, and the etching process is modified to form a protruding tip in the connection structure. This protruding tip can cut off the evaporated light-emitting material, and then the material of the first electrode layer can be deposited in to overlap with the second electrode layer, thereby mitigating the IR drop problem and improving product performance and display quality.

[0112] The embodiments of this disclosure have now been described in detail. To avoid obscuring the concept of this disclosure, some details known in the art have not been described. Those skilled in the art can fully understand how to implement the technical solutions disclosed herein based on the above description.

[0113] While specific embodiments of this disclosure have been described in detail by way of examples, those skilled in the art should understand that the examples are for illustrative purposes only and not intended to limit the scope of this disclosure. Those skilled in the art should understand that modifications can be made to the above embodiments or equivalent substitutions can be made to some technical features without departing from the scope and spirit of this disclosure. The scope of this disclosure is defined by the appended claims.

Claims

1. A display substrate, comprising: A substrate structure, the substrate structure including a substrate; as well as The light-emitting structure, pixel definition layer, and connection structure are located on one side of the substrate. At least a portion of the light-emitting structure is located in an opening of the pixel definition layer, and the connection structure is located on the side of the pixel definition layer away from the opening. The light-emitting structure includes: A conductive structure layer on one side of the substrate; The first light-emitting layer on the side of the conductive structure layer away from the substrate; and A first electrode layer on the side of the first light-emitting layer away from the substrate; wherein a portion of the first electrode layer and a portion of the first light-emitting layer are located on the side of the pixel definition layer near the connection structure between the opening and the connection structure, and the first electrode layer is electrically connected to the connection structure; The connection structure includes: A first conductive layer on one side of the substrate. A second conductive layer on the side of the first conductive layer away from the substrate; and A top structure on the side of the second conductive layer away from the substrate, wherein the orthogonal projection of the second conductive layer on the substrate is located inside the orthogonal projection of the top structure on the substrate, and the top structure includes a second light-emitting layer; Wherein, the orthographic projection of the first light-emitting layer on the substrate partially overlaps with the orthographic projection of the second light-emitting layer on the substrate; The substrate structure further includes: a second electrode layer on one side of the substrate, the second electrode layer being electrically connected to the first conductive layer; and a first insulating layer covering the second electrode layer, wherein the light-emitting structure, the pixel definition layer, and the connection structure are located on the side of the first insulating layer away from the substrate.

2. The display substrate according to claim 1, wherein, The top structure is separated from the pixel definition layer by a gap, and the second conductive layer is separated from the pixel definition layer by the gap; The first light-emitting layer includes an extension portion extending from the side of the pixel-defining layer into the gap. The extension portion includes a first extension and a second extension connected to the first extension, the second extension being located on the side of the first extension away from the pixel-defining layer. The distance between the second extension portion and the second conductive layer is less than the thickness of the first light-emitting layer in the direction perpendicular to the substrate.

3. The display substrate according to claim 2, wherein, The first extension has a first slope angle, which is the angle between the first inclined surface of the first extension and the lower surface of the first extension; The second extension has a second slope angle, which is the angle between the second inclined surface of the second extension and the lower surface of the second extension; The first slope angle is different from the second slope angle.

4. The display substrate according to claim 3, wherein, The first slope angle is greater than the second slope angle.

5. The display substrate according to claim 3, wherein, The top structure also includes: A third conductive layer between the second conductive layer and the second light-emitting layer; and A fourth conductive layer on the side of the second light-emitting layer away from the substrate; The second light-emitting layer has a third slope angle, which is the angle between the side surface of the second light-emitting layer and the bottom surface of the second light-emitting layer.

6. The display substrate according to claim 5, wherein, The first slope angle is smaller than the third slope angle.

7. The display substrate according to claim 5, wherein, The second slope angle is smaller than the third slope angle.

8. The display substrate according to claim 5, wherein, The second conductive layer has a fourth slope angle, which is the angle between the side surface of the second conductive layer and the bottom surface of the second conductive layer.

9. The display substrate according to claim 8, wherein, The fourth slope angle is smaller than the third slope angle.

10. The display substrate according to claim 8, wherein, The first slope angle is smaller than the fourth slope angle, and the second slope angle is smaller than the fourth slope angle.

11. The display substrate according to claim 2, wherein, The distance is greater than the length of the bottom surface of the first extension in the direction from the side of the pixel definition layer to the gap.

12. The display substrate according to claim 2, wherein, The thickness of the first light-emitting layer is less than the length of the bottom surface of the second extension in the direction from the side surface of the pixel definition layer to the gap.

13. The display substrate according to claim 2, wherein, The orthographic projection of the first extension portion on the substrate does not overlap with the orthographic projection of the second light-emitting layer on the substrate.

14. The display substrate according to claim 2, wherein, The orthographic projection of the second extension on the substrate is located inside the orthographic projection of the top structure on the substrate.

15. The display substrate according to claim 5, wherein, The conductive structure layer includes: A fifth conductive layer is located on one side of the substrate. The fifth conductive layer is on the same layer as the first conductive layer, but is isolated from the first conductive layer. The material of the fifth conductive layer is the same as that of the first conductive layer. A third electrode layer is located on the side of the fifth conductive layer away from the substrate. The third electrode layer is on the same layer as the second conductive layer, but is isolated from the second conductive layer. The material of the third electrode layer is the same as that of the second conductive layer. A sixth conductive layer is located on the side of the third electrode layer away from the substrate. The sixth conductive layer is on the same layer as the third conductive layer, but is isolated from the third conductive layer. The material of the sixth conductive layer is the same as that of the third conductive layer.

16. The display substrate according to claim 5, wherein, The second light-emitting layer is located in the same layer as the first light-emitting layer, and the material of the second light-emitting layer is the same as that of the first light-emitting layer.

17. The display substrate according to claim 1, wherein, The substrate structure also includes: A buffer layer between the substrate and the second electrode layer; The active layer on the side of the buffer layer away from the substrate; A second insulating layer on the side of the active layer away from the substrate. The gate on the side of the second insulating layer away from the substrate; An interlayer dielectric layer on the side of the buffer layer away from the substrate, the interlayer dielectric layer covering the active layer, the second insulating layer, and the gate; and The fourth electrode layer and the fifth electrode layer are located on the side of the interlayer dielectric layer away from the substrate. The fourth electrode layer is electrically connected to the active layer through a first conductive via, and the fifth electrode layer is electrically connected to the active layer through a second conductive via. The first conductive via and the second conductive via pass through the interlayer dielectric layer, and the fourth electrode layer and the fifth electrode layer are located in the same layer as the second electrode layer.

18. The display substrate according to claim 17, wherein, The first insulating layer includes: a passivation layer covering the second electrode layer, the fourth electrode layer and the fifth electrode layer, and a planarization layer on the side of the passivation layer away from the substrate; The first conductive layer is electrically connected to the second electrode layer through a third conductive via, the third conductive via passing through the passivation layer and the planarization layer; The conductive structure layer is electrically connected to the fourth electrode layer or the fifth electrode layer through a fourth conductive via, and the fourth conductive via passes through the passivation layer and the planarization layer.

19. A display device, comprising: The display substrate as described in any one of claims 1 to 18.

20. A method for manufacturing a display substrate, comprising: A substrate structure is provided, the substrate structure comprising a substrate; as well as A light-emitting structure, a pixel definition layer, and a connection structure are formed on one side of the substrate. At least a portion of the light-emitting structure is located in an opening of the pixel definition layer, and the connection structure is located on the side of the pixel definition layer away from the opening. The light-emitting structure includes: a conductive structure layer on one side of the substrate; a first light-emitting layer on the side of the conductive structure layer away from the substrate; and a first electrode layer on the side of the first light-emitting layer away from the substrate; wherein a portion of the first electrode layer and a portion of the first light-emitting layer are located on the side of the pixel definition layer close to the connection structure between the opening and the connection structure, and the first electrode layer is electrically connected to the connection structure. The connection structure includes: a first conductive layer on one side of the substrate; a second conductive layer on the side of the first conductive layer away from the substrate; and a top structure on the side of the second conductive layer away from the substrate, wherein the orthographic projection of the second conductive layer on the substrate is located inside the orthographic projection of the top structure on the substrate, and the top structure includes a second light-emitting layer; wherein the orthographic projection of the first light-emitting layer on the substrate and the orthographic projection of the second light-emitting layer on the substrate partially overlap. The substrate structure further includes: a second electrode layer on one side of the substrate, the second electrode layer being electrically connected to the first conductive layer; and a first insulating layer covering the second electrode layer, wherein the light-emitting structure, the pixel definition layer, and the connection structure are located on the side of the first insulating layer away from the substrate.

21. The manufacturing method according to claim 20, wherein, The first light-emitting layer is formed by vapor deposition, and the first electrode layer is formed by sputtering.

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