Source drive device with adaptive gamma drive structure

Abstract

This invention discloses a source driving device, comprising a first digital-to-analog converter (D / A converter) and a second D / A converter for driving sub-pixels of different colors. Each D / A converter outputs at least one output voltage based on an N-bit data code, and includes multiple sub-D / A converters, an interpolation circuit, and a switching circuit. Each sub-D / A converter receives m bits from the N-bit data code to generate a set of intermediate voltages. The interpolation circuit performs interpolation based on k bits from the N-bit data code and an interpolation control signal for a selected set of intermediate voltages to generate an output voltage. The switching circuit electrically connects the interpolation circuit to a selected sub-D / A converter used to output the selected set of intermediate voltages. The interpolation circuits in the first and second D / A converters perform interpolation based on different numbers of interpolation bits.

Description

Technical Field

[0001] This invention relates to a source driving device, and more particularly to a source driving device that can be used in a self-emissive display screen. Background Technology

[0002] In recent years, many displays on the market have adopted light-emitting diode (LED) technology, such as organic light-emitting diode (OLED) panels, mini-LED panels, and micro-LED panels. On these panels, different colors are displayed by emitting light through LEDs of different colors. Therefore, in the process of converting input grayscale data into data voltage (selected from gamma voltage), the red, green, and blue colors need to correspond to different conversion characteristic curves to generate suitable data voltages. Different colors are often suited to different data voltage ranges, and in existing technology, it is difficult to use a single gamma voltage generation circuit to generate data voltages for different colors. Summary of the Invention

[0003] Therefore, the main objective of this invention is to propose a novel source drive device that includes a special digital-to-analog converter (DAC) structure that can generate different data voltage ranges for different colors, thereby solving the above-mentioned problems.

[0004] An embodiment of the present invention discloses a source driving device, comprising a first digital-to-analog converter (DDC) and a second DDC. The first DDC is located in a first driving channel for driving a first color sub-pixel, and the second DDC is located in a second driving channel for driving a second color sub-pixel. Each of the first and second DDCs is configured to output at least one output voltage based on an N-bit data code. Each of the first and second DDCs includes a plurality of sub-DACs, an interpolation circuit, and a switching circuit. Each of the plurality of sub-DACs receives m bits of the N-bit data code and generates a set of intermediate voltages based on the m bits. The interpolation circuit performs interpolation on a selected set of intermediate voltages based on k bits of the N-bit data code and at least one interpolation control signal to generate the at least one output voltage. The switching circuit is coupled to the plurality of sub-digital-to-analog converters and the interpolation circuit, and is used to electrically connect the interpolation circuit to a selected sub-digital-to-analog converter among the plurality of sub-digital-to-analog converters for outputting the selected set of intermediate voltages, according to a first selection signal and a second selection signal. The interpolation circuits in the first and second sub-digital-to-analog converters respectively perform interpolation on their respective selected set of intermediate voltages according to different numbers of interpolation bits. Attached Figure Description

[0005] Figure 1 This is a schematic diagram of a source drive device.

[0006] Figure 2 This is a schematic diagram of a display system.

[0007] Figure 3 The curves showing the input grayscale versus output voltage for organic light-emitting diodes of various colors are displayed.

[0008] Figure 4 This is a schematic diagram of another display system.

[0009] Figure 5 Show Figure 4 The input grayscale versus output voltage characteristic curves of organic light-emitting diodes of various colors on a low-temperature polycrystalline silicon panel.

[0010] Figure 6 This is a schematic diagram of another source drive device.

[0011] Figure 7 This is a schematic diagram of the source drive device according to Embodiment 1 of the present invention.

[0012] Figure 8The input grayscale versus output voltage characteristic curves of a blue organic light-emitting diode and a green organic light-emitting diode are shown.

[0013] Figure 9 This is a schematic diagram of the driving channel according to Embodiment 1 of the present invention.

[0014] Figure 10 This is a schematic diagram of an exemplary drive channel for a source drive device used in a display screen.

[0015] Figure 11 This is a schematic diagram of the source drive device according to Embodiment 1 of the present invention.

[0016] Figure 12 The operation of a driving channel for the blue sub-pixel is shown.

[0017] Figure 13 The operation mode of a driving channel for the red sub-pixel is shown.

[0018] Figure 14 The operation mode of a driving channel for the green sub-pixel is shown.

[0019] Figure 15 This is a schematic diagram of an exemplary embodiment of the interpolation circuit of the present invention.

[0020] The reference numerals in the attached figures are explained as follows:

[0021] 10, 202, 402, 60, 70, 110 Source drive devices

[0022] 102, 602_1~602_3, 702 Gamma Voltage Generation Circuit

[0023] VG_OUT Gamma Voltage

[0024] VG[1]~VG[N]、VG_R[1]~ Gamma cutoff voltage

[0025] VG_R[N], VG_G[1]~VG_G[N],

[0026] VG_B[1]~VG_B[N]

[0027] 20, 40 display systems

[0028] 200 and 400 display screens

[0029] VG, VB, VR data voltage

[0030] VDDA, AVD1~AVD4, VL, VH voltages

[0031] 90, 100, 120, 130, 140 drive channels

[0032] 900, 1000, 1200, 1300, 1400 latching circuits

[0033] 910, 1010, 1210, 1310, 1410 Digital-to-Analog Converters

[0034] 912_1~912_x, 1012_1~1012_4, and sub-digital-to-analog converters 1212_1~1212_4, 1312_1~1312_4, 1412_1~1412_4

[0035] 914, 1014, 1214, 1314, 1414 Switching Circuits

[0036] 916, 1016, 1216, 1316, 1416 interpolation circuits

[0037] 920, BUF output buffer

[0038] 930, 1230, 1330, 1430 control circuits

[0039] SEL Select Signal

[0040] CTRL interpolation control signal

[0041] Vout, Y output voltage

[0042] 1020, 1220, 1320, 1420 operational amplifiers

[0043] Input data for a0~a9

[0044] b0~b9 data codes

[0045] 1102 Brightness Controller

[0046] MODE, M1, M2 mode control signals

[0047] O1~O4 Output terminals

[0048] S8, S8b, S9, S9b control signals

[0049] transconductance values ​​of gm1~gm4

[0050] V1~V3 interpolation voltage Detailed Implementation

[0051] For Liquid Crystal Displays (LCDs), the integrated circuit (IC) driving the display generates multiple gamma voltages through a single gamma voltage generation circuit. These gamma voltages can be selected by various data drive channels to output and drive the LCD. Since the light source of an LCD comes from a backlight, and red, green, and blue colors are formed through color filters, the display of different colors all originates from the same light source and can be driven using the same gamma voltage generation circuit.

[0052] However, for self-emissive displays (such as light-emitting diode (LED) panels or organic light-emitting diode (OLED) panels), different colors are displayed by emitting light through LEDs of different colors, and these light-emitting components have different input grayscale characteristic curves to data voltages (the data voltages are all selected from gamma voltages). This invention proposes a novel digital-to-analog converter (DAC) design that can be used to drive channels to output data voltages to self-emissive displays, allowing a single gamma voltage generation circuit to be applied to the different conversion characteristics of LEDs of different colors.

[0053] Figure 1 This is a schematic diagram of a source drive device 10. The source drive device 10 includes multiple drive channels, each of which has a latch circuit, a digital-to-analog converter, an interpolation circuit, and an operational amplifier (OP). Figure 1 A gamma voltage generation circuit 102 is shown, which may be included in or coupled to the source drive device 10. The gamma voltage generation circuit 102 can be used to provide a gamma voltage VG_OUT to each drive channel. In this example, the gamma voltage generation circuit 102 generates multiple gamma tap voltages VG[1] to VG[N], which can be divided by a series of resistors to generate 2 10 =1024 gamma voltages VG_OUT, provided to the digital-to-analog converter of each drive channel in the source drive device 10.

[0054] Each drive channel can receive 10 bits of input display data (such as grayscale values) and store the display data in a latch circuit. The digital-to-analog converter (DAC) selects two or more gamma voltages from the 1024 gamma voltages VG_OUT of the gamma voltage generation circuit 102 based on the higher 8 bits of the 10-bit display data and outputs them to the interpolation circuit. The interpolation circuit interpolates the selected gamma voltages received from the DAC based on the lower 2 bits of the 10-bit display data to obtain an output voltage. This output voltage is then output to the display screen via an operational amplifier, which provides driving capability to drive the target sub-pixels on the display screen.

[0055] The source drive device 10 is generally used in liquid crystal displays (LCDs), where each drive channel can be used to drive a sub-pixel with a specific color (red, green, blue). In an LCD, the data voltage ranges of sub-pixels of different colors are the same, and at the same grayscale, the gamma voltage selected by the digital-to-analog converter based on the display data of different colors is also the same. Therefore, there is no problem in driving LCD panel sub-pixels of different colors based on the same grayscale versus output voltage characteristic curve.

[0056] Figure 1 The left side shows the actual and ideal values ​​of the grayscale versus output voltage curve. The dashed line describes the actual linear relationship formed by the 1024 gamma voltages generated by the gamma voltage generation circuit 102, while the solid line describes the display manufacturer's desired specification. The display manufacturer expects that a portion (e.g., 256) of the 1024 gamma voltages VG_OUT generated by the gamma voltage generation circuit 102 should be able to form a grayscale versus output voltage characteristic curve as depicted by the solid line. This desired characteristic curve corresponds to achieving the desired gamma value for the display, such as gamma 2.2 or gamma 1.8.

[0057] However, for organic light-emitting diode (OLED) panels (or small-to-medium-sized OLED panels, such as mini-LED or micro-LED panels), each color of OLED has its own conversion characteristics and different luminous efficiencies, thus requiring different data voltage ranges. In this case, it is difficult to use a single grayscale data point versus output voltage characteristic curve to accommodate the brightness variations of these different colored OLEDs. Generally speaking, blue OLEDs have the lowest luminous efficiency and therefore require the largest data voltage range; red OLEDs are next; and green OLEDs have the highest luminous efficiency and therefore require the smallest data voltage range.

[0058] It is worth noting that the embodiments of the present invention will be illustrated below using organic light-emitting diode (OLED) components and sub-pixels as examples, but those skilled in the art should understand that the relevant implementation methods can also be applied to light-emitting diode (LED) components and sub-pixels.

[0059] Figure 2 This is a schematic diagram of a display system 20, in which the same gamma voltage generation circuit is used to convert and generate data voltages for different color sub-pixels. The display system 20 includes a display screen 200 and a source driver 202. The data voltages VG, VB, and VR for different color sub-pixels are output through output buffers in their respective driver channels. The output buffers can be configured as follows: Figure 1 The operational amplifier shown is used to implement this. The data voltages VG, VB, and VR can be output to the target sub-pixel on the display screen 200 under the control of the gate drive signal.

[0060] Figure 2 An oxide-based panel structure is shown, which uses a thin-film transistor (TFT) substrate made with oxide technology. The transistors used to drive organic light-emitting diodes in the sub-pixels are N-type metal-oxide-semiconductor transistors (NMOS transistors). Therefore, the higher the data voltage VG, VB, or VR received by the sub-pixel, the greater the brightness produced.

[0061] Figure 3 The diagram shows the input grayscale versus output voltage characteristic curves for organic light-emitting diodes (OLEDs) of various colors. For example... Figure 3 As shown, based on the differences in luminous efficiency among organic light-emitting diodes (OLEDs) of different colors, it is assumed that the data voltage range of the red OLED is shorter than that of the blue OLED, and the data voltage range of the green OLED is shorter than that of the red OLED. Since the green OLED has the highest luminous efficiency, the data voltage and driving current required to achieve the desired display brightness are minimized; conversely, since the blue OLED has the lowest luminous efficiency, the data voltage and driving current required to achieve the desired display brightness are maximized. Figure 3 As shown, for oxide-based thin-film transistor substrates where higher brightness corresponds to higher data voltage, green organic light-emitting diodes have the lowest data voltage range, while blue organic light-emitting diodes have the highest data voltage range.

[0062] To achieve the desired grayscale characteristic curves of different colors versus output voltage, as monitor manufacturers expect, such as... Figure 3On the right, the display driver circuit is expected to be able to select a predetermined number of colors (256 as an example below) within each color's data voltage range, and is expected to have a range from 2 within the data voltage range. 10 256 gamma voltages were selected from different groups of gamma voltages to achieve different gamma values / curves.

[0063] However, the actual situation under a single gamma implementation is as follows: Figure 3 On the left, a single characteristic curve is used for all three colors. Taking blue OLEDs as an example, because the data voltage range of blue OLEDs covers all 1024 (=2)... 10 There are 1024 gamma voltages. Therefore, if 256 gamma voltages are selected from the candidate pool of 1024 gamma voltages as a gamma voltage combination, then different gamma voltage combinations can be selected from the candidate pool to form different characteristic curves of input grayscale versus output voltage, thus achieving different gamma values. The data voltage range of red organic light-emitting diodes is smaller than that of blue organic light-emitting diodes, for example, only covering 512 (=2) gamma voltages. 9 With only 256 gamma voltages selected from a pool of 512 candidate gamma voltages, the number of different gamma voltage combinations is relatively small, resulting in fewer achievable input grayscale versus output voltage characteristic curves compared to blue OLEDs. Green OLEDs have the smallest data voltage range, for example, covering only 256 (=2) gamma voltages. 8 Since there are only 256 gamma voltages in the pool, selecting 256 gamma voltages from the pool to form the green input grayscale versus output voltage characteristic curve is practically impossible. This is because only one set of 256 gamma voltages can be selected to form a single gamma voltage combination. Consequently, on an OLED display, the brightness variation that red and green can display is limited, leading to a decrease in image quality.

[0064] Figure 4 This is a schematic diagram of another display system 40. The display system 40 includes a display screen 400 and a source driver 402. Similarly, the data voltages VG, VB, and VR for different color sub-pixels are output through output buffers in each driving channel, wherein the output buffers can be configured as follows: Figure 1 The operational amplifier shown is used to implement this. The data voltages VG, VB, and VR can be output to the target sub-pixel on the display screen 400 under the control of the gate drive signal.

[0065] Figure 4This paper presents a low-temperature polycrystalline silicon (LTPS) panel structure, in which the thin-film transistor substrate adopts low-temperature polycrystalline silicon technology, and the transistor used to drive the organic light-emitting diode in the sub-pixel is a P-type metal-oxide-semiconductor transistor (PMOS transistor). Therefore, the lower the data voltage VG, VB or VR received by the sub-pixel, the greater the brightness generated.

[0066] Figure 5 Show Figure 4 The input grayscale versus output voltage characteristic curves of various colors of organic light-emitting diodes (OLEDs) on a low-temperature polycrystalline silicon (LTPS) panel 400 are shown. The green OLED has the smallest data voltage range but the highest voltage level; therefore, Figure 5 The left image is similar to Figure 3 The left figure shows that the data voltage range of the red and green organic light-emitting diodes (OLEDs) is smaller than that of the blue OLED. For red and green OLEDs, the gamma voltage required to form the input grayscale versus output voltage characteristic curve specified in the specifications can only be selected from a smaller pool of gamma voltage candidates, thus resulting in a relatively smaller number of achievable characteristic curves.

[0067] Figure 6 This is a schematic diagram of another source drive device 60. The structure of the source drive device 60 is similar to... Figure 1 The source drive device 10 differs from the source drive device 60 in that it includes or is coupled to multiple gamma voltage generation circuits 602_1 to 602_3. The gamma voltage generation circuits 602_1 to 602_3 can respectively realize the characteristic curve distribution of the input grayscale of different colors on the output voltage. In this example, the gamma voltage generation circuit 602_1 can generate gamma cutoff voltages VG_R[1] to VG_R[N], which are used to generate 2 10 =1024 gamma voltages to provide to the digital-to-analog converter in the driving channel for the red sub-pixel; the gamma voltage generation circuit 602_2 can generate gamma cutoff voltages VG_G[1]~VG_G[N], which are used to generate 2 10 =1024 gamma voltages to provide to the digital-to-analog converter in the drive channel for the green sub-pixel; the gamma voltage generation circuit 602_3 can generate gamma cutoff voltages VG_B[1]~VG_B[N], which are used to generate 2 10 =1024 gamma voltages to be provided to the digital-to-analog converter in the drive channel used for the blue sub-pixel.

[0068] Therefore, based on the color conversion characteristics of organic light-emitting diodes (OLEDs) of different colors, each gamma voltage generation circuit 602_1 to 602_3 can be used for each of the three colors (red, green, and blue) under different voltage ranges for different colors to generate 1024 gamma voltages (selectable as data voltages) corresponding to the 10-bit data of each color. In this way, the limited number of selectable gamma voltages within the data voltage range of the green OLED under a single gamma voltage generation circuit prevents the green OLED from having an inflexible input grayscale versus output voltage characteristic curve. Instead, ideal input grayscale versus output voltage characteristic curves can be achieved for all three colors (red, green, and blue).

[0069] However, in the source drive device 60 with multiple gamma voltage generation circuits, each gamma voltage generation circuit 602_1 to 602_3 needs to be connected to the corresponding drive channel via 1024 traces to output 1024 different voltage values. These traces need to be arranged using stacked metal layers to avoid contact with output channels of different colors, significantly increasing the number of metal layers. Therefore, using three gamma voltage generation circuits 602_1 to 602_3 will result in a significant increase in system cost and layout complexity.

[0070] Therefore, this invention proposes a novel source drive device and its related digital-to-analog converter design, which can achieve flexible setting of the characteristic curve of the input grayscale versus output voltage for different colors with only a single circuit instead of three gamma voltage generation circuits.

[0071] Figure 7 This is a schematic diagram of a source drive device 70 according to an embodiment of the present invention. Similarly, each drive channel in the source drive device 70 includes a latch circuit, a digital-to-analog converter, an interpolation circuit, and an output buffer BUF. A gamma voltage generation circuit 702 may be included in or coupled to the source drive device 70, and can be used to provide a gamma voltage VG_OUT to the source drive device 70. More specifically, the gamma voltage generation circuit 702 generates multiple gamma cutoff voltages VG[1] to VG[N], which can be divided by a series of resistors to generate the gamma voltage VG_OUT. Based on the received gamma voltage VG_OUT and the display data code, each drive channel can output a data voltage.

[0072] In this example, an 8-bit digital-to-analog converter with 2 (+2) bit interpolation can be used to generate the corresponding data voltage based on the 10-bit data code, such as... Figure 7As shown. For example, for a blue OLED, an 8-bit digital-to-analog converter (DAC) with 2-bit interpolation can be used to generate the data voltage; for a red OLED, its data voltage range is approximately half that of a blue OLED, so 7 bits can be used to control the DAC to output half the voltage range, and (2+1) bits of interpolation can be added to achieve 10-bit resolution; for a green OLED, its data voltage range is approximately one-quarter that of a blue OLED, so 6 bits can be used to control the DAC to output one-quarter the voltage range, and (2+2) bits of interpolation can be added to achieve 10-bit resolution. In this way, even when the data voltage range of a red or green OLED is small, additional interpolation can still be used to restore the resolution.

[0073] like Figure 8 As shown, taking a green organic light-emitting diode (OLED) as an example, its data voltage range is only one-quarter of that of a blue OLED. That is, assuming the data voltage range of a blue OLED is 0V to VDDA, the data voltage range of a green OLED is 0V to 1 / 4 × VDDA. Even if the green data (b9,b8) is equal to (0,1), (1,0), or (1,1), the selectable gamma voltage will not exceed the maximum data voltage selectable when the green data (b9,b8) is equal to (0,0). In other words, although the green data also has 10 bits (e.g., b0 to b9), only b0 to b7 of them can reflect the selected voltage according to the data value. However, through the method of the present invention, the bit value can be shifted to increase the number of bits used for interpolation, so that the 10-bit data code of the green sub-pixel still has the opportunity to generate different data voltages corresponding to 1024 gray levels.

[0074] Figure 9 This is a schematic diagram of the driving channel 90 according to Embodiment 1 of the present invention. The driving channel 90 can be implemented in... Figure 7 Any one of the drive channels in the array is used to receive N bits of input data to output a data voltage to the display screen, where N is a positive integer. For example... Figure 9 As shown, the drive channel 90 includes a latch circuit 900, a digital-to-analog converter 910, an output buffer 920, and a control circuit 930. Figure 9 A detailed embodiment of a digital-to-analog converter 910 is shown, which includes a plurality of sub-digital-to-analog converters (sub-DACs) 912_1 to 912_x, a switching circuit 914, and an interpolation circuit 916.

[0075] The received input data can be stored in the latch circuit 900 in an appropriate manner to become an N-bit data code. Each sub-digital-to-analog converter 912_1 to 912_x can be an m-bit sub-digital-to-analog converter, used to receive m bits (where m is a positive integer less than N) from the N-bit data code from the latch circuit 900, and generate a set of intermediate voltages based on the received m-bit data code. The switching circuit 914 is coupled between the sub-digital-to-analog converters 912_1 to 912_x and the interpolation circuit 916, and can electrically connect the interpolation circuit 916 to a selected sub-digital-to-analog converter among the sub-digital-to-analog converters 912_1 to 912_x according to at least one selection signal SEL, so that the selected sub-digital-to-analog converter can output a selected set of intermediate voltages to the interpolation circuit 916. Switching circuit 914 is controlled by control circuit 930, which receives j bits (where j is a positive integer less than N) from N-bit data code from latching circuit 900 and outputs a selection signal SEL to switching circuit 914 accordingly. In this example, control circuit 930 may also output at least one interpolation control signal CTRL to interpolation circuit 916 based on j bits of data code received from latching circuit 900. Interpolation circuit 916 performs interpolation on the selected intermediate voltage based on k bits (where k is a positive integer less than N) from N-bit data code and based on the interpolation control signal CTRL, which may provide one or more additional interpolation bits or not. Therefore, interpolation circuit 916 can generate and output at least one output voltage Vout to output buffer 920. Then, output buffer 920 can output a data voltage to display screen based on output voltage Vout. In one embodiment, output buffer 920 can be implemented using an operational amplifier.

[0076] In this example, the combination of the m bits received by the sub-digital-to-analog converters 912_1 to 912_x, the k bits used for the interpolation circuit 916, and the j bits received by the control circuit 930 is equivalent to an N-bit data code, i.e., N = m + k + j. In other words, when the drive channel 90 receives an N-bit data code, this N-bit data code can be divided into m bits provided to the sub-digital-to-analog converters 912_1 to 912_x, k bits provided to the interpolation circuit 916, and j bits provided to the control circuit 930.

[0077] Figure 10 This is a schematic diagram of an exemplary drive channel 100 for a source drive device of a display screen, wherein the drive channel 100 includes a latch circuit 1000, a digital-to-analog converter 1010, and an operational amplifier 1020. Figure 10 As shown, the digital-to-analog converter 1010 includes four sub-digital-to-analog converters 1012_1 to 1012_4, a switching circuit 1014, and an interpolation circuit 1016.

[0078] In detail, the drive channel 100 can receive 10-bit input data a0 to a9 and store the input data a0 to a9 in the latch circuit 1000 to become 10-bit data codes b0 to b9. Data codes b0 to b9 can be used to control the digital-to-analog converter 1010 to output a corresponding output voltage Vout to the operational amplifier 1020, and then the operational amplifier 1020 outputs a data voltage to the display screen. Input data a0 to a9 can be written into the corresponding bit positions in the latch circuit 1000 to generate data codes b0 to b9, which can be used to control the operation of the digital-to-analog converter 1010. In this example, the sub-digital-to-analog converters 1012_1 to 1012_4 are 6-bit sub-digital-to-analog converters, and the interpolation circuit 1016 is a 2-bit interpolation circuit. The switching circuit 1014 includes multiple switches coupled between the sub-digital-to-analog converters 1012_1 to 1012_4 and the interpolation circuit 1016. In this circuit, bits b0-b1 control the interpolation circuit 1016, bits b2-b7 control the sub-digital-to-analog converters 1012_1-1012_4 to generate their respective intermediate voltages, and bits b8-b9 control the switching circuit 1014 to select one of the sub-digital-to-analog converters to output a selected set of intermediate voltages. In this example, bit b9 is the most significant bit (MSB) and bit b0 is the least significant bit (LSB), and so on. Therefore, the two most significant bits are used by the switching circuit 1014 to determine the selected sub-digital-to-analog converter, the six intermediate bits are used by the sub-digital-to-analog converters 1012_1-1012_4 to generate their respective intermediate voltages, and the two least significant bits are used by the interpolation circuit 1016 to perform voltage interpolation.

[0079] By controlling bits b8 to b9, the switching circuit 1014 can select one of the four sub-digital-to-analog converters 1012_1 to 1012_4 to connect to the interpolation circuit 1016, so that the selected sub-digital-to-analog converter outputs a selected intermediate voltage to the interpolation circuit 1016. Specifically, bit b8 can be used to generate two inverse control signals S8 and S8b, and bit b9 can be used to generate two inverse control signals S9 and S9b. These control signals can be transmitted to the corresponding switches in the switching circuit 1014 to select the output of the sub-digital-to-analog converters 1012_1 to 1012_4. These four sub-digital-to-analog converters 1012_1 to 1012_4 are used to generate different sets of intermediate voltages with different voltage levels, and select a set of intermediate voltages according to the values ​​of bits (b9, b8) which are (1,1), (1,0), (0,1), or (0,0). Assuming the output voltage range of digital-to-analog converter 1010 is 0V to VDDA, then sub-digital-to-analog converter 1012_1 is responsible for outputting a voltage range of 3 / 4 × VDDA to VDDA, sub-digital-to-analog converter 1012_2 is responsible for outputting a voltage range of 2 / 4 × VDDA to 3 / 4 × VDDA, sub-digital-to-analog converter 1012_3 is responsible for outputting a voltage range of 1 / 4 × VDDA to 2 / 4 × VDDA, and sub-digital-to-analog converter 1012_4 is responsible for outputting a voltage range of 0V to 1 / 4 × VDDA. Furthermore, as... Figure 10 As shown, each sub-digital-to-analog converter 1012_1 to 1012_4 has two output terminals, which can be coupled to the two input terminals of the interpolation circuit 1016 respectively through the control of the switching circuit 1014. Therefore, corresponding to each output data voltage, the selected sub-digital-to-analog converter can output two intermediate voltages to the interpolation circuit 1016, so that the interpolation circuit 1016 can generate a finer output voltage Vout level through interpolation.

[0080] As described above, the digital-to-analog converter driving the channel may include a control circuit (such as...). Figure 9 The control circuit 930 shown is coupled between the latch circuit, the switching circuit and the interpolation circuit to control the digital-to-analog converter to generate an output voltage that can adapt to the data voltage range of different color sub-pixels, under the gamma voltage generated by a single gamma voltage generating circuit with the same arrangement.

[0081] Figure 11This is a schematic diagram of a source driver device 110 according to an embodiment of the present invention. The source driver device 110 includes a brightness controller 1102 and multiple drive channels. The brightness controller 1102 can be used to transmit input data to each drive channel. The brightness controller 1102 can be an image processing circuit, which can be implemented in a display driver integrated circuit. Based on various image processing operations, the image processing circuit can modify display data to improve the visual effect and image quality of the output image. In one embodiment, the brightness controller 1102 and the source driver device 110 can be integrated into the display driver integrated circuit.

[0082] In this example, different driving channels can be configured to output data voltages to different colored sub-pixels on the OLED panel. The (3n+1)th channel is used for the blue sub-pixel, the (3n+2)th channel for the red sub-pixel, and the (3n+3)th channel for the green sub-pixel, where n can be any positive integer. Each driving channel includes a latch circuit, a digital-to-analog converter, an operational amplifier, and a control circuit. The structure and implementation of these modules are similar to... Figure 9 As shown. Depending on the application of different colors, each driving channel can operate in different modes. In addition to transmitting input data to the latch circuit in the driving channel, the brightness controller 1102 can also output a mode control signal MODE to the control circuit to control the operating mode of the driving channel. The value of the mode control signal MODE corresponds to the sub-pixel color driven by the driving channel. Based on the mode control signal MODE, the control circuit can control the interpolation circuit to determine whether to provide additional interpolation bits. In some embodiments, the input data can be reordered before being written to the latch circuit to accommodate the bit values ​​used for the sub-digital-to-analog converter and the bit values ​​used for interpolation in different operating modes.

[0083] In one embodiment, based on the mode control signal MODE, the control circuit can control the selection signal setting of the (3n+1)th channel digital-to-analog converter to be different from the selection signal setting of the (3n+2)th channel digital-to-analog converter, and also different from the selection signal setting of the (3n+3)th channel digital-to-analog converter. Correspondingly, in the (3n+1)th, (3n+2)th, and (3n+3)th channel digital-to-analog converters, the setting of the interpolation control signal output by the control circuit to the interpolation circuit is also different from each other.

[0084] Figure 12 This illustrates the operation of a driving channel 120 for the blue sub-pixel. The driving channel 120 can be, for example... Figure 11The (3n+1)th channel shown receives control from the brightness controller 1102. The drive channel 120 can output a data voltage based on the input data a0 to a9 to be displayed through the blue sub-pixels, and includes a latch circuit 1200, a digital-to-analog converter 1210, an operational amplifier 1220, and a control circuit 1230. Similarly, the digital-to-analog converter 1210 consists of four sub-digital-to-analog converters 1212_1 to 1212_4, a switching circuit 1214, and an interpolation circuit 1216.

[0085] Since the data voltage of the blue organic light-emitting diode corresponds to the full-range voltage that the drive channel can output, the setting of drive channel 120 is similar to... Figure 10 The driving channel 100 is used in this process. In short, input data a0 to a9 can be written into latch circuit 1200 to become data codes b0 to b9 without reordering. In data codes b0 to b9, bits b0 to b1 control interpolation circuit 1216, bits b2 to b7 control each sub-digital-to-analog converter 1212_1 to 1212_4, and bits b8 to b9 are output to control circuit 1230.

[0086] More specifically, in addition to receiving bits b8-b9, the control circuit 1230 also receives a mode control signal from the brightness controller 1102. In this example, the mode control signal has two signal bits, M1 and M2. Furthermore, the control circuit 1230 has four output terminals O1-O4. Output terminals O1 and O2 are used to output two selection signals to the switching circuit 1214 to control the switch to select a specific sub-digital-to-analog converter output intermediate voltage. Output terminals O3 and O4 are used to output two interpolation control signals to the interpolation circuit 1216 to control whether the interpolation circuit 1216 performs an additional 1 or 2 bits of interpolation. Based on the mode control signals M1 and M2, the control circuit 1230 can determine the signal values ​​output by output terminals O1-O4 to control the operation of the switching circuit 1214 and the interpolation circuit 1216.

[0087] In addition, the interpolation circuit 1216 has a maximum of 4-bit interpolation function, of which 2 bits of control come from the outputs of bits b0 and b1 of the latch circuit 1200, and the other 2 bits of control come from the outputs O3 and O4 of the control circuit 1230.

[0088] Therefore, when the drive channel 120 wants to output data voltage to the blue sub-pixel, the brightness controller 1102 can output mode control signals M1=0 and M2=0 to the control circuit 1230 in the drive channel 120. At the same time, the brightness controller 1102 writes the input data a0 to a9 sequentially into the positions of bits b0 to b9 in the latch circuit 1200 without reordering them. According to the mode control signals M1=0 and M2=0, the control circuit 1230 can transmit the values ​​of bits b8 to b9 to the output terminals O1 and O2 respectively. Bits b8 to b9 are the two most significant bits of the data code and can be used as selection signals for the control circuit 1230 to output to the switch circuit 1214. The two values ​​of bits b8 to b9 are further used to generate control signals S8, S8b, S9 and S9b to control the switch circuit 1214 to select one of the sub-digital-to-analog converters 1212_1 to 1212_4 to couple to the interpolation circuit 1216 and output an intermediate voltage to the interpolation circuit 1216.

[0089] The control circuit 1230 also outputs an interpolation control signal with a value of 0 through output terminals O3 and O4 to disable the additional 2-bit interpolation function of the interpolation circuit 1216.

[0090] In this way, since the drive channel 120 needs to output a full-range data voltage for the blue organic light-emitting diode, bits b8 to b9 can select one of the four sub-digital-to-analog converters 1212_1 to 1212_4 to output an intermediate voltage. That is, all sub-digital-to-analog converters 1212_1 to 1212_4 are considered as candidates, and the switching circuit 1214 determines the selected intermediate voltage to achieve the full-range data voltage. At the same time, the interpolation circuit 1216 receives the control of bits b0 to b1 and performs 2-bit interpolation, thereby realizing a total of 10-bit digital-to-analog converter function.

[0091] Figure 13 and Figure 14 Based on such Figure 2 and Figure 3 Taking a display screen as an example, the transistors used to drive organic light-emitting diodes in its sub-pixels are N-type metal-oxide-semiconductor transistors. Therefore, the higher the data voltage received by the sub-pixel, the greater the brightness produced.

[0092] Figure 13 This illustrates the operation of a driving channel 130 for a red sub-pixel. The driving channel 130 can be, for example... Figure 11The (3n+2)th channel shown receives control from the brightness controller 1102. The drive channel 130 can output a data voltage based on the input data a0 to a9 to be displayed through the red sub-pixels, and includes a latch circuit 1300, a digital-to-analog converter 1310, an operational amplifier 1320, and a control circuit 1330. Similarly, the digital-to-analog converter 1310 consists of four sub-digital-to-analog converters 1312_1 to 1312_4, a switching circuit 1314, and an interpolation circuit 1316.

[0093] When the drive channel 130 wants to output data voltage to the red sub-pixel, the brightness controller 1102 can output mode control signals M1=1 and M2=0 to the control circuit 1330 in the drive channel 130. Furthermore, the brightness controller 1102 performs a cyclic shift of the input data a0-a9 to be transmitted to the drive channel 130 one bit in the least significant bit direction to reorder them, and then transmits the input data a0-a9 to the latch circuit 1300. Therefore, the input data a0-a9 written to bits b0-b9 are shifted by one bit. After the cyclic shift, the input data written to bits b0-b9 are, in sequence, a1-a9 and a0 (located at the most significant bit position).

[0094] Based on the mode control signals M1=1 and M2=0, the control circuit 1330 can use bit b8 (which, after cyclic shift, is the value of input data a9) as a selection signal and transmit it to the switching circuit 1314 through output terminal O1, and output the set value 0 as another selection signal to the switching circuit 1314 through output terminal O2. In this case, the original... Figure 12 The switch controlled by the receiving bit b9 is changed to receive a signal value of 0, so that the two upper sub-digital-to-analog converters 1312_1 and 1312_2 are not selected, and only the two lower sub-digital-to-analog converters 1312_3 and 1312_4 output the intermediate voltage. In addition, the control circuit 1330 outputs a signal 0 through the output terminal O3, and outputs bit b9 (which is the value of the input data a0 after cyclic shift) to the interpolation circuit 1316 through the output terminal O4.

[0095] In this way, by cyclically shifting one bit of the input data a0 to a9, in order to meet the data voltage required by the drive channel 130 for the red OLED (which is approximately equal to half of the full-range data voltage of the blue OLED), the intermediate voltage can be selected from one of the two sub-digital-to-analog converters 1312_4 and 1312_3 (which are responsible for outputting a voltage range of 0V to 1 / 4×VDDA and a voltage range of 1 / 4×VDDA to 2 / 4×VDDA) by bit b8 (i.e. the value of data a9). In other words, only two of the four sub-digital-to-analog converters are considered as candidates, and the selected intermediate voltage is determined by the switching circuit 1314 to achieve half of the data voltage range. Meanwhile, in addition to receiving the control of bits b0 to b1 (i.e., the values ​​of data a1 to a2) as two interpolation bits, the interpolation circuit 1316 also receives the control of bit b9 (i.e., the value of data a0 stored at bit position b9) as one additional interpolation bit, thereby achieving a total of 3 bits of interpolation in the interpolation circuit 1316.

[0096] In other words, the bit in the latch circuit that was originally used to select the digital-to-analog converter in the drive channel 120 for blue OLEDs is used to control the interpolation circuit to add one interpolation bit in the drive channel 130 for red OLEDs. The received input data is cyclically shifted one bit position to the least significant bit direction (i.e., to the right) before being written to the latch circuit to be reordered, so that the drive channel 130 can still output a voltage that conforms to the data voltage range of the red OLED under the control of the equivalent 10 bits of data.

[0097] Figure 14 This illustrates the operation of a driving channel 140 for the green sub-pixel. The driving channel 140 can be, for example... Figure 11 The (3n+3)th channel shown receives control from the brightness controller 1102. The drive channel 140 can output a data voltage based on the input data a0 to a9 to be displayed through the green sub-pixels, and includes a latch circuit 1400, a digital-to-analog converter 1410, an operational amplifier 1420, and a control circuit 1430. Similarly, the digital-to-analog converter 1410 consists of four sub-digital-to-analog converters 1412_1 to 1412_4, a switching circuit 1414, and an interpolation circuit 1416.

[0098] When the drive channel 140 wants to output data voltage to the green sub-pixel, the brightness controller 1102 can output mode control signals M1=1 and M2=1 to the control circuit 1430 in the drive channel 140. Furthermore, the brightness controller 1102 performs a two-position cyclic shift in the least significant bit direction on the input data a0-a9 to be transmitted to the drive channel 140 to reorder them, and then transmits the input data a0-a9 to the latch circuit 1400. Therefore, the input data a0-a9 written to bits b0-b9 are shifted by two positions. After the cyclic shift, the input data written to bits b0-b9 are sequentially a2-a9 and a0-a1 (located at the positions of the two most significant bits).

[0099] Based on the mode control signals M1=1 and M2=1, the control circuit 1430 can output a fixed value of 0 to the switching circuit 1414 through output terminals O1 and O2, and output bits b8 and b9 (which, after cyclic shift, are the values ​​of input data a0 and a1) to the interpolation circuit 1416 through output terminals O3 and O4 respectively. In this case, both selection signals received by the switching circuit 1414 are fixed values ​​of 0, so that the three upper sub-digital-to-analog converters 1412_1 to 1412_3 will not be selected, and only the lowermost sub-digital-to-analog converter 1412_4 will output the intermediate voltage.

[0100] In this way, by cyclically shifting the two positions of the input data a0 to a9, and considering that the drive channel 140 needs to output the data voltage for the green OLED (which is approximately one-quarter of the full-amplitude data voltage for the blue OLED), an intermediate voltage can be forced from the sub-digital-to-analog converter 1412_4 (which is responsible for outputting a voltage range from 0V to 1 / 4×VDDA). That is, only one of the four sub-digital-to-analog converters is used to output the selected intermediate voltage to achieve a one-quarter data voltage range. At the same time, in addition to receiving the control of bits b0 to b1 (i.e., the values ​​of data a2 to a3) as two interpolation bits, the interpolation circuit 1416 also receives the control of bits b8 to b9 (i.e., the values ​​of data a0 to a1 stored at bit positions b8 to b9) as two additional interpolation bits, thereby achieving a total of 4 bits of interpolation in the interpolation circuit 1416.

[0101] In other words, the two bits in the latch circuit that were originally used to select the digital-to-analog converter in the drive channel 120 for blue OLEDs are used to control the interpolation circuit in the drive channel 140 for green OLEDs to add two interpolation bits. The received input data is cyclically shifted two bit positions in the direction of least significant bit (i.e., to the right) before being written to the latch circuit to be reordered, so that the drive channel 140 can still output a voltage that conforms to the data voltage range of the green OLED under the control of the equivalent 10 bits of data.

[0102] It should be noted that the above embodiments are based on Figure 2 Taking a display screen as an example, the transistor used to drive the organic light-emitting diode (OLED) within its sub-pixel is an N-type metal-oxide-semiconductor transistor (MOSFET). Therefore, the higher the data voltage received by the sub-pixel, the greater the brightness produced. In another embodiment, if the transistor used to drive the OLED within the sub-pixel is a P-type MOSFET (such as...), Figure 4 In a low-temperature polycrystalline silicon panel, the lower the data voltage received by the sub-pixel, the greater the brightness. In this case, for red or green organic light-emitting diodes with a smaller data voltage range, the output should be selected from the uppermost sub-digital-to-analog converter, which has a higher voltage level. More specifically, for the drive channel 130 for red organic light-emitting diodes, the intermediate voltage can be output to the interpolation circuit 1316 from one of the two upper sub-digital-to-analog converters 1312_1 and 1312_2, which are responsible for outputting a voltage range from 3 / 4×VDDA to VDDA and a voltage range from 2 / 4×VDDA to 3 / 4×VDDA, respectively; for the drive channel 140 for green organic light-emitting diodes, the intermediate voltage is output to the interpolation circuit 1416 from the uppermost sub-digital-to-analog converter 1412_1, which is responsible for outputting a voltage range from 3 / 4×VDDA to VDDA.

[0103] Therefore, based on the different values ​​of the mode control signals M1 and M2, the control circuit can selectively transmit the values ​​of bits b8 to b9 to the switching circuit or the interpolation circuit. Combined with the cyclic shifting of the input data write latch circuit, different data voltage ranges can be output, applicable to organic light-emitting diode (OLED) displays that use different colors of OLEDs for illumination. The control circuit can receive the mode control signals M1 and M2 and the data values ​​of bits b8 to b9, and output signals correspondingly through output terminals O1 to O4. Its detailed operation is shown in Table 1.

[0104] M2 M1 O4 O3 O2 O1 0 0 0 0 b9 b8 0 1 b9 0 0 b8 1 0 X X X X 1 1 b9 b8 0 0

[0105] Table 1

[0106] According to Table 1, the 2-bit mode control signals M1 and M2 can be used to implement... Figures 12-14 The settings correspond to three different color modes. Furthermore, the combination of signal values ​​M2=1 and M1=0 can produce arbitrary output values ​​without affecting the operation of this embodiment (marked as X in Table 1), or it can be combined with other applications to implement a fourth mode (such as the output data voltage for the fourth color), and is not limited thereto.

[0107] Figures 12-14 The implementation method can be realized in Figure 7The source drive device 70 in the image contains a single gamma voltage generation circuit 702 coupled to a digital-to-analog converter for different drive channels used for different colors, making it feasible to implement a single gamma voltage generation circuit on the organic light-emitting diode panel. In this example, each drive channel may include the same circuit structure, which can output different data voltage ranges to sub-pixels of different colors according to different mode control signals M1 and M2 and corresponding data reordering schemes. Figure 7 The output buffer BUF shown can be, for example... Figures 12-14 The operational amplifiers shown are 1220, 1320, or 1420. In each drive channel, the interpolation circuitry can integrate a digital-to-analog converter, such as... Figures 12-14 As shown; or coupled to the output of a digital-to-analog converter, such as Figure 7 As shown.

[0108] In one embodiment, the digital-to-analog converters in different drive channels for different colors can receive different ranges and quantities of gamma voltage. For example, for the drive channel used to drive a blue OLED, the received gamma voltage may have the maximum range and / or the maximum quantity to correspond to the maximum data voltage range of the blue OLED. For the drive channel used to drive a red OLED, the received gamma voltage may have a medium range and / or a medium quantity to correspond to the medium data voltage range of the red OLED. For the drive channel used to drive a green OLED, the received gamma voltage may have the minimum range and / or the minimum quantity to correspond to the minimum data voltage range of the green OLED.

[0109] Figure 15 This is a schematic diagram of an exemplary embodiment of the interpolation circuit of the present invention, wherein the interpolation circuit may be... Figures 12-14 Any of the interpolation circuits 1216, 1316, or 1416 shown. In this example, the interpolation circuit can be integrated into the operational amplifier to interpolate finer output voltage variations through combinations of different transconductances (gm) in the operational amplifier. Figure 15 Taking 2-bit interpolation as an example, the adjacent voltage difference output by the operational amplifier is made equal to 1 / 4 of the adjacent voltage difference output by the digital-to-analog converter. Specifically, the operational amplifier can be designed with four input terminals, corresponding to four transconductance values ​​(gm1 to gm4), and receiving voltages AVD1 to AVD4 from the digital-to-analog converter respectively. To ensure the operational amplifier accurately generates the interpolation voltage, gm1 to gm4 can be set to have the same value (i.e., gm1 = gm2 = gm3 = gm4). The output voltage Y of the operational amplifier is calculated using the voltages AVD1 to AVD4 received from the digital-to-analog converter, such as... Figure 15As shown.

[0110] Please see Figure 15 Matching Figures 12-14 As shown. Based on the structure of the drive channel, the interpolation circuit can receive two adjacent voltages VL and VH from a sub-digital-to-analog converter according to the selection of the switching circuit, to generate and output interpolation voltages V1 to V3 located between VL and VH, wherein each voltage AVD1 to AVD4 is either voltage VL or VH. The interpolation circuit also receives bit values ​​from the latching circuit and / or control circuit to set voltages AVD1 to AVD4 to be equal to VL or VH, respectively. In detail, in Figures 12-14 In a digital-to-analog converter, M=4 can be set, meaning the operational amplifier receives voltages AVD1 to AVD4 through four input terminals. In this way, the operational amplifier can generate interpolated voltages V1 to V3 based on the values ​​of AVD1 to AVD4. For example, to generate voltage V1 (equal to (VL×3+VH) / 4), AVD1 to AVD3 can be set to equal VL, and AVD4 to equal VH; to generate voltage V2 (equal to (VL×2+VH×2) / 4), AVD1 and AVD2 can be set to equal VL, and AVD3 and AVD4 to equal VH; to generate voltage V3 (equal to (VL+VH×3) / 4), AVD1 can be set to equal VL, and AVD2 to AVD4 to equal VH. Thus, by designing and switching the operational amplifier input terminals, interpolated voltages V1 to V3 between voltages VL and VH can be achieved.

[0111] In the same manner, operational amplifiers can be designed to include 8 inputs for 3-bit interpolation, or 16 inputs for 4-bit interpolation. Figures 12-14 In one embodiment, the operational amplifier can be designed to have 16 input terminals (i.e., M=16). The interpolation circuit can determine whether to use 4, 8, or 16 of these input terminals based on the mode setting and signals from the control circuit (via output terminals O3 and O4), thereby achieving 2-bit, 3-bit, or 4-bit interpolation in each driving channel according to which color sub-pixel is to be driven by the driving channel.

[0112] It is worth noting that, Figure 15The structure described is merely one embodiment of the interpolation circuit of the present invention. Those skilled in the art will understand that voltage interpolation can be achieved in various ways, such as current-mode, voltage-mode, or a hybrid current / voltage mode. Any method that can generate an intermediate voltage with a specific level between two input voltages can be applied to the interpolation circuit of the present invention. For example, in another embodiment, the gain of the operational amplifier can be changed by adjusting the tail current at the input of the operational amplifier, thereby controlling the output voltage of the operational amplifier and achieving the purpose of interpolation. Alternatively, in other embodiments, the input signals of the operational amplifier can be designed to be multiplied by different transconductance values ​​as weights to generate a target output voltage value.

[0113] It is worth noting that the purpose of this invention is to propose a novel digital-to-analog converter structure located in each drive channel of the source drive device. Those skilled in the art will be able to make modifications or variations accordingly, and are not limited thereto. For example, embodiments of this invention can be applied to any type of self-emissive display, such as organic light-emitting diode (OLED) panels, light-emitting diode (LED) panels, miniature LED (LED) panels, micro LED (LED) panels, and micro-organic LED (OLED) panels, but are not limited thereto. Different colored LEDs / organic LEDs have different luminous efficiencies, therefore requiring different data voltage ranges to be provided at the same grayscale value. The digital-to-analog converter structure proposed in this invention can be used to supply data voltage to these LEDs / organic LEDs.

[0114] Furthermore, the implementation of the mode control signal presented in this specification is merely an example. For instance, in another embodiment, if the digital-to-analog converter needs to operate in more modes, the mode control signal may have more bits. This implementation can be applied to panels with more different colored organic light-emitting diodes. Additionally, the bit values ​​of the mode control signal corresponding to different drive channels are not limited to the combinations shown in Table 1.

[0115] in addition, Figures 12-14The number of data bits and their allocation to the sub-digital-to-analog converter, switching circuit, and interpolation circuit in the embodiment are merely one example. As described above, the sub-digital-to-analog converter can be an m-bit sub-digital-to-analog converter to receive m bits of N-bit data code, the control circuit can receive j bits of N-bit data code, and the interpolation circuit can receive k bits of N-bit data code from the latch circuit to perform interpolation. The values ​​m, j, and k can be set in any appropriate manner to provide different data voltage ranges to organic light-emitting diode sub-pixels of different colors and to ensure consistent overall resolution for generating gamma curves. The j bits received by the control circuit may include a j1 bit for controlling the switching circuit and a j2 bit for providing additional interpolation bits to the interpolation circuit, where j1 and j2 are integers between 0 and j, and j1 + j2 = j. To achieve different data voltage ranges, the number j1 used by the switching circuit of a first digital-to-analog converter in a first driving channel for a first color sub-pixel can be different from the number j1 used by the switching circuit of a second digital-to-analog converter in a second driving channel for a second color sub-pixel. Therefore, in both the first and second digital-to-analog converters, the switching circuit considers different numbers of sub-digital-to-analog converters as candidates. Correspondingly, the interpolation circuits of the first and second digital-to-analog converters can be controlled by different numbers of j2 bits, thereby performing interpolation based on different numbers of interpolation bits. The number of interpolation bits in each interpolation circuit is the sum of k bits from the latch circuit and j2 bits from the control circuit.

[0116] In summary, this invention proposes a structure for a digital-to-analog converter and source driver device that can be used for display control of an organic light-emitting diode (OLED) panel. Since different colors of OLEDs on an OLED panel have different conversion characteristics, the digital-to-analog converter of this invention can output data voltage ranges corresponding to different colors in different modes using the same gamma voltage generation circuit with the same bit resolution, thus adapting to the luminous efficiency of different colored OLEDs.

[0117] In one embodiment, in the driving channel corresponding to the blue OLED, an 8-bit digital-to-analog converter (D / A converter) can be used to control a 2-bit interpolation circuit to generate a 10-bit resolution data voltage output; in the driving channel corresponding to the red OLED, a 7-bit D / A converter can be used to control a 3-bit interpolation circuit to generate a 10-bit resolution data voltage output; and in the driving channel corresponding to the green OLED, a 6-bit D / A converter can be used to control a 4-bit interpolation circuit to generate a 10-bit resolution data voltage output. For the driving channels of red or green OLEDs with a smaller data voltage range, since some bits originally used to control larger (or smaller) output voltages are no longer used, the data bits can be reordered. The most significant bits are used to control a smaller number of sub-D / A converters with smaller (or larger) output voltages to match the data voltage range of the red or green OLEDs. Simultaneously, some of the least significant bits are output to the interpolation circuit to increase the number of interpolation bits. In this way, even when the data voltage range of red or green organic light-emitting diodes is small, additional interpolation can still be used to restore the resolution, resulting in a more suitable input grayscale versus output voltage characteristic curve.

[0118] In one embodiment, a brightness controller can be used to control each drive channel in the source driving device. The drive channels for driving blue, red, and green OLEDs can have the same structure but output different data voltage ranges through different mode settings. Each drive channel may include a control circuit for receiving mode control signals from the brightness controller and using appropriate signal switching between a sub-digital-to-analog converter and an interpolation circuit, combined with reordering of the input data, to achieve the application of different data voltage ranges. In this way, a single gamma voltage generation circuit can be used to drive the OLED panel, while providing a good gamma voltage arrangement suitable for each color.

[0119] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A source drive device, characterized in that, The system includes a first digital-to-analog converter (DADC) and a second DADC. The first DADC is located in a first driving channel for driving a first color sub-pixel, and the second DADC is located in a second driving channel for driving a second color sub-pixel. Each of the first and second DADCs is configured to output at least one output voltage based on an N-bit data code. Each of the first and second DADCs includes: Multiple sub-digital-to-analog converters, wherein each sub-digital-to-analog converter is used to receive m bits of the N-bit data code and generate a set of intermediate voltages based on the m bits of the N-bit data code; An interpolation circuit is used to determine the interpolation based on k bits of the N-bit data code and at least one interpolation control signal. Interpolation is performed on a selected set of intermediate voltages to generate the at least one output voltage; and A switching circuit, coupled to the plurality of sub-digital-to-analog converters and the interpolation circuit, is used to electrically connect the interpolation circuit to a selected sub-digital-to-analog converter among the plurality of sub-digital-to-analog converters for outputting the selected set of intermediate voltages, based on a first selection signal and a second selection signal. The interpolation circuit in the first digital-to-analog converter and the interpolation circuit in the second digital-to-analog converter respectively perform interpolation on the selected intermediate voltage of each group according to different numbers of interpolation bits.

2. The source drive device as described in claim 1, characterized in that, Each of the first digital-to-analog converter and the second digital-to-analog converter is configured to be coupled to: A latch circuit is used to store the N-bit data code; as well as A control circuit, coupled to the latch circuit, the switch circuit and the interpolation circuit, is used to receive the most significant j bits of the N-bit data code stored in the latch circuit, output the at least one interpolation control signal to the interpolation circuit, and output the first selection signal and the second selection signal to the switch circuit.

3. The source drive device as described in claim 2, characterized in that, The combination of the m bits received by the plurality of sub-digital-to-analog converters, the k bits used in the interpolation circuit, and the j bits received by the control circuit is equivalent to the N-bit data code.

4. The source drive device as described in claim 2, characterized in that, The N-bit data code stored in the latch circuit includes input data transmitted by a brightness controller. When the input data is intended to be displayed through the first color sub-pixel, the input data is not reordered by the brightness controller before being transmitted to the latch circuit. When the input data is intended to be displayed through the second color sub-pixel, the input data is reordered by the brightness controller before being transmitted to the latch circuit.

5. The source drive device as described in claim 4, characterized in that, If the input data is intended to be displayed through the second color sub-pixel, before the input data is transmitted to the latch circuit, the brightness controller cyclically shifts the input data one or more bit positions in the direction of the least significant bit to reorder the input data.

6. The source drive device as described in claim 4, characterized in that, If the input data is intended to be displayed through the first color sub-pixel and the first color sub-pixel is a blue sub-pixel, the brightness controller does not reorder the input data before the input data is transmitted to the latch circuit.

7. The source drive device as described in claim 4, characterized in that, If the input data is intended to be displayed through the second color sub-pixel and the second color sub-pixel is a red sub-pixel, before the input data is transmitted to the latch circuit, the brightness controller cyclically shifts the input data one bit position in the least significant bit direction to reorder the input data.

8. The source drive device as described in claim 4, characterized in that, If the input data is intended to be displayed through the second color sub-pixel and the second color sub-pixel is a green sub-pixel, before the input data is transmitted to the latch circuit, the brightness controller cyclically shifts the input data two bits in the least significant bit direction to reorder the input data.

9. The source drive device as described in claim 1, characterized in that, The settings of the first selection signal and the second selection signal in the first digital-to-analog converter are different from the settings of the first selection signal and the second selection signal in the second digital-to-analog converter.

10. The source drive device as described in claim 2, characterized in that, In the first digital-to-analog converter, the most significant two bits of the N-bit data code stored in the latch circuit are used as the first selection signal and the second selection signal, and the first color sub-pixel is a blue sub-pixel.

11. The source drive device as described in claim 2, characterized in that, In the second digital-to-analog converter, at least one of the most significant two bits of the N-bit data code stored in the latch circuit is used as the first selection signal, the second selection signal is a fixed value, and the second color sub-pixel is a red sub-pixel.

12. The source drive device as described in claim 2, characterized in that, In the second digital-to-analog converter, the first selection signal and the second selection signal are fixed values, and the second color sub-pixel is a green sub-pixel.

13. The source drive device as claimed in claim 1, characterized in that, A first set of intermediate voltages generated by a first sub-digital-to-analog converter among the plurality of sub-digital-to-analog converters has a different voltage level than a second set of intermediate voltages generated by a second sub-digital-to-analog converter among the plurality of sub-digital-to-analog converters.

14. The source drive device as claimed in claim 1, characterized in that, The first digital-to-analog converter is used to select all of the plurality of sub-digital-to-analog converters as candidates to determine the selected intermediate voltage through the switching circuit, so as to output a first voltage range, and the second digital-to-analog converter is used to select some of the plurality of sub-digital-to-analog converters as candidates to determine the selected intermediate voltage through the switching circuit, so as to output a second voltage range that is smaller than the first voltage range.

15. The source drive device as described in claim 14, characterized in that, The interpolation circuit in the first digital-to-analog converter performs k1-bit interpolation, while the interpolation circuit in the second digital-to-analog converter performs k2-bit interpolation, where k2 is greater than k1.

16. The source drive device as claimed in claim 2, characterized in that, In the second digital-to-analog converter, at least one of the most significant two bits of the N-bit data code stored in the latch circuit is used as the at least one interpolation control signal, and the second color sub-pixel is a red sub-pixel or a green sub-pixel to add extra bits for interpolation.

17. The source drive device as claimed in claim 1, characterized in that, The at least one output voltage is output to an output buffer, which is used to output a data voltage based on the at least one output voltage.

18. The source drive device as claimed in claim 1, characterized in that, It also includes a gamma voltage generating circuit, which is coupled to the first digital-to-analog converter and the second digital-to-analog converter, and is used to generate multiple gamma voltages.

19. The source drive device as described in claim 18, characterized in that, The first digital-to-analog converter receives a plurality of first gamma voltages from the plurality of gamma voltages, and the second digital-to-analog converter receives a plurality of second gamma voltages from the plurality of gamma voltages, wherein the plurality of first gamma voltages are located in a first range, and the plurality of second gamma voltages are located in a second range different from the first range.

20. The source drive device as described in claim 19, characterized in that, The number of the plurality of first gamma voltages is different from the number of the plurality of second gamma voltages.

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