Voltage detection and analysis method and system for silicon carbide transistor

Abstract

The present invention relates to the field of data processing, and discloses a voltage detection and analysis method and system for silicon carbide transistors, which are used to improve the accuracy of voltage anomaly detection and analysis of silicon carbide transistors. The method includes: performing voltage testing and current data collection on silicon carbide transistors to obtain forward current data and reverse current data; calculating forward energy conversion efficiency data and reverse energy conversion efficiency data; performing curve fitting and feature extraction to obtain forward conversion efficiency feature sets and reverse conversion efficiency feature sets; performing dynamic weight analysis and matrix conversion on the forward conversion efficiency feature sets and reverse conversion efficiency feature sets to obtain a target conversion efficiency feature matrix; inputting the target conversion efficiency feature matrix into a voltage detection and analysis model set to perform voltage anomaly detection and analysis, and outputting target voltage anomaly detection and analysis results; and creating a target voltage anomaly processing strategy based on the target voltage anomaly detection and analysis results.

Description

Technical Field

[0001] The present invention relates to the field of data processing, and in particular to a voltage detection and analysis method and system for a silicon carbide transistor. Background Art

[0002] Silicon carbide transistors are widely used in power electronics, communication systems, and high-performance computing due to their excellent performance in high-temperature, high-frequency, and high-power environments. However, as the application scenarios continue to expand, a deeper understanding of their electrical properties has become an urgent need.

[0003] For high-performance, high-temperature devices such as silicon carbide transistors, the voltage stability of the transistor is extremely high, and any voltage anomaly will lead to device failure or performance degradation. Traditional voltage detection methods have certain limitations when dealing with complex working environments, dynamic circuit conditions and voltage anomalies, which leads to low accuracy of existing solutions. Summary of the invention

[0004] The present invention provides a voltage detection and analysis method and system for a silicon carbide transistor, which are used to improve the accuracy of voltage anomaly detection and analysis of the silicon carbide transistor.

[0005] A first aspect of the present invention provides a voltage detection and analysis method for a silicon carbide transistor, the voltage detection and analysis method for a silicon carbide transistor comprising:

[0006] Performing voltage testing and current data collection on the silicon carbide transistor based on preset test voltage data to obtain raw current data, and classifying the raw current data to obtain forward current data and reverse current data;

[0007] Calculating forward energy conversion efficiency data of the silicon carbide transistor based on the test voltage data and the forward current data, and calculating reverse energy conversion efficiency data of the silicon carbide transistor based on the test voltage data and the reverse current data;

[0008] Performing curve fitting and feature extraction on the forward energy conversion efficiency data to obtain a forward conversion efficiency feature set, and performing curve fitting and feature extraction on the reverse energy conversion efficiency data to obtain a reverse conversion efficiency feature set;

[0009] Based on a preset dynamic weight algorithm, dynamic weight analysis and matrix conversion are performed on the forward conversion efficiency feature set and the reverse conversion efficiency feature set to obtain a target conversion efficiency feature matrix;

[0010] Inputting the target conversion efficiency characteristic matrix into a preset voltage detection analysis model set, performing voltage anomaly detection analysis through multiple voltage detection analysis models in the voltage detection analysis model set, and outputting a target voltage anomaly detection analysis result;

[0011] A target voltage anomaly processing strategy for the silicon carbide transistor is created based on the target voltage anomaly detection and analysis result.

[0012] In combination with the first aspect, in a first implementation of the first aspect of the present invention, the voltage test and current data collection of the silicon carbide transistor based on the preset test voltage data to obtain the original current data, and the data classification of the original current data to obtain the forward current data and the reverse current data include:

[0013] Performing a voltage test on the silicon carbide transistor based on preset test voltage data, and responding to a voltage signal of the silicon carbide transistor through a preset analog-to-digital converter, and collecting corresponding raw current data through a preset current sensor;

[0014] Performing time series conversion on the original current data to obtain a first time series current sequence, and performing sequence segmentation on the first time series current sequence according to a preset sequence length to obtain a plurality of second time series current sequences;

[0015] Performing metric distance calculation on the plurality of second time-series current sequences respectively to obtain a plurality of metric distances corresponding to each second time-series current sequence;

[0016] According to the multiple measurement distances and the preset measurement distance threshold, the multiple second time series current sequences are classified and decided to obtain forward current data and reverse current data.

[0017] In combination with the first aspect, in a second implementation of the first aspect of the present invention, the forward energy conversion efficiency data of the silicon carbide transistor is calculated based on the test voltage data and the forward current data, and the reverse energy conversion efficiency data of the silicon carbide transistor is calculated based on the test voltage data and the reverse current data, including:

[0018] Constructing a forward voltage-current curve of the test voltage data and the forward current data, and performing a curve integration operation on the forward voltage-current curve to obtain forward electric energy data;

[0019] Acquire a first test time interval, and calculate a corresponding forward output power according to the forward power data and the first test time interval;

[0020] Calculating the forward input power of the silicon carbide transistor based on the test voltage data, and calculating corresponding forward energy conversion efficiency data according to the forward output power and the forward input power;

[0021] Constructing a reverse voltage-current curve of the test voltage data and the reverse current data, and performing a curve integration operation on the reverse voltage-current curve to obtain reverse electric energy data;

[0022] Acquire a second test time interval, and calculate the corresponding reverse output power according to the reverse power data and the second test time interval;

[0023] The reverse input power of the silicon carbide transistor is calculated based on the test voltage data, and the corresponding reverse energy conversion efficiency data is calculated according to the reverse output power and the reverse input power.

[0024] In combination with the first aspect, in a third implementation of the first aspect of the present invention, the forward energy conversion efficiency data is subjected to curve fitting and feature extraction to obtain a forward conversion efficiency feature set, and the reverse energy conversion efficiency data is subjected to curve fitting and feature extraction to obtain a reverse conversion efficiency feature set, including:

[0025] Performing curve fitting on the forward energy conversion efficiency data by using a preset first curve fitting function to obtain a forward energy conversion efficiency curve, and performing curve fitting on the reverse energy conversion efficiency data by using a preset second curve fitting function to obtain a reverse energy conversion efficiency curve;

[0026] Performing feature extraction on the forward energy conversion efficiency curve to obtain a forward original feature set, and performing feature extraction on the reverse energy conversion efficiency curve to obtain a reverse original feature set;

[0027] A forward feature screening standard is obtained, and the forward original feature set is feature screened according to the forward feature screening standard to obtain a forward conversion efficiency feature set, and a reverse feature screening standard is obtained, and the reverse original feature set is feature screened according to the reverse feature screening standard to obtain a reverse conversion efficiency feature set.

[0028] In combination with the first aspect, in a fourth implementation of the first aspect of the present invention, the forward conversion efficiency feature set and the reverse conversion efficiency feature set are subjected to dynamic weight analysis and matrix conversion based on a preset dynamic weight algorithm to obtain a target conversion efficiency feature matrix, including:

[0029] Performing matrix conversion on the forward conversion efficiency feature set and the reverse conversion efficiency feature set to obtain a forward conversion efficiency feature matrix and a reverse conversion efficiency feature matrix;

[0030] Initialize weights using a preset dynamic weight algorithm to generate initialization matrix weight data;

[0031] Performing dynamic weight analysis on the initialized matrix weight data to generate a plurality of candidate matrix weight data;

[0032] Performing fitness calculation on the plurality of candidate matrix weight data to obtain fitness data of each candidate matrix weight data;

[0033] Selecting corresponding target matrix weight data from the plurality of candidate matrix weight data according to the fitness data;

[0034] According to the target matrix weight data, the forward conversion efficiency characteristic matrix and the reverse conversion efficiency characteristic matrix are weighted and fused to generate a target conversion efficiency characteristic matrix.

[0035] In combination with the first aspect, in a fifth implementation of the first aspect of the present invention, the target conversion efficiency characteristic matrix is ​​input into a preset voltage detection analysis model set, a voltage anomaly detection analysis is performed through a plurality of voltage detection analysis models in the voltage detection analysis model set, and a target voltage anomaly detection analysis result is output, including:

[0036] Inputting the target conversion efficiency characteristic matrix into a preset voltage detection analysis model set, wherein the voltage detection analysis model set includes a plurality of voltage detection analysis models, each of which includes a convolutional network, a first fully connected layer, a long short-term memory network, and a second fully connected layer;

[0037] Through the convolution networks in the multiple voltage detection and analysis models, convolution operations are performed on the target conversion efficiency feature matrix respectively to obtain an initial high-dimensional feature matrix;

[0038] Through the first fully connected layer in the multiple voltage detection and analysis models, feature integration is performed on the initial high-dimensional feature matrix to obtain a target high-dimensional feature matrix;

[0039] By using the long short-term memory networks in the multiple voltage detection and analysis models, respectively extracting hidden features from the target high-dimensional feature matrix to obtain a target hidden feature matrix;

[0040] Through the second fully connected layers in the multiple voltage detection and analysis models, respectively perform voltage anomaly detection and analysis on the target hidden feature matrix to obtain an initial voltage anomaly detection and analysis result of each voltage detection and analysis model;

[0041] The initial voltage anomaly detection and analysis results of each voltage detection and analysis model are fused to output the target voltage anomaly detection and analysis results.

[0042] In combination with the first aspect, in a sixth implementation of the first aspect of the present invention, the step of creating a target voltage anomaly processing strategy for the silicon carbide transistor based on the target voltage anomaly detection and analysis result includes:

[0043] Creating an initial voltage anomaly processing strategy group for the silicon carbide transistor based on the target voltage anomaly detection and analysis result, wherein the initial voltage anomaly processing strategy group includes a plurality of first voltage anomaly processing strategies;

[0044] Calculate the evaluation index data of each first voltage abnormality processing strategy respectively through a preset objective function;

[0045] Comparing the evaluation index data with a first evaluation index threshold and a second evaluation index threshold, wherein the first evaluation index threshold is less than the second evaluation index threshold;

[0046] If the evaluation index data is less than the first evaluation index threshold, the corresponding first voltage abnormality processing strategy is divided into the first voltage abnormality processing strategy group; if the first evaluation index threshold is less than the evaluation index data and less than the second evaluation index threshold, the corresponding first voltage abnormality processing strategy is divided into the second voltage abnormality processing strategy group; if the second evaluation index threshold is less than the evaluation index data, the corresponding first voltage abnormality processing strategy is divided into the third voltage abnormality processing strategy group;

[0047] Performing multiplication, crossover and mutation on the first voltage anomaly processing strategy group and the second voltage anomaly processing strategy group, and performing crossover and mutation on the third voltage anomaly processing strategy group, to obtain a plurality of second voltage anomaly processing strategies;

[0048] The plurality of second voltage abnormality processing strategies are optimized and analyzed to obtain a target voltage abnormality processing strategy for the silicon carbide transistor.

[0049] A second aspect of the present invention provides a voltage detection and analysis system for a silicon carbide transistor, the voltage detection and analysis system for a silicon carbide transistor comprising:

[0050] A test module, used to perform voltage testing and current data collection on the silicon carbide transistor based on preset test voltage data to obtain raw current data, and to classify the raw current data to obtain forward current data and reverse current data;

[0051] A calculation module, used to calculate forward energy conversion efficiency data of the silicon carbide transistor based on the test voltage data and the forward current data, and to calculate reverse energy conversion efficiency data of the silicon carbide transistor based on the test voltage data and the reverse current data;

[0052] An extraction module, used to perform curve fitting and feature extraction on the forward energy conversion efficiency data to obtain a forward conversion efficiency feature set, and to perform curve fitting and feature extraction on the reverse energy conversion efficiency data to obtain a reverse conversion efficiency feature set;

[0053] A conversion module, used for performing dynamic weight analysis and matrix conversion on the forward conversion efficiency feature set and the reverse conversion efficiency feature set based on a preset dynamic weight algorithm to obtain a target conversion efficiency feature matrix;

[0054] An analysis module, used for inputting the target conversion efficiency characteristic matrix into a preset voltage detection analysis model set, performing voltage anomaly detection analysis through a plurality of voltage detection analysis models in the voltage detection analysis model set, and outputting a target voltage anomaly detection analysis result;

[0055] A creation module is used to create a target voltage anomaly processing strategy for the silicon carbide transistor based on the target voltage anomaly detection and analysis result.

[0056] A third aspect of the present invention provides a voltage detection and analysis device for a silicon carbide transistor, comprising: a memory and at least one processor, wherein the memory stores instructions; the at least one processor calls the instructions in the memory so that the voltage detection and analysis device for the silicon carbide transistor performs the above-mentioned voltage detection and analysis method for the silicon carbide transistor.

[0057] A fourth aspect of the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores instructions, which, when executed on a computer, enable the computer to execute the above-mentioned voltage detection and analysis method for silicon carbide transistors.

[0058] In the technical solution provided by the present invention, voltage testing and current data collection are performed on silicon carbide transistors to obtain forward current data and reverse current data; forward energy conversion efficiency data and reverse energy conversion efficiency data are calculated; curve fitting and feature extraction are performed to obtain forward conversion efficiency feature sets and reverse conversion efficiency feature sets; dynamic weight analysis and matrix conversion are performed on the forward conversion efficiency feature sets and reverse conversion efficiency feature sets to obtain target conversion efficiency feature matrices; the target conversion efficiency feature matrix is ​​input into a voltage detection and analysis model set to perform voltage anomaly detection and analysis, and target voltage anomaly detection and analysis results are output; a target voltage anomaly processing strategy is created based on the target voltage anomaly detection and analysis results. The present invention adopts a multi-stage voltage detection and analysis method, combined with the detailed classification of the original current data and the accurate calculation of the energy conversion efficiency curve, to achieve high-precision monitoring of the working state of silicon carbide transistors, which helps to discover potential voltage anomaly problems in advance, thereby reducing the risk of system failure. A preset dynamic weight algorithm is introduced, so that for silicon carbide transistors under different working conditions and environments, the weight can be flexibly adjusted according to real-time conditions. The integration method of multiple voltage detection and analysis models is adopted, and the reliability of voltage anomaly detection is improved through structures such as convolutional networks and LSTM. Through intelligent optimization methods such as genetic algorithms, the optimal abnormality handling strategy is formulated according to the voltage anomaly detection results. It is adaptive and can take the most effective handling measures according to different abnormal situations, thereby improving the accuracy of voltage anomaly detection and analysis of silicon carbide transistors. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] Figure 1 Schematic diagram of an embodiment of a voltage detection and analysis method for a silicon carbide transistor in an embodiment of the present invention;

[0060] Figure 2 A flow chart of calculating forward energy conversion efficiency data and reverse energy conversion efficiency data in an embodiment of the present invention;

[0061] Figure 3 A flow chart of curve fitting and feature extraction in an embodiment of the present invention;

[0062] Figure 4 A flowchart of dynamic weight analysis and matrix conversion in an embodiment of the present invention;

[0063] Figure 5 Schematic diagram of an embodiment of a voltage detection and analysis system for a silicon carbide transistor in an embodiment of the present invention;

[0064] Figure 6 Schematic diagram of an embodiment of a voltage detection and analysis device for a silicon carbide transistor in an embodiment of the present invention. DETAILED DESCRIPTION

[0065] Embodiments of the present invention provide a voltage detection and analysis method and system for silicon carbide transistors, which are used to improve the accuracy of voltage anomaly detection and analysis of silicon carbide transistors. The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "including" or "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0066] For ease of understanding, the specific process of the embodiment of the present invention is described below. Figure 1 , an embodiment of a voltage detection and analysis method of a silicon carbide transistor in an embodiment of the present invention includes:

[0067] S101, performing voltage testing and current data collection on the silicon carbide transistor based on preset test voltage data to obtain original current data, and classifying the original current data to obtain forward current data and reverse current data;

[0068] It is understandable that the execution subject of the present invention may be a voltage detection and analysis system for silicon carbide transistors, or a terminal or a server, which is not specifically limited here. The embodiment of the present invention is described by taking a server as the execution subject as an example.

[0069] Specifically, the server prepares the silicon carbide transistor and sets the preset test voltage data. Then, the voltage test and current data collection are performed. During the voltage test, the silicon carbide transistor is voltage tested using the preset test voltage data. At the same time, the voltage signal response is converted into a digital signal by a preset analog-to-digital converter to obtain the original current data. At the same time, the corresponding original current data is collected using a preset current sensor. The original current data is classified into forward current data and reverse current data. The original current data is time-series converted to obtain a first time-series current sequence. This includes timestamp analysis and processing of the data. According to the preset sequence length, the first time-series current sequence is sequence segmented to obtain multiple second time-series current sequences. This step can help the server divide the current data into smaller time-series segments for better analysis. The metric distance calculation is performed on each second time-series current sequence to obtain multiple metric distances corresponding to each second time-series current sequence. This can be done using different metric methods, such as Euclidean distance or Manhattan distance. According to multiple metric distances and preset metric distance thresholds, classification decisions are made to obtain forward current data and reverse current data. The metric distance is compared with a preset metric distance threshold. If the metric distance is less than the threshold, the current sequence is classified as forward current data; otherwise, it is classified as reverse current data. Repeat the above process to make classification decisions for all second time-series current sequences. The server will obtain two data sets, one containing forward current data and the other containing reverse current data, for further analysis. For example, suppose there is a silicon carbide transistor, and raw current data related to different voltage values ​​have been collected. The server will analyze the data of one of the voltage values. The server uses preset test voltage data, such as 1V, to perform voltage testing on the silicon carbide transistor. At the same time, through the preset analog-to-digital converter and current sensor, the server obtains the raw current data corresponding to the 1V voltage. The server performs time-series conversion on the raw current data to obtain a first time-series current sequence. According to the preset sequence length, the first time-series current sequence is divided into multiple second time-series current sequences. For each second time-series current sequence, the distance to the preset metric distance threshold is calculated. Assuming that the distance of a second time-series current sequence is less than the threshold, the server classifies it as forward current data. Assuming that the distance of another second timing current sequence is greater than a threshold, the server classifies it as reverse current data.

[0070] S102, calculating forward energy conversion efficiency data of the silicon carbide transistor based on the test voltage data and the forward current data, and calculating reverse energy conversion efficiency data of the silicon carbide transistor based on the test voltage data and the reverse current data;

[0071] Specifically, the server constructs a forward voltage-current curve based on the test voltage data and the forward current data. This curve describes the current response of the transistor under the forward voltage condition. By performing a curve integration operation on the area under the current curve, the server obtains the forward electric energy data. This electric energy data represents the total amount of electric energy of the transistor under the forward voltage condition. The server obtains the first test time interval, which is the time period during the test under the forward voltage. Using the forward electric energy data and the first test time interval, the server calculates the forward output power. The forward output power represents the electric energy output by the transistor under the forward voltage condition. Based on the test voltage data, the server calculates the forward input power of the transistor. This is the electric energy input to the transistor under the forward voltage condition. Then, using the forward output power and the forward input power, the server calculates the corresponding forward energy conversion efficiency data. The forward energy conversion efficiency is a measure of the electric energy conversion efficiency of the transistor from input to output. The same principle also applies to the calculation of the reverse energy conversion efficiency data. For the calculation of the reverse energy conversion efficiency data, the server first constructs a reverse voltage-current curve. This curve describes the current response of the transistor under the reverse voltage condition. Then, the server performs a curve integration operation on the reverse voltage-current curve to calculate the reverse power data. This power data represents the total amount of power of the transistor under the reverse voltage condition. The server obtains a second test time interval, which is a time period during the test under the reverse voltage. Using the reverse power data and the second test time interval, the server calculates the reverse output power. The reverse output power represents the power output of the transistor under the reverse voltage condition. Based on the test voltage data, the server calculates the reverse input power of the transistor, which is the power input to the transistor under the reverse voltage condition. Then, using the reverse output power and the reverse input power, the server calculates the corresponding reverse energy conversion efficiency data. The reverse energy conversion efficiency is a measure of the efficiency of the transistor's power conversion from input to output. For example, suppose a silicon carbide transistor is tested in the forward voltage. The server collects the test voltage data and the forward current data and calculates its forward energy conversion efficiency. The server constructs a forward voltage-current curve using the test voltage data and the forward current data. The area under the curve represents the forward power data, which indicates the total amount of power of the transistor under the forward voltage condition. The server obtains a first test time interval, for example, one minute during the test at the forward voltage. Then, using the forward power data and the first test time interval, the server calculates the forward output power, for example, the forward output power is 100 watts. Based on the test voltage data, the server calculates the forward input power of the transistor, for example, the forward input power is 120 watts. Then, using the forward output power and the forward input power, the server calculates the corresponding forward energy conversion efficiency, for example, the forward energy conversion efficiency is 100 / 120, which is about 83%.

[0072] S103, performing curve fitting and feature extraction on the forward energy conversion efficiency data to obtain a forward conversion efficiency feature set, and performing curve fitting and feature extraction on the reverse energy conversion efficiency data to obtain a reverse conversion efficiency feature set;

[0073] It should be noted that for the forward energy conversion efficiency data, the server uses a predefined first curve fitting function, which is a mathematical model that can best fit the data points to generate a forward energy conversion efficiency curve. Similarly, for the reverse energy conversion efficiency data, the server uses a predefined second curve fitting function to obtain a reverse energy conversion efficiency curve. Useful features are extracted from these curves to better understand the performance and characteristics of silicon carbide transistors. For the feature extraction of the forward energy conversion efficiency curve, for example: peak feature: determine the peak value in the curve, including the peak voltage and the corresponding peak efficiency value; mean feature: calculate the area under the curve to obtain the average conversion efficiency value; slope feature: analyze the slope of the curve to determine the trend of efficiency change. For the reverse energy conversion efficiency curve, the server performs similar feature extraction, including peak value, mean value and slope, etc. Obtain a forward feature screening standard, and perform feature screening on the forward original feature set according to the forward feature screening standard to obtain a forward conversion efficiency feature set, and obtain a reverse feature screening standard, and perform feature screening on the reverse original feature set according to the reverse feature screening standard to obtain a reverse conversion efficiency feature set. For example, suppose that for the forward curve, the server observes that the peak occurs at a voltage of 10V, and the corresponding peak efficiency is 90%. The average efficiency is 85%. The slope indicates that there is a trend of efficiency improvement near 10V. For the reverse curve, the peak occurs at a voltage of -5V, and the corresponding peak efficiency is 88%. The average efficiency is 86%. The slope indicates that there is a trend of efficiency improvement near -5V. In the forward feature screening, the server requires the peak efficiency to be greater than 88% and the average efficiency to be greater than 80%, and the server obtains the features in the forward conversion efficiency feature set. In the reverse feature screening, the server requires the peak efficiency to be greater than 85% and the average efficiency to be greater than 82%, and the server obtains the features in the reverse conversion efficiency feature set.

[0074] S104, based on a preset dynamic weight algorithm, performing dynamic weight analysis and matrix conversion on the forward conversion efficiency feature set and the reverse conversion efficiency feature set to obtain a target conversion efficiency feature matrix;

[0075] Specifically, matrix conversion is performed for the forward and reverse conversion efficiency feature sets. The feature values ​​in the feature set are integrated into the matrix, each column represents a different feature, and each row represents a sample or data point. The initialized matrix weight data is generated by the preset dynamic weight algorithm. These initialized weight data will be used for subsequent weight analysis. Dynamic weight analysis is performed on the initialized matrix weight data. This includes using an algorithm or method to adjust the weight value according to the nature of the data, task requirements or other factors to better reflect the importance of the data. The dynamic weight analysis can be adjusted according to real-time data or task requirements. The dynamic weight analysis generates multiple candidate matrix weight data. These candidate weight matrices represent different weight distributions to meet task requirements or optimization goals. Fitness calculation is performed on each candidate matrix weight data. Fitness is a measure used to evaluate the performance of each candidate weight matrix for a specific task or goal. The fitness calculation can be based on the task objective function or other criteria. According to the fitness data, a target matrix weight data is selected from multiple candidate matrix weight data. Generally, the candidate weight matrix with the highest fitness is selected as the target matrix weight data because it performs best in terms of task performance. Using the selected target matrix weight data, the forward and reverse conversion efficiency feature matrices are weighted and fused to generate a target conversion efficiency feature matrix. This matrix will contain weighted eigenvalues, reflecting the importance of features adjusted according to the dynamic weight algorithm. For example, suppose there are forward and reverse conversion efficiency feature sets, which include various features such as peak efficiency, mean efficiency, slope, etc. Through the dynamic weight algorithm, the server initializes the weights and performs dynamic weight analysis. In this embodiment, the goal of the server is to maximize the voltage conversion efficiency and take into account the impact of the mean efficiency. According to the fitness calculation, the server selects a target matrix weight data in which the peak efficiency has a higher weight and the mean efficiency has a lower weight. The server applies the target matrix weights to the forward and reverse conversion efficiency feature matrices to generate a target conversion efficiency feature matrix. This matrix will reflect the target weight distribution of the server, thereby helping to improve the voltage conversion efficiency of silicon carbide transistors.

[0076] S105, inputting the target conversion efficiency characteristic matrix into a preset voltage detection and analysis model set, performing voltage anomaly detection and analysis through multiple voltage detection and analysis models in the voltage detection and analysis model set, and outputting target voltage anomaly detection and analysis results;

[0077] Specifically, the target conversion efficiency feature matrix is ​​input into a preset voltage detection analysis model set, which includes multiple voltage detection analysis models. Each voltage detection analysis model includes a convolutional network. These convolutional networks will perform convolution operations on the target conversion efficiency feature matrix respectively to extract high-dimensional features. Convolution operations help capture spatial information in input data. Through the first fully connected layer, the high-dimensional feature matrix obtained after the convolution operation is feature integrated. This step helps to integrate and reduce the features extracted by the convolution network for subsequent processing. Each voltage detection analysis model includes a long short-term memory network (LSTM) for extracting hidden features from the target high-dimensional feature matrix. LSTM is a neural network structure suitable for processing time series data, which can capture the temporal dependency between features. Through the second fully connected layer, the extracted hidden features are subjected to voltage anomaly detection analysis. This step uses a neural network to predict and analyze target voltage anomalies. Each voltage detection analysis model will generate an initial voltage anomaly detection analysis result. The initial voltage anomaly detection analysis result of each voltage detection analysis model is fused. Result fusion can use different strategies, such as voting mechanism or weighted average, to integrate the prediction results of each model and generate the final target voltage anomaly detection analysis result. For example, assume that the server inputs the voltage conversion efficiency feature matrix into the preset voltage detection analysis model set. This model set includes 3 voltage detection analysis models: model A, model B, and model C. The convolution network of model A extracts high-dimensional features, the first fully connected layer performs feature integration, the LSTM network extracts hidden features, and the second fully connected layer performs voltage anomaly detection analysis. Models B and C also perform similar operations. Each model generates an initial voltage anomaly detection analysis result. Then, through result fusion strategies, such as weighted average, these results are combined to generate the final target voltage anomaly detection analysis result. This multi-model voltage anomaly detection analysis method can improve accuracy and robustness, ensure more accurate detection of voltage anomalies, and help improve the performance and reliability of silicon carbide transistors.

[0078] S106. Create a target voltage anomaly processing strategy for the silicon carbide transistor based on the target voltage anomaly detection and analysis results.

[0079] Specifically, based on the target voltage anomaly detection and analysis results, an initial voltage anomaly handling strategy group is created. This group includes multiple first voltage anomaly handling strategies, each of which represents a different processing method or decision-making method. The evaluation index data of each first voltage anomaly handling strategy is calculated respectively through the preset objective function. These evaluation indicators can be indicators on performance, cost, efficiency, etc., which are used to evaluate the pros and cons of the strategy. The evaluation index data is compared with the first evaluation index threshold and the second evaluation index threshold, wherein the first evaluation index threshold is less than the second evaluation index threshold. According to the comparison result, the strategy is divided into different strategy groups: if the evaluation index data is less than the first evaluation index threshold, the strategy is divided into the first voltage anomaly handling strategy group; if the first evaluation index threshold is less than the evaluation index data is less than the second evaluation index threshold, the strategy is divided into the second voltage anomaly handling strategy group; if the evaluation index data is greater than the second evaluation index threshold, the strategy is divided into the third voltage anomaly handling strategy group. The first and second voltage anomaly handling strategy groups are reproduced, crossed and mutated to generate multiple second voltage anomaly handling strategies. These operations can draw on the ideas of optimization methods such as genetic algorithms to increase the diversity and optimization potential of strategies. An optimization analysis is performed on multiple second voltage anomaly handling strategies to find a target voltage anomaly handling strategy for silicon carbide transistors. This analysis process may include optimization methods such as evolutionary algorithms and genetic algorithms, aiming to find the best strategy combination under evaluation indicators and constraints. For example, assume that the server creates an initial voltage anomaly handling strategy group, including three different strategies: strategy A, strategy B, and strategy C. Through the objective function, the server calculates the evaluation indicator data for each strategy. These indicators include voltage anomaly detection accuracy, cost, response time, etc. Then, the server compares the evaluation indicator data with the first evaluation indicator threshold and the second evaluation indicator threshold. If the evaluation indicator data of a certain strategy is less than the first evaluation indicator threshold, then the strategy is divided into the first voltage anomaly handling strategy group. If the evaluation indicator data is between the first and second evaluation indicator thresholds, then the strategy is divided into the second voltage anomaly handling strategy group. If the evaluation indicator data is greater than the second evaluation indicator threshold, then the strategy is divided into the third voltage anomaly handling strategy group. The server performs reproduction, crossover, and mutation operations on the first and second voltage anomaly handling strategy groups to generate multiple second voltage anomaly handling strategies. The server uses optimization methods to perform optimization analysis on these strategies to find the best voltage anomaly handling strategy for silicon carbide transistors, which performs well under multiple evaluation indicators while meeting the predetermined constraints.

[0080] In the embodiment of the present invention, voltage test and current data collection are performed on silicon carbide transistors to obtain forward current data and reverse current data; forward energy conversion efficiency data and reverse energy conversion efficiency data are calculated; curve fitting and feature extraction are performed to obtain forward conversion efficiency feature set and reverse conversion efficiency feature set; dynamic weight analysis and matrix conversion are performed on the forward conversion efficiency feature set and reverse conversion efficiency feature set to obtain a target conversion efficiency feature matrix; the target conversion efficiency feature matrix is ​​input into a voltage detection analysis model set to perform voltage anomaly detection analysis, and a target voltage anomaly detection analysis result is output; a target voltage anomaly processing strategy is created based on the target voltage anomaly detection analysis result. The present invention adopts a multi-stage voltage detection analysis method, combined with a detailed classification of the original current data and an accurate calculation of the energy conversion efficiency curve, to achieve high-precision monitoring of the working state of silicon carbide transistors, which helps to discover potential voltage anomaly problems in advance, thereby reducing the risk of system failure. A preset dynamic weight algorithm is introduced, so that for silicon carbide transistors under different working conditions and environments, the weight can be flexibly adjusted according to the real-time situation. The integration method of multiple voltage detection analysis models is adopted, and the reliability of voltage anomaly detection is improved through structures such as convolutional networks and LSTM. Through intelligent optimization methods such as genetic algorithms, the optimal abnormality handling strategy is formulated according to the voltage anomaly detection results. It is adaptive and can take the most effective handling measures according to different abnormal situations, thereby improving the accuracy of voltage anomaly detection and analysis of silicon carbide transistors.

[0081] In a specific embodiment, the process of executing step S101 may specifically include the following steps:

[0082] (1) Performing a voltage test on the silicon carbide transistor based on preset test voltage data, and responding to the voltage signal of the silicon carbide transistor through a preset analog-to-digital converter, and at the same time, collecting corresponding raw current data through a preset current sensor;

[0083] (2) performing time series conversion on the original current data to obtain a first time series current sequence, and performing sequence segmentation on the first time series current sequence according to a preset sequence length to obtain a plurality of second time series current sequences;

[0084] (3) performing metric distance calculations on the plurality of second time series current sequences respectively to obtain a plurality of metric distances corresponding to each second time series current sequence;

[0085] (4) According to the multiple metric distances and the preset metric distance threshold, a classification decision is made on the multiple second time series current sequences to obtain forward current data and reverse current data.

[0086] Specifically, the server performs a voltage test on the silicon carbide transistor using preset test voltage data. This test process can be implemented by connecting to an electrode or pin of the transistor. At the same time, a preset analog-to-digital converter (ADC) is used to respond to and convert the voltage signal of the silicon carbide transistor. The ADC converts the analog voltage signal into a digital form for calculation and processing. In addition, the corresponding raw current data is collected by a preset current sensor. The current sensor can be connected to the current path of the transistor to measure the current value in real time. In this way, the server obtains the raw current data corresponding to the test voltage data. The raw current data is time-series converted to a first time-series current sequence. The time-series conversion may include sampling and discretization of the current signal for subsequent processing. After obtaining the first time-series current sequence, the first time-series current sequence is sequence-segmented according to a preset sequence length to obtain multiple second time-series current sequences. For each second time-series current sequence, a metric distance calculation is performed. Metric distance is a method for measuring the similarity or difference between sequences. Different metric methods, such as Euclidean distance, Manhattan distance, dynamic time warping (DTW), etc., can be used to calculate the distance between the second time series current sequences. Multiple metric distances are compared with a preset metric distance threshold to make a classification decision. According to the setting of the threshold, the second time series current sequence can be divided into two categories: forward current data and reverse current data. If the distance of a second time series current sequence is less than the threshold, it is classified as forward current data; conversely, if the distance is greater than the threshold, it is classified as reverse current data.

[0087] In a specific embodiment, if Figure 2 As shown, the process of executing step S102 may specifically include the following steps:

[0088] S201, constructing a forward voltage-current curve of the test voltage data and the forward current data, and performing a curve integration operation on the forward voltage-current curve to obtain forward electric energy data;

[0089] S202, obtaining a first test time interval, and calculating a corresponding forward output power according to the forward power data and the first test time interval;

[0090] S203, calculating the forward input power of the silicon carbide transistor based on the test voltage data, and calculating the corresponding forward energy conversion efficiency data according to the forward output power and the forward input power;

[0091] S204, constructing a reverse voltage-current curve of the test voltage data and the reverse current data, and performing a curve integration operation on the reverse voltage-current curve to obtain reverse electric energy data;

[0092] S205, obtaining a second test time interval, and calculating a corresponding reverse output power according to the reverse power data and the second test time interval;

[0093] S206. Calculate the reverse input power of the silicon carbide transistor based on the test voltage data, and calculate the corresponding reverse energy conversion efficiency data according to the reverse output power and the reverse input power.

[0094] Specifically, the server combines the test voltage data and the forward current data to construct a forward voltage-current curve. This curve reflects the voltage and current relationship of the transistor in the forward working state. Then, the forward voltage-current curve is subjected to a curve integration operation to obtain the forward power data. This process can be implemented using a numerical integration method. For example, the integral of discrete data can be estimated using numerical integration techniques such as the trapezoidal rule or the Simpson's rule. A first test time interval is obtained, which is the time interval between the voltage and current data. Then, the forward power data and the first test time interval are used to calculate the corresponding forward output power. Based on the test voltage data, the forward input power of the silicon carbide transistor is calculated. Then, the corresponding forward energy conversion efficiency data is calculated using the forward output power and the forward input power. Similarly, a reverse voltage-current curve of the test voltage data and the reverse current data is constructed, reflecting the voltage and current relationship of the transistor in the reverse working state. Then, a curve integration operation is performed on the reverse voltage-current curve to obtain the reverse power data. A second test time interval is obtained, which is similar to the forward case, and is the time interval between the voltage and current data. Then, the reverse power data and the second test time interval are used to calculate the corresponding reverse output power. Based on the test voltage data, the reverse input power of the silicon carbide transistor is calculated. Then, the reverse output power and the reverse input power are used to calculate the corresponding reverse energy conversion efficiency data.

[0095] In a specific embodiment, if Figure 3 As shown, the process of executing step S103 may specifically include the following steps:

[0096] S301, performing curve fitting on the forward energy conversion efficiency data by using a preset first curve fitting function to obtain a forward energy conversion efficiency curve, and performing curve fitting on the reverse energy conversion efficiency data by using a preset second curve fitting function to obtain a reverse energy conversion efficiency curve;

[0097] S302, performing feature extraction on the forward energy conversion efficiency curve to obtain a forward original feature set, and performing feature extraction on the reverse energy conversion efficiency curve to obtain a reverse original feature set;

[0098] S303, obtaining a forward feature screening standard, and performing feature screening on the forward original feature set according to the forward feature screening standard to obtain a forward conversion efficiency feature set, and obtaining a reverse feature screening standard, and performing feature screening on the reverse original feature set according to the reverse feature screening standard to obtain a reverse conversion efficiency feature set.

[0099] Specifically, the server uses a preset first curve fitting function to curve fit the forward energy conversion efficiency data. This fitting function is usually a mathematical model that can best fit the shape of the forward energy conversion efficiency curve. Similarly, the server uses a preset second curve fitting function to curve fit the reverse energy conversion efficiency data. These curve fitting functions can be polynomials, exponential functions, or other appropriate function forms. The server extracts features from the forward energy conversion efficiency curve and the reverse energy conversion efficiency curve to obtain an original feature set. Feature extraction may include the following operations: Maximum value (Max): extract the maximum value of the curve, indicating the highest energy conversion efficiency; Minimum value (Min): extract the minimum value of the curve, indicating the lowest energy conversion efficiency; Mean value (Mean): calculate the average value of the curve, reflecting the overall energy conversion efficiency level; Standard deviation (Standard Deviation): calculate the standard deviation of the curve, reflecting the degree of change in energy conversion efficiency; Slope (Slope): calculate the slope of the curve at different points, reflecting the rate of change of energy conversion efficiency. These feature extraction operations will generate a forward original feature set and a reverse original feature set. After obtaining the original feature set, the server obtains forward feature screening criteria and reverse feature screening criteria, which are usually based on domain knowledge or problem requirements. Then, according to these standards, the original feature set is feature screened to obtain a forward conversion efficiency feature set and a reverse conversion efficiency feature set. For example, if the server's goal is to retain only energy conversion efficiency features above a certain threshold, the server will exclude features below the threshold in the forward and reverse original feature sets, thereby obtaining a screened feature set. For example, assuming that the server obtains the following curve when performing a forward energy conversion efficiency test: forward energy conversion efficiency curve: Eff forward = [0.6, 0.65, 0.7, 0.72, 0.68, 0.75, 0.78]. The server uses a preset first curve fitting function (assuming it is a quadratic polynomial) to curve fit the forward energy conversion efficiency curve to obtain a forward energy conversion efficiency curve. The server performs feature extraction, calculates the maximum value, minimum value, average value, standard deviation and other features of the curve, and obtains a forward original feature set. If the server's feature screening standard is to retain features with an average value greater than 0.7, then the server will filter out features with an average value less than 0.7, thereby obtaining a forward conversion efficiency feature set. The same steps can be applied to the reverse energy conversion efficiency curve to obtain a reverse conversion efficiency feature set. These feature sets can be used for subsequent analysis and processing.

[0100] In a specific embodiment, if Figure 4 As shown, the process of executing step S104 may specifically include the following steps:

[0101] S401, performing matrix conversion on the forward conversion efficiency feature set and the reverse conversion efficiency feature set to obtain a forward conversion efficiency feature matrix and a reverse conversion efficiency feature matrix;

[0102] S402, performing weight initialization using a preset dynamic weight algorithm to generate initialization matrix weight data;

[0103] S403, performing dynamic weight analysis on the initialized matrix weight data to generate a plurality of candidate matrix weight data;

[0104] S404, performing fitness calculation on a plurality of candidate matrix weight data to obtain fitness data of each candidate matrix weight data;

[0105] S405, selecting corresponding target matrix weight data from a plurality of candidate matrix weight data according to the fitness data;

[0106] S406: Perform weighted fusion on the forward conversion efficiency feature matrix and the reverse conversion efficiency feature matrix according to the target matrix weight data to generate a target conversion efficiency feature matrix.

[0107] Specifically, the server converts the forward conversion efficiency feature set and the reverse conversion efficiency feature set into corresponding feature matrices. This can be done by arranging the features in the feature set in columns. The server uses a preset dynamic weight algorithm to initialize the weights and generate initialization matrix weight data. These weights are usually a matrix used to weight the fusion feature matrix. The weight initialization can be based on domain knowledge or random initialization, depending on the algorithm and requirements. Dynamic weight analysis is performed on the initialization matrix weight data to generate multiple candidate matrix weight data. This process usually involves adjusting the weights to adapt to the target, which is performed according to the specific problem and objective function. The goal of dynamic weight analysis is to find the optimal weight combination to best reflect the relationship and importance between features. For each candidate matrix weight data, its fitness data is calculated. Fitness is usually an evaluation indicator used to measure the performance of the weight combination. The way to calculate fitness can vary depending on the specific problem, for example, it can be the value of the objective function or other performance indicators. According to the fitness data, the corresponding target matrix weight data is selected from multiple candidate matrix weight data. Generally, weight combinations with higher fitness are selected as target matrix weight data because they can better reflect the relationship and importance between features. The target matrix weight data is used to perform weighted fusion of the forward conversion efficiency feature matrix and the reverse conversion efficiency feature matrix to generate the target conversion efficiency feature matrix. This process involves weighted summing of the feature matrix according to the target matrix weight to generate the final feature matrix.

[0108] In a specific embodiment, the process of executing step S105 may specifically include the following steps:

[0109] (1) inputting the target conversion efficiency feature matrix into a preset voltage detection analysis model set, wherein the voltage detection analysis model set includes a plurality of voltage detection analysis models, each of which includes a convolutional network, a first fully connected layer, a long short-term memory network, and a second fully connected layer;

[0110] (2) Through the convolutional networks in multiple voltage detection analysis models, convolution operations are performed on the target conversion efficiency feature matrix to obtain an initial high-dimensional feature matrix;

[0111] (3) Through the first fully connected layer in multiple voltage detection analysis models, the initial high-dimensional feature matrix is ​​integrated to obtain the target high-dimensional feature matrix;

[0112] (4) Through the long short-term memory networks in multiple voltage detection analysis models, the hidden features of the target high-dimensional feature matrix are extracted respectively to obtain the target hidden feature matrix;

[0113] (5) Through the second fully connected layer in multiple voltage detection and analysis models, voltage anomaly detection and analysis are performed on the target hidden feature matrix respectively to obtain the initial voltage anomaly detection and analysis result of each voltage detection and analysis model;

[0114] (6) The initial voltage anomaly detection and analysis results of each voltage detection and analysis model are fused and the target voltage anomaly detection and analysis results are output.

[0115] Specifically, a voltage detection analysis model set is prepared, which includes multiple voltage detection analysis models. Each model should contain a convolutional network, a first fully connected layer, a long short-term memory network (LSTM), and a second fully connected layer to perform feature extraction and voltage anomaly detection at different levels. The target conversion efficiency feature matrix is ​​input into each model in the voltage detection analysis model set. For each model, the target feature matrix will be processed. The target conversion efficiency feature matrix is ​​convolved through the convolutional network in the voltage detection analysis model. The convolution operation helps to capture the spatial features in the input data and extract the initial high-dimensional feature matrix. The initial high-dimensional feature matrix is ​​feature integrated through the first fully connected layer in the model. This step helps to reduce the dimension and complexity of the features and convert them into more informative high-level features. The target high-dimensional feature matrix is ​​hidden feature extracted through the long short-term memory network (LSTM) in the model. The LSTM network can effectively capture the temporal dependency in the sequence data, thereby generating the target hidden feature matrix. The target hidden feature matrix is ​​subjected to voltage anomaly detection analysis through the second fully connected layer in the model. This step is intended to identify whether there is a voltage anomaly and generate the initial voltage anomaly detection analysis result of each voltage detection analysis model. Perform result fusion on the initial voltage anomaly detection analysis results generated by each voltage detection analysis model. This can be simple voting fusion, weighted fusion or other methods to combine the outputs of each model.

[0116] In a specific embodiment, the process of executing step S106 may specifically include the following steps:

[0117] (1) creating an initial voltage anomaly processing strategy group for the silicon carbide transistor based on the target voltage anomaly detection and analysis result, wherein the initial voltage anomaly processing strategy group includes a plurality of first voltage anomaly processing strategies;

[0118] (2) calculating the evaluation index data of each first voltage abnormality processing strategy respectively through a preset objective function;

[0119] (3) comparing the evaluation index data with a first evaluation index threshold and a second evaluation index threshold, wherein the first evaluation index threshold is less than the second evaluation index threshold;

[0120] (4) If the evaluation index data is less than the first evaluation index threshold, the corresponding first voltage abnormality processing strategy is classified into the first voltage abnormality processing strategy group; if the first evaluation index threshold is less than the evaluation index data and less than the second evaluation index threshold, the corresponding first voltage abnormality processing strategy is classified into the second voltage abnormality processing strategy group; if the second evaluation index threshold is less than the evaluation index data, the corresponding first voltage abnormality processing strategy is classified into the third voltage abnormality processing strategy group;

[0121] (5) performing multiplication, crossover and mutation on the first voltage anomaly processing strategy group and the second voltage anomaly processing strategy group, and performing crossover and mutation on the third voltage anomaly processing strategy group to obtain a plurality of second voltage anomaly processing strategies;

[0122] (6) Optimizing and analyzing the plurality of second voltage anomaly processing strategies to obtain a target voltage anomaly processing strategy for the silicon carbide transistor.

[0123] Specifically, based on the target voltage anomaly detection and analysis results, an initial voltage anomaly handling strategy group for silicon carbide transistors is created. The server formulates a set of different voltage anomaly handling strategies, each of which has some parameters or configuration items for handling voltage anomalies. The evaluation index data of each first voltage anomaly handling strategy is calculated respectively through the preset objective function. These indicators may include voltage stability, efficiency loss, cost, etc., which are determined according to the specific situation of the problem. Two evaluation index thresholds are set, the first evaluation index threshold and the second evaluation index threshold. Ensure that the first evaluation index threshold is less than the second evaluation index threshold so that classification decisions can be made in subsequent steps. The evaluation index data of each first voltage anomaly handling strategy is compared with the first and second evaluation index thresholds. According to the comparison results, the strategy is divided into different strategy groups: if the evaluation index data is less than the first evaluation index threshold, the strategy is divided into the first voltage anomaly handling strategy group; if the first evaluation index threshold is less than the evaluation index data is less than the second evaluation index threshold, the strategy is divided into the second voltage anomaly handling strategy group; if the evaluation index data is greater than the second evaluation index threshold, the strategy is divided into the third voltage anomaly handling strategy group. The first voltage anomaly processing strategy group and the second voltage anomaly processing strategy group are subjected to reproduction, crossover and mutation operations to generate multiple second voltage anomaly processing strategies. These operations can be performed using a genetic algorithm or other optimization methods. Multiple second voltage anomaly processing strategies are subjected to optimization analysis to determine which strategy is most suitable for handling the current voltage anomaly situation. This can be done by evaluating the performance indicators of each strategy. For example, assume that the server creates three different processing strategies (strategy A, strategy B, and strategy C). By calculating their performance indicators, the server obtains the following results: strategy A: evaluation indicator data = 0.9; strategy B: evaluation indicator data = 1.2; strategy C: evaluation indicator data = 2.0. The server sets the first evaluation indicator threshold to 1.0 and the second evaluation indicator threshold to 1.5. According to the classification decision: the evaluation indicator data of strategy A is less than the first evaluation indicator threshold, so it belongs to the first voltage anomaly processing strategy group; the evaluation indicator data of strategy B is between the first and second evaluation indicator thresholds, so it belongs to the second voltage anomaly processing strategy group; the evaluation indicator data of strategy C is greater than the second evaluation indicator threshold, so it belongs to the third voltage anomaly processing strategy group. Then, the first voltage anomaly processing strategy group and the second voltage anomaly processing strategy group are multiplied, crossed and mutated to generate multiple second voltage anomaly processing strategies. Through optimization analysis, the most suitable strategy for the current situation is selected to formulate a target voltage anomaly processing strategy for silicon carbide transistors.

[0124] The voltage detection and analysis method of the silicon carbide transistor in the embodiment of the present invention is described above. The voltage detection and analysis system of the silicon carbide transistor in the embodiment of the present invention is described below. Figure 5 , an embodiment of a voltage detection and analysis system for a silicon carbide transistor in an embodiment of the present invention includes:

[0125] The test module 501 is used to perform voltage testing and current data collection on the silicon carbide transistor based on preset test voltage data to obtain raw current data, and to classify the raw current data to obtain forward current data and reverse current data;

[0126] A calculation module 502, configured to calculate forward energy conversion efficiency data of the silicon carbide transistor based on the test voltage data and the forward current data, and to calculate reverse energy conversion efficiency data of the silicon carbide transistor based on the test voltage data and the reverse current data;

[0127] An extraction module 503 is used to perform curve fitting and feature extraction on the forward energy conversion efficiency data to obtain a forward conversion efficiency feature set, and to perform curve fitting and feature extraction on the reverse energy conversion efficiency data to obtain a reverse conversion efficiency feature set;

[0128] The conversion module 504 is used to perform dynamic weight analysis and matrix conversion on the forward conversion efficiency feature set and the reverse conversion efficiency feature set based on a preset dynamic weight algorithm to obtain a target conversion efficiency feature matrix;

[0129] An analysis module 505 is used to input the target conversion efficiency characteristic matrix into a preset voltage detection analysis model set, perform voltage anomaly detection analysis through multiple voltage detection analysis models in the voltage detection analysis model set, and output a target voltage anomaly detection analysis result;

[0130] The creation module 506 is used to create a target voltage anomaly processing strategy for the silicon carbide transistor based on the target voltage anomaly detection and analysis result.

[0131] Through the cooperation of the above-mentioned components, the voltage test and current data collection of silicon carbide transistors are carried out to obtain forward current data and reverse current data; forward energy conversion efficiency data and reverse energy conversion efficiency data are calculated; curve fitting and feature extraction are carried out to obtain forward conversion efficiency feature set and reverse conversion efficiency feature set; dynamic weight analysis and matrix conversion are carried out on the forward conversion efficiency feature set and reverse conversion efficiency feature set to obtain the target conversion efficiency feature matrix; the target conversion efficiency feature matrix is ​​input into the voltage detection analysis model set for voltage anomaly detection analysis, and the target voltage anomaly detection analysis result is output; the target voltage anomaly processing strategy is created based on the target voltage anomaly detection analysis result. The present invention adopts a multi-stage voltage detection analysis method, combined with the detailed classification of the original current data and the accurate calculation of the energy conversion efficiency curve, to achieve high-precision monitoring of the working state of silicon carbide transistors, which helps to discover potential voltage anomaly problems in advance, thereby reducing the risk of system failure. The introduction of a preset dynamic weight algorithm allows the weight of silicon carbide transistors under different working conditions and environments to be flexibly adjusted according to real-time conditions. The integration method of multiple voltage detection analysis models is adopted, and the reliability of voltage anomaly detection is improved through structures such as convolutional networks and LSTM. Through intelligent optimization methods such as genetic algorithms, the optimal abnormality handling strategy is formulated according to the voltage anomaly detection results. It is adaptive and can take the most effective handling measures according to different abnormal situations, thereby improving the accuracy of voltage anomaly detection and analysis of silicon carbide transistors.

[0132] above Figure 5 The voltage detection and analysis system of the silicon carbide transistor in the embodiment of the present invention is described in detail from the perspective of modular functional entities. The voltage detection and analysis device of the silicon carbide transistor in the embodiment of the present invention is described in detail from the perspective of hardware processing.

[0133] Figure 6It is a structural schematic diagram of a voltage detection and analysis device for a silicon carbide transistor provided by an embodiment of the present invention. The voltage detection and analysis device 600 for the silicon carbide transistor may have relatively large differences due to different configurations or performances, and may include one or more processors (central processing units, CPU) 610 (for example, one or more processors) and a memory 620, and one or more storage media 630 (for example, one or more mass storage devices) storing application programs 633 or data 632. Among them, the memory 620 and the storage medium 630 can be short-term storage or permanent storage. The program stored in the storage medium 630 may include one or more modules (not shown in the figure), and each module may include a series of instruction operations in the voltage detection and analysis device 600 for the silicon carbide transistor. Furthermore, the processor 610 can be configured to communicate with the storage medium 630 to execute a series of instruction operations in the storage medium 630 on the voltage detection and analysis device 600 for the silicon carbide transistor.

[0134] The voltage detection and analysis device 600 for silicon carbide transistors may also include one or more power supplies 640, one or more wired or wireless network interfaces 650, one or more input and output interfaces 660, and / or one or more operating systems 631, such as Windows Server, Mac OS X, Unix, Linux, FreeBSD, etc. It will be appreciated by those skilled in the art that Figure 6 The structure of the voltage detection and analysis device for the silicon carbide transistor shown does not constitute a limitation on the voltage detection and analysis device for the silicon carbide transistor, and may include more or less components than shown in the figure, or combine certain components, or arrange the components differently.

[0135] The present invention also provides a voltage detection and analysis device for a silicon carbide transistor, the voltage detection and analysis device for the silicon carbide transistor comprising a memory and a processor, the memory storing computer-readable instructions, and when the computer-readable instructions are executed by the processor, the processor executes the steps of the voltage detection and analysis method for the silicon carbide transistor in the above-mentioned embodiments.

[0136] The present invention also provides a computer-readable storage medium, which may be a non-volatile computer-readable storage medium or a volatile computer-readable storage medium. Instructions are stored in the computer-readable storage medium. When the instructions are executed on a computer, the computer executes the steps of the voltage detection and analysis method of the silicon carbide transistor.

[0137] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0138] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention is essentially or the part that contributes to the prior art or the whole or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions to enable a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk and other media that can store program code.

[0139] As described above, the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features thereof may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A voltage detection and analysis method for a silicon carbide transistor, characterized in that: The voltage detection and analysis method of the silicon carbide transistor comprises: Based on preset test voltage data, voltage testing and current data collection are performed on silicon carbide transistors to obtain original current data, and data classification is performed on the original current data to obtain forward current data and reverse current data; specifically including: based on the preset test voltage data, voltage testing is performed on silicon carbide transistors, and voltage signal response is performed on the silicon carbide transistors through a preset analog-to-digital converter, and at the same time, corresponding original current data is collected through a preset current sensor; time-series conversion is performed on the original current data to obtain a first time-series current sequence, and the first time-series current sequence is sequence-segmented according to a preset sequence length to obtain multiple second time-series current sequences; metric distance calculation is performed on the multiple second time-series current sequences respectively to obtain multiple metric distances corresponding to each second time-series current sequence; classification decisions are made on the multiple second time-series current sequences according to the multiple metric distances and a preset metric distance threshold to obtain forward current data and reverse current data; Calculating the forward energy conversion efficiency data of the silicon carbide transistor based on the test voltage data and the forward current data, and calculating the reverse energy conversion efficiency data of the silicon carbide transistor based on the test voltage data and the reverse current data; specifically including: constructing a forward voltage-current curve of the test voltage data and the forward current data, and performing a curve integration operation on the forward voltage-current curve to obtain forward electric energy data; obtaining a first test time interval, and calculating the corresponding forward output power according to the forward electric energy data and the first test time interval; calculating the forward input power of the silicon carbide transistor based on the test voltage data, and calculating the corresponding forward energy conversion efficiency data according to the forward output power and the forward input power; constructing a reverse voltage-current curve of the test voltage data and the reverse current data, and performing a curve integration operation on the reverse voltage-current curve to obtain reverse electric energy data; obtaining a second test time interval, and calculating the corresponding reverse output power according to the reverse electric energy data and the second test time interval; calculating the reverse input power of the silicon carbide transistor based on the test voltage data, and calculating the corresponding reverse energy conversion efficiency data according to the reverse output power and the reverse input power; Performing curve fitting and feature extraction on the forward energy conversion efficiency data to obtain a forward conversion efficiency feature set, and performing curve fitting and feature extraction on the reverse energy conversion efficiency data to obtain a reverse conversion efficiency feature set; Based on a preset dynamic weight algorithm, dynamic weight analysis and matrix conversion are performed on the forward conversion efficiency feature set and the reverse conversion efficiency feature set to obtain a target conversion efficiency feature matrix; Inputting the target conversion efficiency characteristic matrix into a preset voltage detection analysis model set, performing voltage anomaly detection analysis through multiple voltage detection analysis models in the voltage detection analysis model set, and outputting a target voltage anomaly detection analysis result; A target voltage anomaly processing strategy for the silicon carbide transistor is created based on the target voltage anomaly detection and analysis result.

2. The voltage detection and analysis method of the silicon carbide transistor according to claim 1, characterized in that: The forward energy conversion efficiency data is subjected to curve fitting and feature extraction to obtain a forward conversion efficiency feature set, and the reverse energy conversion efficiency data is subjected to curve fitting and feature extraction to obtain a reverse conversion efficiency feature set, including: Performing curve fitting on the forward energy conversion efficiency data by using a preset first curve fitting function to obtain a forward energy conversion efficiency curve, and performing curve fitting on the reverse energy conversion efficiency data by using a preset second curve fitting function to obtain a reverse energy conversion efficiency curve; Performing feature extraction on the forward energy conversion efficiency curve to obtain a forward original feature set, and performing feature extraction on the reverse energy conversion efficiency curve to obtain a reverse original feature set; A forward feature screening standard is obtained, and the forward original feature set is feature screened according to the forward feature screening standard to obtain a forward conversion efficiency feature set, and a reverse feature screening standard is obtained, and the reverse original feature set is feature screened according to the reverse feature screening standard to obtain a reverse conversion efficiency feature set.

3. The voltage detection and analysis method of a silicon carbide transistor according to claim 1, characterized in that: The preset dynamic weight algorithm is used to perform dynamic weight analysis and matrix conversion on the forward conversion efficiency feature set and the reverse conversion efficiency feature set to obtain a target conversion efficiency feature matrix, including: Performing matrix conversion on the forward conversion efficiency feature set and the reverse conversion efficiency feature set to obtain a forward conversion efficiency feature matrix and a reverse conversion efficiency feature matrix; Initialize weights using a preset dynamic weight algorithm to generate initialization matrix weight data; Performing dynamic weight analysis on the initialized matrix weight data to generate a plurality of candidate matrix weight data; Performing fitness calculation on the plurality of candidate matrix weight data to obtain fitness data of each candidate matrix weight data; Selecting corresponding target matrix weight data from the plurality of candidate matrix weight data according to the fitness data; According to the target matrix weight data, the forward conversion efficiency characteristic matrix and the reverse conversion efficiency characteristic matrix are weighted and fused to generate a target conversion efficiency characteristic matrix.

4. The voltage detection and analysis method of a silicon carbide transistor according to claim 1, characterized in that: The target conversion efficiency characteristic matrix is ​​input into a preset voltage detection analysis model set, a voltage anomaly detection analysis is performed through a plurality of voltage detection analysis models in the voltage detection analysis model set, and a target voltage anomaly detection analysis result is output, including: Inputting the target conversion efficiency characteristic matrix into a preset voltage detection analysis model set, wherein the voltage detection analysis model set includes a plurality of voltage detection analysis models, each of which includes a convolutional network, a first fully connected layer, a long short-term memory network, and a second fully connected layer; Through the convolution networks in the multiple voltage detection and analysis models, convolution operations are performed on the target conversion efficiency feature matrix respectively to obtain an initial high-dimensional feature matrix; Through the first fully connected layer in the multiple voltage detection and analysis models, feature integration is performed on the initial high-dimensional feature matrix to obtain a target high-dimensional feature matrix; By using the long short-term memory networks in the multiple voltage detection and analysis models, respectively extracting hidden features from the target high-dimensional feature matrix to obtain a target hidden feature matrix; Through the second fully connected layers in the multiple voltage detection and analysis models, respectively perform voltage anomaly detection and analysis on the target hidden feature matrix to obtain an initial voltage anomaly detection and analysis result of each voltage detection and analysis model; The initial voltage anomaly detection and analysis results of each voltage detection and analysis model are fused to output the target voltage anomaly detection and analysis results.

5. The voltage detection and analysis method of a silicon carbide transistor according to claim 1, characterized in that: The creating a target voltage anomaly processing strategy for the silicon carbide transistor based on the target voltage anomaly detection and analysis result includes: Creating an initial voltage anomaly processing strategy group for the silicon carbide transistor based on the target voltage anomaly detection and analysis result, wherein the initial voltage anomaly processing strategy group includes a plurality of first voltage anomaly processing strategies; Calculate the evaluation index data of each first voltage abnormality processing strategy respectively through a preset objective function; Comparing the evaluation index data with a first evaluation index threshold and a second evaluation index threshold, wherein the first evaluation index threshold is less than the second evaluation index threshold; If the evaluation index data is less than the first evaluation index threshold, the corresponding first voltage abnormality processing strategy is divided into the first voltage abnormality processing strategy group; if the first evaluation index threshold is less than the evaluation index data and less than the second evaluation index threshold, the corresponding first voltage abnormality processing strategy is divided into the second voltage abnormality processing strategy group; if the second evaluation index threshold is less than the evaluation index data, the corresponding first voltage abnormality processing strategy is divided into the third voltage abnormality processing strategy group; The first voltage anomaly processing strategy group and the second voltage anomaly processing strategy group are multiplied, crossed and mutated, and the third voltage anomaly processing strategy group is crossed and mutated to obtain a plurality of second voltage anomaly processing strategies; The plurality of second voltage abnormality processing strategies are optimized and analyzed to obtain a target voltage abnormality processing strategy for the silicon carbide transistor.

6. A voltage detection and analysis system for a silicon carbide transistor, characterized in that: A voltage detection and analysis method for a silicon carbide transistor according to any one of claims 1 to 5, wherein the voltage detection and analysis system for the silicon carbide transistor comprises: A test module, used to perform voltage testing and current data collection on silicon carbide transistors based on preset test voltage data to obtain original current data, and to classify the original current data to obtain forward current data and reverse current data; specifically comprising: performing voltage testing on silicon carbide transistors based on preset test voltage data, and performing voltage signal response on the silicon carbide transistors through a preset analog-to-digital converter, and at the same time, collecting corresponding original current data through a preset current sensor; performing time series conversion on the original current data to obtain a first time series current sequence, and performing sequence segmentation on the first time series current sequence according to a preset sequence length to obtain multiple second time series current sequences; performing metric distance calculation on the multiple second time series current sequences respectively to obtain multiple metric distances corresponding to each second time series current sequence; performing classification decisions on the multiple second time series current sequences according to the multiple metric distances and a preset metric distance threshold to obtain forward current data and reverse current data; A calculation module, for calculating the forward energy conversion efficiency data of the silicon carbide transistor based on the test voltage data and the forward current data, and calculating the reverse energy conversion efficiency data of the silicon carbide transistor based on the test voltage data and the reverse current data; specifically comprising: constructing a forward voltage-current curve of the test voltage data and the forward current data, and performing a curve integration operation on the forward voltage-current curve to obtain forward electric energy data; obtaining a first test time interval, and calculating the corresponding forward output power according to the forward electric energy data and the first test time interval; calculating the silicon carbide transistor based on the test voltage data The forward input power of the silicon carbide transistor is calculated, and the corresponding forward energy conversion efficiency data is calculated according to the forward output power and the forward input power; a reverse voltage-current curve of the test voltage data and the reverse current data is constructed, and a curve integral operation is performed on the reverse voltage-current curve to obtain reverse electric energy data; a second test time interval is obtained, and the corresponding reverse output power is calculated according to the reverse electric energy data and the second test time interval; the reverse input power of the silicon carbide transistor is calculated based on the test voltage data, and the corresponding reverse energy conversion efficiency data is calculated according to the reverse output power and the reverse input power; An extraction module, used to perform curve fitting and feature extraction on the forward energy conversion efficiency data to obtain a forward conversion efficiency feature set, and to perform curve fitting and feature extraction on the reverse energy conversion efficiency data to obtain a reverse conversion efficiency feature set; A conversion module, used for performing dynamic weight analysis and matrix conversion on the forward conversion efficiency feature set and the reverse conversion efficiency feature set based on a preset dynamic weight algorithm to obtain a target conversion efficiency feature matrix; An analysis module, used for inputting the target conversion efficiency characteristic matrix into a preset voltage detection analysis model set, performing voltage anomaly detection analysis through a plurality of voltage detection analysis models in the voltage detection analysis model set, and outputting a target voltage anomaly detection analysis result; A creation module is used to create a target voltage anomaly processing strategy for the silicon carbide transistor based on the target voltage anomaly detection and analysis result.

7. A voltage detection and analysis device for a silicon carbide transistor, characterized in that: The voltage detection and analysis device of the silicon carbide transistor comprises: a memory and at least one processor, wherein the memory stores instructions; The at least one processor calls the instruction in the memory to enable the voltage detection and analysis device of the silicon carbide transistor to perform the voltage detection and analysis method of the silicon carbide transistor according to any one of claims 1 to 5.

8. A computer-readable storage medium having instructions stored thereon, characterized in that: When the instructions are executed by the processor, the voltage detection and analysis method of the silicon carbide transistor according to any one of claims 1 to 5 is implemented.

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