A power amplification module, an antenna unit and a phased array system

Abstract

The application provides a power amplification module, an antenna unit and a phased array system. The power amplification module comprises an input matching network, a differential common-source capacitive neutralization power amplifier and an output matching network. A first end of the input matching network is an input end of the power amplification module. A third end and a fourth end of the input matching network are respectively connected to a first end and a second end of the differential common-source capacitive neutralization power amplifier. A third end of the differential common-source capacitive neutralization power amplifier is connected to a first end of the output matching network. A fourth end of the differential common-source capacitive neutralization power amplifier is connected to a second end of the output matching network. A third end of the output matching network is an output end of the power amplification module. The third-order intermodulation of the power amplification module under the excitation of an ultra-wideband signal can be effectively suppressed. The mutual influence between different carrier units in a carrier aggregation mode is reduced. The power amplifier supports the transmission of a high-power ultra-wideband high-order modulation signal in the carrier aggregation mode.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of communication, in particular to a power amplification module, an antenna unit and a phased array system. BACKGROUND

[0002] In recent years, millimeter wave communication technology has developed rapidly, such as millimeter wave 5G communication, millimeter wave broadband satellite communication, etc. Large-scale phased array technology used in millimeter wave communication can effectively compensate for the high loss of millimeter wave frequency band and improve the coverage capability of millimeter wave communication system. Through large-scale antenna array combined with beamforming technology, large-scale phased array wireless communication system can realize higher output power to overcome the propagation loss; at the same time, the pointing of the beam can be adjusted according to the real-time position of the user to provide flexible and stable signal coverage.

[0003] Under the premise of realizing stable signal coverage, large-scale phased array system usually uses high-order modulation signals (such as 64-QAM, 256-QAM) combined with carrier aggregation technology to improve the data throughput of wireless communication system, thereby realizing ultra-high speed and low latency wireless communication. For example, in the millimeter wave 5G standard issued by 3GPP organization, the carrier unit of the modulation signal supports a bandwidth of up to 400MHz, and the carrier aggregation mode supports up to 16 carrier units, that is, the millimeter wave 5G phased array system needs to support a modulation signal with a bandwidth of up to 16x400MHz (i.e. 6.4GHz). Compared with the signal bandwidth of less than 100MHz in the traditional sub-6GHz communication system, the signal bandwidth of the millimeter wave communication system has been improved by orders of magnitude.

[0004] The power amplifier is located at the antenna end of each array element of the large-scale phased array system, and is the main source of nonlinearity of the entire system. The ultra-wideband high-order modulation signal used in the millimeter wave communication system puts forward new challenging requirements for the design of the second harmonic path and the DC power supply network of the power amplifier. How to realize the power amplifier for ultra-wideband modulation signal has become a difficult problem for those skilled in the art. SUMMARY

[0005] The purpose of the present application is to provide a power amplification module, an antenna unit and a phased array system to at least partially improve the above problems.

[0006] In order to achieve the above purpose, the technical solutions adopted by the embodiments of the present application are as follows:

[0007] In a first aspect, the embodiments of the present application provide a power amplification module, which comprises: an input matching network 100, a differential common-source capacitance neutralization power amplifier 200 and an output matching network 300.

[0008] The first end of the input matching network 100 is an input end of the power amplification module, the second end of the input matching network 100 is grounded, the third end of the input matching network 100 is connected to the first end of the differential common-source neutralization power amplifier 200, and the fourth end of the input matching network 100 is connected to the second end of the differential common-source neutralization power amplifier 200.

[0009] The third end of the differential common-source neutralization power amplifier 200 is connected to the first end of the output matching network 300, the fourth end of the differential common-source neutralization power amplifier 200 is connected to the second end of the output matching network 300, the third end of the output matching network 300 is an output end of the power amplification module, and the fourth end of the output matching network 300 is grounded.

[0010] Optionally, the input matching network 100 comprises a first primary coil 101 and a first secondary coil 102.

[0011] One end of the first primary coil 101 is the first end of the input matching network 100, the other end of the first primary coil 101 is the second end of the input matching network 100, and the two ends of the first secondary coil 102 are the third end and the fourth end of the input matching network 100 respectively.

[0012] The first primary coil 101 and the first secondary coil 102 form a transformer structure.

[0013] Optionally, the differential common-source neutralization power amplifier 200 comprises a first transistor 201, a second transistor 202, a first capacitor 203, and a second capacitor 204.

[0014] The source of the first transistor 201 and the source of the second transistor 202 are grounded, the gate of the first transistor 201 is connected to one end of the first capacitor 203, the other end of the first capacitor 203 is connected to the drain of the second transistor 202, the gate of the second transistor 202 is connected to one end of the second capacitor 204, and the other end of the second capacitor 204 is connected to the drain of the first transistor 201.

[0015] The gate of the first transistor 201 is the first end of the differential common-source neutralization power amplifier 200, the gate of the second transistor 202 is the second end of the differential common-source neutralization power amplifier 200, the drain of the first transistor 201 is the third end of the differential common-source neutralization power amplifier 200, and the drain of the second transistor 202 is the fourth end of the differential common-source neutralization power amplifier 200.

[0016] Optionally, the output matching network 300 comprises a third capacitor 301, a first inductor 302, a second inductor 303, a third inductor 304 and a fourth inductor 305.

[0017] The first end of the first inductor 302 is the first end of the output matching network 300, the first end of the second inductor 303 is the second end of the output matching network 300, the first end of the third inductor 304 is the third end of the output matching network 300, and the first end of the fourth inductor 305 is the fourth end of the output matching network 300.

[0018] The second end of the first inductor 302 is connected to the second end of the second inductor 303, and the second end of the third inductor 304 is connected to the second end of the fourth inductor 305.

[0019] The first inductor 302 and the second inductor 303 constitute a second primary coil, the third inductor 304 and the fourth inductor 305 constitute a second secondary coil, and the second primary coil and the second secondary coil form a transformer structure, and the connection between the second end of the first inductor 302 and the second end of the second inductor 303 is the center tap of the second primary coil.

[0020] One end of the third capacitor 301 is connected to the center tap of the second primary coil, and the other end of the third capacitor 301 is grounded.

[0021] Optionally, the third capacitor 301, the first inductor 302 and the second inductor 303 constitute an inductor-capacitor series resonance structure at the second harmonic.

[0022] Optionally, the power amplification module further comprises an ultra-wideband power supply bypass network 400, and the ultra-wideband power supply bypass network 400 is connected to the center tap of the second primary coil.

[0023] Optionally, the ultra-wideband power supply bypass network 400 comprises a first resistor 402 and a plurality of high-density capacitors 401.

[0024] The first end of all the high-density capacitors 401 is grounded, and the second end of all the high-density capacitors 401 is connected together and leads out a first terminal, the first terminal is connected to the first end of the first resistor 402, and the other end of the first resistor 402 is connected to the center tap of the second primary coil.

[0025] Optionally, the high-density capacitor 401 comprises a third transistor 411 and a fourth capacitor 412.

[0026] The gate of the third transistor 411 is connected with one end of the fourth capacitor 412, as the second end of the high-density capacitor 401.

[0027] The source and the drain of the third transistor 411 are connected with ground, and the other end of the fourth capacitor 412 is connected with ground.

[0028] In a second aspect, the embodiments of the present application provide an antenna unit, which comprises the power amplification module.

[0029] In a third aspect, the embodiments of the present application provide a phased array system, which comprises the antenna unit.

[0030] Compared with the prior art, the power amplification module, the antenna unit and the phased array system provided by the embodiments of the present application have the following advantages: the power amplification module comprises an input matching network, a differential common-source capacitor neutralization power amplifier and an output matching network; the first end of the input matching network is the input end of the power amplification module, the second end of the input matching network is connected with ground, the third end of the input matching network is connected with the first end of the differential common-source capacitor neutralization power amplifier, and the fourth end of the input matching network is connected with the second end of the differential common-source capacitor neutralization power amplifier; the third end of the differential common-source capacitor neutralization power amplifier is connected with the first end of the output matching network, the fourth end of the differential common-source capacitor neutralization power amplifier is connected with the second end of the output matching network, the third end of the output matching network is the output end of the power amplification module, and the fourth end of the output matching network is connected with ground. The third-order intermodulation of the power amplification module under the excitation of an ultra-wideband signal can be effectively suppressed, the mutual influence between different carrier units in a carrier aggregation mode can be reduced, and the power amplifier can support the transmission of a high-power ultra-wideband high-order modulation signal in the carrier aggregation mode.

[0031] In order to make the above objectives, features and advantages of the present application more apparent, clear and easy to understand, the following will specifically describe the preferred embodiments of the present application with reference to the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0032] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can also be obtained without creative labor.

[0033] Figure 1 Structure schematic diagram of the power amplification module provided by the embodiments of the present application;

[0034] Figure 2 Structure schematic diagram of the power amplification module provided by the embodiments of the present application;

[0035] Figure 3 Provided for the embodiments of this application Figure 1 The diagram shows the circuit structure under even-mode signal excitation (including second harmonic frequency, modulation signal envelope frequency, etc.).

[0036] In the diagram: 100 - Input matching network; 101 - First primary coil; 102 - First secondary coil; 200 - Differential common-source capacitor neutralizing power amplifier; 201 - First transistor; 202 - Second transistor; 203 - First capacitor; 204 - Second capacitor; 300 - Output matching network; 301 - Third capacitor; 302 - First inductor; 303 - Second inductor; 304 - Third inductor; 305 - Fourth inductor; 400 - Ultra-wideband power bypass network; 401 - High-density capacitor; 402 - First resistor; 411 - Third transistor; 412 - Fourth capacitor. Detailed Implementation

[0037] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0038] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0039] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, in the description of this application, terms such as "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0040] It should be pointed out that, in this article, the relationship terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between the entities or operations. Moreover, the terms "include", "contain" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or equipment. Without more limitation, the element defined by the statement "including a" does not exclude the presence of another identical element in the process, method, article or equipment including the element.

[0041] In the description of the present application, it should be pointed out that the orientation or position relationship indicated by the terms "upper", "lower", "inner", "outer" and the like is based on the orientation or position relationship shown in the drawings, or the orientation or position relationship commonly placed when the product of the application is used, and is only for the convenience of describing the application and simplifying the description, and does not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the application.

[0042] In the description of the present application, it should be further pointed out that, unless otherwise explicitly specified and limited, the terms "set", "connected" should be understood broadly, for example, it can be fixedly connected, or detachably connected, or integrally connected; it can be mechanically connected, or electrically connected; it can be directly connected, or indirectly connected through an intermediate medium, or it can be the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0043] Some embodiments of the present application will be described in detail below with reference to the accompanying drawings. The following examples and features in the examples can be combined with each other without conflict.

[0044] In order to overcome the above problems, the embodiments of the present application provide a power amplification module to face the ultra-wideband modulation signal, please refer to Figure 1 , Figure 1 The structural schematic diagram of the power amplification module provided by the embodiments of the present application is shown in Figure 1. As shown in the figure, the power amplification module includes: an input matching network 100, a differential common-source capacitive neutralization power amplifier 200 and an output matching network 300. Figure 1

[0045] ​The first end of the input matching network 100 is an input end (IN) of the power amplification module, the second end of the input matching network 100 is grounded, the third end of the input matching network 100 is connected to the first end of the differential common-source capacitive neutralization power amplifier 200, and the fourth end of the input matching network 100 is connected to the second end of the differential common-source capacitive neutralization power amplifier 200.

[0046] The third end of the differential common-source capacitive neutralization power amplifier 200 is connected to the first end of the output matching network 300, the fourth end of the differential common-source capacitive neutralization power amplifier 200 is connected to the second end of the output matching network 300, the third end of the output matching network 300 is an output end (OUT) of the power amplification module, and the fourth end of the output matching network 300 is grounded.

[0047] Optionally, in the scheme, the input matching network 100 is implemented in the form of a transformer, which is used for converting a single-ended input signal into a differential signal and transmitting the differential signal to the differential common-source capacitive neutralization power amplifier 200 while completing input end impedance matching. The differential common-source capacitive neutralization power amplifier 200 is used for amplifying the received differential signal and transmitting the processed differential signal to the output matching network 300. The output matching network 300 is implemented in the form of a transformer, which is used for converting the received differential signal into a single-ended output signal while completing output end impedance matching.

[0048] Please refer to Figure 2 , Figure 2 The structure diagram two of the power amplification module provided by the embodiment.

[0049] As shown in Figure 2 , in an optional implementation, the input matching network 100 includes a first primary coil 101 and a first secondary coil 102.

[0050] One end of the first primary coil 101 is the first end of the input matching network 100, and the first end of the input matching network 100 is the input end (IN) of the power amplification module.

[0051] The other end of the first primary coil 101 is the second end of the input matching network 100, which is grounded.

[0052] The two ends of the first secondary coil 102 are the third end and the fourth end of the input matching network 100, respectively. That is, the first end of the first secondary coil 102 is connected to the first end of the differential common-source capacitive neutralization power amplifier 200, and the second end of the first secondary coil 102 is connected to the second end of the differential common-source capacitive neutralization power amplifier 200.

[0053] The first primary coil 101 and the first secondary coil 102 form a transformer structure.

[0054] As shown in the figure, in an alternative embodiment, the differential common-source neutralization power amplifier 200 comprises a first transistor 201, a second transistor 202, a first capacitor 203 and a second capacitor 204. Figure 2

[0055] The source of the first transistor 201 and the source of the second transistor 202 are grounded, the gate of the first transistor 201 is connected to one end of the first capacitor 203, the other end of the first capacitor 203 is connected to the drain of the second transistor 202, the gate of the second transistor 202 is connected to one end of the second capacitor 204, and the other end of the second capacitor 204 is connected to the drain of the first transistor 201.

[0056] The gate of the first transistor 201 serves as the first end of the differential common-source neutralization power amplifier 200, and is connected to the third end of the input matching network 100, for example, the first end of the first secondary coil 102 in the foregoing.

[0057] The gate of the second transistor 202 serves as the second end of the differential common-source neutralization power amplifier 200, and is connected to the fourth end of the input matching network 100, for example, the second end of the first secondary coil 102 in the foregoing.

[0058] The drain of the first transistor 201 serves as the third end of the differential common-source neutralization power amplifier 200, and is connected to the first end of the output matching network 300, for example, the first end of the first inductor 302 in the following.

[0059] The drain of the second transistor 202 serves as the fourth end of the differential common-source neutralization power amplifier 200, and is connected to the second end of the output matching network 300, for example, the first end of the second inductor 303 in the following.

[0060] In the present application, the device sizes of the first transistor 201 and the second transistor 202 are the same, and the first capacitor 203 and the second capacitor 204 are the same.

[0061] In the present application, the gate of the first transistor 201 and the gate of the second transistor 202 are connected on the differential input signal path, and the drain of the first transistor 201 and the drain of the second transistor 202 are connected on the differential output signal path.

[0062] When the power amplification module works in the differential mode, the first capacitor 203 and the second capacitor 204 exhibit negative capacitance characteristics, neutralize the drain-gate parasitic capacitance of the first transistor 201 and the second transistor 202, and effectively improve the stability and gain of the power amplifier.

[0063] As shown in the figure, in an alternative embodiment, the differential common-source neutralization power amplifier 200 comprises a first transistor 201, a second transistor 202, a first capacitor 203 and a second capacitor 204. Figure 2 ​As shown, in an alternative embodiment, the output matching network 300 comprises a third capacitor 301, a first inductor 302, a second inductor 303, a third inductor 304 and a fourth inductor 305.

[0064] wherein the first inductor 302 and the second inductor 303 are identical, and the third inductor 304 and the fourth inductor 305 are identical.

[0065] The first end of the first inductor 302 is connected to the first end of the output matching network 300, and is connected to the third end of the differential common-source capacitor and the power amplifier 200, for example, the drain of the first transistor 201 as mentioned above.

[0066] The first end of the second inductor 303 is the second end of the output matching network 300, and is connected to the fourth end of the differential common-source capacitor and the power amplifier 200, for example, the drain of the second transistor 202 as mentioned above.

[0067] The first end of the third inductor 304 is the third end of the output matching network 300, and is the output end (OUT) of the power amplifier module.

[0068] The first end of the fourth inductor 305 is the fourth end of the output matching network 300, and is connected to the ground.

[0069] The second end of the first inductor 302 is connected to the second end of the second inductor 303, and the second end of the third inductor 304 is connected to the second end of the fourth inductor 305.

[0070] The first inductor 302 and the second inductor 303 constitute a second primary coil, the third inductor 304 and the fourth inductor 305 constitute a second secondary coil, and the second primary coil and the second secondary coil form a transformer structure, and the connection between the second end of the first inductor 302 and the second end of the second inductor 303 is the center tap of the second primary coil.

[0071] One end of the third capacitor 301 is connected to the center tap of the second primary coil, and the other end of the third capacitor 301 is connected to the ground.

[0072] In the present application, the input of the second primary coil constituted by the first inductor 302 and the second inductor 303 is a differential signal, and the output of the second secondary coil constituted by the third inductor 304 and the fourth inductor 305 is a single-ended signal.

[0073] Alternatively, the third capacitor 301, the first inductor 302 and the second inductor 303 constitute an inductor-capacitor series resonance structure at the second harmonic.

[0074] In one optional embodiment, the capacitance value of the third capacitor 301 is selected to ensure that the inductance value after being connected in parallel with the first inductor 302 and the second inductor 303 forms an inductor-capacitor series resonance at the second harmonic of the operating frequency of this application.

[0075] Please refer to Figure 3 , Figure 3 Provided for the embodiments of this application Figure 1 The diagram shows the circuit structure under even-mode signal excitation (including second harmonic frequency, modulation signal envelope frequency, etc.).

[0076] like Figure 3 As shown: For the second harmonic signal, the inductance formed by the parallel connection of the third capacitor 301 with the first inductor 302 and the second inductor 303 constitutes an inductor-capacitor series resonant circuit. This circuit effectively filters the second harmonic generated by the nonlinear characteristics of the power amplifier module, suppressing the second harmonic and improving the linearity of the power amplifier. For the differential signal, the connection point of the first inductor 302 and the second inductor 303 (i.e., the center tap of the second primary coil) is the virtual ground point for the differential signal. The third capacitor 301 is virtually shielded, therefore, the third capacitor 301 will not have any effect on the differential fundamental signal.

[0077] like Figure 2 As shown, in one optional embodiment, the power amplifier module further includes an ultra-wideband power bypass network 400, which is connected to the center tap of the second primary coil.

[0078] Optionally, the ultra-wideband power bypass network 400 includes a first resistor 402 and a predetermined number of high-density capacitors 401.

[0079] The first terminal of all high-density capacitors 401 is grounded, and the second terminals of all high-density capacitors 401 are connected together to form a parallel structure and lead out to the first terminal. The first terminal is connected to the first terminal of the first resistor 402, and the other terminal of the first resistor 402 is the center tap of the second primary coil.

[0080] For the signal envelope of millimeter-wave ultra-wideband modulated signals, the corresponding circuit structure is as follows: Figure 3 As shown: the first inductor 302 and the second inductor 303 can be considered as a short circuit at the signal envelope frequency, and the third capacitor 301 can be considered as an open circuit; the parallel connection of multiple high-density capacitors 401 achieves a capacitance value of over 100pH, providing an ultra-wideband power bypass for the signal envelope of millimeter-wave ultra-wideband modulation signals with a bandwidth of up to 16×400MHz (i.e. 6.4GHz); the parallel connection of multiple high-density capacitors 401 is connected in series with the first resistor 402, reducing the quality factor of the high-density capacitors 401, and avoiding parallel resonance between the ultra-wideband power bypass network 400 and the external power supply, which would lead to impedance deterioration at the signal envelope frequency.

[0081] In the scheme, the power amplification module adopts the differential common-source capacitive neutralization power amplifier 200 combined with the ultra-wideband power bypass network 400, the signal envelope of the millimeter wave ultra-wideband modulation signal is provided with the ultra-wideband power bypass, the signal distortion caused by the direct current power network is avoided, the third-order intermodulation of the power amplification module under the excitation of the ultra-wideband signal is effectively suppressed, the mutual influence between different carrier units in the carrier aggregation mode is reduced, and the power amplification module supports the transmission of high-power ultra-wideband high-order modulation signals in the carrier aggregation mode.

[0082] Please continue to refer to Figure 2 In an optional embodiment, the high-density capacitor 401 includes a third transistor 411 and a fourth capacitor 412.

[0083] The gate of the third transistor 411 and one end of the fourth capacitor 412 are connected, serving as the second end of the high-density capacitor 401, the first end of all the high-density capacitors 401 is grounded, the source and the drain of the third transistor 411 are connected and then grounded, and the other end of the fourth capacitor 412 is grounded.

[0084] In the scheme, the capacitance density per unit area is improved through the parallel connection of the gate-source parasitic capacitance and the gate-drain parasitic capacitance of the third transistor 411.

[0085] Optionally, the fourth capacitor 412 is a metal layer interdigital capacitor, and is placed directly above the third transistor 411 in the layout design.

[0086] Optionally, the metal layer interdigital capacitor (the fourth capacitor 412) is composed of the overlapping of the spare metal layer above the third transistor 411, and the capacitance value of the high-density capacitor 401 is improved without increasing the area occupied by the high-density capacitor 401.

[0087] In the scheme, the ultra-wideband power bypass network 400 is connected to the power amplification module from the center tap of the second primary coil of the output matching network 300, and the signal envelope of the millimeter wave ultra-wideband modulation signal is provided with the ultra-wideband power bypass through the virtual ground property of the differential signal, without any influence on the differential fundamental signal, to avoid the signal distortion caused by the direct current power network, and effectively improve the ability of the millimeter wave power amplification module to transmit the ultra-wideband modulation signal.

[0088] The embodiment of the application further provides an antenna unit, which comprises the power amplification module.

[0089] The embodiment of the application further provides a phased array system, which comprises the antenna unit.

[0090] In summary, the power amplification module, the antenna unit and the phased array system provided by the embodiments of the present application have the following advantages: first, the power amplification module has a differential common-source capacitance neutralization power amplifier structure with an ultra-wideband power supply bypass network and a second harmonic filter network, which on the one hand effectively suppresses the third-order intermodulation of the power amplification module under the excitation of an ultra-wideband signal, reduces the mutual influence between different carrier units in a carrier aggregation mode, and enables the power amplifier to support the transmission of a high-power ultra-wideband high-order modulation signal in the carrier aggregation mode; on the other hand, the influence of reverse interference signals is suppressed, the reliability of the power amplifier is enhanced, and the working capability of the power amplifier at high frequencies is improved as a whole. Secondly, by stacking large-size transistors and metal layer interdigital capacitors, the capacitance density is improved, the capacitance value that can be integrated per unit area is effectively improved, and an ultra-wideband power supply bypass network is realized on-chip. Finally, the second harmonic filter circuit is an inductor-capacitor series resonance circuit, and the resonance point is located at the second harmonic. The inductance in the resonance circuit is derived from the transformer at the output end of the power amplification module, and the capacitance is shielded at the fundamental frequency due to the virtual ground characteristic of the differential signal, thereby eliminating the influence of the second harmonic filter circuit on the fundamental signal.

[0091] The above only describes preferred embodiments of the present application and is not intended to limit the present application. For those skilled in the art, the present application can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

[0092] It is obvious for those skilled in the art that the present application is not limited to the details of the above exemplary embodiments, and the present application can be implemented in other specific forms without departing from the spirit or essential characteristics of the present application. Therefore, the embodiments should be regarded as exemplary and non-limiting, and the scope of the present application is defined by the appended claims rather than the above description, and all changes falling within the meaning and scope of the equivalent elements of the claims are intended to be included in the present application. Any reference signs in the claims should not be regarded as limiting the claims.

Claims

1. A power amplification module, characterized by, The power amplification module comprises an input matching network (100), a differential common-source capacitive neutralization power amplifier (200) and an output matching network (300); a first end of the input matching network (100) is an input end of the power amplification module, a second end of the input matching network (100) is grounded, a third end of the input matching network (100) is connected to a first end of the differential common-source capacitive neutralization power amplifier (200), and a fourth end of the input matching network (100) is connected to a second end of the differential common-source capacitive neutralization power amplifier (200); a third end of the differential common-source capacitive neutralization power amplifier (200) is connected to a first end of the output matching network (300), a fourth end of the differential common-source capacitive neutralization power amplifier (200) is connected to a second end of the output matching network (300), a third end of the output matching network (300) is an output end of the power amplification module, and a fourth end of the output matching network (300) is grounded; the output matching network (300) comprises a third capacitor (301), a first inductor (302), a second inductor (303), a third inductor (304) and a fourth inductor (305); a first end of the first inductor (302) is the first end of the output matching network (300), a first end of the second inductor (303) is the second end of the output matching network (300), a first end of the third inductor (304) is the third end of the output matching network (300), and a first end of the fourth inductor (305) is the fourth end of the output matching network (300); a second end of the first inductor (302) is connected to a second end of the second inductor (303), and a second end of the third inductor (304) is connected to a second end of the fourth inductor (305); the first inductor (302) and the second inductor (303) constitute a second primary coil, the third inductor (304) and the fourth inductor (305) constitute a second secondary coil, the second primary coil and the second secondary coil form a transformer structure, and a connection between the second end of the first inductor (302) and the second end of the second inductor (303) is a center tap of the second primary coil; one end of the third capacitor (301) is connected to the center tap of the second primary coil, and the other end of the third capacitor (301) is grounded; the third capacitor (301), the first inductor (302) and the second inductor (303) constitute an inductor-capacitor series resonance structure at a second harmonic; the power amplification module further comprises an ultra-wideband power supply bypass network (400) connected to the center tap of the second primary coil; the ultra-wideband power supply bypass network (400) comprises a first resistor (402) and a preset number of high-density capacitors (401). All first ends of the high-density capacitors (401) are grounded, all second ends of the high-density capacitors (401) are connected together and led out as a first terminal, the first terminal is connected to a first end of the first resistor (402), another end of the first resistor (402) is connected to a center tap of the second primary coil; The high-density capacitors (401) comprise a third transistor (411) and a fourth capacitor (412); A gate of the third transistor (411) is connected to one end of the fourth capacitor (412) as a second end of the high-density capacitors (401); A source and a drain of the third transistor (411) are connected and grounded, another end of the fourth capacitor (412) is grounded.

2. The power amplification module of claim 1, wherein, The input matching network (100) comprises a first primary coil (101) and a first secondary coil (102); One end of the first primary coil (101) is a first end of the input matching network (100), another end of the first primary coil (101) is a second end of the input matching network (100), and two ends of the first secondary coil (102) are a third end and a fourth end of the input matching network (100) respectively; The first primary coil (101) and the first secondary coil (102) form a transformer structure.

3. The power amplification module of claim 1, wherein, The differential common-source capacitive neutralization power amplifier (200) comprises a first transistor (201), a second transistor (202), a first capacitor (203) and a second capacitor (204); A source of the first transistor (201) and a source of the second transistor (202) are grounded, a gate of the first transistor (201) is connected to one end of the first capacitor (203), another end of the first capacitor (203) is connected to a drain of the second transistor (202), a gate of the second transistor (202) is connected to one end of the second capacitor (204), and another end of the second capacitor (204) is connected to a drain of the first transistor (201); A gate of the first transistor (201) is a first end of the differential common-source capacitive neutralization power amplifier (200), a gate of the second transistor (202) is a second end of the differential common-source capacitive neutralization power amplifier (200), a drain of the first transistor (201) is a third end of the differential common-source capacitive neutralization power amplifier (200), and a drain of the second transistor (202) is a fourth end of the differential common-source capacitive neutralization power amplifier (200).

4. An antenna unit, characterized by The antenna unit comprises the power amplification module according to any one of claims 1-3.

5. A phased array system, characterized by, The phased array system comprises the antenna unit according to claim 4.

Images