Capacitive sensing device and capacitive sensing method

Abstract

The embodiments of this disclosure relate to a capacitance sensing device and a capacitance sensing method. The capacitance sensing device includes a switching circuit system, a counter circuit, a comparator circuit, an amplifier circuit including a first input terminal, a second input terminal, and an output terminal, and a feedback capacitor. The feedback capacitor is coupled between the first input terminal and the output terminal of the amplifier circuit, and the first input terminal is coupled to the capacitor under test. The switching circuit system transmits a first voltage to the second input terminal and couples the first input terminal to the output terminal in a first stage, transmits a second voltage to the second input terminal in a second stage, and adjusts the output voltage at the output terminal in a third stage. The counter circuit starts counting in the third stage and stops counting according to a control signal to generate a count value that reflects the capacitance change of the capacitor under test. The comparator circuit generates a control signal in the third stage based on the output voltage and the second reference voltage.

Description

Technical Field

[0001] This case relates to a capacitive sensing device, and in particular to a capacitive sensing device and capacitive sensing method capable of sensing changes in the capacitance of a touch component. Background Technology

[0002] Touch devices are commonly found in various electronic products. Capacitive touch devices use a touch component connected to a specific potential (e.g., ground) to receive touch input. In some related technologies, the capacitive sensing circuit has high circuit complexity and uses an amplifier to directly amplify the charge change on the touch component, outputting the signal generated by the amplifier directly as the sensing signal. However, in the above-mentioned technologies, the amplifier may also amplify noise in the system, causing the output to oversaturate. As a result, the sensing circuit will malfunction and cannot effectively identify whether touch input has been received. Summary of the Invention

[0003] In some embodiments, one of the objectives of this invention is (but not limited to) to provide a capacitance sensing device and capacitance sensing method that uses a counter to confirm capacitance changes, so as to improve the shortcomings of the prior art.

[0004] In some embodiments, the capacitance sensing device includes an amplifier circuit, a feedback capacitor, a switching circuit system, a counter circuit, and a comparator circuit. A first input terminal of the amplifier circuit is coupled to the capacitor under test. The feedback capacitor is coupled between the first input terminal and the output terminal of the amplifier circuit. The switching circuit system is configured to transmit a first reference voltage to a second input terminal of the amplifier circuit and couple the first input terminal to the output terminal in a first stage, transmit a second reference voltage to the second input terminal in a second stage, and adjust the output voltage at the output terminal in a third stage. The counter circuit is configured to start counting in the third stage and stop counting according to a control signal to generate a count value, wherein the count value reflects the capacitance change of the capacitor under test. The comparator circuit is configured to generate a control signal in the third stage based on the output voltage and the second reference voltage.

[0005] In some embodiments, the capacitance sensing method includes the following operations: in a first stage, transmitting a first reference voltage to a first input terminal of an amplifier circuit and coupling a second input terminal of the amplifier circuit to an output terminal of the amplifier circuit, wherein the second input terminal is coupled to the output terminal via a feedback capacitor and to ground via a capacitor under test; in a second stage, transmitting a second reference voltage to the first input terminal; in a third stage, adjusting the output voltage of the output terminal and generating a control signal based on the output voltage and the second reference voltage; and starting counting upon entering the third stage and stopping counting based on the control signal to generate a count value, wherein the count value reflects the capacitance change of the capacitor under test.

[0006] The features, implementation, and effects of this case are described in detail below with reference to the accompanying drawings, providing a preferred embodiment. Attached Figure Description

[0007] [ Figure 1 This is a schematic diagram of a capacitance sensing device according to some embodiments of this case;

[0008] [ Figure 2A [Drawn according to some embodiments of this case] Figure 1 A circuit diagram of the capacitance sensing device in the image;

[0009] [ Figure 2B [Drawn according to some embodiments of this case] Figure 2A A waveform diagram of multiple signals and voltages in the diagram;

[0010] [ Figure 3A [Drawn according to some embodiments of this case] Figure 1 A circuit diagram of the capacitance sensing device in the image;

[0011] [ Figure 3B [Drawn according to some embodiments of this case] Figure 2A Waveform diagrams of multiple signals and voltages in the diagram; and

[0012] [ Figure 4 This is a flowchart illustrating a capacitance sensing method based on some embodiments of this case. Detailed Implementation

[0013] All terms used herein have their common meanings. The definitions of the above terms in commonly used dictionaries, and any examples of the use of any term discussed herein, are merely illustrative and should not limit the scope or meaning of this document. Similarly, this document is not limited to the various embodiments shown in this specification.

[0014] As used herein, "coupled" or "connected" can refer to two or more components making direct physical or electrical contact with each other, or indirectly making direct physical or electrical contact with each other, or to two or more components operating or acting on each other. As used herein, the term "circuit system" can be a single system formed by at least one circuit, and the term "circuit" can be a device that connects at least one transistor and / or at least one active or passive component in a certain manner to process signals.

[0015] As used herein, the term "and / or" includes any combination of one or more of the listed related items. In this document, the terms first, second, and third are used to describe and distinguish the individual components. Therefore, a first component may also be referred to as a second component without departing from the intent of this document. For ease of understanding, similar components in the accompanying figures will be designated with the same reference numerals.

[0016] Figure 1 This is a schematic diagram of a capacitance sensing device 100 according to some embodiments of the present invention. In some embodiments, the capacitance sensing device 100 can sense changes in the capacitance of a capacitor CT under test. In some embodiments, the capacitor CT under test can be (but is not limited to) a touch component in a touch screen. For example, the capacitor CT under test can be a self-capacitance touch component. The capacitance sensing device 100 can sense whether a change in capacitance has occurred in the capacitor CT under test to confirm whether the capacitor CT under test has been touched.

[0017] In some embodiments, the capacitance sensing device 100 includes an amplifier circuit 110, a switching circuit system 120, a counter circuit 130, a comparator circuit 140, a digital control circuit 150, and a feedback capacitor CFB. A first input terminal (e.g., a negative input terminal) of the amplifier circuit 110 is coupled to the capacitor under test CT, and the other end of the capacitor under test CT is coupled to ground. A second input terminal (e.g., a positive input terminal) of the amplifier circuit 110 is coupled to the switching circuit system 120 to sequentially receive reference voltages VREF1 and VREF2 at different stages. The feedback capacitor CFB is coupled between the negative input terminal and the output terminal of the amplifier circuit 110.

[0018] Switching circuit system 120 in the first stage (e.g., for Figure 2B or Figure 3B In stage P1, the reference voltage VREF1 is transferred to the positive input terminal of amplifier circuit 110, and the negative input terminal of amplifier circuit 110 is coupled to the output terminal of amplifier circuit 110. Switching circuit system 120 in the second stage (e.g., for...) Figure 2B or Figure 3B In stage P2, the reference voltage VREF2 is transferred to the positive input of amplifier circuit 110, and in the third stage (e.g., for...), the reference voltage VREF2 is transferred to the positive input of amplifier circuit 110. Figure 2B or Figure 3B In stage P3, the output voltage VO at the output terminal of the amplifier circuit 110 is adjusted. In some embodiments, the switching circuit system 120 may perform the above-mentioned multiple operations at different stages according to multiple signals S1 to S4.

[0019] The counter circuit 130 starts counting in the third stage and stops counting according to the control signal SC and outputs the count value CNT, which can be used to reflect the capacitance change of the capacitor CT under test.

[0020] In the third stage, comparator circuit 140 generates a control signal SC based on the output voltage VO and the reference voltage VREF2. In this embodiment, comparator circuit 140 detects whether the output voltage VO is less than or equal to the reference voltage VREF2 in the third stage, and generates control signal SC when the output voltage VO is less than or equal to the reference voltage VREF2. Digital control circuit 150 can generate signals S1 to S4 based on control signal SC in the third stage, and determine whether the capacitance value of the capacitor under test CT has changed based on the count value CNT. For example, digital control circuit 150 can confirm whether to switch multiple signals S1 to S4 based on control signal SC in the third stage, and generate enable signal EN to control counter circuit 130 to start counting when entering the third stage. If the count value CNT exceeds a preset range (or is different from the default value), digital control circuit 150 can determine that the capacitance value of the capacitor under test CT has changed, that is, the capacitor under test CT has been touched. In some embodiments, digital control circuit 150 can be implemented by (but is not limited to) several logic circuits executing a finite state machine or by digital signal processing circuit.

[0021] Figure 2A Drawings based on some embodiments of this case Figure 1 A circuit diagram of the capacitance sensing device 100 is shown. In this example, the reference voltage VREF1 is lower than the reference voltage VREF2, and the switching circuit system 120 is used to switch the current I in the third stage. int The signal is transmitted to the negative input terminal of amplifier circuit 110 to adjust the output voltage VO.

[0022] In detail, the switching circuit system 120 includes multiple switches SW1 to SW4 and a current source circuit 210. The first terminal of switch SW1 receives a reference voltage VREF1, the second terminal of switch SW1 is coupled to the positive input terminal of amplifier circuit 110, and the control terminal (not shown) of switch SW1 receives signal S1. Switch SW1 is turned on in a first stage according to signal S1 to transmit the reference voltage VREF1 to the positive input terminal of amplifier circuit 110. The first terminal of switch SW2 is coupled to the negative input terminal of amplifier circuit 110, the second terminal of switch SW2 is coupled to the output terminal of amplifier circuit 110, and the control terminal (not shown) of switch SW2 receives signal S2. Switch SW2 is turned on in a first stage according to signal S2 to couple the negative input terminal of amplifier circuit 110 to the output terminal of amplifier circuit 110. In other words, when switch SW2 is turned on, the negative input terminal and the output terminal of amplifier circuit 110 have the same level. The first terminal of switch SW3 receives the reference voltage VREF2, the second terminal of switch SW3 is coupled to the positive input terminal of amplifier circuit 110, and the control terminal (not shown) of switch SW3 receives signal S3. Switch SW3 is turned on in the second stage according to signal S3 to transmit the reference voltage VREF2 to the positive input terminal of amplifier circuit 110. The first terminal of switch SW4 is coupled to current source circuit 210, the second terminal of switch SW4 is coupled to the negative input terminal of amplifier circuit 110, and the control terminal (not shown) of switch SW4 receives signal S4. Switch SW4 is turned on in the third stage according to signal S3 to couple current source circuit 210 to the negative input terminal of amplifier circuit 110. In this way, current source circuit 210 can transmit current I via switch SW4. int The signal is transmitted to the negative input terminal of amplifier circuit 110 to adjust the output voltage VO.

[0023] Figure 2B Drawings based on some embodiments of this case Figure 2A The diagram shows waveforms of multiple signals and voltages. For an explanation of the operation of the capacitive sensing device 100, please refer to [the diagram / reference needed]. Figure 2A and Figure 2B . Figure 2B The diagram shows two consecutive sensing cycles, in which the capacitor under test CT was not touched in the first sensing cycle (no capacitance change occurred), and was touched in the second sensing cycle (a capacitance change occurred).

[0024] At time T1, signals S1 and S2 switch to the enable level (e.g., a high level). During phase P1, when signals S1 and S2 are at the enable level, switches SW1 and SW2 are turned on. Thus, switch SW1 transmits the reference voltage VREF1 to the positive input terminal of amplifier circuit 110, and switch SW2 couples the negative input terminal of amplifier circuit 110 to its output terminal. Due to the virtual grounding characteristic, the level of the negative input terminal of amplifier circuit 110 is the same as the level of the positive input terminal, making the levels of the negative input terminal, positive input terminal, and output terminal of amplifier circuit 110 all the same as the reference voltage VREF1, where the voltage at the negative input terminal of amplifier circuit 110 is labeled as voltage VA. Through the above operation, during phase P1, the capacitor under test CT is charged by the reference voltage VREF1 and stores a charge of CT×VREF1. The voltage across the feedback capacitor CFB is 0, therefore the feedback capacitor CFB does not store any charge. In stage P1, the output voltage VO is the same as the reference voltage VREF1, and therefore lower than the reference voltage VREF2. Thus, the comparator circuit 140 outputs a control signal SC with a first bit level (e.g., a high bit level). Since the digital control circuit 150 does not operate according to the control signal SC in stage P1, the digital control circuit 150 will not malfunction.

[0025] At time T2, signals S1 and S2 switch to the disabled level (e.g., low level), and signal S3 switches to the enabled level (e.g., high level). At time T3, signal S4 switches to the enabled level (e.g., high level). In phase P2 between time T2 and time T3, switch SW1 responds to signal S1 and is deactivated, switch SW2 responds to signal S2 and is deactivated, and switch SW3 responds to signal S3 and is activated. Thus, in phase P2, switch SW1 stops transmitting reference voltage VREF1 to the positive input terminal of amplifier circuit 110, switch SW3 transmits reference voltage VREF2 to the positive input terminal of amplifier circuit 110, and the negative input terminal of amplifier circuit 110 is no longer coupled to the output terminal of amplifier circuit 110 through switch SW2. Due to the virtual grounding characteristic, the level of the negative input terminal of the amplifier circuit will rise to the reference voltage VREF2 in phase P2. Through the above operation, the capacitor under test CT is charged by the reference voltage VREF2 and stores a charge of CT×VREF2. The voltage difference across the feedback capacitor CFB is the difference between the reference voltage VREF2 and the output voltage VO, so the feedback capacitor CFB stores a charge of CFB×(VREF2-VO). Furthermore, in stage P2, in response to the aforementioned voltage change, the output voltage VO will briefly exceed the reference voltage VREF2. Thus, the comparator circuit 140 will output a control signal SC with a second level (e.g., a low level). Since the digital control circuit 150 does not operate according to the control signal SC in stage P2, the digital control circuit 150 will not malfunction.

[0026] During the operation of stages P1 and P2, based on the law of conservation of charge, it can be known that the amount of charge added to the capacitor CT under test should be the same as the amount of charge reduced by the feedback capacitor CFB, which can be expressed as the following formula (1):

[0027] VREF2×CT-VREF1×CT=(VREF2-VO)×CFB…(1)

[0028] Furthermore, from equation (1) above, it can be deduced that the output voltage VO should conform to equation (2):

[0029]

[0030] During phase P3 when signal S4 has an enable level (e.g., a high level), switch SW3 remains on in response to signal S3, and switch SW4 remains on in response to signal S4. Thus, switch SW3 continuously transmits the reference voltage VREF2 to the positive input terminal of amplifier circuit 110, and current source circuit 210 can transfer current I via switch SW4. intThe signal is transmitted to the negative input terminal of amplifier circuit 110 to adjust the output voltage VO. When entering stage P3, counter circuit 130 can start counting based on enable signal EN. When the level of output voltage VO is adjusted to be equal to (or lower than) reference voltage VREF2 (i.e., time T4), comparator circuit 140 outputs control signal SC with a high level. In response to this control signal SC, counter circuit 130 stops counting and outputs count value CNT to digital control circuit 150 to determine whether the capacitance value of capacitor CT under test has changed. In the above operation, the amount of charge stored in capacitor CT under test does not change, while the amount of charge stored in feedback capacitor CFB changes from CFB×(VREF2-VO) to CFB×(VREF2-VREF2). Therefore, based on the law of conservation of charge, it can be known that the amount of charge change in feedback capacitor CFB should be the same as the amount of charge provided by current source circuit 210, which can be expressed as the following formula (3), where T is the time when switch SW4 starts to conduct (i.e., current source circuit 210 starts to supply current I). int The period from the negative input terminal of amplifier circuit 110 to the output voltage VO being adjusted to be equal to (or lower than) the reference voltage VREF2:

[0031] I int ×T=(VREF2-VREF2)×CFB-(VREF2-VO)×CFB…(3)

[0032] Based on equations (2) and (3), equation (4) can be derived:

[0033]

[0034] From equation (4), it can be seen that due to the reference voltage VREF1, reference voltage VREF2, and current I... int Since both are constant values, stage T can be proportional to the capacitance value of the capacitor CT under test. Because the counter circuit 130 starts counting at stage P3 and stops counting when the output voltage VO is the same as the reference voltage VREF2, the count value CNT generated by the counter circuit 130 can be used to indicate the duration of stage T. If the count value CNT does not exceed a preset range (or is the same as a preset value), it means that the capacitor CT under test has not been touched and no capacitance change has occurred. Furthermore, based on equation (4), it can be seen that the duration of stage T is proportional to the voltage difference between the reference voltage VREF1 and the reference voltage VREF2. In other words, the count value CNT is proportional to the voltage difference between the reference voltage VREF1 and the reference voltage VREF2. In some embodiments, the values ​​of the reference voltage VREF1 and the reference voltage VREF2 can be adjusted according to the actual needs of the system.

[0035] Similarly, in the second sensing cycle, the capacitance sensing device 100 can repeat the same operation to confirm whether the capacitance of the capacitor under test CT has changed. As mentioned earlier, in the second sensing cycle, the capacitor under test CT is touched, causing its capacitance to increase. Compared to the first sensing cycle, the output voltage VO rises to a higher level in stage P2 of the second sensing cycle. Therefore, in stage P3, the output voltage VO will take longer to drop to the reference voltage VREF2. Thus, the duration of stage T will be longer and the count value CNT will be higher. In other words, the count value CNT is proportional to the capacitance change of the capacitor under test CT. If the count value CNT exceeds a preset range (or is higher than a preset value), it means that the capacitor under test CT has been touched, resulting in a capacitance change.

[0036] Figure 3A Drawings based on some embodiments of this case Figure 1 A circuit diagram of the capacitance sensing device 100 is shown. Compared to... Figure 2A In this example, the reference voltage VREF2 is lower than the reference voltage VREF1, and the switching circuit system 120 is used to draw current I from the negative input terminal of the third-stage self-amplifier circuit 110. int To ground, adjust the output voltage VO.

[0037] In detail, unlike Figure 2A The current source circuit 210, in this example, is coupled to ground from the negative input terminal of the amplifier circuit 110 via switch SW4 to draw current I from the negative input terminal of the amplifier circuit 110. int Adjust the output voltage VO by going to ground.

[0038] Figure 3B Drawings based on some embodiments of this case Figure 3A A waveform diagram illustrating multiple signals and voltages. Similar to... Figure 2B , Figure 3B The diagram shows two consecutive sensing cycles. The capacitor under test (CT) was not touched in the first sensing cycle (no capacitance change occurred), but was touched in the second sensing cycle (resulting in a capacitance change). As previously stated, in... Figure 3A In the example, the reference voltage VREF2 is set to be lower than the reference voltage VREF1. Therefore, when the comparator circuit outputs a low-level control signal SC, the output voltage VO is equal to (or higher than) the reference voltage VREF2. Thus, the counter circuit 130 can be set to stop counting in response to the low-level control signal SC.

[0039] Since the reference voltage VREF2 is lower than the reference voltage VREF1, in stage P2, the output voltage VO decreases from the reference voltage VREF1. In stage P3, through the adjustment of the current source circuit 210, the level of the output voltage VO gradually rises to be equal to or higher than the reference voltage VREF2. The operation of the multiple switches SW1 to SW4 is the same as the charge change of each of the capacitor under test CT and the feedback capacitor CFB. Figure 2B The explanation is already provided, so it will not be repeated here. In this example, stage T is... Figure 3A The switch SW4 starts conducting until the output voltage VO is adjusted to be equal to (or higher than) the reference voltage VREF2. Figure 3B If the capacitor under test (CT) is touched, causing its capacitance to increase, the output voltage VO will drop to a lower level in stage P2. Therefore, in stage P3, the output voltage VO will take longer to rise to the reference voltage VREF2. In other words, the duration of stage T will increase and the count value CNT will increase. Thus, the capacitance change of the capacitor under test (CT) can be determined based on the count value CNT. Figure 3B The detailed operation and charge derivation are similar. Figure 2B Therefore, I will not repeat the details here.

[0040] Figure 4 This is a flowchart illustrating a capacitance sensing method 400 according to some embodiments of the present invention. In operation S410, in a first stage, a first reference voltage is transmitted to a first input terminal of an amplifier circuit, and a second input terminal of the amplifier circuit is coupled to the output terminal of the amplifier circuit, wherein the second input terminal is also coupled to the output terminal via a feedback capacitor and to ground via the capacitor under test. In operation S420, in a second stage, a second reference voltage is transmitted to the first input terminal. In operation S430, in a third stage, the output voltage of the output terminal is adjusted, and a control signal is generated based on the output voltage and the second reference voltage. In operation S440, counting begins upon entering the third stage and stops according to the control signal to generate a count value, wherein the count value reflects the capacitance change of the capacitor under test.

[0041] The descriptions of the various operations of the capacitance sensing method 400 described above can be found in the foregoing embodiments, and therefore will not be repeated here. The aforementioned operations are merely examples and are not limited to being performed in the order shown in these examples. Without departing from the operational mode and scope of the embodiments of this invention, various operations in the capacitance sensing method 400 may be appropriately added, replaced, omitted, or performed in a different order. Alternatively, one or more operations in the capacitance sensing method 400 may be performed simultaneously or partially simultaneously.

[0042] In summary, the capacitance sensing device and capacitance sensing method provided in some embodiments of this invention can utilize a counter to generate a count value that can reflect whether the capacitor under test has undergone a change in capacitance. Thus, by monitoring the count value, it can be confirmed whether the capacitor under test has been touched.

[0043] Although the embodiments of this case are described above, these embodiments are not intended to limit this case. Those skilled in the art can make changes to the technical features of this case based on the express or implied content of this case. All such changes may fall within the scope of patent protection sought in this case. In other words, the scope of patent protection of this case shall be determined by the scope of the patent application in this specification.

[0044] Figure Labels

[0045] 100: Capacitive sensing device

[0046] 110: Amplifier Circuit

[0047] 120: Switching circuit system

[0048] 130: Counter Circuit

[0049] 140: Comparator Circuit

[0050] 150: Digital control circuit

[0051] 210: Current source circuit

[0052] 400: Capacitive sensing method

[0053] CFB: Feedback capacitor

[0054] CNT: Count value

[0055] CT: Capacitor under test

[0056] EN: Enable signal

[0057] I int Current

[0058] P1~P3: Stages

[0059] S1~S4: Signals

[0060] S410, S420, S430, S440: Operation

[0061] SC: Control signal

[0062] SW1~SW4: Switches

[0063] T: Phase

[0064] T1~T4: Time

[0065] VA: Voltage

[0066] VO: Output voltage

[0067] VREF1, VREF2: Reference voltages

Claims

1. A capacitive sensing device, comprising: An amplifier circuit, wherein the first input terminal of the amplifier circuit is coupled to the capacitor under test; A feedback capacitor is coupled between the first input terminal and the output terminal of the amplifier circuit; A switching circuit system is used to transmit a first reference voltage to the second input terminal of the amplifier circuit in a first stage and couple the first input terminal to the output terminal, transmit a second reference voltage to the second input terminal in a second stage, and adjust the output voltage of the output terminal in a third stage; A counter circuit is used to start counting in the third stage and stop counting according to a control signal to generate a count value, wherein the count value is used to reflect the capacitance change of the capacitor under test; as well as A comparator circuit is used to generate the control signal in the third stage based on the output voltage and the second reference voltage.

2. The capacitance sensing device according to claim 1, wherein the first reference voltage is lower than the second reference voltage, and the switching circuit system is used to transmit current to the first input terminal in the third stage to adjust the output voltage.

3. The capacitive sensing device of claim 1, wherein the second reference voltage is lower than the first reference voltage, and the switching circuit system is configured to draw current from the first input terminal to ground in the third stage to adjust the output voltage.

4. The capacitive sensing device according to claim 1, wherein the switching circuit system comprises: A first switch is configured to be turned on during the first phase to transmit the first reference voltage to the second input terminal; A second switch is used to turn on in the first stage to couple the first input terminal to the output terminal; A third switch is used to turn on in the second stage to transmit the second reference voltage to the second input terminal; Current source circuit; as well as A fourth switch is used to turn on in the third stage to couple the current source circuit to the first input terminal to adjust the output voltage.

5. The capacitive sensing device according to claim 4, wherein the first reference voltage is lower than the second reference voltage, and the current source circuit is used to transmit current to the first input terminal via the fourth switch.

6. The capacitive sensing device of claim 4, wherein the second reference voltage is lower than the first reference voltage, and the current source circuit is configured to draw current from the first input terminal to ground via the fourth switch.

7. The capacitance sensing device according to claim 1, wherein the change in capacitance of the capacitor under test is proportional to the count value.

8. The capacitance sensing device of claim 1, wherein the count value indicates the length of time between when the counter circuit starts counting and when the output voltage is less than or equal to the second reference voltage, or indicates the length of time between when the counter circuit starts counting and when the output voltage is higher than or equal to the second reference voltage.

9. The capacitive sensing device according to claim 1, wherein the count value is proportional to the voltage difference between the first reference voltage and the second reference voltage.

10. A capacitive sensing method, comprising: In the first stage, a first reference voltage is transmitted to a first input terminal of an amplifier circuit, and a second input terminal of the amplifier circuit is coupled to an output terminal of the amplifier circuit, wherein the second input terminal is coupled to the output terminal via a feedback capacitor and to ground via a capacitor under test; In the second stage, the second reference voltage is transmitted to the first input terminal; In the third stage, the output voltage of the output terminal is adjusted, and a control signal is generated based on the output voltage and the second reference voltage; as well as Counting begins upon entering the third stage and stops according to the control signal to generate a count value, wherein the count value is used to reflect the capacitance change of the capacitor under test.

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