Driving circuit, display panel, display device and driving method
By designing drive circuits for selection and signal modules on the display panel, the problem of the inability to simultaneously achieve brightness and uniformity in existing technologies has been solved, realizing high brightness or high uniformity display effects in different scenarios.
Patent Information
- Application Number
- CN202211735647.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-12-30
- Publication Date
- 2026-01-27
- Estimated Expiration
- 2042-12-30
AI Technical Summary
The existing display driving circuits are incompatible with the two sub-pixel driving modes, resulting in a tradeoff between brightness and uniformity.
Design a driving circuit that includes a selection module, a first signal module, and a second signal module. The selection module controls the first or second signal module to conduct with the output module, thereby achieving control signal output with different duty cycles and combining the advantages of two driving modes.
This allows the display panel to select between high brightness or high uniformity output modes in different application scenarios to meet various needs.
Smart Images

Figure CN117292657B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of display technology, and more specifically, to a driving circuit, a display panel, a display device, and a driving method. Background Technology
[0002] Display devices such as Liquid Crystal Displays (LCDs) and Organic Light Emitting Displays (OLEDs) include multiple pixel units arranged in an array. Each pixel unit typically includes at least three sub-pixels of red, green, and blue colors. Different colors are created by varying the luminous intensities of the red, green, and blue sub-pixels, thus displaying the image.
[0003] In related technologies, there are two modes for driving sub-pixels. The first mode, refer to... Figure 1 As shown, in a single frame of display, pixels in any row enter the light-emitting stage after the data signal is written, i.e., each row emits light in a scrolling manner. The second mode is described below. Figure 2 As shown, after data signals are sequentially written to each row of pixels, all rows of pixels uniformly enter the light-emitting stage. In the first mode, the pixel light-emitting time is long, resulting in high brightness. In the second mode, the light-emitting time is short, but the display uniformity is higher. Existing display driving circuits are not compatible with either of these driving methods. Summary of the Invention
[0004] In view of this, the present invention provides a driving circuit, a display panel, a display device, and a driving method, which can have two output modes and can select different output modes in different application scenarios.
[0005] In a first aspect, the present invention provides a driving circuit, comprising at least one circuit unit;
[0006] The circuit unit includes: a selection module, a first signal module, a second signal module, and an output module;
[0007] Both the first signal module and the second signal module are electrically connected to the selection module;
[0008] The output terminals of the first signal module and the second signal module are both electrically connected to the output module;
[0009] The first signal module is used to output a first control signal;
[0010] The second signal module is used to output a second control signal;
[0011] The duty cycles of the first control signal and the second control signal are different;
[0012] The selection module is used to determine, based on the selection signal, whether the first signal module or the second signal module is connected to the output module.
[0013] The output module is used to output either the first control signal or the second control signal.
[0014] In a second aspect, the present invention provides a display panel, including the driving circuit, light emission control signal line and pixel circuit provided in the first aspect of the present invention;
[0015] The light emission control signal line is electrically connected to the output terminal of the output module of the driving circuit, and
[0016] The light emission control signal line is electrically connected to the light emission control terminal of the pixel circuit.
[0017] Thirdly, the present invention provides a display device including the display panel provided in the first aspect of the present invention.
[0018] Fourthly, the present invention provides a driving method, comprising: a driving circuit including a selection module, a first signal module, a second signal module, and an output module;
[0019] The driving method includes:
[0020] The selection module receives a selection signal at its input terminal;
[0021] When the selection signal is a high-level signal, the first signal module and the output module are turned on, and the first control signal output by the first signal module is sent to the output module.
[0022] When the selection signal is a low-level signal, the second signal module is connected to the output module, and the second control signal output by the second signal module is sent to the output module.
[0023] Compared with the prior art, the driving circuit, display panel, display device, and driving method provided by the present invention achieve at least the following beneficial effects:
[0024] The embodiments provided by this invention simultaneously arrange a first signal module and a second signal module on the display panel, and set a selection module to control the first signal module or the second signal module to be connected to the output module. When the first signal module is connected to the output module, the duty cycle of the first control signal output by the first signal module is high, the pixel light-up time is long, and the brightness of the display panel is high. When the second signal module is connected to the output module, the duty cycle of the second control signal output by the second signal module is low, the pixels light up simultaneously, and the uniformity of the display panel is high. Therefore, the embodiments provided by this invention combine the advantages of two output modes, and through the design of the selection module and a reasonable connection method, the driving circuit can determine whether to output the first control signal or the second control signal according to the selection signal, so that the display panel has different light-up effects and can be applied to different application scenarios.
[0025] Of course, any product implementing this invention does not necessarily need to achieve all of the technical effects described above at the same time.
[0026] Other features and advantages of the invention will become clear from the following detailed description of exemplary embodiments of the invention with reference to the accompanying drawings. Attached Figure Description
[0027] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments of the invention and, together with their description, serve to explain the principles of the invention.
[0028] Figure 1 This is a schematic diagram of a pixel driving method in the prior art;
[0029] Figure 2 This is a schematic diagram of another pixel-driving method in the prior art;
[0030] Figure 3 This is a schematic diagram of the composition structure of a driving unit provided in an embodiment of the present invention;
[0031] Figure 4 This is a schematic diagram of the composition structure of another driving unit provided in an embodiment of the present invention;
[0032] Figure 5 This is a schematic diagram of the composition structure of another driving unit provided in an embodiment of the present invention;
[0033] Figure 6 This is a schematic diagram of the composition structure of another driving unit provided in an embodiment of the present invention;
[0034] Figure 7 This is a schematic diagram of the composition structure of a generation module provided in an embodiment of the present invention;
[0035] Figure 8This is a schematic diagram of the composition structure of a driving circuit provided in an embodiment of the present invention.
[0036] Figure 9 This is a schematic diagram of the composition structure of a display panel provided in an embodiment of the present invention;
[0037] Figure 10 This is a top view of a display device provided in an embodiment of the present invention;
[0038] Figure 11 This is a flowchart of a driving method provided in an embodiment of the present invention. Detailed Implementation
[0039] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values of the components and steps set forth in these embodiments do not limit the scope of the invention.
[0040] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the invention or its application or use.
[0041] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.
[0042] In all the examples shown and discussed herein, any specific values should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.
[0043] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.
[0044] In related technologies, there are two modes for driving sub-pixels. The first mode, refer to... Figure 1 As shown, in a single frame of display, pixels in any row enter the light-emitting stage after the data signal is written, i.e., each row emits light in a scrolling manner. The second mode is described below. Figure 2 As shown, after data signals are sequentially written to each row of pixels, all rows of pixels uniformly enter the light-emitting stage. In the first mode, the pixel light-emitting time is long, resulting in high brightness. In the second mode, the light-emitting time is short, but the display uniformity is higher. Existing display driving circuits are not compatible with either of these driving methods.
[0045] To solve the above-mentioned technical problems, embodiments of the present invention provide a driving circuit 100, referring to... Figure 3 As shown, Figure 3This is a schematic diagram of the composition structure of a driving unit provided in an embodiment of the present invention. The embodiment of the present invention provides a driving circuit 100, including at least one circuit unit 200.
[0046] Circuit unit 200 includes: selection module 10, first signal module 20, second signal module 30 and output module 40;
[0047] Both the first signal module 20 and the second signal module 30 are electrically connected to the selection module 10;
[0048] The output terminals of the first signal module 20 and the second signal module 30 are both electrically connected to the output module 40.
[0049] The first signal module 20 is used to output the first control signal;
[0050] The second signal module 30 is used to output a second control signal;
[0051] The duty cycles of the first control signal and the second control signal are different;
[0052] Selection module 10 is used to determine whether the first signal module 20 or the second signal module 30 is connected to the output module 40 based on the selection signal.
[0053] Output module 40 is used to output a first control signal or a second control signal.
[0054] Understandably, the first signal module 20 is used to output a first control signal, and the second signal module 30 is used to output a second control signal. Furthermore, the duty cycles of the first and second control signals are different. The first and second control signals can respectively refer to the light-emitting drive signal in the first mode and the light-emitting drive signal in the second mode of the prior art. In the first mode, in a frame of display, any sub-pixel of any pixel unit receives the light-emitting drive signal immediately after receiving the data input signal, and the duty cycle of the light-emitting drive signal is high. In the second mode, in a frame of display, any sub-pixel of any pixel unit receives the light-emitting drive signal immediately after the last sub-pixel receives the data input signal, and the duty cycle of the light-emitting drive signal is low.
[0055] Furthermore, both the first signal module 20 and the second signal module 30 are electrically connected to the selection module 10, and the output terminals of both the first signal module 20 and the second signal module 30 are electrically connected to the output module 40. The selection module 10 can determine whether the first signal module 20 or the second signal module 30 is connected to the output module 40 based on the selection signal. Specifically, when the first signal module 20 is connected to the output module 40, the second signal module 30 outputs a high-impedance state, equivalent to being disconnected from the output module 40; when the second signal module 30 is connected to the output module 40, the first signal module 20 outputs a high-impedance state, equivalent to being disconnected from the output module 40.
[0056] The embodiments provided by this invention simultaneously arrange a first signal module 20 and a second signal module 30 on the display panel, and set a selection module 10 to control the first signal module 20 or the second signal module 30 to be connected to the output module 40. When the first signal module 20 is connected to the output module 40, the duty cycle of the first control signal output by the first signal module 20 is high, the pixel light-up time is long, and the brightness of the display panel is high. When the second signal module 30 is connected to the output module 40, the duty cycle of the second control signal output by the second signal module 30 is low, the pixels light up simultaneously, and the uniformity of the display panel is high. Therefore, the embodiments provided by this invention combine the advantages of two output modes, and through the design of the selection module 10 and a reasonable connection method, the driving circuit 100 can determine whether to output the first control signal or the second control signal according to the selection signal, so that the display panel has different light-up effects and can be applied to different application scenarios.
[0057] In another embodiment provided by the present invention, reference is made to Figure 4 As shown, Figure 4 This is a schematic diagram of the composition of another driving unit provided in an embodiment of the present invention. The first signal module 20 includes a generation module 21 and a first control module 22;
[0058] The output terminal of the generation module 21 is electrically connected to the input terminal of the first control module 22;
[0059] The output terminal of the first control module 22 is electrically connected to the output module 40;
[0060] Both the first potential terminal BC and the second potential terminal C of the first control module 22 are electrically connected to the selection module 10.
[0061] Generation module 21 is used to generate intermediate signals;
[0062] The first control module 22 is used to turn on or off according to the selection signal.
[0063] It is understood that the first signal module 20 includes a generation module 21 and a first control module 22, wherein the generation module 21 is used to generate an intermediate signal. The intermediate signal generated by the generation module 21 is transmitted to the first control module 22. The first potential terminal BC and the second potential terminal C of the first control module 22 are both electrically connected to the selection module 10, and are turned on or off according to the selection signal of the selection module 10.
[0064] Specifically, when the first control module 22 is turned on, the intermediate signal generated by the generation module 21 is transmitted to the first control module 22. The first control module 22 receives the intermediate signal and generates a first control signal. The first control module 22 is connected to the output module 40, and the first control module 22 transmits the first control signal to the output module 40. When the first control module 22 is turned off, the first control module 22 outputs a high-impedance state, which is equivalent to being disconnected from the output module 40.
[0065] The embodiments provided by this invention constitute a first signal module 10 by electrically connecting a generation module 21 and a first control module 22. The generation module 21 generates an intermediate signal, and the first control module 22 is used to turn the signal on or off according to a selection signal. Thus, in the first signal module 20, only the first control module 22 needs to be controlled to enable or disable the first signal module 20 and the output module. Therefore, the first control module 22 only needs to be electrically connected to the selection module 10 and the output module 40, simplifying the circuit. Simultaneously, the generation module 21 is only electrically connected to the first control module 22, and the intermediate signal generated by the generation module 21 can be set according to the actual application scenario, offering convenience and flexibility; this invention does not impose specific limitations.
[0066] In another embodiment provided by the present invention, reference is made to Figure 5 As shown, Figure 5 This is a schematic diagram of the composition of another driving unit provided in an embodiment of the present invention. The selection module 10 includes a first inverter Lnv1;
[0067] The output terminal of the first inverter Lnv1 is electrically connected to the first potential terminal BC of the first control module 22, and is also electrically connected to the second potential terminal C of the second signal module 30.
[0068] The input terminal of the first inverter Lnv1 is electrically connected to the second potential terminal C of the first control module 22, and is electrically connected to the first potential terminal BC of the second signal module 30.
[0069] It is understandable that an inverter can reverse the phase of an input signal by 180 degrees. For example, when the signal input to the inverter is a high-level signal, the signal output to the inverter is a low-level signal.
[0070] Specifically, in the embodiments provided by this invention, the selection module 10 includes a first inverter Lnv1, and the output terminal of the first inverter Lnv1 is electrically connected to the first potential terminal BC of the first control module 22 and to the second potential terminal C of the second signal module 30; the input terminal of the first inverter Lnv1 is electrically connected to the second potential terminal C of the first control module 22 and to the first potential terminal BC of the second signal module 30. For example, when the signal acquired at the input terminal of the first inverter Lnv1 is a high-level signal, the signal output from the output terminal of the first inverter Lnv1 is a low-level signal. At this time, the first potential terminal BC of the first control module 22 is a low-level signal, and the second potential terminal C is a high-level signal; while the first potential terminal BC of the second signal module 30 is a high-level signal, and the second potential terminal C is a low-level signal. Thus, the potentials of the first potential terminal BC and the second potential terminal C of the first control module 22 and the second signal module 30 are exactly opposite.
[0071] The embodiments provided by this invention utilize a first inverter Lnv1 to form a selection module 10, causing the signal at the output terminal of the selection module 10 to be phase-reversed relative to the signal at the input terminal. The first potential terminal BC of the first control module 22 and the second potential terminal C of the second signal module 30 are electrically connected to the output terminal of the first inverter Lnv1; the second potential terminal C of the first control module 22 and the first potential terminal BC of the second signal module 30 are also electrically connected to the output terminal of the first inverter Lnv1. This ensures that the potentials of the first potential terminals BC and C of the first control module 22 and the second signal module 30 are exactly opposite. When the first control module 22 is on, the second signal module 30 is off; conversely, when the first control module 22 is off, the second signal module 30 is on. Thus, by controlling the input signal of the first inverter Lnv1, the on / off state of either the first signal module 20 or the second signal module 30 can be controlled, simplifying the circuit design.
[0072] In another embodiment provided by the present invention, reference continues to... Figure 5 As shown, the first control module 22 includes a first three-state inverter TrLnv1;
[0073] The input terminal of the first three-state inverter TrLnv1 is electrically connected to the output terminal of the generation module 21;
[0074] The output terminal of the first three-state inverter TrLnv1 is electrically connected to the output module 40;
[0075] The first potential terminal BC of the first tri-state inverter TrLnv1 is electrically connected to the output terminal of the first inverter Lnv1, and the second potential terminal C of the first tri-state inverter TrLnv1 is electrically connected to the input terminal of the first inverter Lnv1.
[0076] Understandably, compared to an inverter, a tri-state inverter adds a first potential terminal BC and a second potential terminal C. The first potential terminal BC and the second potential terminal C are used to control the operating state of the tri-state inverter. For example, when the first potential terminal BC is a low-level signal and the second potential terminal C is a high-level signal, the tri-state inverter is in the operating state and is turned on; when the first potential terminal BC is a high-level signal and the second potential terminal C is a low-level signal, the tri-state inverter is in the off state and outputs a high-impedance state.
[0077] Specifically, the first control module 22 includes a first tri-state inverter TrLnv1, with its first potential terminal BC electrically connected to the output terminal and its second potential terminal C electrically connected to the input terminal. When the signal received at the input terminal of the first inverter Lnv1 is a high-level signal, the output terminal of the first inverter Lnv1 outputs a low-level signal. At this time, the first potential terminal BC of the first tri-state inverter TrLnv1 is a low-level signal, the second potential terminal C is a high-level signal, and the first tri-state inverter TrLnv1 is in the working state and is turned on. When the signal received at the input terminal of the first inverter Lnv1 is a low-level signal, the output terminal of the first inverter Lnv1 outputs a high-level signal. At this time, the first potential terminal BC of the first tri-state inverter TrLnv1 is a high-level signal, and the second potential terminal C is a low-level signal. The first tri-state inverter TrLnv1 is in the cut-off state, and the first tri-state inverter TrLnv1 outputs a high-impedance state.
[0078] Furthermore, the input terminal of the first tri-state inverter TrLnv1 is electrically connected to the output terminal of the generation module 21; the output terminal of the first tri-state inverter TrLnv1 is electrically connected to the output module 40. Therefore, when the first tri-state inverter TrLnv1 is in the working state, its input terminal receives the intermediate signal generated by the generation module 21 and generates a first control signal from the intermediate signal, which is then sent to the output module 40. When the first tri-state inverter TrLnv1 is in the off state, no signal is sent to the output module 40.
[0079] The embodiment provided by this invention utilizes a first tri-state inverter TrLnv1 to construct a first control module 22. The first potential terminal BC and the second potential terminal C of the first tri-state inverter TrLnv1 are electrically connected to the output terminal and input terminal of the first inverter Lnv1, respectively. This causes the level signals of the first potential terminal BC and the second potential terminal C of the first tri-state inverter TrLnv1 to change according to the signal obtained from the input terminal of the first inverter Lnv1, and remain opposite. Thus, by controlling the input signal of the first inverter Lnv1, the conduction or cutoff of the first control module 22 can be achieved, simplifying the circuit design.
[0080] In another embodiment provided by the present invention, reference continues to... Figure 5 As shown, the second signal module 30 includes a second tri-state inverter TrLnv2;
[0081] The output terminal of the second three-state inverter TrLnv2 is electrically connected to the output module 40;
[0082] The first potential terminal BC of the second tri-state inverter TrLnv2 is electrically connected to the input terminal of the first inverter Lnv1, and the second potential terminal C of the second tri-state inverter TrLnv2 is electrically connected to the output terminal of the first inverter Lnv1.
[0083] It is understandable that the second three-state inverter TrLnv2 works on the same principle as the first three-state inverter TrLnv1.
[0084] Specifically, the second signal module 30 includes a second tri-state inverter TrLnv2, with its first potential terminal BC electrically connected to the input terminal of the first inverter Lnv1, and its second potential terminal C electrically connected to the output terminal of the first inverter Lnv1. When the signal acquired at the input terminal of the first inverter Lnv1 is a high-level signal, the output terminal of the first inverter Lnv1 outputs a low-level signal. At this time, the first potential terminal BC of the second tri-state inverter TrLnv2 is a high-level signal, and the second potential terminal C is a low-level signal. When the second tri-state inverter TrLnv2 is in the off state, no signal is sent to the output module 40. When the signal acquired at the input terminal of the first inverter Lnv1 is a low-level signal, the output terminal of the first inverter Lnv1 outputs a high-level signal. At this time, the first potential terminal BC of the second tri-state inverter TrLnv2 is a low-level signal, and the second potential terminal C is a high-level signal. The second tri-state inverter TrLnv2 is in working state and is turned on.
[0085] Furthermore, the connections between the first potential terminal BC and the second potential terminal C of the second tri-state inverter TrLnv2 and the first inverter Lnv1 are exactly the opposite of the connections between the first potential terminal BC and the second potential terminal C of the first tri-state inverter TrLnv1 and the first inverter Lnv1. Therefore, when the signal received at the input terminal of the first inverter Lnv1 is a high-level signal, the first tri-state inverter TrLnv1 is turned on, and the second tri-state inverter TrLnv2 is turned off; conversely, when the signal received at the input terminal of the first inverter Lnv1 is a low-level signal, the first tri-state inverter TrLnv1 is turned off, and the second tri-state inverter TrLnv2 is turned on. In this way, only the input signal of the first inverter Lnv1 needs to be controlled to control the conduction of the first signal module 20 or the second signal module 30, simplifying the circuit design.
[0086] In another embodiment provided by the present invention, reference continues to... Figure 5 As shown, the output module 40 includes a second inverter Lnv2;
[0087] The input terminal of the second inverter Lnv2 is electrically connected to the output terminal of the first tri-state inverter TrLnv1 and the output terminal of the second tri-state inverter TrLnv2.
[0088] It is understandable that the input terminal of output module 40 is electrically connected to the output terminals of both the first tri-state inverter TrLnv1 and the second tri-state inverter TrLnv2. Therefore, regardless of whether the first tri-state inverter TrLnv1 or the second tri-state inverter TrLnv2 is turned on, it is also turned on to output module 40. Of course, since the voltage levels of the first potential terminal BC and the second potential terminal C of the first tri-state inverter TrLnv1 and the second tri-state inverter TrLnv2 are kept opposite, the first tri-state inverter TrLnv1 and the second tri-state inverter TrLnv2 will not be turned on simultaneously.
[0089] Furthermore, regardless of whether the first tri-state inverter TrLnv1 or the second tri-state inverter TrLnv2 is turned on with the output module 40, the output signal is always phase-inverted by either the first tri-state inverter TrLnv1 or the second tri-state inverter TrLnv2. Therefore, the output module 40 includes the second inverter Lnv2.
[0090] Specifically, the first control signal output by the first three-state inverter TrLnv1 or the second control signal output by the second three-state inverter TrLnv2 is transmitted to the input terminal of the second inverter Lnv2. The second inverter Lnv2 receives the first control signal or the second control signal, inverts its phase, and outputs it.
[0091] The embodiments provided by this invention utilize a second inverter Lnv2 to form an output module 40, and the input terminal of the second inverter Lnv2 is electrically connected to the output terminals of both the first tri-state inverter TrLnv1 and the second tri-state inverter TrLnv2. This avoids the circuit redundancy caused by requiring separate output modules 40 for each of the first and second tri-state inverters TrLnv1 and TrLnv2. Furthermore, the second inverter Lnv2 can reverse the phase of the signal inverted by either the first or second tri-state inverter TrLnv1 to be in phase with the signal at the input terminal of either the first or second tri-state inverter TrLnv2.
[0092] In another embodiment provided by the present invention, reference is made to Figure 6 As shown, Figure 6 This is a schematic diagram of the composition of another driving unit provided in an embodiment of the present invention. The first control module 22 includes a first transmission gate Tr1;
[0093] The input terminal of the first transmission gate Tr1 is electrically connected to the output terminal of the generation module 21;
[0094] The output terminal of the first transmission gate Tr1 is electrically connected to the output module 40;
[0095] The first potential terminal BC of the first transmission gate Tr1 is electrically connected to the output terminal of the first inverter Lnv1, and the second potential terminal C of the first transmission gate Tr1 is electrically connected to the input terminal of the first inverter Lnv1.
[0096] It is understood that a transmission gate is a controllable switching circuit. The transmission gate includes a first potential terminal BC and a second potential terminal C, which are used to control the operating state of the transmission gate. For example, when the first potential terminal BC is a low-level signal and the second potential terminal C is a high-level signal, the transmission gate is in the operating state and is turned on; when the first potential terminal BC is a high-level signal and the second potential terminal C is a low-level signal, the transmission gate is in the off state.
[0097] Specifically, the first control module 22 includes a first transmission gate Tr1, and the first potential terminal BC of the first transmission gate Tr1 is electrically connected to the output terminal of the first inverter Lnv1, and the second potential terminal C of the first transmission gate Tr1 is electrically connected to the input terminal of the first inverter Lnv1. When the signal acquired at the input terminal of the first inverter Lnv1 is a high-level signal, the output terminal of the first inverter Lnv1 outputs a low-level signal. At this time, the first potential terminal BC of the first transmission gate Tr1 is a low-level signal, the second potential terminal C is a high-level signal, and the first transmission gate Tr1 is in the working state, and the first transmission gate Tr1 is turned on. When the signal acquired at the input terminal of the first inverter Lnv1 is a low-level signal, the output terminal of the first inverter Lnv1 outputs a high-level signal. At this time, the first potential terminal BC of the first transmission gate Tr1 is a high-level signal, the second potential terminal C is a low-level signal, and the first transmission gate Tr1 is in the off state.
[0098] Furthermore, the input terminal of the first transmission gate Tr1 is electrically connected to the output terminal of the generation module 21; the output terminal of the first transmission gate Tr1 is electrically connected to the output module 40. Therefore, when the first transmission gate Tr1 is in the working state, its input terminal receives the intermediate signal generated by the generation module 21 and outputs a first control signal to the output module 40. It should be noted that, since the first transmission gate Tr1 only serves to turn on or off, in this embodiment of the invention, the first control signal is the intermediate signal. When the first transmission gate Tr1 is in the off state, no signal is sent to the output module 40.
[0099] The embodiments provided by this invention utilize a first transmission gate Tr1 to construct a first control module 22. The first potential terminal BC and the second potential terminal C of the first transmission gate Tr1 are electrically connected to the output and input terminals of a first inverter Lnv1, respectively. This causes the level signals of the first potential terminal BC and the second potential terminal C of the first transmission gate Tr1 to change according to the signal obtained from the input terminal of the first inverter Lnv1, and remain opposite. Thus, by controlling the input signal of the first inverter Lnv1, the conduction or cutoff of the first control module 22 can be achieved, simplifying the circuit design.
[0100] In another embodiment provided by the present invention, reference continues to... Figure 6 As shown, the second signal module includes a second transmission gate Tr2;
[0101] The output terminal of the second transmission gate Tr2 is electrically connected to the output module 40;
[0102] The first potential terminal BC of the second transmission gate Tr2 is electrically connected to the input terminal of the first inverter Lnv1, and the second potential terminal C of the second transmission gate Tr2 is electrically connected to the output terminal of the first inverter Lnv1.
[0103] It is understandable that the second transmission gate Tr2 works in the same way as the first transmission gate Tr1.
[0104] Specifically, the second signal module 30 includes a second transmission gate Tr2, and the first potential terminal BC of the second transmission gate Tr2 is electrically connected to the input terminal of the first inverter Lnv1, and the second potential terminal C of the second transmission gate Tr2 is electrically connected to the output terminal of the first inverter Lnv1. When the signal acquired at the input terminal of the first inverter Lnv1 is a high-level signal, the output terminal of the first inverter Lnv1 outputs a low-level signal. At this time, the first potential terminal BC of the second transmission gate Tr2 is a high-level signal, and the second potential terminal C is a low-level signal. When the second transmission gate Tr2 is in the off state, no signal is sent to the output module 40. When the signal acquired at the input terminal of the first inverter Lnv1 is a low-level signal, the output terminal of the first inverter Lnv1 outputs a high-level signal. At this time, the first potential terminal BC of the second transmission gate Tr2 is a low-level signal, and the second potential terminal C is a high-level signal. The second transmission gate Tr2 is in the working state and is turned on.
[0105] Furthermore, the connections between the first potential terminal BC and the second potential terminal C of the second transmission gate Tr2 and the first inverter Lnv1 are exactly the opposite of the connections between the first potential terminal BC and the second potential terminal C of the second transmission gate Tr1 and the first inverter Lnv1. Therefore, when the signal received at the input terminal of the first inverter Lnv1 is a high-level signal, the first transmission gate Tr1 is turned on and the second transmission gate Tr2 is turned off; conversely, when the signal received at the input terminal of the first inverter Lnv1 is a low-level signal, the first transmission gate Tr1 is turned off and the second transmission gate Tr2 is turned on. In this way, only the input signal of the first inverter Lnv1 needs to be controlled to control the conduction of the first signal module 20 or the second signal module 30, simplifying the circuit design.
[0106] In another embodiment provided by the present invention, reference continues to... Figure 6 As shown, the output module 40 includes a third inverter Lnv3 and a fourth inverter Lnv4;
[0107] The input terminal of the third inverter Lnv3 is electrically connected to the output terminal of the first transmission gate Tr1 and the output terminal of the second transmission gate Tr2.
[0108] The output of the third inverter Lnv3 is electrically connected to the input of the fourth inverter Lnv4.
[0109] It is understood that the output module 40 includes a third inverter Lnv3 and a fourth inverter Lnv4 electrically connected in sequence. Furthermore, the input terminal of the third inverter Lnv3 is electrically connected to the output terminals of both the first transmission gate Tr1 and the second transmission gate Tr2. Therefore, regardless of whether the first transmission gate Tr1 or the second transmission gate Tr2 is turned on, both are connected to the output module 40. Of course, since the voltage levels of the first potential terminal BC and the second potential terminal C of the first transmission gate Tr1 and the second transmission gate Tr2 remain opposite, the first transmission gate Tr1 and the second transmission gate Tr2 will not be turned on simultaneously.
[0110] Furthermore, since the transmission gates only function to turn on or off, the signals acquired at the input terminals of the first transmission gate Tr1 or the second transmission gate Tr2 are the same as the signals output at the output terminals. Therefore, in this embodiment of the invention, the output module 40 includes two electrically connected inverters.
[0111] Specifically, the output module 40 includes a third inverter Lnv3 and a fourth inverter Lnv4, with the output terminal of the third inverter Lnv3 electrically connected to the input terminal of the fourth inverter Lnv4. Whether it's the first control signal output from the first transmission gate Tr1 or the second control signal output from the second transmission gate Tr2, when transmitted to the input terminal of the third inverter Lnv3, it will be phase-inverted and output. The input terminal of the fourth inverter Lnv4 receives the phase-inverted first or second control signal and performs phase inversion again. At this time, the phase of the signal output from the fourth inverter Lnv4 is consistent with the first or second control signal. Furthermore, by designing the resistance values of the resistors in the third and fourth inverters Lnv3 and Lnv4, the third and fourth inverters Lnv3 and Lnv4 can have signal amplification capabilities. Therefore, the output module 40 can amplify and output the received first or second control signal.
[0112] In another embodiment provided by the present invention, reference is made to Figure 5 or Figure 6 As shown, the input terminal of the second signal module 30 is electrically connected to the drive signal terminal SIG;
[0113] The drive signal terminal SIG is used to provide a second control signal.
[0114] Understandably, the input terminal of the second signal module 30 is electrically connected to the drive signal terminal SIG. When the second signal module 30 includes a second tri-state inverter TrLnv2, if the first potential terminal BC of the second tri-state inverter TrLnv2 is a high-level signal and the second potential terminal BC is a low-level signal, then the second tri-state inverter TrLnv2 is turned off, and the second control signal provided by the drive signal terminal SIG obtained from the input terminal of the second tri-state inverter TrLnv2 cannot be transmitted to the output module 40. If the first potential terminal BC of the second tri-state inverter TrLnv2 is a low-level signal and the second potential terminal BC is a high-level signal, then the second tri-state inverter TrLnv2 is turned on, and the second control signal provided by the drive signal terminal SIG obtained from the input terminal of the second tri-state inverter TrLnv2 is output to the output module 40 after phase inversion. When the second signal module 30 includes a second transmission gate Tr2, if the first potential terminal BC of the second transmission gate Tr2 is a high-level signal and the second potential terminal BC is a low-level signal, then the second transmission gate Tr2 is turned off, and the second control signal provided by the drive signal terminal SIG obtained from the input terminal of the second transmission gate Tr2 cannot be transmitted to the output module 40. If the first potential terminal BC of the second transmission gate Tr2 is a low-level signal and the second potential terminal BC is a high-level signal, then the second transmission gate Tr2 is turned on, and the second control signal provided by the drive signal terminal SIG obtained from the input terminal of the second transmission gate Tr2 is transmitted to the output module 40.
[0115] It is understandable that the second control signal provided by the drive signal terminal SIG is a constant signal. When the second signal module 30 is turned on and the output module 40 is turned on, multiple sub-pixels connected to the output module 40 simultaneously receive the second control signal and emit light, thus improving the uniformity of the display panel.
[0116] In another embodiment provided by the present invention, reference is made to Figure 5 or Figure 6 As shown, the input terminal of the selection module 10 is also electrically connected to the selection signal terminal SW;
[0117] The select signal terminal SW is used to provide a select signal.
[0118] It is understood that the input terminal of the selection module 10 is electrically connected to the selection signal terminal SW. The selection signal terminal SW is used to provide a selection signal. The selection signal includes a high-level signal and a low-level signal. The high-level signal and the low-level signal are used to indicate that the first signal module 20 or the second signal module 30 is turned on with the output module 40, respectively.
[0119] In the embodiments provided by this invention, the connection between selection module 10 and selection module 20 and the first signal module 20 and the second signal module 30 allows the driving unit 200 to determine whether the first signal module 20 or the second signal module 30 is connected to the output module 40 based on the selection signal obtained from the input terminal of selection module 10. This achieves the setting of two output modes in the same driving unit 100, allowing different output modes to be applied in different application scenarios and meeting different requirements of high brightness or high uniformity of the display panel.
[0120] In another embodiment provided by the present invention, the selection signal is a high-level signal, and the first signal module 20 and the output module 40 are turned on.
[0121] or,
[0122] When the selection signal is low, the second signal module 30 and the output module 40 are turned on.
[0123] It is understandable that when the selection module 10 is the first inverter Lnv1, and the first signal module 20 includes the first tri-state inverter TrLnv1, and the second signal module 30 includes the second tri-state inverter TrLnv2: If the selection signal is a high-level signal, the output terminal of the first inverter Lnv1 outputs a low-level signal. At this time, the first potential terminal BC of the first tri-state inverter TrLnv1 is a low-level signal, and the second potential terminal BC is a high-level signal, so the second tri-state inverter TrLnv2 is turned on, that is, the first signal module 20 and the output module 40 are turned on. If the first potential terminal BC of the second tri-state inverter TrLnv2 is a high-level signal, and the second potential terminal BC is a low-level signal, then the second tri-state inverter TrLnv2 is turned off, that is, the second signal module 30 and the output module 40 are not turned on. If the selected signal is low, the output of the first inverter Lnv1 will be high. At this time, the first potential terminal BC of the first tri-state inverter TrLnv1 will be high, and the second potential terminal BC will be low. Therefore, the second tri-state inverter TrLnv2 will be cut off, meaning the first signal module 20 and the output module 40 will not be connected. If the first potential terminal BC of the second tri-state inverter TrLnv2 is low, and the second potential terminal BC is high, then the second tri-state inverter TrLnv2 will be connected, meaning the second signal module 30 and the output module 40 will be connected.
[0124] When the selection module 10 is the first inverter Lnv1, and the first signal module 20 includes the first transmission gate Tr1, and the second signal module 30 includes the second transmission gate Tr2: If the selection signal is high, the output terminal of the first inverter Lnv1 outputs a low-level signal. At this time, the first potential terminal BC of the first transmission gate Tr1 is low, and the second potential terminal BC is high, so the first transmission gate Tr1 is turned on, meaning the first signal module 20 and the output module 40 are connected. If the first potential terminal BC of the second transmission gate Tr2 is high, and the second potential terminal BC is low, then the second transmission gate Tr2 is turned off, meaning the second signal module 30 and the output module 40 are not connected. If the selection signal is low, the output terminal of the first inverter Lnv1 outputs a high-level signal. At this time, the first potential terminal BC of the first inverter Lnv1 is high, and the second potential terminal BC is low, so the first inverter Lnv1 is turned off, meaning the first signal module 20 and the output module 40 are not connected. When the first potential terminal BC of the second transmission gate Tr2 is low and the second potential terminal BC is high, the second transmission gate Tr2 is turned on, that is, the second signal module 30 and the output module 40 are turned on.
[0125] It should be noted that this embodiment only provides one possible implementation. In other embodiments of the present invention, the first potential terminal BC of the first control module 22 and the second potential terminal C of the second signal module 30 can be electrically connected to the input terminal of the selection module 10, and the second potential terminal C of the first control module 22 and the first potential terminal BC of the second signal module 30 can be electrically connected to the output terminal of the selection module 10. In this case, when the selection signal is a high-level signal, the second signal module 30 and the output module 40 are turned on; when the selection signal is a low-level signal, the first signal module 20 and the output module 40 are turned on. The correspondence between the selection signal and the first signal module 20 and the second signal module 30 can be determined according to the actual connection method. The present invention does not impose specific limitations; it only needs to ensure that different signal modules are turned on and off the output module 40 when the selection signal is a high-level signal and a low-level signal, respectively.
[0126] In another embodiment provided by the present invention, reference is made to Figure 7 As shown, Figure 7 This is a schematic diagram of the composition structure of a generation module provided in an embodiment of the present invention. The generation module 21 includes a fifth inverter Lnv5, a sixth inverter Lnv6, a third tri-state inverter TrLnv3, and a fourth tri-state inverter TrLnv4;
[0127] The input terminal of the fifth inverter Lnv5 is electrically connected to the second potential terminal C of the third tri-state inverter TrLnv3, and is electrically connected to the first potential terminal BC of the fourth tri-state inverter TrLnv4.
[0128] The output terminal of the fifth inverter Lnv5 is electrically connected to the first potential terminal BC of the third three-state inverter TrLnv3, and is electrically connected to the second potential terminal C of the fourth three-state inverter TrLnv4.
[0129] The input terminal of the sixth inverter Lnv6 is electrically connected to the output terminal of the third tri-state inverter TrLnv3 and the output terminal of the fourth tri-state inverter TrLnv4.
[0130] The input terminal of the fourth three-state inverter TrLnv4 is electrically connected to the output terminal of the sixth inverter Lnv6.
[0131] It is understandable that the input terminal of the fifth inverter Lnv5 is electrically connected to the second potential terminal C of the third tri-state inverter TrLnv3, and to the first potential terminal BC of the fourth tri-state inverter TrLnv4; the output terminal of the fifth inverter Lnv5 is electrically connected to the first potential terminal BC of the third tri-state inverter TrLnv3, and to the second potential terminal C of the fourth tri-state inverter TrLnv4. Referring to the connection method of the first inverter Lnv1 with the first tri-state inverter TrLnv1 and the second tri-state inverter TrLnv2, it can be similarly concluded that when the input terminal of the fifth inverter Lnv5 receives a high-level signal, the output terminal of the fifth inverter Lnv5 outputs a low-level signal. At this time, the first potential terminal BC of the third tri-state inverter TrLnv3 is a low-level signal, and the second potential terminal C is a high-level signal. The third tri-state inverter TrLnv3 is turned on, and the input signal acquired at the input terminal of the third tri-state inverter TrLnv3 is output through the third tri-state inverter TrLnv3 and sent to the sixth inverter Lnv6 for output. The first potential terminal BC of the fourth tri-state inverter TrLnv4 is a high-level signal, and the second potential terminal C is a low-level signal. The fourth tri-state inverter TrLnv4 is turned off. When the input terminal of the fifth inverter Lnv5 acquires a low-level signal, the output terminal of the fifth inverter Lnv5 outputs a low-high level signal. At this time, the first potential terminal BC of the third tri-state inverter TrLnv3 is a high-level signal, and the second potential terminal C is a low-level signal. The third tri-state inverter TrLnv3 is turned off. When the first potential terminal BC of the fourth tri-state inverter TrLnv4 is low and the second potential terminal C is high, the fourth tri-state inverter TrLnv4 is turned on. Since the fourth tri-state inverter TrLnv4 and the sixth inverter Lnv6 are connected end-to-end, they form a latch structure, which can maintain the potential of the output terminal of the sixth inverter Lnv6.
[0132] The embodiments provided by the present invention reverse the connection of the first potential terminal BC and the second potential terminal C of the third three-state inverter TrLnv3 and the fourth three-state inverter TrLnv4 to the fifth inverter Lnv5, and the output terminals of the third three-state inverter TrLnv3 and the fourth three-state inverter TrLnv4 are electrically connected to the input terminal of the sixth inverter Lnv6, so that the signal obtained by controlling the input terminal of the fifth inverter Lnv5 can determine the signal output by the generation module 21.
[0133] In another embodiment provided by the present invention, reference continues to... Figure 7 As shown, the input terminal of the fifth inverter Lnv5 is electrically connected to the clock signal terminal CK;
[0134] The clock signal terminal CK is used to provide the clock signal.
[0135] Understandably, the clock signal has a fixed clock frequency. For example, the clock signal duty cycle is 50%. That is, the clock signal provided by the clock signal terminal CK consists of alternating high-level and low-level signals of equal duration. Therefore, the fifth inverter Lnv5 controls the third tri-state inverter TrLnv3 and the fourth tri-state inverter TrLnv4 to conduct alternately. When the third tri-state inverter TrLnv3 is on, the generation module 21 outputs the signal acquired at the input terminal of the third tri-state inverter TrLnv3; when the fourth tri-state inverter TrLnv4 is on, the battery at the output terminal of the generation module 21 is maintained. Furthermore, since the input terminal of the fifth inverter Lnv5 is connected to the clock signal terminal CK that provides the clock signal, the signal output frequency at the output terminal of the generation module 21 matches the clock frequency.
[0136] In another embodiment provided by the present invention, reference is made to Figure 8 As shown, Figure 8 This is a schematic diagram of the composition structure of a driving circuit provided in an embodiment of the present invention. The driving circuit 100 includes multiple cascaded circuit units 200;
[0137] The output terminal of the generation module 21 of the i-th stage circuit unit 200 is electrically connected to the cascaded signal terminal TRG;
[0138] The cascade signal terminal TRG of the i-th stage circuit unit 200 is electrically connected to the input terminal of the third tri-state inverter TrLnv3 of the generation module 21 of the (i+1)-th stage circuit unit 200.
[0139] It is understood that the driving circuit 100 includes multiple circuit units 200, each circuit unit 200 being used to provide a driving signal to at least one pixel circuit. The multiple circuit units 200 are cascaded together.
[0140] Specifically, the output terminal of the generation module 21 of the i-th stage circuit unit 200 is electrically connected to the cascaded signal terminal TRG, and the cascaded signal terminal TRG of the i-th stage circuit unit 200 is electrically connected to the input terminal of the third tri-state inverter TrLnv3 of the generation module 21 of the (i+1)-th stage circuit unit 200. In other words, the output signal of the generation module 21 of the i-th stage circuit unit 200 is the input signal of the generation module 21 of the (i+1)-th stage circuit unit 200.
[0141] Furthermore, when the first signal module 20 of the i-th level circuit unit 200 is turned on, the intermediate signal output by the generation module 21 is transmitted to the output module 40 through the first signal module 20. The sub-pixel electrically connected to the i-th level circuit unit 200 receives the first control signal and emits light under the drive of the first control signal. Additionally, the intermediate signal is also transmitted to the generation module 21 of the (i+1)-th level circuit unit 200 through the cascaded signal terminal TRG. The generation module 21 of the (i+1)-th level circuit unit 200 then generates a corresponding intermediate signal and transmits it to the output module 40 through the first signal module 20. The sub-pixel electrically connected to the (i+1)-th level circuit unit 200 receives the first control signal and emits light under the drive of the first control signal.
[0142] The embodiments provided by the present invention electrically connect the output terminal of the generation module 21 of the i-th level circuit unit 200 to the input terminal of the generation module 21 of the (i+1)-th level circuit unit 200, thereby realizing that the intermediate signal output by the previous level circuit unit 200 is used as the input signal of the next level circuit unit 200, and thus realizing the sequential shifting and output of the first control signals of multiple circuit units 200.
[0143] In another embodiment provided by the present invention, reference is made to Figure 3 and Figure 8 As shown, there are multiple circuit units 200, and multiple circuit units 200 are cascaded.
[0144] The drive circuit 100 includes a first output mode and a second output mode;
[0145] In the first output mode, the selection signal provides the first level, each circuit unit 200 outputs the first control signal respectively, and the function pulses of each first control signal are shifted and output sequentially;
[0146] In the second output mode, the selection signal provides the second level, each circuit unit 200 outputs the second control signal, and the function pulses of each second control signal are output synchronously.
[0147] It is understood that the drive circuit 100 includes a first output mode and a second output mode. The first output module corresponds to the first signal module 20 being turned on; the second output mode corresponds to the second signal module 20 being turned on.
[0148] Specifically, in the first output mode, the selection signal provides a first level, which can be a high-level signal. At this time, the first signal module 20 is turned on, and the first signal module 20 outputs a first control signal. Furthermore, since the generation modules 21 in each circuit unit 200 are cascaded, the first control signals of multiple circuit units 200 are sequentially shifted and output.
[0149] In the second output mode, the selection signal provides a second level, which can be a low-level signal. At this time, the second signal module 30 is turned on, and the second signal module 30 outputs a second control signal. Furthermore, since the input terminals of the second signal modules 30 of each circuit unit 200 are electrically connected to the drive signal terminal SIG, the second control signals of multiple circuit units 200 are output synchronously.
[0150] In the embodiments provided by this invention, the output mode of the driving circuit 100 can be determined according to the selection signal. The first output mode has a long light-emitting time and high brightness, while the second output mode has high display uniformity. The embodiments provided by this invention can select an appropriate output mode according to different application scenarios.
[0151] Based on the same inventive concept, the present invention also provides a display panel 300, see reference 1. Figure 9 As shown, Figure 9 This is a schematic diagram illustrating the structural composition of a display panel according to an embodiment of the present invention. The display panel 300 includes the driving circuit 100, the light emission control signal line Emit, and the pixel circuit 400 as described in any of the above embodiments;
[0152] The light emission control signal line Emit is electrically connected to the output terminal of the output module 40 of the driver circuit 100, and
[0153] The light emission control signal line Emit is electrically connected to the light emission control terminal of the pixel circuit 400.
[0154] It is understood that the display panel 300 includes multiple pixel circuits 400, each pixel circuit 400 driving at least one sub-pixel to emit light. The display panel 300 also includes an emission control signal line Emit, which is electrically connected to the output terminal of the output module 40 of the driving circuit 100 and to the emission control terminal of the pixel circuit 400. The emission control signal line Emit can send a first control signal or a second control signal output by the driving circuit 100 to the pixel circuit 400 to drive the sub-pixel to emit light.
[0155] Optionally, the display panel 300 provided in this embodiment can be a display panel using organic light-emitting diode display technology, i.e., an OLED display panel. The basic structure of an OLED display panel typically includes a hole transport layer, an emissive layer, and an electron transport layer. When a suitable voltage is supplied, holes from the anode and electrons from the cathode combine in the emissive layer to produce light. Compared to liquid crystal display panels, OLED display panels have the characteristics of high visibility and high brightness, and are also more energy-efficient, lighter, and thinner.
[0156] Based on the same inventive concept, the present invention also provides a display device 500, referring to... Figure 10 As shown, Figure 10 This is a top view of a display device provided in an embodiment of the present invention.
[0157] It should be noted that, Figure 10 The display device 500 is illustrated using only a rectangular display device 500 as an example. In some other embodiments of this application, the display device 500 may also be embodied in other shapes, such as circular, elliptical or irregular structures.
[0158] The display device 500 provided in this embodiment of the invention can be any electronic device with display function, such as a touch screen, mobile phone, tablet computer, laptop computer, e-reader, or television. The display device 500 provided in this embodiment of the invention has the beneficial effects of the driving circuit 100 provided in this embodiment of the invention. For details, please refer to the specific descriptions of the driving circuit 100 in the above embodiments; these descriptions will not be repeated here.
[0159] Based on the same inventive concept, the present invention also provides a driving method, referring to... Figure 11 As shown, Figure 11 The flowchart illustrates a driving method provided in an embodiment of the present invention. The driving circuit includes a selection module, a first signal module, a second signal module, and an output module.
[0160] The driving method includes:
[0161] S10. Select the selection signal at the input terminal of the selection module;
[0162] S21. When the selection signal is a high-level signal, the first signal module and the output module are turned on, and the first control signal output by the first signal module is sent to the output module.
[0163] or,
[0164] S22. When the selection signal is a low-level signal, the second signal module and the output module are turned on, and the second control signal output by the second signal module is sent to the output module.
[0165] It is understandable that S21 and S22 are two parallel steps. After S10 is executed, if the selection signal received by the input terminal of the selection module is a high-level signal, then S21 is executed, the first signal module and the output module are turned on, and the first control signal output by the first signal module is sent to the output module. After S10 is executed, if the selection signal received by the input terminal of the selection module is a low-level signal, then...
[0166] When S22 is executed, the second signal module and the output module are connected, and the second control signal 5 output by the second signal module is sent to the output module.
[0167] The embodiments provided by this invention select and determine the output mode of the driving circuit through S10, specifically including a first output mode in which the first signal module and the output module are connected, and a second output mode in which the second signal module and the output module are connected. The first output mode and the second output mode have different advantages and can be selected appropriately according to the application scenario.
[0168] In summary, the driving circuit, display panel, display device, and driving method provided by this invention...
[0169] The following beneficial effects were achieved:
[0170] The embodiments provided by this invention simultaneously arrange a first signal module and a second signal module on a display panel, and provide a selection module to control the first signal module or the second signal module with the output module.
[0171] Block conduction. When the first signal module and the output module are turned on, the duty cycle of the first control signal output by the first signal module is high, the pixel emission time is long, and the brightness of the display panel is high. When the second signal...
[0172] When the module and output module are connected, the duty cycle of the second control signal output by the second signal module is low, the pixels emit light simultaneously, and the uniformity of the display panel is high. Therefore, the embodiment provided by this invention combines the advantages of two output modes, and through the design selection of modules and reasonable connection methods, enables the driver to achieve optimal performance.
[0173] The dynamic circuit can determine the output of the first control signal or the second control signal based on the selection signal, so that the 0 display panel has different luminous effects and can be used in different application scenarios.
[0174] Although some specific embodiments of the present invention have been described in detail by way of examples, those skilled in the art should understand that the above examples are for illustrative purposes only and not for limitation.
[0175] The scope of this invention is defined by the appended claims. Those skilled in the art will understand that modifications can be made to the above embodiments without departing from the scope and spirit of this invention.
Claims
1. A driving circuit, characterized in that, The driving circuit is used for light emission control; Includes at least one circuit unit; The circuit unit includes: a selection module, a first signal module, a second signal module, and an output module; Both the first signal module and the second signal module are electrically connected to the selection module; The output terminals of the first signal module and the second signal module are both electrically connected to the output module; The first signal module is used to output a first control signal, which is used to control the pixel to emit light in a scrolling manner; The second signal module is used to output a second control signal, which is used to control the pixels to emit light simultaneously. The duty cycles of the first control signal and the second control signal are different; The selection module is used to determine, based on the selection signal, whether the first signal module or the second signal module is connected to the output module. The output module is used to output the first control signal, or the second control signal; The input terminal of the selection module is also electrically connected to the selection signal terminal; The selection signal terminal is used to provide the selection signal.
2. The driving circuit according to claim 1, characterized in that, The first signal module includes a generation module and a first control module; The output terminal of the generation module is electrically connected to the input terminal of the first control module; The output terminal of the first control module is electrically connected to the output module; Both the first potential terminal and the second potential terminal of the first control module are electrically connected to the selection module. The generation module is used to generate intermediate signals; The first control module is used to turn on or off according to the selection signal.
3. The driving circuit according to claim 2, characterized in that, The selection module includes a first inverter; The output terminal of the first inverter is electrically connected to the first potential terminal of the first control module and to the second potential terminal of the second signal module; The input terminal of the first inverter is electrically connected to the second potential terminal of the first control module and to the first potential terminal of the second signal module.
4. The driving circuit according to claim 3, characterized in that, The first control module includes a first tri-state inverter; The input terminal of the first tri-state inverter is electrically connected to the output terminal of the generation module; The output terminal of the first tri-state inverter is electrically connected to the output module; The first potential terminal of the first tri-state inverter is electrically connected to the output terminal of the first inverter, and the second potential terminal of the first tri-state inverter is electrically connected to the input terminal of the first inverter.
5. The driving circuit according to claim 4, characterized in that, The second signal module includes a second tri-state inverter; The output terminal of the second tri-state inverter is electrically connected to the output module; The first potential terminal of the second tri-state inverter is electrically connected to the input terminal of the first inverter, and the second potential terminal of the second tri-state inverter is electrically connected to the output terminal of the first inverter.
6. The driving circuit according to claim 5, characterized in that, The output module includes a second inverter; The input terminal of the second inverter is electrically connected to both the output terminal of the first tri-state inverter and the output terminal of the second tri-state inverter.
7. The driving circuit according to claim 3, characterized in that, The first control module includes a first transmission gate; The input terminal of the first transmission gate is electrically connected to the output terminal of the generation module; The output terminal of the first transmission gate is electrically connected to the output module; The first potential terminal of the first transmission gate is electrically connected to the output terminal of the first inverter, and the second potential terminal of the first transmission gate is electrically connected to the input terminal of the first inverter.
8. The driving circuit according to claim 7, characterized in that, The second signal module includes a second transmission gate; The output terminal of the second transmission gate is electrically connected to the output module; The first potential terminal of the second transmission gate is electrically connected to the input terminal of the first inverter, and the second potential terminal of the second transmission gate is electrically connected to the output terminal of the first inverter.
9. The driving circuit according to claim 8, characterized in that, The output module includes a third inverter and a fourth inverter; The input terminal of the third inverter is electrically connected to the output terminal of the first transmission gate and the output terminal of the second transmission gate. The output terminal of the third inverter is electrically connected to the input terminal of the fourth inverter.
10. The driving circuit according to claim 1, characterized in that, The input terminal of the second signal module is electrically connected to the drive signal terminal; The drive signal terminal is used to provide the second control signal.
11. The driving circuit according to claim 1, characterized in that, The selection signal is a high-level signal, and the first signal module and the output module are turned on. or, The selection signal is a low-level signal, and the second signal module is connected to the output module.
12. The driving circuit according to claim 2, characterized in that, The generation module includes a fifth inverter, a sixth inverter, a third three-state inverter, and a fourth three-state inverter; The input terminal of the fifth inverter is electrically connected to the second potential terminal of the third tri-state inverter, and is also electrically connected to the first potential terminal of the fourth tri-state inverter. The output terminal of the fifth inverter is electrically connected to the first potential terminal of the third three-state inverter and to the second potential terminal of the fourth three-state inverter. The input terminal of the sixth inverter is electrically connected to the output terminal of the third three-state inverter and the output terminal of the fourth three-state inverter; The input terminal of the fourth three-state inverter is electrically connected to the output terminal of the sixth inverter.
13. The driving circuit according to claim 12, characterized in that, The input terminal of the fifth inverter is electrically connected to the clock signal terminal; The clock signal terminal is used to provide a clock signal.
14. The driving circuit according to claim 12, characterized in that, The driving circuit includes multiple cascaded circuit units; The output terminal of the generation module of the i-th stage circuit unit is electrically connected to the cascaded signal terminal; The cascaded signal terminal of the i-th stage circuit unit is electrically connected to the input terminal of the third tri-state inverter of the generation module of the (i+1)-th stage circuit unit.
15. The driving circuit according to claim 2, characterized in that, The number of the circuit units is multiple, and the multiple circuit units are cascaded together. The driving circuit includes a first output mode and a second output mode; In the first output mode, the selection signal provides a first level, each of the circuit units outputs the first control signal, and the functional pulses of each of the first control signals are sequentially shifted and output. In the second output mode, the selection signal provides a second level, each of the circuit units outputs the second control signal, and the functional pulses of each of the second control signals are output synchronously.
16. A display panel, characterized in that, Includes the driving circuit, light emission control signal line, and pixel circuit as described in any one of claims 1 to 15; The light emission control signal line is electrically connected to the output terminal of the output module of the driving circuit, and The light emission control signal line is electrically connected to the light emission control terminal of the pixel circuit.
17. A display device, characterized in that, Includes the display panel as described in claim 16.
18. A driving method, characterized in that, The driving circuit includes a selection module, a first signal module, a second signal module, and an output module, wherein the driving circuit is selected from any of the driving circuits described in claims 1 to 15. The driving method includes: The selection module receives a selection signal at its input terminal; When the selection signal is a high-level signal, the first signal module and the output module are turned on, and the first control signal output by the first signal module is sent to the output module. When the selection signal is a low-level signal, the second signal module is connected to the output module, and the second control signal output by the second signal module is sent to the output module.
Citation Information
Patent Citations
Emission driver and display device including the same
CN105321447A